Offset voltage calibration circuit and method and transmitter local oscillator leakage calibration system

Abstract

The invention provides an offset voltage calibration circuit and method, and the method comprises the steps: comparing two differential output signals of a to-be-calibrated analog circuit through a comparator, and carrying out the offset voltage calibration of the to-be-calibrated analog circuit through a second offset voltage calibration circuit; firstly, the offset voltage generated by the comparator is calibrated through the first offset voltage calibration circuit, so that the influence of the offset voltage of the comparator on the calibration accuracy of the analog circuit to be calibrated is effectively avoided, and the calibration result is more accurate; the invention further provides a transmitter local oscillator leakage calibration system, the two offset voltage calibration circuits are used for conducting offset voltage calibration on the I in-phase signal modulation circuit and the Q orthogonal signal modulation circuit respectively, so that local oscillator leakage of a radio frequency transmitter link is calibrated, the calibration precision is high, and the calibration precision is high. And the two offset voltage calibration circuits can be integrated in an original radio frequency transceiver chip, occupy a small chip area and can be used in large-scale mass production.

Description

Technical Field

[0001] The present application relates to the field of wireless communication technology, and in particular to an offset voltage calibration circuit, method and transmitter local oscillator leakage calibration system. Background Art

[0002] In the RF transmission circuit, if the mixer's local oscillator signal leaks to the RF output, it is called transmitter local oscillator leakage. Transmitter local oscillator leakage will cause the transmitter's output signal to have undesirable RF components, affecting the quality of the transmitted signal, making it difficult for the RF receiver to correctly demodulate the signal, thereby affecting the communication quality, and may also violate the radio transmission protocol specifications and interfere with other communication channels. Transmitter local oscillator leakage is mainly due to deviations in the process manufacturing process, resulting in a DC offset voltage in the differential signal output by the low-pass filter in the circuit. The larger the DC offset voltage, the greater the local oscillator leakage.

[0003] The existing transmitter local oscillator leakage calibration scheme mainly includes: using two analog-to-digital converters to sample the DC offset voltage generated by each low-pass filter in the I in-phase signal modulation circuit and the Q orthogonal signal modulation circuit respectively, and converting them into digital signals; filtering the output digital signal through a low-pass filter and inputting it into a local oscillator leakage calibration algorithm module for offset voltage calibration, and determining the optimal offset voltage compensation direction and compensation value through a microcontroller; outputting the optimal offset voltage compensation direction and compensation value to the current array of the RF transmission circuit through a serial peripheral interface to compensate for the offset voltage generated by each low-pass filter.

[0004] However, on the one hand, the analog-to-digital converter used for sampling in the transmitter local oscillator leakage calibration scheme will generate a new offset voltage, resulting in the output offset voltage compensation value not being the optimal value, seriously affecting the calibration accuracy of the transmitter local oscillator leakage in the RF transmission circuit; on the other hand, the local oscillator leakage calibration circuit composed of the analog-to-digital converter, low-pass filter, local oscillator leakage calibration algorithm module, microcontroller and serial peripheral interface of the transmitter local oscillator leakage calibration scheme requires additional chips to implement, which is not suitable for use in large-scale mass production; and if the local oscillator leakage calibration circuit is to be integrated into the original RF transceiver chip, the chip area will be larger, increasing the chip cost. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide an offset voltage calibration circuit, method and transmitter local oscillator leakage calibration system to solve the problems of low transmitter local oscillator leakage calibration accuracy and large chip area and high cost in the prior art.

[0006] To achieve the above-mentioned purpose and other related purposes, the first aspect of the present application provides an offset voltage calibration circuit, which is used to perform offset voltage calibration on an analog circuit to be calibrated, and includes: a comparator, a calibration algorithm control circuit, a first offset voltage calibration circuit and a second offset voltage calibration circuit; wherein the input end of the calibration algorithm control circuit is connected to the output end of the comparator, and the two output ends of the calibration algorithm control circuit are respectively connected to the input end of the first offset voltage calibration circuit and the input end of the second offset voltage calibration circuit; the output end of the first offset voltage calibration circuit is also connected to the comparator; the two input ends of the comparator are respectively connected to the two differential output ends of the analog circuit to be calibrated, and the output end of the second offset voltage calibration circuit is also connected to the analog circuit to be calibrated; the calibration algorithm control circuit is used to control the comparator, the first offset voltage calibration circuit and the second offset voltage calibration circuit to perform offset voltage calibration on the analog circuit to be calibrated, and the calibration method includes: controlling the calibration algorithm to calibrate the analog circuit to be calibrated by the calibration algorithm; The circuit controls the comparator to be disconnected from the analog circuit to be calibrated, controls the two input terminals of the comparator to be short-circuited, and inputs a test voltage signal to determine the voltage direction of the first offset voltage generated by the comparator according to the output result of the comparator; controls the first offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the first offset voltage through the calibration algorithm control circuit, and generates a corresponding compensation current to calibrate the first offset voltage; controls the two input terminals of the comparator to be disconnected and short-circuited through the calibration algorithm control circuit, and controls the two input terminals of the comparator to be connected to the two differential output terminals of the analog circuit to be calibrated again; compares the two differential signals output by the analog circuit to be calibrated through the comparator, and determines the voltage direction of the second offset voltage generated by the analog circuit to be calibrated accordingly; controls the second offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the second offset voltage through the calibration algorithm control circuit, and generates a corresponding compensation current to calibrate the second offset voltage.

[0007] In some embodiments of the first aspect of the present application, the two input terminals of the comparator include a non-inverting input terminal and an inverting input terminal; the two differential output terminals of the analog circuit to be calibrated include a positive output terminal and a negative output terminal; a first switch is connected between the non-inverting input terminal of the comparator and the positive output terminal of the analog circuit to be calibrated, a second switch is connected between the inverting input terminal of the comparator and the negative output terminal of the analog circuit to be calibrated, and a third switch is connected between the non-inverting input terminal and the inverting input terminal of the comparator; the method of controlling the short circuit of the comparator by the calibration algorithm control circuit includes: controlling the calibration algorithm control circuit by the calibration algorithm control circuit The first switch and the second switch are disconnected, and the third switch is controlled to be closed, so as to short-circuit the non-inverting input terminal and the inverting input terminal of the comparator and receive the test voltage signal; the method of controlling the input terminal of the comparator to be connected with the output terminal of the analog circuit to be calibrated through the calibration algorithm control circuit includes: controlling the third switch to be disconnected, and controlling the first switch and the second switch to be closed through the calibration algorithm control circuit, so as to respectively connect the non-inverting input terminal and the inverting input terminal of the comparator to the positive output terminal and the negative output terminal of the analog circuit to be calibrated, and receive the differential signal output by the analog circuit to be calibrated.

[0008] In some embodiments of the first aspect of the present application, the first offset voltage calibration circuit includes: a first compensation value calculation circuit and a second compensation value calculation circuit; wherein the first compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit and is connected to the in-phase compensation input end of the comparator; the second compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit and is connected to the inverting compensation input end of the comparator; the first offset voltage calibration circuit is controlled by the calibration algorithm control circuit to determine its compensation direction according to the voltage direction of the first offset voltage, and generate a corresponding compensation current to compensate the offset voltage. The method for calibrating the first offset voltage includes: determining the compensation direction of the first offset voltage according to the voltage direction of the first offset voltage through the calibration algorithm control circuit, and judging whether the compensation direction is positive or negative; if the compensation direction is positive, controlling the first compensation value calculation circuit to generate a compensation current of the first offset voltage through the calibration algorithm control circuit to negatively compensate the voltage of the in-phase compensation input terminal; if the compensation direction is negative, controlling the second compensation value calculation circuit to generate a compensation current of the first offset voltage through the calibration algorithm control circuit to negatively compensate the voltage of the inverting compensation input terminal.

[0009] In some embodiments of the first aspect of the present application, the first compensation value calculation circuit and the second compensation value calculation circuit use the same compensation value calculation circuit structure to generate a compensation current for the first offset voltage; wherein the compensation value calculation circuit structure includes: a first compensation value calculation subcircuit, a second compensation value calculation subcircuit, a third compensation value calculation subcircuit and a fourth compensation value calculation subcircuit connected in parallel; one end of the first compensation value calculation subcircuit, the second compensation value calculation subcircuit, the third compensation value calculation subcircuit and the fourth compensation value calculation subcircuit is connected to the same-phase compensation input terminal or the reverse compensation input terminal in the comparator, and the other end is grounded; the first compensation value calculation subcircuit, the second compensation value calculation subcircuit, the third compensation value calculation subcircuit and the fourth compensation value calculation subcircuit respectively include a current array and a switch, which are used to output a preset first compensation current, a second compensation current, a third compensation current and a fourth compensation current respectively after being turned on; the switch in each compensation value calculation subcircuit is connected to the calibration algorithm control circuit, and is used to be closed or opened by the control of the calibration algorithm control circuit; the first compensation current is greater than the second compensation current, the second compensation current is greater than the third compensation current, and the third compensation current is greater than the fourth compensation current.

[0010] In some embodiments of the first aspect of the present application, the method of controlling the compensation value calculation circuit structure to generate a compensation current for the first offset voltage through the calibration algorithm control circuit includes: after determining the compensation direction of the first offset voltage, controlling the first compensation value calculation subcircuit in the specified compensation value calculation circuit to be turned on through the calibration algorithm control circuit, and using the first binary code output by it as the primary compensation value of the offset voltage, thereby generating a corresponding compensation current signal; judging whether the compensation current needs to be increased or decreased according to the output result of the comparator received again; if the compensation current needs to be increased, controlling the corresponding second compensation value calculation subcircuit to be turned on through the calibration algorithm control circuit; if the compensation current needs to be reduced, controlling the corresponding first compensation value calculation subcircuit to be turned off through the calibration algorithm control circuit, and controlling the corresponding second compensation value calculation subcircuit to be turned on; adding the compensation currents output by each turned-on circuit and updating the primary compensation current; and determining whether the compensation current needs to be increased or decreased according to the output result of the comparator received for the third time. The output result of the comparator received for the fourth time is used to determine whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit is used to control the corresponding third compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit is used to control the corresponding second compensation value calculation subcircuit to be turned off, and the corresponding third compensation value calculation subcircuit to be turned on; the compensation currents output by each turned-on circuit are added together to update the primary compensation current; according to the output result of the comparator received for the fourth time, it is determined again whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit is used to control the corresponding fourth compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit is used to control the corresponding third compensation value calculation subcircuit to be turned off, and the corresponding fourth compensation value calculation subcircuit to be turned on; the compensation currents output by each turned-on circuit are added together to output the optimal compensation current for the first offset voltage.

[0011] In some embodiments of the first aspect of the present application, the second offset voltage calibration circuit includes: a third compensation value calculation circuit and a fourth compensation value calculation circuit; wherein the third compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit and is connected to the compensation input positive end in the analog circuit to be calibrated; the fourth compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit and is connected to the compensation input negative end in the analog circuit to be calibrated; the calibration algorithm control circuit is used to control the second offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the second offset voltage and generate a corresponding compensation current, so as to calibrate the second offset voltage, including: controlling the calibration algorithm control circuit to determine the compensation direction according to the voltage direction of the second offset voltage and generating a corresponding compensation current according to the voltage direction of the second offset voltage. voltage direction, determine the compensation direction of the second offset voltage, and judge whether the compensation direction is positive or negative; if the compensation direction is positive, control the third compensation value calculation circuit to generate a fifth compensation current of the second offset voltage through the calibration algorithm control circuit, so as to positively compensate the positive end of the compensation input; and at the same time control the fourth compensation value calculation circuit to generate a sixth compensation current of the offset voltage, so as to negatively compensate the negative end of the compensation input; if the compensation direction is negative, control the third compensation value calculation circuit to generate a seventh compensation current of the second offset voltage, so as to negatively compensate the positive end of the compensation input; and at the same time control the fourth compensation value calculation circuit to generate an eighth compensation current of the second offset voltage, so as to positively compensate the negative end of the compensation input.

[0012] In some embodiments of the first aspect of the present application, the third compensation value calculation circuit includes: a first compensation unit and a second compensation unit; the fourth compensation value calculation circuit includes: a third compensation unit and a fourth compensation unit; wherein each compensation unit includes a fifth compensation value calculation sub-circuit, a sixth compensation value calculation sub-circuit, a seventh compensation value calculation sub-circuit and an eighth compensation value calculation sub-circuit; each compensation value calculation sub-circuit of the first compensation unit is connected in parallel, one end of which is connected to a power supply and the other end is connected to the compensation input positive terminal of the analog circuit to be calibrated; each compensation value calculation sub-circuit of the second compensation unit is connected in parallel, one end of which is connected to the analog circuit to be calibrated The compensation input positive terminal in the calibration analog circuit is connected to the ground at the other end; the compensation value calculation sub-circuits of the third compensation unit are connected in parallel, one end of which is connected to a power supply, and the other end is connected to the compensation input negative terminal in the analog circuit to be calibrated; the compensation value calculation sub-circuits of the fourth compensation unit are connected in parallel, one end of which is connected to the compensation input negative terminal in the analog circuit to be calibrated, and the other end is grounded; each compensation value calculation sub-circuit respectively includes a current array and a switch, which are used to output a preset compensation current after being turned on; the switches in each compensation value calculation sub-circuit are connected to the calibration algorithm control circuit, and are used to be closed or opened through the control of the calibration algorithm control circuit.

[0013] In some embodiments of the first aspect of the present application, the calibration algorithm control circuit is used to control the second offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the second offset voltage, and to generate a corresponding compensation current, so as to calibrate the second offset voltage. The method includes: when the compensation direction of the second offset voltage is positive, the calibration algorithm control circuit is used to control the switch of the fifth compensation value calculation subcircuit in the first compensation unit to be closed, and the switch of the fifth compensation value calculation subcircuit in the second compensation unit to be disconnected, so as to positively compensate the compensation input positive terminal through the third compensation value calculation circuit; at the same time, the switch of the fifth compensation value calculation subcircuit in the third compensation unit is controlled to be disconnected, and the switch of the fifth compensation value calculation subcircuit in the second compensation unit is controlled to be closed. The switch of the fifth compensation value calculation subcircuit in the four compensation units is closed to negatively compensate the negative end of the compensation input through the fourth compensation value calculation circuit; when the compensation direction of the second offset voltage is negative, the switch of the fifth compensation value calculation subcircuit in the first compensation unit is controlled to be disconnected, and the switch of the fifth compensation value calculation subcircuit in the second compensation unit is controlled to be closed, so as to negatively compensate the positive end of the compensation input through the third compensation value calculation circuit; at the same time, the switch of the fifth compensation value calculation subcircuit in the third compensation unit is controlled to be closed, and the switch of the fifth compensation value calculation subcircuit in the fourth compensation unit is controlled to be disconnected, so as to positively compensate the negative end of the compensation input through the fourth compensation value calculation circuit.

[0014] To achieve the above-mentioned purpose and other related purposes, the second aspect of the present application provides an offset voltage calibration method, which is used to perform offset voltage calibration on an analog circuit to be calibrated by using the offset voltage calibration circuit described in each of the above-mentioned embodiments, and includes: controlling the comparator to be disconnected from the analog circuit to be calibrated by the calibration algorithm control circuit, and controlling the two input terminals of the comparator to be short-circuited, inputting a test voltage signal, so as to determine the voltage direction of the first offset voltage generated by the comparator according to the output result of the comparator; controlling the first offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the first offset voltage by using the calibration algorithm control circuit. , and generate a corresponding compensation current to calibrate the first offset voltage; through the calibration algorithm control circuit, control the two input terminals of the comparator to be disconnected and short-circuited, and control the two input terminals of the comparator to be respectively connected to the two differential output terminals of the analog circuit to be calibrated again; compare the two differential signals output by the analog circuit to be calibrated by the comparator, and determine the voltage direction of the second offset voltage generated by the analog circuit to be calibrated; through the calibration algorithm control circuit, control the second offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the second offset voltage, and generate a corresponding compensation current to calibrate the second offset voltage.

[0015] To achieve the above-mentioned purpose and other related purposes, the third aspect of the present application provides a transmitter local oscillator leakage calibration system, which includes: an I in-phase signal calibration module, including the offset voltage calibration circuit described in the above-mentioned embodiments, which is used to perform offset voltage calibration on the I in-phase signal modulation circuit to calibrate the local oscillator leakage of the radio frequency transmitter link; wherein the comparator in the offset voltage calibration circuit is connected to the output end of the low-pass filter in the I in-phase signal modulation circuit, and the second offset voltage calibration circuit in the offset voltage calibration circuit is connected to the input end of the operational amplifier in the low-pass filter; a Q quadrature signal calibration module, including the offset voltage calibration circuit described in the above-mentioned embodiments, which is used to perform offset voltage calibration on the Q quadrature signal modulation circuit to further calibrate the local oscillator leakage of the radio frequency transmitter link; wherein the comparator in the offset voltage calibration circuit is connected to the output end of the low-pass filter in the Q quadrature signal modulation circuit, and the second offset voltage calibration circuit in the offset voltage calibration circuit is connected to the input end of the operational amplifier in the low-pass filter.

[0016] As described above, the present application has the following beneficial effects: the present application provides an offset voltage calibration circuit and method, which compares two output signals of an analog circuit to be calibrated by a comparator, and before performing offset voltage calibration on the analog circuit to be calibrated by a second offset voltage calibration circuit, first calibrates the offset voltage generated by the comparator by a first offset voltage calibration circuit, thereby effectively avoiding the influence of the offset voltage of the comparator itself on the calibration accuracy of the analog circuit to be calibrated, so that the calibration result is more accurate; the present application also provides a transmitter local oscillator leakage calibration system, which uses two of the offset voltage calibration circuits to perform offset voltage calibration on the I in-phase signal modulation circuit and the Q orthogonal signal modulation circuit respectively, thereby calibrating the local oscillator leakage of the RF transmitter link, with high calibration accuracy, and the two offset voltage calibration circuits can be integrated in the original RF transceiver chip, occupying a small chip area, and can be used in large-scale mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Shown is a schematic diagram of the structure of an offset voltage calibration circuit in an embodiment of the present application.

[0018] Figure 2 Shown is a schematic diagram of the structure of a comparator in one embodiment of the present application.

[0019] Figure 3 Shown is a flow chart of an offset voltage calibration method according to an embodiment of the present application.

[0020] Figure 4 It is a connection diagram of the calibration algorithm control circuit and the first offset voltage calibration circuit in one embodiment of the present application.

[0021] Figure 5 It is a connection diagram of the calibration algorithm control circuit and the second offset voltage calibration circuit in one embodiment of the present application.

[0022] Figure 6 Shown is a schematic diagram of the structure of a transmitter local oscillator leakage calibration system in one embodiment of the present application. DETAILED DESCRIPTION

[0023] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0024] The present application provides an offset voltage calibration circuit, method and transmitter local oscillator leakage calibration system, aiming to solve the problems of low transmitter local oscillator leakage calibration accuracy and large chip area and high cost in the prior art, effectively improve the calibration accuracy of transmitter local oscillator leakage, and the offset voltage calibration circuit provided by the present application can be integrated in the original RF transceiver chip, occupying a small chip area, and can be used in large-scale mass production.

[0025] At the same time, in order to make the purpose, technical solutions and advantages of this application more clear, the technical solutions in the embodiments of this application are further described in detail through the following embodiments and in combination with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain this application and are not used to limit the invention.

[0026] like Figure 1 , which shows a schematic diagram of the structure of an offset voltage calibration circuit in an embodiment of the present application. The offset voltage calibration circuit in this embodiment includes: a comparator 1, a calibration algorithm control circuit 2, a first offset voltage calibration circuit 3 and a second offset voltage calibration circuit 4.

[0027] Among them, the input end of the calibration algorithm control circuit 2 is connected to the output end of the comparator 1, and the two output ends of the calibration algorithm control circuit 2 are respectively connected to the input end of the first offset voltage calibration circuit 3 and the input end of the second offset voltage calibration circuit 4; the output end of the first offset voltage calibration circuit 3 is also connected to the comparator 1; the two input ends of the comparator 1 are respectively connected to the two differential output ends of the analog circuit to be calibrated, and the output end of the second offset voltage calibration circuit 4 is connected to the analog circuit to be calibrated.

[0028] In one embodiment, the two input terminals of the comparator 1 include a non-inverting input terminal and an inverting input terminal, which are used to compare the magnitudes of the two input voltages and output a binary signal according to the comparison result; specifically, when the voltage of the non-inverting input terminal is higher than the voltage of the inverting input terminal, a high-level signal is output, otherwise a low-level signal is output. The two differential output terminals of the analog circuit to be calibrated include a positive output terminal and a negative output terminal. Figure 1 As shown, a first switch 5 is connected between the non-inverting input terminal of the comparator 1 and the positive output terminal of the analog circuit to be calibrated, a second switch 6 is connected between the inverting input terminal of the comparator 1 and the negative output terminal of the analog circuit to be calibrated, and a third switch 7 is connected between the non-inverting input terminal and the inverting input terminal of the comparator 1.

[0029] In a preferred embodiment, if Figure 2 As shown, the comparator 1 adopts a push-pull structure of complementary NMOS (N-type metal oxide semiconductor) and PMOS (P-type metal oxide semiconductor). In order to improve the small signal gain of the comparator, the intermediate stage adopts a common source and common gate architecture. The comparator 1 includes: input NMOS tubes MN0 and MN1, input PMOS tubes MP0 and MP1, current sinks MN2 of the input NMOS tubes MN0 and MN1, current source MP2 of the input PMOS tubes MP0 / MP1, current sources MP3 and MP4 of the folded common source and common gate stage, current sinks MN3 and MN4 of the folded common source and common gate stage, common gate tubes MP5 and MP6 of the PMOS folded common source and common gate stage, common gate tubes MN5 and MN6 of the NMOS folded common source and common gate stage, and a buffer for providing a large swing output, the buffer includes MN7, MN8, MP7 and MP8.

[0030] Specifically, the non-inverting input terminal of comparator 1 is Figure 2 The VIP shown in Figure 1 has an inverting input terminal of Figure 2VIN is shown. Among them, VIP is connected to the gate of MN0 / MP0 at the same time, VIN is connected to the gate of MN1 / MP1 at the same time, VBP0 is connected to the gate of MP2 / MP3 / MP4 at the same time, VBN0 is connected to the gate of MN2, the drain of MN2 is connected to the source of MN0 and the source of MN1 at the same time, the drain of MP2 is connected to the source of MP0 and the source of MP1 at the same time, the drain of MN0 is connected to the drain of MP3 and the source of MP5 at the same time, the drain of MN1 is connected to the drain of MP4 and the source of MP6 at the same time, the drain of MP0 VIP_I is connected to the drain of MN3 and the source of MN5 at the same time, the drain of MP1 VIN_I is connected to the drain of MN4 and The source of MN6, the gate of MN3 is connected to the drain of MP5, the drain of MN5 and the gate of MN4 at the same time, VBN1 is connected to the gates of MN5 and MN6 at the same time, VBP1 is connected to the gates of MP5 and MP6 at the same time, the drain of MN6 is connected to the gate of MN7, the drain of MP6 and the gate of MP7 at the same time, the drain of MN7 is connected to the drain of MP7, the gate of MN8 and the gate of MP8 at the same time, the output VOUT is connected to the drain of MN8 and MP8 at the same time, AVDD is connected to the sources of MP2 / MP3 / MP4 / MP7 / MP8 at the same time, and AGND is connected to the sources of MN2 / MN3 / MN4 / MN7 / MN8 at the same time.

[0031] The current sink MN3 of the folded cascode stage and the drains VIP_I and VIN_I of MN4 can be used as the in-phase compensation input terminal and the inverting compensation input terminal respectively for connecting the output terminal of the first offset voltage calibration circuit 3 to calibrate the first offset voltage of the comparator 1 .

[0032] It should be noted that the specific structure of the comparator 1 can be set according to requirements, such as using only NMOS or only PMOS structure.

[0033] The calibration algorithm control circuit 2 is used to control the comparator 1, the first offset voltage calibration circuit 3 and the second offset voltage calibration circuit 4 to perform offset voltage calibration on the analog circuit to be calibrated. The calibration method is as follows: Figure 3 As shown, it includes steps S1 to S4.

[0034] Step S1: Control the comparator to disconnect from the analog circuit to be calibrated through the calibration algorithm control circuit, and control the two input terminals of the comparator to be short-circuited, and input a test voltage signal to determine the voltage direction of the first offset voltage generated by the comparator according to the output result of the comparator.

[0035] In a specific embodiment, the method of controlling the short-circuit of the comparator 1 through the calibration algorithm control circuit 2 includes: controlling the first switch 5 and the second switch 6 to be disconnected, and controlling the third switch 7 to be closed, so as to short-circuit the non-inverting input terminal and the inverting input terminal of the comparator 1 and receive the test voltage signal through the calibration algorithm control circuit 2.

[0036] It should be understood that, ideally, when the voltages at the two input terminals of comparator 1 are equal, its output result should be 1 / 2. However, due to deviations in the process manufacturing, comparator 1 has an offset voltage, which affects the output of comparator 1. Therefore, comparator 1 needs to be calibrated for the offset voltage.

[0037] The test voltage signal is input to the non-inverting input terminal and the inverting input terminal of the comparator 1 in parallel, and the voltage direction of the first offset voltage generated by the comparator 1 is determined according to the output result of the comparator 1. Specifically, when the output of the comparator 1 is a high-level signal, that is, when the output result of the comparator 1 is 1, the voltage direction of the first offset voltage is determined to be positive; when the output of the comparator 1 is a low-level signal, that is, when the output result of the comparator 1 is 0, the voltage direction of the first offset voltage is determined to be negative.

[0038] Step S2: controlling the first offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the first offset voltage through the calibration algorithm control circuit, and generating a corresponding compensation current to calibrate the first offset voltage.

[0039] In one embodiment, if Figure 4 As shown, the first offset voltage calibration circuit 3 includes: a first compensation value calculation circuit 31 and a second compensation value calculation circuit 32. The first compensation value calculation circuit 31 is connected to the output end of the calibration algorithm control circuit 2 and connected to the in-phase compensation input terminal VIP_I in the comparator 1; the second compensation value calculation circuit 32 is connected to the output end of the calibration algorithm control circuit 2 and connected to the inverting compensation input terminal VIN_I in the comparator 1.

[0040] In the present embodiment, in step S2, the method of calibrating the first offset voltage by controlling the first compensation value calculation circuit 31 and the second compensation value calculation circuit 32 through the calibration algorithm control circuit 2 includes: determining the compensation direction of the first offset voltage according to the voltage direction of the first offset voltage through the calibration algorithm control circuit 2, and judging whether the compensation direction is positive or negative; if the compensation direction is positive, controlling the first compensation value calculation circuit 31 through the calibration algorithm control circuit 2 to generate a compensation current of the first offset voltage to negatively compensate the voltage of the in-phase compensation input terminal VIP_I; if the compensation direction is negative, controlling the second compensation value calculation circuit 32 through the calibration algorithm control circuit 2 to generate a compensation current of the first offset voltage to negatively compensate the voltage of the in-phase compensation input terminal VIN_I.

[0041] In one embodiment, according to the voltage direction of the first offset voltage, the method of determining the compensation direction of the first offset voltage includes: if the voltage direction of the first offset voltage is positive, then the compensation direction is determined to be negative; if the voltage direction of the first offset voltage is negative, then the compensation direction is determined to be positive. Combined with the output result of the comparator 1, when the comparator 1 outputs a high-level signal, that is, when the output result of the comparator 1 is 1, the voltage direction of the first offset voltage is positive, and the compensation direction is determined to be negative; when the comparator 1 outputs a low-level signal, when the output result of the comparator 1 is 0, the voltage direction of the first offset voltage is negative, and the compensation direction is determined to be positive.

[0042] In detail, when the output result of the comparator 1 is 1, the calibration algorithm control circuit 2 is used to control the second compensation value calculation circuit 32 to generate a compensation current for the first offset voltage to negatively compensate for the voltage of the inverting compensation input terminal VIN_I; when the output result of the comparator 1 is 0, the calibration algorithm control circuit 2 is used to control the first compensation value calculation circuit 31 to generate a compensation current for the first offset voltage to negatively compensate for the voltage of the inverting compensation input terminal VIP_I.

[0043] In a specific embodiment, the first compensation value calculation circuit 31 and the second compensation value calculation circuit 32 use the same compensation value calculation circuit structure to generate the compensation current of the first offset voltage.

[0044] like Figure 4 As shown, the compensation value calculation circuit structure includes: a first compensation value calculation subcircuit, a second compensation value calculation subcircuit, a third compensation value calculation subcircuit and a fourth compensation value calculation subcircuit connected in parallel; one end of the first compensation value calculation subcircuit, the second compensation value calculation subcircuit, the third compensation value calculation subcircuit and the fourth compensation value calculation subcircuit is connected to the in-phase compensation input terminal VIP_I or the inverting compensation input terminal VIN_I in the comparator 1, and the other end is grounded. The first compensation value calculation subcircuit, the second compensation value calculation subcircuit, the third compensation value calculation subcircuit and the fourth compensation value calculation subcircuit respectively include a current array and a switch, which are used to output the preset first compensation current, the second compensation current, the third compensation current and the fourth compensation current respectively after being turned on. One end of the switch in each compensation value calculation subcircuit is connected to the corresponding current array, and the other end is grounded, and is connected to the calibration algorithm control circuit, and is used to be closed or opened by the control of the calibration algorithm control circuit, so as to turn on or off each compensation value calculation subcircuit. The first compensation current is greater than the second compensation current, the second compensation current is greater than the third compensation current, and the third compensation current is greater than the fourth compensation current.

[0045] In a preferred embodiment, the first compensation value calculation circuit 31 and the second compensation value calculation circuit 32 can be implemented by a 4-bit digital-to-analog converter. The first compensation current output by the first compensation value calculation subcircuit after being turned on is 8 times the minimum compensation current; the second compensation current output by the second compensation value calculation subcircuit after being turned on is 4 times the minimum compensation current; the third compensation current output by the third compensation value calculation subcircuit after being turned on is 2 times the minimum compensation current; the fourth compensation current output by the fourth compensation value calculation subcircuit after being turned on is the minimum compensation current. Figure 4 As shown, the minimum compensation current supported by the first compensation value calculation circuit 31 and the second compensation value calculation circuit 32 is I, and the compensation currents output by each compensation value calculation sub-circuit are I, 2I, 4I and 8I.

[0046] It should be noted that the first compensation value calculation circuit 31 and the second compensation value calculation circuit 32 can be provided with different numbers of compensation value calculation sub-circuits according to requirements, and the present application does not limit the number of compensation value calculation sub-circuits.

[0047] The method of controlling the compensation value calculation circuit structure to generate the compensation current of the first offset voltage by the calibration algorithm control circuit 2 includes the following steps.

[0048] ① After determining the compensation direction of the first offset voltage, the calibration algorithm control circuit 2 controls the first compensation value calculation subcircuit in the specified compensation value calculation circuit to be turned on, and outputs the first compensation current as the primary compensation current output of the first offset voltage.

[0049] ② According to the output result of the comparator 1 received again, determine whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit 2 is used to control the corresponding second compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit 2 is used to control the corresponding first compensation value calculation subcircuit to be disconnected, and the corresponding second compensation value calculation subcircuit to be turned on; the compensation currents output by each turned-on circuit are added together to update the primary compensation current.

[0050] ③ According to the output result of the comparator 1 received for the third time, it is determined again whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit 2 is used to control the corresponding third compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit 2 is used to control the corresponding second compensation value calculation subcircuit to be disconnected, and the corresponding third compensation value calculation subcircuit is controlled to be turned on; the compensation currents output by each turned-on circuit are added together to update the primary compensation current.

[0051] ④ According to the output result of the comparator 1 received for the fourth time, it is determined again whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit 2 is used to control the corresponding fourth compensation value calculation sub-circuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit 2 is used to control the corresponding third compensation value calculation sub-circuit to be disconnected, and the corresponding compensation value calculation sub-circuit is controlled to be turned on; the compensation currents output by each turned-on circuit are added together and output as the optimal compensation current for the first offset voltage.

[0052] For example, when the compensation direction of the first offset voltage is positive, the calibration algorithm control circuit 2 controls the switch of the first compensation value calculation subcircuit in the first compensation value calculation circuit 31 to be closed. At this time, the output compensation current is 8I (where I is the minimum compensation current supported by the first compensation value calculation circuit 31); the direction of the compensation current is from the in-phase compensation input terminal VIP_I of the comparator 1 to the first compensation value calculation circuit, which can negatively compensate the voltage of the in-phase compensation input terminal VIP_I, thereby calibrating the first offset voltage.

[0053] After the first offset voltage is calibrated, it is determined whether the compensation current needs to be increased or decreased according to the output result of the comparator 1. Specifically, if the comparator 1 outputs a high-level signal, that is, the output result of the comparator 1 is 1, it indicates that the compensation current needs to be reduced; conversely, if the comparator 1 outputs a low-level signal, that is, the output result of the comparator 1 is 0, it indicates that the compensation current needs to be increased.

[0054] If the compensation current needs to be increased, the calibration algorithm control circuit 2 controls the switch of the second compensation value calculation subcircuit in the first compensation value calculation circuit 31 to be closed, and the compensation current is updated to 8I+4I=12I. Same as the above steps, when the output result of the comparator 1 is received for the third time, it is determined whether the compensation current needs to be increased or decreased; at this time, if the comparator 1 outputs a high level signal, the compensation current needs to be decreased, the switch of the second compensation value calculation subcircuit in the first compensation value calculation circuit 31 is controlled to be disconnected, and the switch of the third compensation value calculation subcircuit is controlled to be closed, and the compensation current is updated to 8I+2I=10I.

[0055] Repeat the above operation. If the output of the comparator 1 is still a high-level signal for the fourth time, the switch of the third compensation value calculation subcircuit in the first compensation value calculation circuit 31 is controlled to be disconnected, and the switch of the fourth compensation value calculation subcircuit is controlled to be closed, and the compensation current is updated to 8I+I=9I, that is, the optimal compensation current of the first offset voltage is 9I, which can accurately negatively compensate the voltage of the in-phase compensation input terminal VIP_I to accurately calibrate the first offset voltage.

[0056] Step S3: Control the two input terminals of the comparator to disconnect and short-circuit through the calibration algorithm control circuit, and control the two input terminals of the comparator to be respectively connected to the two differential output terminals of the analog circuit to be calibrated again; compare the two differential signals output by the analog circuit to be calibrated through the comparator, and determine the voltage direction of the second offset voltage generated by the analog circuit to be calibrated accordingly.

[0057] In this embodiment, the analog circuit to be calibrated adopts differential output. Differential output is very important in high-speed communication and precise signal transmission. It mainly uses paired wires to transmit signals. The signal amplitudes on these wires are equal but the phases are opposite. Differential output has strong anti-interference ability and can suppress electromagnetic interference. The receiving end of the differential signal, such as comparator 1, mainly judges the logic state by comparing the voltage difference between the two wires, which is more accurate than the single-ended signal.

[0058] In a specific embodiment, the method of controlling the input terminal of the comparator 1 to be connected with the output terminal of the analog circuit to be calibrated through the calibration algorithm control circuit 2 includes: controlling the third switch 7 to be disconnected, and controlling the first switch 5 and the second switch 6 to be closed through the calibration algorithm control circuit 2, so as to connect the non-inverting input terminal and the inverting input terminal of the comparator 1 to the positive output terminal and the negative output terminal of the analog circuit to be calibrated respectively, and receive the differential signal output by the analog circuit to be calibrated.

[0059] Comparator 1 compares the differential signal of the two output signals of the analog circuit to be calibrated, and outputs a high level signal or a low level signal according to the voltage difference therebetween. If a high level signal is output, that is, the output result of comparator 1 is 1, it is determined that the voltage direction of the second offset voltage generated by the analog circuit to be calibrated is positive; if a low level signal is output, that is, the output result of comparator 1 is 0, it is determined that the voltage direction of the second offset voltage is negative.

[0060] Step S4: controlling the second offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the second offset voltage through the calibration algorithm control circuit, and generating a corresponding compensation current to calibrate the second offset voltage.

[0061] The purpose of the design of this embodiment of the present application is that before calibrating the offset voltage of the analog circuit to be calibrated, the offset voltage of the added comparator 1 is first calibrated by the first offset voltage calibration circuit 3, which effectively avoids the influence of the offset voltage of the comparator 1 itself on the calibration accuracy of the analog circuit to be calibrated, so that the calibration result of the analog circuit to be calibrated is more accurate. In addition, the present embodiment uses the comparator 1 to replace the analog-to-digital converter in the prior art, which occupies a smaller chip area and has a lower chip cost.

[0062] In one embodiment, if Figure 5As shown, the second offset voltage calibration circuit 4 includes: a third compensation value calculation circuit 41 and a fourth compensation value calculation circuit 42. The third compensation value calculation circuit 41 is connected to the output end of the calibration algorithm control circuit 2, and is connected to the compensation input positive terminal IOUT_P in the analog circuit to be calibrated; the fourth compensation value calculation circuit 42 is connected to the output end of the calibration algorithm control circuit 2, and is connected to the compensation input negative terminal IOUT_N in the analog circuit to be calibrated.

[0063] In a specific embodiment, the third compensation calculation circuit 41 includes: a first compensation unit 411 and a second compensation unit 412; the fourth compensation value calculation circuit 42 includes: a third compensation unit 421 and a fourth compensation unit 422. Each compensation unit includes a fifth compensation value calculation subcircuit, a sixth compensation value calculation subcircuit, a seventh compensation value calculation subcircuit and an eighth compensation value calculation subcircuit. Each compensation value calculation subcircuit is used to output a preset compensation current after being turned on. The compensation current output by the fifth compensation value calculation subcircuit of different compensation units is greater than the compensation current output by the sixth compensation value calculation subcircuit, the compensation current output by the sixth compensation value calculation subcircuit of different compensation units is greater than the compensation current output by the seventh compensation value calculation subcircuit, and the compensation current output by the seventh compensation value calculation subcircuit of different compensation units is greater than the compensation current output by the eighth compensation value calculation subcircuit. In a preferred embodiment, the compensation current output by each fifth compensation value calculation subcircuit is 8I (where I is the preset minimum compensation current); the compensation current output by each sixth compensation value calculation subcircuit is 4I, the compensation current output by each seventh compensation value calculation subcircuit is 2I, and the compensation current output by each eighth compensation value calculation subcircuit is I.

[0064] like Figure 5 As shown, each compensation value calculation subcircuit of the first compensation unit 411 is connected in parallel, one end is connected to a power supply, and the other end is connected to the compensation input positive terminal IOUT_P in the analog circuit to be calibrated; each compensation value calculation subcircuit of the second compensation unit 412 is connected in parallel, one end is connected to the compensation input positive terminal IOUT_P in the analog circuit to be calibrated, and the other end is grounded; each compensation value calculation subcircuit of the third compensation unit 421 is connected in parallel, one end is connected to a power supply, and the other end is connected to the compensation input negative terminal IOUT_N in the analog circuit to be calibrated; each compensation value calculation subcircuit of the fourth compensation unit 422 is connected in parallel, one end is connected to the compensation input negative terminal IOUT_N in the analog circuit to be calibrated, and the other end is grounded. Each compensation value calculation subcircuit includes a current array and a switch, which is used to output a preset compensation current after being turned on. The switch in each compensation value calculation subcircuit is connected to the calibration algorithm control circuit, and is used to be closed or opened by the control of the calibration algorithm control circuit, thereby controlling each compensation value calculation subcircuit to be turned on or off.

[0065] It should be noted that each compensation unit can be provided with a different number of compensation value calculation sub-circuits according to requirements, and the present application does not limit the number of compensation value calculation sub-circuits.

[0066] The method for calibrating the second offset voltage in this embodiment includes the following steps.

[0067] ① The calibration algorithm controls the circuit 2 to determine the compensation direction of the second offset voltage according to the voltage direction of the second offset voltage, and determines whether the compensation direction is positive or negative.

[0068] In a specific embodiment, if the voltage direction of the second offset voltage is positive, then the compensation direction is determined to be negative; if the voltage direction of the second offset voltage is negative, then the compensation direction is determined to be positive. Combined with the output result of the comparator 1, when the comparator 1 outputs a high-level signal, that is, when the output result of the comparator 1 is 1, the voltage direction of the second offset voltage is positive, and the compensation direction is determined to be negative; when the comparator 1 outputs a low-level signal, when the output result of the comparator 1 is 0, the voltage direction of the second offset voltage is negative, and the compensation direction is determined to be positive.

[0069] ② If the compensation direction is positive, the calibration algorithm control circuit 2 is used to control the third compensation value calculation circuit 41 to generate the fifth compensation current of the second offset voltage to positively compensate the compensation input positive terminal IOUT_P; at the same time, the fourth compensation value calculation circuit 42 is controlled to generate the sixth compensation current of the offset voltage to negatively compensate the compensation input negative terminal IOUT_N.

[0070] Specifically, when the output result of the comparator 1 is 0, the third compensation value calculation circuit 41 is controlled to generate a fifth compensation current of the second offset voltage to positively compensate the compensation input positive terminal IOUT_P; at the same time, the fourth compensation value calculation circuit 42 is controlled to generate a sixth compensation current of the offset voltage to negatively compensate the compensation input negative terminal IOUT_N.

[0071] In one embodiment, the specific implementation method includes: controlling the switch of the fifth compensation value calculation subcircuit in the first compensation unit 411 to close, and controlling the switch of the fifth compensation value calculation subcircuit in the second compensation unit 412 to open, through the calibration algorithm control circuit 2, so as to positively compensate the compensation input positive terminal IOUT_P through the third compensation value calculation circuit 41; at the same time, controlling the switch of the fifth compensation value calculation subcircuit in the third compensation unit 421 to open, and controlling the switch of the fifth compensation value calculation subcircuit in the fourth compensation unit 422 to close, so as to negatively compensate the compensation input negative terminal IOUT_N through the fourth compensation value calculation circuit 42.

[0072] ③ If the compensation direction is negative, the calibration algorithm control circuit 2 is used to control the third compensation value calculation circuit 41 to generate the seventh compensation current of the second offset voltage to negatively compensate the compensation input positive terminal IOUT_P; at the same time, the fourth compensation value calculation circuit 42 is controlled to generate the eighth compensation current of the second offset voltage to positively compensate the compensation input negative terminal IOUT_N.

[0073] Specifically, when the output result of the comparator 1 is 1, the third compensation value calculation circuit 41 is controlled to generate the seventh compensation current of the second offset voltage to negatively compensate the compensation input positive terminal IOUT_P; at the same time, the fourth compensation value calculation circuit 42 is controlled to generate the eighth compensation current of the second offset voltage to positively compensate the compensation input negative terminal IOUT_N.

[0074] In one embodiment, a specific implementation method includes: controlling the switch of the fifth compensation value calculation subcircuit in the first compensation unit 411 to be disconnected, and controlling the switch of the fifth compensation value calculation subcircuit in the second compensation unit 412 to be closed, through the calibration algorithm control circuit 2, so as to negatively compensate the compensation input positive terminal IOUT_P through the third compensation value calculation circuit 41; and at the same time, controlling the switch of the fifth compensation value calculation subcircuit in the third compensation unit 421 to be closed, and controlling the switch of the fifth compensation value calculation subcircuit in the fourth compensation unit 422 to be disconnected, so as to positively compensate the compensation input negative terminal IOUT_N through the fourth compensation value calculation circuit 42.

[0075] In a preferred embodiment, the third compensation value calculation circuit 41 and the fourth compensation value calculation circuit 42 can be implemented by a 4-bit digital-to-analog converter. The method of controlling each compensation value calculation subcircuit to generate a corresponding compensation current through the calibration algorithm control circuit 2 is the same as the method for generating a compensation current for the first offset voltage provided in the above embodiment, and for the sake of brevity, this application will not repeat it.

[0076] like Figure 3 FIG. 2 is a flow chart showing a method for calibrating an offset voltage in an embodiment of the present application. The method for calibrating an offset voltage is applied to the offset voltage calibration circuits in the above embodiments, and includes steps S1 to S4.

[0077] Step S1: Control the comparator to be disconnected from the analog circuit to be calibrated and to be short-circuited through the calibration algorithm control circuit, input a test voltage signal to determine the voltage direction of the first offset voltage generated by the comparator according to the output result of the comparator.

[0078] Step S2: controlling the first offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the first offset voltage through the calibration algorithm control circuit, and generating a corresponding compensation current to calibrate the first offset voltage.

[0079] Step S3: Control the two input terminals of the comparator to disconnect and short-circuit through the calibration algorithm control circuit, and control the two input terminals of the comparator to be respectively connected to the two differential output terminals of the analog circuit to be calibrated again; compare the two differential signals output by the analog circuit to be calibrated through the comparator, and determine the voltage direction of the second offset voltage generated by the analog circuit to be calibrated accordingly.

[0080] Step S4: controlling the second offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the second offset voltage through the calibration algorithm control circuit, and generating a corresponding compensation current to calibrate the second offset voltage.

[0081] It should be understood that the steps of the offset voltage calibration method have been described in detail in the above circuit embodiments, and will not be repeated here for the sake of brevity.

[0082] like Figure 6 FIG. 1 is a schematic diagram showing a structure of a transmitter local oscillator leakage calibration system in an embodiment of the present application. The transmitter local oscillator leakage calibration system includes:

[0083] The I in-phase signal calibration module 601 includes the offset voltage calibration circuit provided in the above embodiments, and is used to perform offset voltage calibration on the I in-phase signal modulation circuit to calibrate the local oscillator leakage of the radio frequency transmitter link; wherein, Figure 6 As shown, the comparator in the offset voltage calibration circuit is connected to the output end of the low-pass filter in the I in-phase signal modulation circuit, and the second offset voltage calibration circuit in the offset voltage calibration circuit is connected to the input end of the operational amplifier in the low-pass filter.

[0084] The Q quadrature signal calibration module 602 includes the offset voltage calibration circuit provided in the above embodiments, and is used to perform offset voltage calibration on the Q quadrature signal modulation circuit to further calibrate the local oscillator leakage of the RF transmitter link; wherein, Figure 6 As shown, the comparator in the offset voltage calibration circuit is connected to the output end of the low-pass filter in the Q quadrature signal modulation circuit, and the second offset voltage calibration circuit in the offset voltage calibration circuit is connected to the input end of the operational amplifier in the low-pass filter.

[0085] It should be noted that, in this embodiment, the I in-phase signal calibration module 601 and the Q orthogonal signal calibration module 602 can be integrated with the I in-phase signal modulation circuit and the Q orthogonal signal modulation circuit in the original RF transceiver chip, which occupies a small chip area and can support large-scale mass production of chips.

[0086] It should be understood that the structures of the offset voltage calibration circuits in the I in-phase signal calibration module 601 and the Q quadrature signal calibration module 602, and the steps of using the corresponding offset voltage calibration circuits to perform offset voltage calibration on the I in-phase signal modulation circuit and the Q quadrature signal modulation circuit, respectively, have been described in detail in the above-mentioned circuit embodiments, and will not be repeated here for the sake of brevity.

[0087] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0088] In summary, the present embodiment provides an offset voltage calibration circuit and method, which compares two output signals of an analog circuit to be calibrated by a comparator, and before the offset voltage of the analog circuit to be calibrated is calibrated by a second offset voltage calibration circuit, the offset voltage generated by the comparator is first calibrated by a first offset voltage calibration circuit, thereby effectively avoiding the influence of the offset voltage of the comparator itself on the calibration accuracy of the analog circuit to be calibrated, so that the calibration result is more accurate; the present application also provides a transmitter local oscillator leakage calibration system, which uses the two offset voltage calibration circuits to respectively perform offset voltage calibration on the I in-phase signal modulation circuit and the Q orthogonal signal modulation circuit, thereby calibrating the local oscillator leakage of the RF transmitter link, with high calibration accuracy, and the two offset voltage calibration circuits can be integrated in the original RF transceiver chip, occupying a small chip area, and can be used in large-scale mass production.

[0089] Therefore, the present application effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0090] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. An offset voltage calibration circuit, characterized in that: Used to perform offset voltage calibration on an analog circuit to be calibrated, the offset voltage calibration circuit comprising: a comparator, a calibration algorithm control circuit, a first offset voltage calibration circuit and a second offset voltage calibration circuit; Wherein, the input end of the calibration algorithm control circuit is connected to the output end of the comparator, and the two output ends of the calibration algorithm control circuit are respectively connected to the input end of the first offset voltage calibration circuit and the input end of the second offset voltage calibration circuit; the output end of the first offset voltage calibration circuit is also connected to the comparator; the two input ends of the comparator are respectively connected to the two differential output ends of the analog circuit to be calibrated, and the output end of the second offset voltage calibration circuit is also connected to the analog circuit to be calibrated; The calibration algorithm control circuit is used to control the comparator, the first offset voltage calibration circuit and the second offset voltage calibration circuit to perform offset voltage calibration on the analog circuit to be calibrated, and the calibration method includes: By means of the calibration algorithm control circuit, the comparator is controlled to be disconnected from the analog circuit to be calibrated, and two input terminals of the comparator are controlled to be short-circuited, and a test voltage signal is input to determine the voltage direction of the first offset voltage generated by the comparator according to the output result of the comparator; Controlling the first offset voltage calibration circuit to determine a compensation direction according to a voltage direction of the first offset voltage and to generate a corresponding compensation current to calibrate the first offset voltage through the calibration algorithm control circuit; The calibration algorithm control circuit is used to control the two input terminals of the comparator to be disconnected and short-circuited, and the two input terminals of the comparator are controlled to be respectively connected to the two differential output terminals of the analog circuit to be calibrated again; the comparator is used to compare the two differential signals output by the analog circuit to be calibrated, and the voltage direction of the second offset voltage generated by the analog circuit to be calibrated is determined accordingly; The calibration algorithm control circuit is used to control the second offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the second offset voltage, and to generate a corresponding compensation current to calibrate the second offset voltage.

2. The offset voltage calibration circuit according to claim 1, characterized in that: The two input terminals of the comparator include a non-inverting input terminal and an inverting input terminal; the two differential output terminals of the analog circuit to be calibrated include a positive output terminal and a negative output terminal; A first switch is connected between the non-inverting input terminal of the comparator and the positive output terminal of the analog circuit to be calibrated, a second switch is connected between the inverting input terminal of the comparator and the negative output terminal of the analog circuit to be calibrated, and a third switch is connected between the non-inverting input terminal and the inverting input terminal of the comparator; The method of controlling the comparator to be short-circuited by the calibration algorithm control circuit includes: controlling the first switch and the second switch to be opened and controlling the third switch to be closed by the calibration algorithm control circuit, so as to short-circuit the non-inverting input terminal and the inverting input terminal of the comparator and receive the test voltage signal; The method of controlling the input terminal of the comparator to be connected to the output terminal of the analog circuit to be calibrated through the calibration algorithm control circuit includes: controlling the third switch to be opened, and controlling the first switch and the second switch to be closed through the calibration algorithm control circuit, so as to respectively connect the non-inverting input terminal and the inverting input terminal of the comparator to the positive output terminal and the negative output terminal of the analog circuit to be calibrated, and receive the differential signal output by the analog circuit to be calibrated.

3. The offset voltage calibration circuit according to claim 1, characterized in that: The first offset voltage calibration circuit includes: a first compensation value calculation circuit and a second compensation value calculation circuit; Wherein, the first compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit and is connected to the in-phase compensation input end of the comparator; the second compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit and is connected to the inverting compensation input end of the comparator; The method of controlling the first offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the first offset voltage and generating a corresponding compensation current to calibrate the first offset voltage includes: By means of the calibration algorithm control circuit, a compensation direction of the first offset voltage is determined according to a voltage direction of the first offset voltage, and whether the compensation direction is positive or negative; If the compensation direction is positive, the calibration algorithm control circuit is used to control the first compensation value calculation circuit to generate a compensation current for the first offset voltage so as to negatively compensate for the voltage at the in-phase compensation input terminal; If the compensation direction is negative, the calibration algorithm control circuit is used to control the second compensation value calculation circuit to generate a compensation current for the first offset voltage so as to negatively compensate for the voltage at the inverting compensation input terminal.

4. The offset voltage calibration circuit according to claim 3, characterized in that: The first compensation value calculation circuit and the second compensation value calculation circuit use the same compensation value calculation circuit structure to generate a compensation current for the first offset voltage; Wherein, the compensation value calculation circuit structure comprises: a first compensation value calculation subcircuit, a second compensation value calculation subcircuit, a third compensation value calculation subcircuit and a fourth compensation value calculation subcircuit connected in parallel; one end of the first compensation value calculation subcircuit, the second compensation value calculation subcircuit, the third compensation value calculation subcircuit and the fourth compensation value calculation subcircuit is connected to the same-phase compensation input terminal or the reverse compensation input terminal in the comparator at one end, and the other end is grounded; The first compensation value calculation subcircuit, the second compensation value calculation subcircuit, the third compensation value calculation subcircuit and the fourth compensation value calculation subcircuit respectively include a current array and a switch, which are used to output a preset first compensation current, a second compensation current, a third compensation current and a fourth compensation current respectively after being turned on; the switch in each compensation value calculation subcircuit is connected to the calibration algorithm control circuit, and is used to be closed or opened by the control of the calibration algorithm control circuit; The first compensation current is greater than the second compensation current, the second compensation current is greater than the third compensation current, and the third compensation current is greater than the fourth compensation current.

5. The offset voltage calibration circuit according to claim 4, characterized in that: The method of controlling the compensation value calculation circuit structure to generate the compensation current of the first offset voltage by the calibration algorithm control circuit includes: After determining the compensation direction of the first offset voltage, the calibration algorithm control circuit controls the first compensation value calculation subcircuit in the specified compensation value calculation circuit to be turned on, and uses the first binary code outputted by the subcircuit as the primary compensation value of the offset voltage to generate a corresponding compensation current signal; According to the output result of the comparator received again, it is determined whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit controls the corresponding second compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit controls the corresponding first compensation value calculation subcircuit to be turned off and controls the corresponding second compensation value calculation subcircuit to be turned on; the compensation currents output by each turned-on circuit are added together to update the primary compensation current; According to the output result of the comparator received for the third time, it is judged again whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit controls the corresponding third compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit controls the corresponding second compensation value calculation subcircuit to be turned off, and controls the corresponding third compensation value calculation subcircuit to be turned on; the compensation currents output by each turned-on circuit are added together to update the primary compensation current; According to the output result of the comparator received for the fourth time, it is determined again whether the compensation current needs to be increased or decreased; if the compensation current needs to be increased, the calibration algorithm control circuit is used to control the corresponding fourth compensation value calculation subcircuit to be turned on; if the compensation current needs to be reduced, the calibration algorithm control circuit is used to control the corresponding third compensation value calculation subcircuit to be disconnected, and the corresponding fourth compensation value calculation subcircuit to be turned on; the compensation currents output by each turned-on circuit are added together and output as the optimal compensation current for the first offset voltage.

6. The offset voltage calibration circuit according to claim 1, characterized in that: The second offset voltage calibration circuit includes: a third compensation value calculation circuit and a fourth compensation value calculation circuit; Wherein, the third compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit, and is also connected to the compensation input positive end in the analog circuit to be calibrated; the fourth compensation value calculation circuit is connected to the output end of the calibration algorithm control circuit, and is also connected to the compensation input negative end in the analog circuit to be calibrated; The method of controlling the second offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the second offset voltage and generating a corresponding compensation current to calibrate the second offset voltage includes: By means of the calibration algorithm control circuit, a compensation direction of the second offset voltage is determined according to a voltage direction of the second offset voltage, and whether the compensation direction is positive or negative; If the compensation direction is positive, the calibration algorithm control circuit is used to control the third compensation value calculation circuit to generate a fifth compensation current of the second offset voltage to positively compensate the compensation input positive terminal; and at the same time, the fourth compensation value calculation circuit is controlled to generate a sixth compensation current of the offset voltage to negatively compensate the compensation input negative terminal; If the compensation direction is negative, the calibration algorithm control circuit is used to control the third compensation value calculation circuit to generate the seventh compensation current of the second offset voltage to negatively compensate the positive end of the compensation input; and at the same time, the fourth compensation value calculation circuit is controlled to generate the eighth compensation current of the second offset voltage to positively compensate the negative end of the compensation input.

7. The offset voltage calibration circuit according to claim 6, characterized in that: The third compensation value calculation circuit includes: a first compensation unit and a second compensation unit; the fourth compensation value calculation circuit includes: a third compensation unit and a fourth compensation unit; Wherein, each compensation unit comprises a fifth compensation value calculation subcircuit, a sixth compensation value calculation subcircuit, a seventh compensation value calculation subcircuit and an eighth compensation value calculation subcircuit; The compensation value calculation subcircuits of the first compensation unit are connected in parallel, with one end connected to a power supply and the other end connected to the positive compensation input terminal of the analog circuit to be calibrated; the compensation value calculation subcircuits of the second compensation unit are connected in parallel, with one end connected to the positive compensation input terminal in the analog circuit to be calibrated and the other end connected to ground; the compensation value calculation subcircuits of the third compensation unit are connected in parallel, with one end connected to a power supply and the other end connected to the negative compensation input terminal in the analog circuit to be calibrated; the compensation value calculation subcircuits of the fourth compensation unit are connected in parallel, with one end connected to the negative compensation input terminal in the analog circuit to be calibrated and the other end connected to ground; each compensation value calculation subcircuit respectively includes a current array and a switch, which is used to output a preset compensation current after being turned on; the switch in each compensation value calculation subcircuit is connected to the calibration algorithm control circuit, and is used to be closed or opened through the control of the calibration algorithm control circuit.

8. The offset voltage calibration circuit according to claim 7, characterized in that: The method of controlling the second offset voltage calibration circuit to determine the compensation direction according to the voltage direction of the second offset voltage and generating a corresponding compensation current to calibrate the second offset voltage includes: When the compensation direction of the second offset voltage is positive, the calibration algorithm control circuit is used to control the switch of the fifth compensation value calculation subcircuit in the first compensation unit to be closed, and the switch of the fifth compensation value calculation subcircuit in the second compensation unit to be opened, so as to positively compensate the compensation input positive terminal through the third compensation value calculation circuit; at the same time, the switch of the fifth compensation value calculation subcircuit in the third compensation unit is controlled to be opened, and the switch of the fifth compensation value calculation subcircuit in the fourth compensation unit is controlled to be closed, so as to negatively compensate the compensation input negative terminal through the fourth compensation value calculation circuit; When the compensation direction of the second offset voltage is negative, the calibration algorithm control circuit is used to control the switch of the fifth compensation value calculation subcircuit in the first compensation unit to be disconnected, and the switch of the fifth compensation value calculation subcircuit in the second compensation unit to be closed, so as to negatively compensate the compensation input positive terminal through the third compensation value calculation circuit; at the same time, the switch of the fifth compensation value calculation subcircuit in the third compensation unit is controlled to be closed, and the switch of the fifth compensation value calculation subcircuit in the fourth compensation unit is controlled to be disconnected, so as to positively compensate the compensation input negative terminal through the fourth compensation value calculation circuit.

9. A method for offset voltage calibration, characterized in that: The method for calibrating the offset voltage of an analog circuit to be calibrated is used to calibrate the offset voltage of the analog circuit to be calibrated by using the offset voltage calibration circuit according to claims 1 to 8, the offset voltage calibration method comprising: By means of the calibration algorithm control circuit, the comparator is controlled to be disconnected from the analog circuit to be calibrated, and two input terminals of the comparator are controlled to be short-circuited, and a test voltage signal is input to determine the voltage direction of the first offset voltage generated by the comparator according to the output result of the comparator; Controlling the first offset voltage calibration circuit to determine a compensation direction according to a voltage direction of the first offset voltage and to generate a corresponding compensation current to calibrate the first offset voltage through the calibration algorithm control circuit; The calibration algorithm control circuit is used to control the two input terminals of the comparator to be disconnected and short-circuited, and the two input terminals of the comparator are controlled to be respectively connected to the two differential output terminals of the analog circuit to be calibrated again; the comparator is used to compare the two differential signals output by the analog circuit to be calibrated, and the voltage direction of the second offset voltage generated by the analog circuit to be calibrated is determined accordingly; The calibration algorithm control circuit is used to control the second offset voltage calibration circuit to determine its compensation direction according to the voltage direction of the second offset voltage, and to generate a corresponding compensation current to calibrate the second offset voltage.

10. A transmitter local oscillator leakage calibration system, characterized in that: include: I in-phase signal calibration module, comprising the offset voltage calibration circuit as claimed in claims 1 to 8, used for performing offset voltage calibration on I in-phase signal modulation circuit to calibrate the local oscillator leakage of the radio frequency transmitter link; wherein the comparator in the offset voltage calibration circuit is connected to the output end of the low-pass filter in the I in-phase signal modulation circuit, and the second offset voltage calibration circuit in the offset voltage calibration circuit is connected to the input end of the operational amplifier in the low-pass filter; A Q quadrature signal calibration module comprises an offset voltage calibration circuit as described in claims 1 to 8, and is used to perform offset voltage calibration on a Q quadrature signal modulation circuit to further calibrate the local oscillator leakage of a radio frequency transmitter link; wherein a comparator in the offset voltage calibration circuit is connected to the output end of a low-pass filter in the Q quadrature signal modulation circuit, and a second offset voltage calibration circuit in the offset voltage calibration circuit is connected to the input end of an operational amplifier in the low-pass filter.

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