Vcsel for emitting laser light

Abstract

The invention relates to a VCSEL (10) for emitting laser light, comprising a base body (12) having a mesa section (14) with a stack of different layers (19) stacked in a stacking direction (18), an emission region (22) from which laser light generated in an active layer (20) in the stack is emitted being formed on an upper side (24) of the mesa section (14), an electrical contact (26) for feeding electrical energy into the active layer (20) is provided on the base body (12), at least one side section (28) of the electrical contact (26) being arranged on a side surface (30) of the base body (12), the side surface (30) being oriented transversely to the layer (19). A VCSEL array (46) and a method for manufacturing a VCSEL (10) are also disclosed.

Description

Technical Field

[0001] The present invention relates to a VCSEL for emitting laser light. In addition, the present invention relates to a VCSEL array having such a VCSEL and a circuit board having such a VCSEL and / or a VCSEL array. The present invention also relates to a method for manufacturing such a VCSEL. Background Art

[0002] It is known that VCSELs have electrical contacts for feeding in electrical energy. These electrical contacts are mounted on the upper side and / or the lower side of the VCSEL (vertical-cavity surface-emitting laser). This makes efficient soldering, for example using a wave soldering process, impossible.

[0003] For example, US6678292B2 shows a VCSEL with both a p-type contact and an n-type contact on top of the emitting face. Here, the contacts are connected to a circuit board via wiring. This makes a soldering process suitable for mass production impossible.

[0004] The object of the present invention is to provide a VCSEL which can be mounted on a circuit board by a soldering process suitable for mass production. Summary of the invention

[0005] A VCSEL for emitting laser light is proposed, which is provided with a base body, which has a mesa section, which has a stack part composed of different layers stacked in a stacking direction, wherein an emission region is constructed on the upper side of the mesa section, and laser light generated in an active layer in the stack part is emitted from the emission region, wherein an electrical contact part for feeding electrical energy into the active layer is provided on the base body, wherein at least one side section of the electrical contact part is arranged on a side surface of the base body, wherein the side surface is oriented transversely to the layer.

[0006] The substrate is formed of layers stacked on top of each other. The mesa segment forms a laser-emitting part of the substrate, and an emission region is arranged on the surface of the substrate. The surface comprises an upper side which forms the outer side of a Bragg mirror in a pair of Bragg mirrors with an active layer arranged therebetween.

[0007] The electrical contact comprises metal and preferably covers a portion of a side surface of the base body.

[0008] Advantageous embodiments and developments of the invention are achieved by the measures specified in the dependent claims.

[0009] Advantageously, the upper side is oriented perpendicularly to the stacking direction. The side surface can also be oriented approximately perpendicularly or enclose an angle of greater than 90° with the upper side surface.

[0010] It is particularly preferred to arrange an insulating layer between the side section of the electrical contact and the side surface. The insulating layer can also serve as an adhesive layer, thereby ensuring that the electrical contact adheres to the side surface.

[0011] In a special embodiment, the electrical contact extends from its side section to the upper side of the base body. Here, the electrical contact can cover a part of the upper side with the upper section.

[0012] Preferably, the side sections of the electrical contacts implemented as cathodes or anodes can be preferably mounted on a common side of the mesa section. This enables both the supply and discharge of electrical energy in the VCSEL to be achieved via connections on the side, which can be placed, for example, on electrical solder contacts of conductor tracks on a circuit board. For this purpose, the VCSEL can be tilted so that the beam axis of the laser is oriented parallel to the extension plane of the circuit board, wherein the electrical contacts are preferably arranged between the circuit board and the VCSEL.

[0013] Alternatively or additionally, the electrical contacts may be mounted on different sides of the VCSEL.The electrical contacts of the cathode may be arranged on opposite sides of the electrical contacts of the anode.

[0014] In order to achieve a low-stress transition between the upper section and the side section of the electrical contact on the upper side, a chamfer or a rounded portion can be formed at the transition area between the side and the upper side, wherein a section of the electrical contact is arranged on the transition area. The transition area can be produced by an etching step, for example, by a combination of an isotropic etching step and an anisotropic etching step.

[0015] A solder barrier can be formed on the upper section of the electrical contact on the upper side of the base body, which prevents solder from flowing from the side sections to the emission region. After the electrical contact has been applied, the solder barrier can be mounted on the upper section of the electrical contact in an additional step.

[0016] In another exemplary embodiment, at least one electrical contact is formed only on the side surface and does not extend to the upper side. Since the metallization of the electrical contact does not reach the upper side, this prevents the solder from flowing onto the surface of the base body.

[0017] Furthermore, a VCSEL array can be formed by means of VCSELs, which has at least two substrates, each of which has at least one side section of an electrical contact on its side. Here, the side sections can be mounted on side sections oriented in opposite directions. Alternatively, the side sections can be arranged on side sections oriented in the same direction.

[0018] Furthermore, a circuit board with a VCSEL and / or a VCSEL array may be provided, wherein the VCSEL or the VCSEL array rests on a side surface on the circuit board such that side sections can be soldered to solder contacts of the circuit board.

[0019] Furthermore, a method for producing a VCSEL is proposed, wherein a base body is arranged on a wafer, wherein a trench is formed next to the base body, which trench produces side surfaces on the base body, wherein the side surfaces are provided with side sections of electrical contacts assigned to the mesa sections of the base body. In this case, an insulating layer, which contains silicon, for example, can be applied first, to which a metallic bonding layer, which contains titanium, for example, is applied. Electrical contacts, which can consist of gold, can be applied to the bonding layer.

[0020] Advantageously, a groove can be formed between two base bodies, wherein the side surfaces are coated, wherein the two base bodies are separated from each other by a separating cut along the groove, which leaves a side section on the side surface. In particular, the groove is not completely filled.

[0021] In an alternative embodiment, the trench can be completely filled with metal so that the side surfaces are also covered with metal. Alternatively, it is also possible to coat only one side surface in the trench.

[0022] Preferably, after the trench is filled, the section adjacent to the trench that reaches the trench can be removed to expose the substrate with the side surfaces covered with metal so that the metal forming the side sections can be contacted. Thus, the section next to the trench is removed and the side sections are exposed. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The present invention will be described in more detail below based on exemplary embodiments with reference to the associated drawings. Directional indications in the following description should be understood according to the reading direction of the drawings. Position indications of up and down should be understood according to the drawings.

[0024] In the attached picture:

[0025] Figure 1 a VCSEL having electrical contacts arranged on both the side faces and the upper face of the base body;

[0026] Figure 2 VCSEL with electrical contacts, wherein at least one electrical contact is arranged only on one side of the base body;

[0027] Figure 3 according to Figure 1 or Figure 2 A plan view of the VCSEL;

[0028] Figure 4 Based on Figure 1 or Figure 2A plan view of a VCSEL array of VCSELs;

[0029] Figures 5 to 9 A first embodiment of a method for producing a side section on a side surface of a base body; Figures 10 to 15 A second embodiment of the method for producing a side section on a side surface of a base body; and

[0030] FIG. 16 is a schematic illustration of a circuit board with two different arrangement variants of VCSELs. DETAILED DESCRIPTION

[0031] Figure 1 A laser-emitting VCSEL (vertical-cavity surface-emitting laser) 10 is shown. The VCSEL 10 has a base body 12 with a mesa section 14. The base body 12 and therefore also the mesa section 14 are made of a stack 16 of different layers 19 stacked in a stacking direction 18.

[0032] The layers 19 fulfill different functions, so the mesa segment 14 has a pair of Bragg mirrors with an active layer 20 arranged between them. The active layer 20 generates photons as laser light emitted from an emission region 22. The emission region 22 is located on the surface of the mesa segment 14. The surface includes an upper side 24 on the upper side 25 of the VCSEL, which is the outer side of the upper Bragg mirror.

[0033] Electrical contacts 26 for feeding electrical energy into the active layer 20 are arranged on the base body 12. The electrical contacts 26 are configured as anodes 33 and cathodes 29 and have metal sections. In addition, at least one of the electrical contacts 26 has a side section 28, which is arranged on a side surface 30 of the base body 12. The side surface 30 is oriented transversely to the upper side surface 24 on the base body 12. The side surface 30 is preferably oriented perpendicularly to the upper side surface 24. Alternatively, at least a portion of the side surface 30 can enclose an angle greater than 90° with the upper side surface 24.

[0034] The electrical contacts 26 preferably comprise gold, each applied on a titanium-containing adhesive layer, wherein the electrical contacts 26 cover only a portion of the respective side surface 30 of the base body 12 via at least one side section 28. The respective side section 28 can be strip-shaped. Only one side section 28 can be provided per base body 12. The titanium-containing adhesive layer is applied on the insulating layer 31.

[0035] The base 12 of the VCSEL 10 has a substrate 32 on which the stack 16 is arranged. Merely by way of example, the mesa segment 14 is separated from the rest of the base 12 by a groove 34. A chamfer or radius is configured between the upper side 24 and the side 30 on the upper side 25 of the base 12 at the transition area 36. The groove 34 is filled with a material forming an insulating layer 31. The insulating layer 31 below the titanium-containing adhesion layer is continuously connected to the material in the groove 34.

[0036] An upper section 35 of the electrical contact 26 is arranged on the upper side 24 . The electrical contact 26 extends from the upper side 24 to the side 30 , wherein a section of the electrical contact 26 is arranged on the transition region 36 , so that it is arranged between the upper section 35 and the side section 28 .

[0037] On top 25, a solder barrier 38 is arranged on electrical contacts 26, which prevents solder from flowing from side sections 28 to emission region 22 on top 24 of base body 12, for example due to surface tension of the solder. Solder barrier 38 is deposited on electrical contacts 26 in an additional step.

[0038] Figure 1 The exemplary VCSEL 10 in FIG. 1 has a substrate 32 on which a stack 16 is arranged. The stack 16 does not cover the entire substrate 32, and is therefore configured with a step. An upper side surface 24 is configured at a higher level of the step. An upper section 35 of a cathode 29 is arranged at a lower level of the step, wherein an ohmic contact 37 is configured between the upper section 35 of the cathode 29 and the substrate 32. An electrical contact 26 extends from the upper section 35 to the side surface 30 on the base body 12, wherein a section of the electrical contact 26 covers a transition region 36 configured on the substrate 32.

[0039] Preferably, the anode 33 is arranged as an electrical contact 26 on the side of the VCSEL 10 opposite the cathode 29. The side section 28 extends along the side 30 extending from the substrate 32 to the stack 16. A transition region 36 is formed on the stack 16. The upper section 35 extends to the emission region 22. A shoulder 40 is formed on the underside of the substrate 32. The shoulder 40 creates an angle between the side 30 and the face of the shoulder 40. The side section 28 reaches this angle.

[0040] Figure 2 A further exemplary embodiment is shown, in which, purely by way of example, the cathode 29 is mounted on the side 30 of the base body 12 in such a way that it does not extend to the upper side 25 of the base body 12. The cathode 29 is formed by side sections 28, wherein no upper section is present. An ohmic contact 37 is arranged on the side 30 of the base body 12, wherein the ohmic contact 37 can be formed only on the substrate 32. Preferably, the side sections 28 do not extend to the stack 16. The cathode 28 is formed according to Figure 1The embodiment is constructed.

[0041] exist Figure 3 4 shows a plan view of a VCSEL 10 having side sections 28 on the respective opposite sides 42. The side sections 28 are arranged according to Figure 1 or Figure 2 Structured. Anode 33 and cathode 29 extend from upper side 25 to side surface 30. An elongated solder barrier 38 is arranged on each upper section 35. Solder barrier 38 may contain titanium oxide or silicon nitride. In addition, longitudinal notches may be provided along the longitudinal extension of solder barrier 38. Preferably, solder barrier 38 is arranged closer to transition region 36 than to opposite end 39 of upper section 35. In addition, test contact surface 44 may be provided on upper section 35, so that after VCSEL 10 is manufactured in a factory, a test for the functionality of VCSEL 10 may be performed in the factory.

[0042] Figure 4 A VCSEL array 46 with a plurality of emission regions 22 is shown. For each emission region 22, a mesa segment 14 or a separate substrate 12 arranged on the VCSEL array 46 can be provided. Side segments 28 are formed on the side faces 30 of the individual substrates 12 or mesa segments 14. In this case, the anodes 33 are arranged as side segments 28 in an alternating manner on the oppositely oriented side faces 28. Purely by way of example, three substrates 12 are arranged on the VCSEL array 46, which are arranged along an imaginary line. The side segments 28 are arranged on opposite sides relative to the imaginary line. Here, the side segments 28 of the two outer substrates 12 are arranged on the same side relative to the imaginary line 47. The middle substrate 12 has side segments 28 oriented in opposite directions. On opposite sides of the VCSEL array 46, cathodes 29 of the VCSEL array 46 are arranged, which cathodes are not assigned to individual substrates 12. Purely by way of example, the cathodes 29 are arranged at the longitudinal ends of the VCSEL array 46.

[0043] Figures 5 to 9 A first embodiment of a method for manufacturing a VCSEL 10 or a VCSEL array 46 is shown.

[0044] Figure 5 The substrates 12 are shown formed on a wafer 48 by a photolithographic etching step, which are separated by trenches 49. The etching direction 50 is indicated by an arrow. Two substrates 12 are shown by way of example. Ohmic contacts 37 are produced on the upper side 25 for the anode 33 and the cathode 29 by metallization.

[0045] Figure 6 A passivation step is shown, followed by an etching step to expose the anode 33 and the cathode 29. The passivation is achieved, for example, by a silicon nitride coating. On the upper side 25, the metallization is exposed by an etching step.

[0046] exist Figure 7 In the embodiment, the side surfaces 30 in the grooves 49 are coated with a metal such as gold and form the side sections 28 of the cathode 29 and the anode 33. The corresponding upper section 35 is also formed here. By producing a seed layer (Seedlayer) applied by sputtering or atomic layer deposition methods, an adhesion layer for the metallization can be provided. The cathode 29 and the anode 33 can then be produced by the metallization. The final shape of the electrical contact can be predetermined by a photolithographic mask.

[0047] exist Figure 8 In the embodiment, a solder barrier 38 is additionally applied, which is arranged on the upper section 35 .

[0048] exist Fig. 9 In the process, the corresponding trenches 49 are further deepened by a plasma etching step using a photolithography mask until the substrate 32 is severed by the separation step, so that the base bodies 12 are separated from each other.

[0049] Figures 10 to 15 A second embodiment of a method for manufacturing a VCSEL 10 or a VCSEL array 46 is shown in

[0050] exist Fig.10 In the embodiment of the present invention, the base body 12 is delimited by an etched trench 49 which is defined by a photolithographic mask. In addition to the trench 49, a section 50 is formed which is discarded in a subsequent step. The section 50 reaches the trench 49.

[0051] exist Fig.11 In, according to Figure 6 Passivation is applied and the previously placed metal contacts are exposed by an etching step.

[0052] according to Fig.12 , trench 49 is completely filled with a metal such as gold.

[0053] Therefore, the side surface 30 is covered with metal.

[0054] After the trench 49 is completely filled with metal and the side faces 30 are covered, according to Fig.13 An isotropic etching step is carried out along the axis of the stacking direction 18 , so that openings 52 are produced in the sections 50 perpendicular to the layers of the stack.

[0055] Then, if Fig.14 As shown, an anisotropic etching step is performed which enlarges the opening 52. Gallium arsenide and silicon nitride can be anisotropically etched.

[0056] Finally, according to Fig.15 The separation step is performed by plasma etching, which is Fig. 9The steps in correspondence.

[0057] FIG. 16 shows a schematic diagram of a circuit board 54 on which two VCSELs 10 are arranged.

[0058] Fig.16A A VCSEL 10 corresponding to the embodiment of the aforementioned figures is shown. In this embodiment, a laser axis 60, along which the laser light propagates essentially, is oriented parallel to an axis of the stacking direction 18. In this case, the laser axis 60 is oriented perpendicularly to the circuit board 54. The emission region 22 is arranged on the VCSEL 10 on a side opposite to the circuit board 54. The side section 28 of the electrical contact 26 is positioned on the side 30 and is correspondingly oriented perpendicularly to the main extension direction of the circuit board 54. The side section 28 is positioned here in the region of the electrical conductor line 56 to which it is soldered. Here, the cathode 29 is soldered to a solder contact of the conductor line 56 assigned to the cathode 29. The anode 33 is soldered to a solder contact, which is a part of the conductor line 56, which part is assigned to the conductor line 56 assigned to the anode 33. The solder forms a meniscus-shaped solder spot 58 in the corner between the conductor line 56 and the side section 28. The solder spot 58 can be concave (such as Fig.16A The side segments 28 are arranged purely by way of example on opposite sides of the VCSEL 10. Alternatively, they can be arranged on the same side 30 of the VCSEL 10 or on side 30 separated by a common angle.

[0059] exist Fig. 16B In the embodiment of the VCSEL 10, the VCSEL 10 is oriented such that the laser axis 60 is oriented parallel to the main extension plane of the circuit board 54. The electrical contact 26 is positioned between the conductor line 56 and the base body 12 of the VCSEL 10, wherein the solder preferably forms a flat solder joint 58. Due to the tilted position of the VCSEL 10 and the stacking direction 18, which is now oriented accordingly parallel to the main extension plane of the circuit board 54, the laser light from the emission region 22 propagates essentially parallel to the circuit board 54. Fig. 16B Alternatively, the side sections 28 can also be mounted on side faces 30 of the VCSEL 10 oriented perpendicularly to the main extension plane of the circuit board 54 , so that concave or convex solder joints 58 can be produced in the corners between the conductor tracks 56 and the side sections 28 .

Claims

1. A VCSEL (10) for emitting laser light, the VCSEL comprising a base body (12), the base body comprising a mesa section (14), the mesa section comprising a stack of different layers (19) stacked in a stacking direction (18), wherein: An emission region (22) is formed on the upper side (24) of the mesa section (14), and laser light generated in the active layer (20) in the stack is emitted from the emission region, wherein an electrical contact (26) for feeding electrical energy into the active layer (20) is provided on the base body (12), wherein at least one side section (28) of the electrical contact (26) is arranged on a side surface (30) of the base body (12), wherein the side surface (30) is oriented transversely to the layer (19).

2. The VCSEL (10) according to claim 1, characterized in that The upper side (24) is oriented perpendicularly to the stacking direction (18).

3. The VCSEL (10) according to claim 1 or 2, characterized in that: An insulating layer (31) is arranged between the side section (28) and the side surface (30) of the electrical contact (26).

4. The VCSEL (10) according to any one of the preceding claims, characterized in that The electrical contact (26) extends from its side section (28) to the top side (25) of the base body (12).

5. The VCSEL (10) according to any one of the preceding claims, characterized in that The side section (28) designed as an electrical contact of the cathode (29) or anode (33) is preferably mounted on a common side surface (30) of the base body (12).

6. The VCSEL (10) according to any one of the preceding claims, characterized in that A chamfer or a rounded portion is formed at a transition section (36) between the side surface (30) and the upper side surface (24), wherein a section of the electrical contact (26) is arranged on the transition section (36).

7. The VCSEL (10) according to any one of the preceding claims, characterized in that A solder barrier (38) is formed on the electrical contact (26) on the upper side (24) of the mesa section (14), which prevents solder from flowing from the side section (28) to the emission region (22).

8. The VCSEL (10) according to any one of the preceding claims, characterized in that The electrical contact (26) is formed only on the side surface (30) and does not extend to the upper side (24).

9. A VCSEL array (46) preferably according to any of the preceding claims, comprising at least two base bodies (12) which each have at least one side section (28) of an electrical contact (26) on their side surfaces (30).

10. A circuit board (54) having a VCSEL (10) and / or a VCSEL array (46) according to any one of the preceding claims, wherein: A side section (28) of the VCSEL (10) is arranged in the region of a conductor track (56) of the circuit board (54) such that the side section (28) can be soldered to a solder contact of the circuit board (54).

11. The circuit board (54) according to claim 10, characterized in that At least one side section (28) for a soldering point (58) is oriented perpendicularly to the conductor path (56) and / or rests on the conductor path (56).

12. A method for manufacturing a VCSEL (10) according to any one of the preceding claims, characterized in that A base body (12) having a mesa section (14) is arranged on a wafer (48), wherein a trench (49) is formed next to the base body (12) and produces a side surface (30) on the base body (12), wherein the side surface (30) is provided with a side section (28) of an electrical contact (26) assigned to the mesa section (14).

13. The method according to claim 12, characterized in that The groove (49) is formed between two base bodies (12), wherein the side surface (30) is coated, wherein the two base bodies (12) are separated from one another by carrying out a separating cut along the groove (49), the separating cut leaving the side section (28) on the side surface (30).

14. The method according to claim 12, characterized in that The trench (49) is completely filled with metal so that the side surfaces (30) are also covered with metal.

15. The method according to claim 14, characterized in that After the trench (49) is filled, the section next to the trench (49) that reaches the trench (49) is removed, so that the mesa section (14) with the side surface (30) covered with the metal is exposed so that the metal can be contacted.

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