Hardware-based Division Calculation Method, Device and Electronic Equipment

Abstract

The present application relates to a hardware-based division calculation method, apparatus, and electronic device. The method includes: obtaining data to be calculated and a preset output data bit width; determining initial values of a plurality of parameters participating in iterative calculation based on the data to be calculated and the output data bit width; determining whether the current iteration count is less than the value of the output data bit width; in the case where the current iteration count is less than the value of the output data bit width, determining a fifth parameter as the product of a first parameter obtained from the previous iterative calculation and the data to be calculated; substituting a second parameter, a third parameter, and the first parameter re-determined based on the fifth parameter into the next iterative calculation, and until the current iteration count reaches the value of the output data bit width, outputting the finally calculated first parameter as the calculation result. Since the division calculation result is actually a fixed-point number representation in hardware of a floating-point number satisfying an error range of 2<supgt;‑Q< / supgt;, there is no need to perform fixed-point to floating-point conversion, thereby improving the calculation efficiency.

Description

Technical Field

[0001] This application relates to the field of wireless communication technologies, and in particular, to a hardware-based division calculation method, apparatus, and electronic device. Background Art

[0002] With the development of the fifth-generation mobile communication technology (5th Generation Mobile Communication Technology, abbreviated as 5G), the amount of data that user equipment (User Equipment, abbreviated as UE) needs to process is also increasing. To ensure that user equipment has higher throughput and faster processing speed, most data processing cannot be directly implemented through digital signal processing (Digital Signal Process, abbreviated as DSP) or a central processing unit (Central Processing Unit, abbreviated as CPU), and thus it is necessary to rely on hardware to implement.

[0003] In related technologies, traditional hardware dividers are for division between fixed-point numbers. Although floating-point numbers can be represented by shifting fixed-point numbers, the precision cannot be controlled, and only fixed-point division of the same type of numbers can be implemented. For example, when calculating the binary number b'1001010 divided by the binary number b'1000, the subtraction is performed from left to right. The left four bits of the binary number b'1001010 are subtracted from the binary number b'1000 to get 1, and at this time, 1 is set in the result bit. Since 1 is less than four bits, the calculation cannot continue. Then, two bits are taken from the right in sequence, and two 0s are set in the result bit to get the four-bit binary number b'1010. Then, the subtraction operation is performed on the binary number b'1000, and finally, the division calculation result is the binary number b'1001, and the remainder is 10. The calculation process is as follows:

[0004]

[0005] In this example, the performance of converting the binary number to a decimal number is that 74 divided by 8 gives a quotient of 9 and a remainder of 2. Therefore, it is also necessary to re-determine a fixed-point to floating-point conversion algorithm for the data representation range after the division is completed, so as to map and represent the current division results (quotient and remainder) in a reasonable way, resulting in low hardware calculation efficiency. Summary of the Invention

[0006] This application provides a hardware-based division calculation method, apparatus, and electronic device to solve the problem of low calculation efficiency existing in traditional hardware dividers.

[0007] In a first aspect, an embodiment of this application provides a hardware-based division calculation method, and the method includes:

[0008] Obtain the data x to be calculated and the preset output data bit width Q. Among them, the data x to be calculated is a fixed-point number, and the output data bit width Q is determined based on the error range of the output data. The output data bit width Q is less than or equal to the hardware bit width supported by the hardware;

[0009] Based on the data x to be calculated and the output data bit width Q, determine the initial values of multiple parameters participating in the iterative calculation. Among them, the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation;

[0010] Judge whether the current iteration count is less than the value of the output data bit width Q;

[0011] When the current iteration count is less than the value of the output data bit width Q, determine the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated as a fifth parameter b;

[0012] When b = pow2Q or max - min ≤ 1 or min > max, keep the values of the second parameter min, the third parameter max, and the first parameter a obtained from the previous iterative calculation unchanged;

[0013] When b > pow2Q and max - min > 1 and min ≤ max, update the value of the third parameter max using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated third parameter max;

[0014] When b < pow2Q and max - min > 1 and min ≤ max, update the value of the second parameter min using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated second parameter min;

[0015] Substitute the re-determined second parameter min, third parameter max, and first parameter a into the next iterative calculation. When the current iteration count reaches the value of the output data bit width Q, output the finally calculated first parameter a as the calculation result.

[0016] Optionally, the determining the initial values of multiple parameters participating in the iterative calculation based on the data x to be calculated and the output data bit width Q includes:

[0017] Calculate the difference between the output data bit width Q and the first value, obtain the maximum value between the difference and the value 0, and shift the value 1 to the left by the number of bits corresponding to the maximum value to obtain the initial value of the first parameter a, where the first value is the number of bits corresponding to the binary value 1 of the highest bit in the data x to be calculated;

[0018] Shift the initial value of the first parameter a to the right by one bit to obtain the initial value of the second parameter min;

[0019] Shift the initial value of the first parameter a to the left by one bit to obtain the initial value of the third parameter max;

[0020] Shift the value 1 to the left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q.

[0021] Optionally, the updating of the value of the first parameter a based on the updated third parameter max includes:

[0022] Sum the updated third parameter max, the second parameter min obtained from the previous iteration calculation, and the value 1 to obtain a first summation result;

[0023] Shift the value corresponding to the first summation result to the left by 1 bit, and update the value of the first parameter a based on the shifted value.

[0024] Optionally, the further updating of the value of the first parameter a based on the updated second parameter min includes:

[0025] Sum the updated second parameter min, the third parameter max obtained from the previous iteration calculation, and the value 1 to obtain a second summation result;

[0026] Shift the value corresponding to the second summation result to the left by 1 bit, and update the value of the first parameter a based on the shifted value.

[0027] Optionally, before determining the initial values of multiple parameters participating in the iterative calculation based on the data x to be calculated and the output data bit width Q, the method further includes:

[0028] Judge whether the data x to be calculated is the value 0;

[0029] In the case where the data x to be calculated is the value 0, output the second value as the calculation result, where the second value is the maximum value that can be represented under the hardware bit width supported by the hardware.

[0030] In a second aspect, an embodiment of the present application further provides a division calculation device implemented based on hardware, and the device includes:

[0031] An acquisition module, configured to acquire the data x to be calculated and a preset output data bit width Q, where the data x to be calculated is a fixed-point number, and the output data bit width Q is determined based on the error range of the output data, and the output data bit width Q is less than or equal to the hardware bit width supported by the hardware;

[0032] A first determination module, configured to determine initial values of multiple parameters participating in iterative calculation based on the data x to be calculated and the output data bit width Q, where the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with iterative calculation, and a fourth parameter pow2Q that does not change with iterative calculation;

[0033] A first judgment module, configured to judge whether the current iteration number is less than the value of the output data bit width Q;

[0034] A second determination module, configured to, when the current iteration number is less than the value of the output data bit width Q, determine the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated as a fifth parameter b;

[0035] A retention module, configured to keep the values of the second parameter min, the third parameter max, and the first parameter a obtained from the previous iterative calculation unchanged when b = pow2Q or max - min ≤ 1 or min > max;

[0036] A first update module, configured to, when b > pow2Q and max - min > 1 and min ≤ max, update the value of the third parameter max using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated third parameter max;

[0037] A second update module, configured to, when b < pow2Q and max - min > 1 and min ≤ max, update the value of the second parameter min using the first parameter a obtained from the previous iterative calculation, and then update the value of the first parameter a based on the updated second parameter min;

[0038] A first output module, configured to substitute the re - determined second parameter min, third parameter max, and first parameter a into the next iterative calculation, and when the current iteration number reaches the value of the output data bit width Q, output the finally calculated first parameter a as the calculation result.

[0039] In a third aspect, an embodiment of the present application further provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory communicate with each other through the communication bus;

[0040] A memory for storing a computer program;

[0041] A processor, when executing the program stored in the memory, implements the hardware-implemented division calculation method described in the first aspect.

[0042] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the hardware-implemented division calculation method described in the first aspect.

[0043] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art: In the method provided by the embodiment of the present application, by obtaining the data x to be calculated and the preset output data bit width Q, where the data x to be calculated is a fixed-point number, and the output data bit width Q is determined based on the error range of the output data, and the output data bit width Q is less than or equal to the hardware bit width supported by the hardware; based on the data x to be calculated and the output data bit width Q, the initial values of multiple parameters participating in the iterative calculation are determined, where the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation; determining whether the current iteration count is less than the value of the output data bit width Q; when the current iteration count is less than the value of the output data bit width Q, determining the product of the first parameter a obtained in the previous iteration calculation and the data x to be calculated as a fifth parameter b; when b = pow2Q or max - min ≤ 1 or min > max, keeping the values of the second parameter min, the third parameter max, and the first parameter a obtained in the previous iteration calculation unchanged; when b > pow2Q and max - min > 1 and min ≤ max, updating the value of the third parameter max using the first parameter a obtained in the previous iteration calculation, and then updating the value of the first parameter a based on the updated third parameter max; when b < pow2Q and max - min > 1 and min ≤ max, updating the value of the second parameter min using the first parameter a obtained in the previous iteration calculation, and then updating the value of the first parameter a based on the updated second parameter min; substituting the re-determined second parameter min, third parameter max, and first parameter a into the next iteration calculation until the current iteration count reaches the value of the output data bit width Q, and outputting the finally calculated first parameter a as the calculation result. In the above manner, the output data bit width can be determined based on the error range of the output data. , and based on the data x to be calculated and the output data width Q, determine the initial values of multiple parameters participating in the iterative calculation, and then perform iterative calculation based on the initial values of these multiple parameters to obtain the division calculation result of the data x to be calculated. Since the final division calculation result is a fixed-point number that meets the output data width supported by the hardware, it is actually the fixed-point number representation in the hardware of a floating-point number with an error range of , and there is no need to perform the conversion from fixed-point number to floating-point number on the basis of the division calculation result, thus improving the calculation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The accompanying drawings herein are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0045] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the accompanying drawings required for the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0046] Figure 1 is a schematic flowchart of a division calculation method implemented based on hardware provided by an embodiment of the present application;

[0047] Figure 2 is a schematic flowchart of another division calculation method implemented based on hardware provided by an embodiment of the present application;

[0048] Figure 3 is a schematic structural diagram of a root mean square calculation device implemented based on hardware provided by an embodiment of the present application;

[0049] Figure 4 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0050] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments of the present application belong to the scope of protection of the present application.

[0051] Considering a division calculation can be converted to ​, and since the multiplication calculation can be simply implemented by an AND gate, this division calculation can be converted to obtaining value. Further, because in the conversion from fixed-point numbers to floating-point numbers, there is the following relationship , that is to say, the floating-point number y can be expressed as form. Therefore, this division calculation can be converted to obtaining value. Among them, the Q value can determine the error of the division calculation result, and the specific error range .

[0052] See Figure 1 , Figure 1 is a schematic flow chart of a hardware-implemented division calculation method provided by an embodiment of the present application. As Figure 1 shown, the hardware-implemented division calculation method may include the following steps:

[0053] Step S102, obtain the data x to be calculated and the preset output data bit width Q, where the data x to be calculated is a fixed-point number, and the output data bit width Q is based on the error range of the output data determined, and the output data bit width Q is less than or equal to the hardware bit width supported by the hardware.

[0054] Specifically, the above data x to be calculated refers to the data that needs to perform a division calculation. The data x to be calculated can be represented as a fixed-point data in hardware, and it can also be pre-converted from any floating-point data. The above output data bit width Q is the bit width determined based on the error range of the output data. The larger the output data bit width Q, the smaller the error range of the output data, that is, the higher the precision and the better the algorithm performance, but the greater the hardware area and power consumption loss; the smaller the output data bit width Q, the larger the error range of the output data, that is, the lower the precision and the worse the algorithm performance, but the smaller the hardware area and power consumption loss. Of course, the output data bit width Q needs to be less than or equal to the hardware bit width supported by the hardware. For example, when the hardware bit width supported by the hardware is 22 bits, the output data bit width Q cannot exceed 22 bits.

[0055] It should be noted that the letter x here represents the data to be calculated in the present application. Of course, other letters can also be used to represent the data to be calculated, which does not constitute a limitation to the present application. The letter Q here represents the output data bit width in the present application. Of course, other letters can also be used to represent the output data bit width, which does not constitute a limitation to the present application.

[0056] Step S104: Based on the data x to be calculated and the output data bit width Q, determine the initial values of multiple parameters participating in the iterative calculation, where the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation.

[0057] Specifically, the above-mentioned first parameter a, second parameter min, third parameter max, and fourth parameter pow2Q are relevant parameters required in the hardware-implemented division calculation process. Therefore, before performing the iterative calculation, it is necessary to first determine their initial values. Among them, the value of the first parameter a will change with the iterative calculation, and its initial value can be determined based on the numerical distribution of each bit in the data x to be calculated and the output data bit width. The values of the second parameter min and the third parameter max will both change with the iterative calculation, and their initial values are both determined based on the initial value of the first parameter a. The value of the fourth parameter pow2Q will not change with the iterative calculation, and its initial value is determined based on the output data bit width Q.

[0058] It should be noted that a, min, max, and pow2Q here respectively represent the first parameter, the second parameter, the third parameter, and the fourth parameter in this application. Of course, other English words can also be used to represent the first parameter, the second parameter, the third parameter, and the fourth parameter, which does not constitute a limitation to this application.

[0059] Step S106: Determine whether the current iteration count is less than the value of the output data bit width Q.

[0060] During the loop iterative calculation process, it is necessary to determine whether the current iteration count is less than the value of the output data bit width Q before each iterative calculation. If the current iteration count is greater than or equal to the value of the output data bit width Q, it means that the division calculation result has been obtained and the iterative calculation can be stopped; if the current iteration count is less than the value of the output data bit width Q, it means that the division calculation result has not been obtained and the iterative calculation needs to continue.

[0061] Step S108: When the current iteration count is less than the value of the output data bit width Q, determine the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated as the fifth parameter b.

[0062] During each iterative calculation process, it is necessary to calculate the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated, and then determine the product of the first parameter a obtained from the previous iterative calculation and the data x to be calculated as the fifth parameter b, so as to facilitate subsequent judgment on whether to update the first parameter a, the second parameter min, and the third parameter max during the current iterative calculation process based on the fifth parameter b and the second parameter min and the third parameter max obtained from the previous iterative calculation.

[0063] It should be noted that the letter b here represents the fifth parameter in this application. Of course, other letters can also be used to represent the fifth parameter, which does not constitute a limitation to this application.

[0064] Step S110: When b = pow2Q or max - min ≤ 1 or min > max is satisfied, keep the values of the second parameter min, the third parameter max, and the first parameter a obtained from the previous iterative calculation unchanged.

[0065] Specifically, the reason for comparing the fifth parameter b with the fourth parameter pow2Q here is to determine whether the fifth parameter b obtained from the current iterative calculation exceeds the fourth parameter pow2Q. If the fifth parameter b obtained from the current iterative calculation exceeds the fourth parameter pow2Q, it means that the fifth parameter b obtained from the current iterative calculation has exceeded the maximum value that can be represented by Q bits, and there is a problem of data overflow. Therefore, it is necessary to reduce the first parameter a participating in the next iterative calculation. If the fifth parameter b obtained from the current iterative calculation is equal to the fourth parameter pow2Q, it means that the first parameter a has been iterated to the optimal value and there is no need to continue updating its value. If the fifth parameter b obtained from the current iterative calculation is less than the fourth parameter pow2Q, it means that the fifth parameter b obtained from the current iterative calculation has not exceeded the maximum value that can be represented by Q bits, and the first parameter a participating in the next iterative calculation can be increased. The reason for comparing the second parameter min obtained from the previous iterative calculation with the third parameter max obtained from the previous iterative calculation here is to ensure that min < max. Once max - min <= 1 or min > max, it means that the first parameter a has been iterated to the optimal value and there is no need to continue updating its value.

[0066] Therefore, when the initial value of the fifth parameter b is equal to the fourth parameter pow2Q, or the difference between the third parameter max obtained from the previous iterative calculation and the second parameter min obtained from the previous iterative calculation is less than or equal to the value 1 (i.e., max and min are very close), or the second parameter min obtained from the previous iterative calculation is greater than the third parameter max obtained from the previous iterative calculation (i.e., max - min is a negative number, which is represented as an extremely large number of overflow in hardware), the first parameter a, the second parameter min, and the third parameter max obtained from the previous iterative calculation can be kept unchanged and used as the first parameter a, the second parameter min, and the third parameter max participating in the next iterative calculation. That is to say, as long as the above conditions are met, regardless of whether the number of iterations reaches the value of the output data bit width Q, the value of the first parameter a does not change during the subsequent iterative calculation process.

[0067] Step S112: When b > pow2Q, max - min > 1, and min ≤ max are satisfied, update the value of the third parameter max using the first parameter a obtained from the previous iteration, and then update the value of the first parameter a based on the updated third parameter max.

[0068] Specifically, when the fifth parameter b is greater than the initial value of the fourth parameter pow2Q, the difference between the third parameter max obtained from the previous iteration and the second parameter min obtained from the previous iteration is greater than the value 1, and the second parameter min obtained from the previous iteration is less than the third parameter max obtained from the previous iteration, the second parameter min obtained from the previous iteration can be kept unchanged, update the value of the third parameter max obtained from the previous iteration using the first parameter a obtained from the previous iteration, and then update the value of the first parameter a based on the updated third parameter max to determine the first parameter a, the second parameter min, and the third parameter max participating in the next iteration calculation. Since the updated third parameter max decreases, the first parameter a updated based on the updated third parameter max and the second parameter min obtained from the previous iteration also decreases accordingly, making the first parameter a gradually approach the optimal value.

[0069] Step S114: When b < pow2Q, max - min > 1, and min ≤ max are satisfied, update the value of the second parameter min using the first parameter a obtained from the previous iteration, and then update the value of the first parameter a based on the updated second parameter min.

[0070] Specifically, when the fifth parameter b is less than the initial value of the fourth parameter pow2Q, the difference between the third parameter max obtained from the previous iteration and the second parameter min obtained from the previous iteration is greater than the value 1, and the second parameter min obtained from the previous iteration is less than the third parameter max obtained from the previous iteration, keep the third parameter max obtained from the previous iteration unchanged, update the value of the second parameter min obtained from the previous iteration using the first parameter a obtained from the previous iteration, and then update the value of the first parameter a based on the updated second parameter min to determine the first parameter a, the second parameter min, and the third parameter max participating in the next iteration calculation. Since the updated second parameter min increases, the first parameter a updated based on the updated second parameter min and the third parameter max obtained from the previous iteration also increases accordingly, making the first parameter a gradually approach the optimal value.

[0071] Step S116: Substitute the re-determined second parameter min, third parameter max, and first parameter a into the next iterative calculation. When the current iteration count reaches the value of the output data bit width Q, output the finally calculated first parameter a as the calculation result.

[0072] In this step, the next iterative calculation can be performed based on the second parameter min, third parameter max, and first parameter a determined according to the above step S110, the above step S112, or the above step S114. When the current iteration count reaches the value of the output data bit width Q, output the finally calculated first parameter a as the calculation result to obtain the division calculation result of the data x to be calculated.

[0073] In the embodiments of the present application, the output data bit width can be determined based on the error range of the output data , and then based on the data x to be calculated and the output data bit width Q, the initial values of multiple parameters participating in the iterative calculation are determined. Then, iterative calculation is performed based on the initial values of these multiple parameters to obtain the division calculation result of the data x to be calculated . Through these parameter values, it can be ensured that the first parameter a calculated in each iterative calculation process does not overflow the output data bit width , that is, it does not exceed its corresponding precision range, so as to ensure that the final division calculation result is a fixed-point number that meets the output data bit width , which is actually the fixed-point number representation in the hardware of a floating-point number that meets the error range of . Therefore, there is no need to perform the conversion from the fixed-point number to the floating-point number on the basis of the division calculation result, thereby improving the calculation efficiency. In an optional embodiment, the above step S104, based on the data x to be calculated and the output data bit width Q, determines the initial values of multiple parameters participating in the iterative calculation, including:

[0074] Calculate the difference between the output data bit width Q and the first value, and obtain the maximum value between the difference and the value 0, and shift the value 1 to the left by the number of bits corresponding to the maximum value to obtain the initial value of the first parameter a, where the first value is the number of bits corresponding to the binary value 1 of the highest bit in the data x to be calculated;

[0075] Shift the initial value of the first parameter a one bit to the right to obtain the initial value of the second parameter min;

[0076] Shift the initial value of the first parameter a one bit to the left to obtain the initial value of the third parameter max;

[0077] Shift the value 1 to the left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q.

[0078] Shift the value 1 to the left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q.

[0079] Specifically, when calculating the initial value of the first parameter a, the difference tmp between the output data bit width Q and the first value can be calculated first, and then the difference tmp is compared with the value 0 (the binary fixed-point number 0) to obtain the maximum value between the difference tmp and the value 0. Then, the value 1 is left-shifted by the number of bits corresponding to the maximum value. That is to say, if the difference tmp is positive, the initial value of the first parameter a is 2^tmp (2 to the power of tmp); if the difference tmp is negative or 0, the initial value of the first parameter a is the value 1.

[0080] When calculating the initial value of the second parameter min, the initial value of the first parameter a can be right-shifted by one bit, that is, the initial value of the first parameter a is divided by 2 to obtain the initial value of the second parameter min.

[0081] When calculating the initial value of the third parameter max, the initial value of the first parameter a can be left-shifted by one bit, that is, the initial value of the first parameter a is multiplied by 2 to obtain the initial value of the third parameter max.

[0082] When calculating the value of the fourth parameter pow2Q, the value 1 can be left-shifted by the number of bits corresponding to the output data bit width Q, that is, 2^Q (2 to the power of Q), to obtain the value of the fourth parameter pow2Q.

[0083] Through the above method, based on the data x to be calculated and the output data bit width Q, the initial values of multiple parameters participating in the iterative calculation can be accurately determined, which is convenient for subsequent iterative calculation based on the initial values of each parameter.

[0084] In an optional embodiment, the above step of updating the value of the first parameter a based on the updated third parameter max includes:

[0085] Sum the updated third parameter max, the second parameter min obtained from the previous iterative calculation, and the value 1 to obtain the first summation result;

[0086] Left-shift the value corresponding to the first summation result by 1 bit, and update the value of the first parameter a based on the left-shifted value.

[0087] Specifically, when updating the value of the first parameter a based on the updated third parameter max, the updated third parameter max, the second parameter min obtained from the previous iterative calculation, and the value 1 can be summed first to obtain the first summation result, and then the value corresponding to the first summation result is left-shifted by 1 bit, and the value of the first parameter a is updated based on the left-shifted value. In this way, the value of the first parameter a can be updated based on the updated third parameter max.

[0088] In an alternative embodiment, the above step of updating the value of the first parameter a based on the updated second parameter min includes:

[0089] Sum the updated second parameter min, the third parameter max obtained from the previous iteration calculation, and the value 1 to obtain a second summation result;

[0090] Shift the value corresponding to the second summation result left by 1 bit, and update the value of the first parameter a based on the shifted value.

[0091] Specifically, when updating the value of the first parameter a based on the updated second parameter min, the updated second parameter min, the third parameter max obtained from the previous iteration calculation, and the value 1 can be summed first to obtain a second summation result, and then the value corresponding to the second summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the shifted value. In this way, the value of the first parameter a can be updated based on the updated second parameter min.

[0092] In an alternative embodiment, before the above step S104 of determining the initial values of multiple parameters participating in the iterative calculation based on the data x to be calculated and the output data bit width Q, the method further includes:

[0093] Judge whether the data x to be calculated is the value 0;

[0094] In the case where the data x to be calculated is the value 0, output the second value as the calculation result, where the second value is the maximum value that can be represented under the hardware bit width supported by the hardware.

[0095] Since this division calculation actually calculates the reciprocal value of the data x to be calculated, it is necessary to judge whether the data x to be calculated is the value 0 before performing the division calculation. When the data x to be calculated is 0, the reciprocal value of the data x to be calculated can actually be understood as a positive infinity value. In hardware representation, this positive infinity value can be represented according to the hardware bit width N. Specifically, it can be represented by 2^(N + 1) - 1, where 2^(N + 1) - 1 represents a binary value with all N bits being 1. When the data x to be calculated is not the value 0, then execute the above step S104 of determining the initial values of multiple parameters participating in the iterative calculation based on the data x to be calculated and the output data bit width Q, and perform the division calculation.

[0096] In the above manner, values that do not meet the division calculation conditions can be excluded, and values that meet the division calculation conditions can participate in the division calculation.

[0097] In an alternative embodiment, the flow of the division calculation method based on hardware implemented in the embodiments of the present application is as Figure 2As shown, all the calculations here are implemented according to the hardware characteristics. Specifically, first, the data x to be calculated is determined. The purpose of the division calculation is to obtain 1 / x, and based on the current hardware bit width N and the error range, the output data bit width Q is determined. Then, it is judged whether the data x to be calculated is 0. If the data x to be calculated is 0, the value 2^(N + 1) - 1 is directly output; if the data x to be calculated is not 0, based on the data x to be calculated and the output data bit width Q, the initial values of the first parameter a, the second parameter min, the third parameter max, and the fourth parameter Pow2Q for the iterative calculation are determined.

[0098] Then, the iterative calculation is carried out. First, it is judged whether the current iteration count is less than the total number of iterative calculations (i.e., the value corresponding to the output data bit width Q). If the current iteration count is less than the total number of iterative calculations, the product of the first parameter a and the data x to be calculated is calculated to obtain the fifth parameter b. Then, the fifth parameter b is compared with the fourth parameter pow2Q, and the second parameter min obtained from the previous iterative calculation is compared with the third parameter max obtained from the previous iterative calculation. According to the comparison results, the first parameter a, the second parameter min, and the third parameter max for the next iterative calculation are determined, and the next iterative calculation is carried out until the current iteration count is equal to the total number of iterative calculations. The first parameter a obtained from the last iterative calculation is output as the calculation result, and the division calculation result of the data x to be calculated is obtained. The specific execution pseudocode of the hardware can be expressed as:

[0099] if (x == 0):

[0100] output = 2^(N + 1) - 1; (Judge whether x is 0. If x is 0, it is not applicable to the algorithm and is directly assigned, and the assignment is the maximum value supported by the current hardware bit width)

[0101] else: (Enter the calculation of the effective division)

[0102] tmp = Q – (the number of bits corresponding to the highest 1 in x);

[0103] a = (1 << max(tmp, 0)); (If tmp is positive, a takes 2^tmp, otherwise, a is 1)

[0104] min = a >> 1;

[0105] max = a << 1;

[0106] pow2Q = (1 << Q) (pow2Q is 2^Q)

[0107] iterindex = 0 / / The iteration starts from 0

[0108] for (int iterindex = 0; iterindex<Q; iterindex ++)

[0109] {

[0110] b = a*x; (The parameter b for this iteration)

[0111] if ((b == pow2Q) || (max - min <= 1) || (min > max))

[0112] a = a; (If any of the above three conditions is met, the value of a remains unchanged)

[0113] if (b > pow2Q)

[0114] max = a;

[0115] else

[0116] min = a;

[0117] a = (min + max + 1) >> 1; (Update the value of a based on the values of max / min)

[0118] }

[0119] Output = a (Output the value of a after the iteration)

[0120] To facilitate the understanding of this calculation process, an example is given here. Suppose the data x to be calculated is 3, the hardware bit width N is 16, and the output data bit width Q is 12. Then the initial values of each parameter can be calculated as follows: The initial value of the first parameter a is 2048, the initial value of the second parameter min is 1024, the initial value of the third parameter max is 40963, and the initial value of the fourth parameter pow2Q is 4096. It should be noted that when calculating the initial value of the first parameter a, first calculate the parameter tmp. Since the value of x is 3, the binary fixed-point number representation is 0011 (the 0th, 1st, 2nd, and 3rd bits from right to left of the binary fixed-point number 0011). Then it can be known that the bit corresponding to the highest 1 of x is 1. So the parameter tmp = Q - 1 = 12 - 1 = 11. Then max(tmp, 0) = max(11, 0) = 11. So the value 1 needs to be shifted left by 11 bits to get the binary fixed-point number 1000 0000 0000, which is 2048. When calculating the initial value of the second parameter min, the binary fixed-point number 1000 0000 0000 needs to be shifted right by one bit, which is 2048 / 2 = 1024. When calculating the initial value of the third parameter max, the binary fixed-point number 1000 0000 0000 needs to be shifted left by one bit, which is 2048 × 2 = 4096. When calculating the initial value of the fourth parameter pow2Q, the value 1 needs to be shifted left by 12 bits to get 2^12 = 4096. In the first iteration calculation process, since the first parameter a is 2048, the fifth parameter b = a * x = 2048 * 3 = 6144. Since the fifth parameter b = 6144 and the fourth parameter pow2Q = 4096, after comparison, it can be seen that the fifth parameter b > the fourth parameter pow2Q. At this time, the third parameter max = 2048. Then calculate and update the first parameter a. Since at this time min + max + 1 = 2048 + 1024 + 1 = 3073, shift it right by one bit, that is, take the integer part of 3073 / 2 to get 1536. Therefore, the result of the first iteration calculation is: the third parameter max is 2048, the second parameter min is 1024, and the updated first parameter a is 1536.

[0121] In the second iteration calculation process, since the first parameter a is 1536, the fifth parameter b = a * x = 4608. After comparison, it can be obtained that the third parameter max is 1536, the second parameter min is 1024, and the updated first parameter a is 1280 (the logic in the subsequent iteration calculation process is the same as that in the first iteration calculation process and will not be elaborated here).

[0122] In the third iteration calculation process, since the first parameter a is 1280 and the fifth parameter b = a * x = 3840, after comparison, the third parameter max is 1536, the second parameter min is 1280, and the updated first parameter a is 1408.

[0123] In the fourth iteration calculation process, since the first parameter a is 1408 and the fifth parameter b = a * x = 4224, after comparison, the third parameter max is 1408, the second parameter min is 1280, and the updated first parameter a is 1344.

[0124] In the fifth iteration calculation process, since the first parameter a is 1344 and the fifth parameter b = a * x = 4032, after comparison, the third parameter max is 1408, the second parameter min is 1344, and the updated first parameter a is 1376.

[0125] In the sixth iteration calculation process, since the first parameter a is 1376 and the fifth parameter b = a * x = 4128, after comparison, the third parameter max is 1376, the second parameter min is 1344, and the updated first parameter a is 1360.

[0126] In the seventh iteration calculation process, since the first parameter a is 1360 and the fifth parameter b = a * x = 4080, after comparison, the third parameter max is 1376, the second parameter min is 1360, and the updated first parameter a is 1368.

[0127] In the eighth iteration calculation process, since the first parameter a is 1368 and the fifth parameter b = a * x = 4104, after comparison, the third parameter max is 1368, the second parameter min is 1360, and the updated first parameter a is 1364.

[0128] In the ninth iteration calculation process, since the first parameter a is 1364 and the fifth parameter b = a * x = 4092, after comparison, the third parameter max is 1368, the second parameter min is 1364, and the updated first parameter a is 1366.

[0129] In the tenth iteration calculation process, since the first parameter a is 1366 and the fifth parameter b = a * x = 4098, after comparison, the third parameter max is 1366, the second parameter min is 1364, and the updated first parameter a is 1365.

[0130] In the eleventh iteration calculation process, since the first parameter a is 1365 and the fifth parameter b = a * x = 4095, after comparison, the third parameter max is 1366, the second parameter min is 1365, and the updated first parameter a is 1366.

[0131] In the twelfth iteration calculation process, since the number of iterations is equal to the output data bit width, the iteration ends, and the value 1366 of the first parameter a obtained in the last calculation is output as the calculation result.

[0132] For easy understanding and comparison of the accuracy, the fixed-point number 1366 is converted to a floating-point number, that is, 1366 * 2^(-12) = 0.3335 (the value after the fixed-point to floating-point conversion of the calculation result). Since 1 / 3 = 0.3333 (the theoretical value), it can be seen that the error of the result calculated by this hardware implementation method is very small.

[0133] The division calculation method based on hardware implementation provided by the embodiments of the present application does not require fixed-point to floating-point conversion. All data is processed in the hardware format. The solution has no complex conditions and hardware modules. All hardware operations are only addition, multiplication, comparators, and shifters. The corresponding division calculation can be completed through iteration. Compared with the traditional hardware divider, the division calculation result that meets the error conditions can be directly obtained based on the acceptable error range, thus improving the calculation efficiency.

[0134] See Figure 3 , Figure 3 which is a schematic structural diagram of a division calculation device based on hardware implementation provided by the embodiments of the present application. As Figure 3 shown, the division calculation device 300 based on hardware implementation includes:

[0135] An acquisition module 302, configured to acquire the data x to be calculated and a preset output data bit width Q. Among them, the data x to be calculated is a fixed-point number, and the output data bit width Q is determined based on the error range of the output data. The output data bit width Q is less than or equal to the hardware bit width supported by the hardware;

[0136] A first determination module 304, configured to determine the initial values of multiple parameters participating in the iterative calculation based on the data x to be calculated and the output data bit width Q. Among them, the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that change with the iterative calculation, and a fourth parameter pow2Q that does not change with the iterative calculation;

[0137] A first judgment module 306, configured to judge whether the current number of iterations is less than the value of the output data bit width Q;

[0138] A second determination module 308, configured to, when the current number of iterations is less than the value of the output data bit width Q, determine the product of the first parameter a obtained in the previous iterative calculation and the data x to be calculated as a fifth parameter b;

[0139] A holding module 310, configured to keep the values of a second parameter min, a third parameter max, and a first parameter a obtained from the previous iteration calculation unchanged when b = pow2Q or max - min ≤ 1 or min > max;

[0140] A first update module 312, configured to update the value of the third parameter max by using the first parameter a obtained from the previous iteration calculation when b > pow2Q and max - min > 1 and min ≤ max, and then update the value of the first parameter a based on the updated third parameter max;

[0141] A second update module 314, configured to update the value of the second parameter min by using the first parameter a obtained from the previous iteration calculation when b < pow2Q and max - min > 1 and min ≤ max, and then update the value of the first parameter a based on the updated second parameter min;

[0142] A first output module 316, configured to substitute the re - determined second parameter min, third parameter max, and first parameter a into the next iteration calculation, and output the finally calculated first parameter a as the calculation result until the current iteration count reaches the value of the output data width Q.

[0143] Further, the first determination module 304 includes:

[0144] A calculation sub - module, configured to calculate the difference between the output data width Q and a first value, obtain the maximum value between the difference and the value 0, and shift the value 1 to the left by the number of bits corresponding to the maximum value to obtain the initial value of the first parameter a, where the first value is the number of bits corresponding to the binary value 1 of the highest bit in the data x to be calculated;

[0145] A right - shift sub - module, configured to right - shift the initial value of the first parameter a by one bit to obtain the initial value of the second parameter min;

[0146] A first left - shift sub - module, configured to left - shift the initial value of the first parameter a by one bit to obtain the initial value of the third parameter max;

[0147] A second left - shift sub - module, configured to left - shift the value 1 by the number of bits corresponding to the output data width Q to obtain the value of the fourth parameter pow2Q.

[0148] Further, the first update module 312 includes:

[0149] A first summation sub - module, configured to sum the updated third parameter max, the second parameter min obtained from the previous iteration calculation, and the value 1 to obtain a first summation result;

[0150] The third left shift sub-module is used to left shift the value corresponding to the first summation result by 1 bit, and update the value of the first parameter a based on the left-shifted value.

[0151] Furthermore, the second update module 314 includes:

[0152] The second summation sub-module is used to sum the updated second parameter min, the third parameter max obtained from the previous iteration calculation, and the value 1 to obtain a second summation result;

[0153] The fourth left shift sub-module is used to left shift the value corresponding to the second summation result by 1 bit, and update the value of the first parameter a based on the left-shifted value.

[0154] Furthermore, the hardware-implemented division calculation device 300 further includes:

[0155] The second judgment module is used to judge whether the data x to be calculated is the numerical value 0;

[0156] The second output module is used to output the second numerical value as the calculation result when the data x to be calculated is the numerical value 0, where the second numerical value is the maximum value that can be represented under the hardware bit width supported by the hardware. It should be noted that the hardware-implemented division calculation device 300 can implement the steps of the hardware-implemented division calculation method provided in any of the foregoing method embodiments, and can achieve the same technical effects, which will not be elaborated here one by one.

[0157] As Figure 4 shown, an embodiment of the present application further provides an electronic device, including a processor 411, a communication interface 412, a memory 413, and a communication bus 414. Among them, the processor 411, the communication interface 412, and the memory 413 complete mutual communication through the communication bus 414,

[0158] The memory 413 is used to store a computer program;

[0159] In an embodiment of the present application, when the processor 411 is used to execute the program stored on the memory 413, it implements the steps of the hardware-implemented division calculation method provided in any of the foregoing method embodiments.

[0160] The electronic device provided by the embodiments of the present application can specifically be a module capable of implementing a communication function or a terminal device including such a module, etc. The terminal device can be a mobile terminal or an intelligent terminal. The mobile terminal can specifically be at least one of a mobile phone, a tablet computer, a laptop computer, etc.; the intelligent terminal can specifically be a terminal containing a wireless communication module such as an intelligent vehicle, an intelligent watch, a shared bicycle, an intelligent cabinet, etc.; the module can specifically be a wireless communication module, for example, any one of a 2G communication module, a 3G communication module, a 4G communication module, a 5G communication module, an NB-IOT communication module, etc.

[0161] The embodiments of the present application further provide a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the division calculation method implemented based on hardware provided by any of the foregoing method embodiments are realized.

[0162] The embodiments of the present application further provide a computer program product or a computer program. The computer program product or the computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the steps of the above-mentioned division calculation method implemented based on hardware.

[0163] It should be noted that in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such a process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0164] The above are only specific implementation manners of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A division calculation method based on hardware implementation, characterized in that: The method comprises: Obtaining the data to be calculated x and the preset output data bit width Q, wherein the data to be calculated x is a fixed-point number, the output data bit width Q is determined based on the error range of the output data, and the output data bit width Q is less than or equal to the hardware bit width supported by the hardware; Based on the data to be calculated x and the output data bit width Q, determining initial values ​​of multiple parameters involved in iterative calculation, wherein the multiple parameters include a first parameter a, a second parameter min, and a third parameter max that vary with iterative calculation, and a fourth parameter pow2Q that does not vary with iterative calculation; Determine whether the current number of iterations is less than the value of the output data bit width Q; When the current number of iterations is less than the value of the output data bit width Q, the product of the first parameter a obtained by the previous iteration calculation and the data to be calculated x is determined as the fifth parameter b; When b = pow2Q or max-min ≤ 1 or min > max, keep the values ​​of the second parameter min, the third parameter max and the first parameter a obtained in the previous iteration unchanged; When b > pow2Q and max-min > 1 and min ≤ max are satisfied, the value of the third parameter max is updated using the first parameter a calculated in the previous iteration, and the value of the first parameter a is updated again based on the updated third parameter max; When b < pow2Q and max-min > 1 and min ≤ max are satisfied, the value of the second parameter min is updated using the first parameter a calculated in the previous iteration, and the value of the first parameter a is updated again based on the updated second parameter min; Substituting the re-determined second parameter min, third parameter max and first parameter a into the next iterative calculation until the current iteration number reaches the value of the output data bit width Q, and outputting the finally calculated first parameter a as the calculation result; The initial values ​​of multiple parameters involved in iterative calculation are determined based on the data to be calculated x and the output data bit width Q, including: Calculate the difference between the output data bit width Q and the first value, obtain the maximum value of the difference and the value 0, and shift the value 1 left by the number of bits corresponding to the maximum value, so as to obtain the initial value of the first parameter a, wherein the first value is the number of bits corresponding to the highest binary value 1 in the data to be calculated x; Shift the initial value of the first parameter a right by one position to obtain the initial value of the second parameter min; Shift the initial value of the first parameter a to the left by one position to obtain the initial value of the third parameter max; Shift the value 1 left by the number of bits corresponding to the output data bit width Q to obtain the value of the fourth parameter pow2Q; The updating of the value of the first parameter a based on the updated third parameter max includes: Summing the updated third parameter max, the second parameter min calculated in the last iteration, and the value 1 to obtain a first summation result; Shift the value corresponding to the first sum result left by 1 bit, and update the value of the first parameter a based on the left-shifted value; The updating of the value of the first parameter a based on the updated second parameter min includes: The updated second parameter min, the third parameter max calculated in the last iteration, and the value 1 are summed to obtain a second summation result; The numerical value corresponding to the second summation result is shifted left by 1 bit, and the value of the first parameter a is updated based on the left-shifted numerical value.

2. The division calculation method based on hardware implementation according to claim 1, characterized in that: Before determining the initial values ​​of a plurality of parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, the method further includes: Determine whether the data x to be calculated is a value of 0; When the data x to be calculated is a value of 0, a second value is output as a calculation result, wherein the second value is a maximum value that can be represented under a hardware bit width supported by the hardware.

3. A division calculation device based on hardware implementation, characterized in that: The device comprises: An acquisition module, used to acquire the data to be calculated x and a preset output data bit width Q, wherein the data to be calculated x is a fixed-point number, the output data bit width Q is determined based on an error range of the output data, and the output data bit width Q is less than or equal to a hardware bit width supported by the hardware; A first determination module is used to determine initial values ​​of multiple parameters involved in iterative calculation based on the data to be calculated x and the output data bit width Q, wherein the multiple parameters include a first parameter a, a second parameter min and a third parameter max that vary with the iterative calculation, and a fourth parameter pow2Q that does not vary with the iterative calculation; A first judgment module is used to judge whether the current number of iterations is less than the value of the output data bit width Q; A second determination module is used to determine the product of the first parameter a calculated in the previous iteration and the data x to be calculated as the fifth parameter b when the current iteration number is less than the value of the output data bit width Q; A holding module, used to keep the values ​​of the second parameter min, the third parameter max and the first parameter a calculated in the previous iteration unchanged when b = pow2Q or max-min ≤ 1 or min > max; A first updating module, configured to update the value of the third parameter max by using the first parameter a calculated in the last iteration, and to update the value of the first parameter a again based on the updated third parameter max, when b > pow2Q, max-min > 1, and min ≤ max; A second updating module, configured to update the value of the second parameter min using the first parameter a calculated in the previous iteration, and to update the value of the first parameter a based on the updated second parameter min, when b < pow2Q and max-min > 1 and min ≤ max; A first output module is used to substitute the re-determined second parameter min, third parameter max and first parameter a into the next iterative calculation until the current iteration number reaches the value of the output data bit width Q, and then output the finally calculated first parameter a as a calculation result; Wherein, the first determining module includes: a calculation submodule, configured to calculate a difference between the output data bit width Q and a first value, obtain a maximum value between the difference and the value 0, and shift the value 1 left by the number of bits corresponding to the maximum value, so as to obtain an initial value of the first parameter a, wherein the first value is the number of bits corresponding to the highest binary value 1 in the data to be calculated x; a right shift submodule, used for shifting the initial value of the first parameter a right by one position to obtain the initial value of the second parameter min; A first left shift submodule, used for shifting the initial value of the first parameter a left by one position to obtain the initial value of the third parameter max; A second left shift submodule, used for left shifting the value 1 by the number of bits corresponding to the output data bit width Q, so as to obtain the value of the fourth parameter pow2Q; Wherein, the first update module includes: A first summing submodule is used to sum the updated third parameter max, the second parameter min calculated in the last iteration, and the value 1 to obtain a first summing result; A third left-shift submodule, used to left-shift the value corresponding to the first sum result by 1 bit, and update the value of the first parameter a based on the left-shifted value; Wherein, the second update module includes: A second summing submodule is used to sum the updated second parameter min, the third parameter max calculated in the last iteration, and the value 1 to obtain a second summing result; The fourth left-shift submodule is used to shift the numerical value corresponding to the second summation result to the left by 1 bit, and update the value of the first parameter a based on the left-shifted numerical value.

4. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor is used to implement the hardware-based division calculation method described in any one of claims 1-2 when executing a program stored in a memory.

5. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the hardware-based division calculation method according to any one of claims 1 to 2 is implemented.

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