Data scheduling method and computing device
By determining the target data preset and level in the main processing unit, design a reasonable data segmentation parameters, solve the problem of limited AI core memory resources, achieve efficient operating tasks, improve the system parallel processing of systematic parallel processing performance.
Patent Information
- Application Number
- CN202411311625.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2044-09-19
AI Technical Summary
AI Core memory storage resources are limited, resulting in the inability to move in, calculate and exit the calculation data at one time. It is necessary to design reasonable data segmentation parameters to efficiently complete the operator computing task.
The target data is prepared to align the target data in the main processing unit, determine the target level, and determine the data segmentation parameters according to the target data volume and target level, including the number of processing cores used, the number of processing of each processing core, and per processing. The amount of data that is processed is sent to the collaborative unit to make the scheduling processing core execution calculation.
A reasonable scheduling and allocation of multiple processing cores have been realized, the communication requirements and expenses between the core of the processing cores are reduced, and the parallel processing performance is improved, thereby improving the rate of the system execution target binocular calculation.
Smart Images

Figure CN119378624A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of artificial intelligence technology, and in particular to a data scheduling method and computing device. Background Art
[0002] A neural processing unit (NPU) is a processor designed specifically for performing artificial intelligence (AI) and deep learning tasks. It aims to improve the computing efficiency and performance of artificial intelligence tasks. One of its core components is multiple AI cores. AI Core has efficient core-outside parallel computing capabilities, the flexibility of supporting mixed precision, and high-speed interconnection and shared memory architecture, which can significantly improve the processing performance of artificial intelligence tasks and provide strong hardware support for the training and reasoning of deep learning models.
[0003] AI Core includes core components such as computing unit, storage unit, and transport unit, which supports large-scale neural network computing acceleration. The computing unit includes three basic computing resources: Cube computing unit, Vector computing unit, and Scalar computing unit. The storage unit is the internal storage of AI Core, collectively referred to as Local Memory. Correspondingly, the external storage of AI Core is called Global Memory. The direct memory access (DMA) transport unit is responsible for transporting data between Global Memory and Local Memory.
[0004] In AI application fields such as digital visual image processing, task operators developed in programming languages such as C / C++ and Python run in parallel on multiple AI Cores of the NPU. Since image processing (such as high-resolution image processing) involves huge amounts of computational data, these operator calculations are usually data-intensive.
[0005] However, AI Core memory storage resources are limited (usually 192K Byte or 256K Byte), and there is a situation where computing data cannot be moved in, calculated, and moved out at one time. Therefore, it is necessary to design reasonable data segmentation parameters to complete operator computing tasks in blocks and efficiently. Summary of the invention
[0006] The embodiments of the present application provide a data scheduling method and a computing device, which can efficiently complete operator computing tasks.
[0007] In the first aspect, an embodiment of the present application provides a data scheduling method, which is applied to a main processing unit, the main processing unit is communicatively connected to a co-processing unit, and the co-processing unit includes multiple processing cores, and the method includes: aligning target data of a target data volume according to a preset alignment boundary; the target data is for executing a target binocular operator calculation; the target data is any input data for executing a target binocular operator calculation; the target data volume is the number of target data; determining a target level according to the aligned target data volume; determining data segmentation parameters of the target data according to the target data volume and the target level; the data segmentation parameters include a target number of processing cores used, a number of processing times of each of the target number of processing cores, and a single data volume processed each time; sending the data segmentation parameters to the co-processing unit so that it schedules the processing core to perform the calculation according to the data segmentation parameters.
[0008] Therefore, designing targeted data segmentation schemes and determining data segmentation parameters for target data of different sizes can achieve reasonable scheduling and allocation of multiple processing cores, reduce the communication requirements and overhead between multiple processing cores, and improve their parallel processing performance, thereby improving the rate at which the system executes target binocular operator calculations.
[0009] In one possible implementation, each processing core includes a memory space of the same size; the target level includes a first level; the lower boundary parameter of the first level is 1, and the upper boundary parameter of the first level is the total number of multiple processing cores multiplied by a first preset number of target data processed by a single processing core each time.
[0010] In one possible implementation, the target level also includes a second level; the lower boundary parameter of the second level is greater than the upper boundary parameter of the first level, and the upper boundary parameter of the second level is the product of the total number of multiple processing cores and the second preset number of target data processed by a single processing core each time; wherein the second preset number is at least related to the memory size used by a single processing core to perform a target binocular operator calculation using an in-situ calculation method.
[0011] In one possible implementation, if the target binocular operator supports in-situ calculation, the second preset number is the memory space size of a single processing core, and the quotient is divided by the memory size used; the memory size used is the memory size used by a single processing core to perform a target binocular operator calculation using an in-situ calculation method.
[0012] In a possible implementation, if the coprocessing unit also supports intra-core pipeline parallelism, the second preset number is the memory space size of a single processing core, and the quotient of the product of the used memory size and the maximum parallel amount of the intra-core pipeline parallelism is divided.
[0013] Therefore, reasonable upper and lower boundary parameters are set for multiple levels according to the capabilities supported by the co-processing units.
[0014] In a possible implementation, the target level also includes a third level; a lower boundary parameter of the third level is greater than an upper boundary parameter of the second level.
[0015] Thus, multiple levels are preset for target data volumes of different sizes.
[0016] In one possible implementation, for the target data corresponding to the first level target data volume, the target number is the value obtained by dividing the target data volume by a first preset number and rounding up; the number of processing times of the target number of processing cores is 1; the single data volume processed each time by each processing core that is 1 less than the target number is the first preset number, and the single data volume processed each time by the remaining 1 processing core in the target number is the difference between the target data volume and the sum of the single data volume processed each time by each processing core that is 1 less than the target number.
[0017] In one possible implementation, for the target data corresponding to the target data volume of the second level, the target number is the total number of multiple processing cores: the target number of processing cores each processes 1 time; the single data volume processed each time by each processing core that is 1 less than the target number is the quotient of the target data volume divided by the target number, and the single data volume processed each time by the remaining 1 processing core in the target number is the difference between the target data volume and the sum of the single data volume processed each time by each processing core that is 1 less than the target number.
[0018] In one possible implementation, for the target data corresponding to the target data volume of the third level, the target number is the total number of multiple processing cores; the total data volume processed by each processing core that is one less than the target number is the quotient of the target data volume divided by the target number, and the total data volume processed by the remaining processing core in the target number is the difference between the target data volume and the sum of the total data volumes processed by each processing core that is one less than the target number.
[0019] In one possible implementation, for each processing core among the target number of processing cores, the number of processing times of the processing core is the value obtained by dividing the corresponding total data amount by a second preset number and rounding up; wherein, for processing other than the last time, the single data amount processed by the processing core each time is the second preset number, and for the last time, the single data amount processed by the processing core each time is the difference between the corresponding total data amount and the sum of the single data amounts processed other than the last time.
[0020] Therefore, targeted data segmentation schemes are designed for target data of different sizes to guide the co-processing unit to reasonably schedule multiple processing cores.
[0021] In a second aspect, an embodiment of the present application provides a computing device, including: a memory, a main processor and a coprocessor;
[0022] Memory, coupled with the main processor and the coprocessor;
[0023] Memory, used to store programs;
[0024] The main processor is used to call a program to execute the method described in any possible implementation of the first aspect, so that the coprocessor performs scheduling.
[0025] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a computer, the method as in the first aspect or any one of the first aspects is implemented.
[0026] In a fourth aspect, an embodiment of the present application provides a program product, including a computer program, which, when executed by a processor, implements the method in the first aspect or any one of the first aspects.
[0027] It can be understood that the beneficial effects of the second to fourth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0029] Figure 1 A custom operator development flow chart provided for an embodiment of the present application;
[0030] Figure 2 A flow chart of a data scheduling method provided in an embodiment of the present application;
[0031] Figure 3 A data segmentation schematic diagram provided for an embodiment of the present application;
[0032] Figure 4 A data segmentation schematic diagram provided for an embodiment of the present application;
[0033] Figure 5 A schematic diagram of data segmentation parameters provided in an embodiment of the present application;
[0034] Figure 6 A schematic diagram of the structure of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0035] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings.
[0036] In the description of the embodiments of the present application, any embodiment or design scheme of "exemplary", "for example" or "for example" should not be understood as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a specific way.
[0037] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized. "At least one" can be one or more, where a plurality is two or more.
[0038] In fields such as deep learning and computer vision, operators play an important role in neural network models, which correspond to the computational logic of the layers or nodes in the network. General operators such as "tanh", "ReLU", "Conv2D", etc. are mostly used for the analysis and processing of single-channel images. In stereo vision systems, stereo operators such as "Add" are used to process two channels of images from different perspectives of the same scene. One channel of the image corresponds to the "one eye" of the stereo operator. By comparing and analyzing the two channels of images, the depth information of objects in the scene can be calculated. The natural two-dimensional structure of image data allows the above operators to use multiple AI Cores for parallel processing to increase the computing rate.
[0039] At present, for computing systems including multiple AI Cores, the commonly used method of splitting operator data between cores is usually load balancing, which evenly distributes the computing data of the operator calculation to each AI Core to optimize the use of computing resources and improve overall performance. However, this data splitting method cannot dynamically adjust the distribution of computing data according to the characteristics of the operators involved in the current load and tasks. In some specific scenarios, such as when there is a large difference in load calculation amount or operator execution time, simple load balancing is not effective enough.
[0040] In view of this, this scheme firstly determines the target data volume and target level of the target data in the main processing unit. The target data is any input data for executing the target binocular operator, and the target data volume is the number of target data. And the data segmentation parameters of the target data are determined according to the target data volume and target level. Secondly, the main processing unit transmits the data segmentation parameters to the co-processing unit connected to it for communication, so that the co-processing unit schedules the multiple processing cores included according to the data segmentation parameters to perform the target binocular operator calculation. Therefore, a targeted data segmentation scheme is designed for target data of different target data volumes, which can realize the reasonable scheduling and allocation of multiple processing cores, reduce the communication requirements and overhead between multiple processing cores, and improve their parallel processing performance, thereby improving the performance of the system in executing the target binocular operator calculation.
[0041] In addition, the boundary parameters used in the target level in this scheme are at least related to the memory size used by a single processing core to perform a target binocular operator calculation using an in-situ calculation method, thereby improving the rationality of the target level division; and, this scheme uses an in-situ calculation method to perform target binocular operator calculations, which can improve the memory usage efficiency of a single processing core and reduce data transfer time, thereby increasing the rate at which the system performs target binocular operator calculations.
[0042] For example, Figure 1 A custom operator development flow chart provided in an embodiment of the present application is shown in FIG.
[0043] like Figure 1 As shown, in fields such as computer vision or image processing, developers complete efficient and reliable operators through operator analysis and operator creation engineering design based on specific image processing tasks.
[0044] The operator analysis step is used to analyze and evaluate the operators used in the image processing algorithm. Operator analysis can help determine the operator type and parameters that are most suitable for a specific task.
[0045] The operator creation project step is used to create a new project or project in the software development process based on the determined operator type and parameters, specifically for developing and implementing image processing operators. This may include setting up the development environment, configuring dependencies, defining the project structure, etc.
[0046] In the binocular vision system, you can develop custom binocular operators based on programming languages such as C / C++ and Python, such as "Add", which is used to merge the features or data of two images for processing.
[0047] like Figure 1As shown, the host side is the environment where the main processing unit is located, and its code implementation is used to execute high-level control logic and coordinate computing tasks. The main processing unit can be a central processing unit (CPU) or a graphics processing unit (GPU). In this solution, the main processing unit determines the data segmentation parameters of the target data according to the target level of the target data volume, and passes the data segmentation parameters to the core side.
[0048] The core side is a co-processing unit responsible for executing parallel computing tasks, and its code implementation is used to execute parallel computing tasks. Corresponding co-processing units are set for different types of main processing units. For example, when the main processing unit is a GPU, the co-processing unit can be a tensor processing unit (TPU) or NPU, etc.; when the main processing unit is a CPU, the co-processing unit can be a GPU, TPU or NPU, etc. These co-processing units include multiple processing cores and perform well in executing highly parallel tasks. In this solution, the co-processing unit schedules multiple processing cores based on the data set segmentation parameters sent by the main processing unit, and moves the data in the data set to perform the calculation of the target stereo operator.
[0049] It can be understood that the main processing unit and the co-processing unit have a communication connection for collaborative work, and this heterogeneous computing mode can give full play to their respective advantages. Depending on the application scenario, some systems may integrate the co-processing unit into a system on chip (SoC) to provide an integrated solution together with the main processing unit and components such as storage and I / O controllers. In addition, the co-processing unit can also exist as an independent device, for example, as a pluggable accelerator card, connected to the host system including the main processing unit through a high-speed interface (such as PCIe). This form allows it to be used in existing systems that require additional high-speed parallel computing capabilities. The above two methods are both communication connection methods supported by this solution.
[0050] The following will take the neural network processing unit NPU as a co-processing unit and the application of NPU in digital visual image processing as an example to explain this solution in detail.
[0051] For example, Figure 2 A flow chart of a data scheduling method provided by an embodiment of the present application is shown in FIG. The method can be run on any computing unit, server, device, or main processing unit of a device cluster that has computing and processing capabilities. These hardware devices are also integrated with a co-processing unit or have a communication connection with the co-processing unit through a high-speed interface. The co-processing unit includes multiple processing cores.
[0052] like Figure 2 As shown, the method mainly includes the following steps:
[0053] Step S201, aligning target data of a target data volume according to a preset alignment boundary. The target data is any input data for executing a target binocular operator calculation. The target data volume is the number of target data.
[0054] In one embodiment, the required alignment boundary, such as 32 Byte or 64 Byte, is determined according to the access performance of the storage medium storing the target data.
[0055] Before using the target data for calculation, aligning the target data of the target data volume in the storage medium according to a preset alignment boundary can reduce the delay of storage space access and improve the efficiency of data loading and storage.
[0056] Exemplarily, the target data is data collected in the application field and used to perform the target binocular operator calculation. The target binocular operator is a binocular operator, which means that two input data X and Y are required to perform the operator calculation, and one input data is called "one binocular". The target data is any one of the two input data X and Y. The two input data X and Y used to perform the target operator calculation have the same data type and the same target data amount.
[0057] The target data volume is the number of target data, that is, the number of any input data used to execute the target binocular operator. The target data volume has nothing to do with the data type of the target data. The larger the target data volume, the more the number of target data, and vice versa.
[0058] It can be understood that when the co-processing unit is applied to AI fields such as digital visual image processing (such as high-resolution image processing), the calculation data involved is intensive, and the target data has a large data volume. When the co-processing unit is applied to occasions where the digital visual image does not change much or low-resolution image processing, the target data has a small or medium data volume. Therefore, different data segmentation schemes can be designed for target data of different sizes to improve the efficiency of executing the target binocular operator calculation.
[0059] Step S202, determining the target level according to the aligned target data volume.
[0060] In one embodiment, at least first, second and third levels are preset for target data volumes of different sizes. The first, second and third levels represent that the target data volume of the target data is small, medium and large data volume, respectively. Upper and lower boundary parameters are set for each level to determine the data volume range included in each level.
[0061] After obtaining target data of target data volume through data collection and aligning preset boundaries, the target level is determined according to the target data volume. It can be understood that the target level may be any one of the first, second, and third levels.
[0062] In one implementation, each processing core included in the coprocessing unit includes a memory space of the same size, and the lower boundary parameter of the first level is set to 1, and the upper boundary parameter of the first level is the product of the total number of multiple processing cores and a first preset number of target data processed by a single processing core each time.
[0063] For example, for the co-processing unit NPU, the number range of the target data corresponding to the first level is set to [1, totaIBlockDim*Length]. Where totalBlockDim is the total number of AI Cores in the co-processing unit NPU. Length is the first preset number, which can be a constant set based on experience, identifying the single amount of data that can be carried and processed on a single AI Core at a time, for example, the optimal number of data that a single AI Core can process. The storage space occupied by the target data of the first preset number Length is smaller than the memory space of a single AI Core.
[0064] The first preset number can be adjusted according to the computational complexity of different target binocular operators. For example, the more complex the computation of the target binocular operator is, the smaller the first preset number is, and vice versa. The storage space is the storage space occupied by the target data in the storage medium, and the storage medium is the Global Memory of the AI Core.
[0065] In one implementation, based on the number range of target data corresponding to the first level, the lower boundary parameter of the second level is set to be greater than the upper boundary parameter of the first level, and the upper boundary parameter of the second level is the product value of the total number of multiple processing cores and the second preset number of target data processed by a single processing core each time. Wherein, when the target binocular operator supports in-situ calculation, the second preset number is at least related to the memory size used by a single processing core to perform a target binocular operator calculation using an in-situ calculation method.
[0066] For example, for the co-processing unit NPU, the number range of the target data corresponding to the second level is set to (totalBlockDim*Length, totalBlockDim*ubLength]. Among them, totalBlockDim is the total number of AI Cores in the co-processing unit NPU. ubLength is a second preset number, which identifies the maximum amount of data that a single AI Core can carry and process at a time, such as the maximum number of data that a single AI Core can process. The storage space occupied by the target data of the second preset number ubLength is not larger than the memory space of a single AI Core.
[0067] Optionally, if the target binocular operator supports in-situ calculation, the second preset number is the memory space size of a single processing core, and the quotient is divided by the memory size used; the memory size used is the memory size used by a single processing core to perform a target binocular operator calculation using an in-situ calculation method.
[0068] For example, for the co-processing unit NPU, the second preset number ubLength is set to the memory size of a single AI Core, and the quotient of the memory size used for performing a target binocular operator calculation is divided by the in-situ calculation method for the single AI Core. The formula is: ubLength = ubSize / (num*sizeof(datatype)).
[0069] Among them, ubSize is the memory size of a single AI Core. num is the number of input and output variables required by the target stereo operator, and sizeof(datatype) is the memory space occupied by the data type datatype of the target data. For example, for the data type float16, sizeof(float16) = 2, indicating that a data type float16 needs to occupy 2Byte of memory space. num*sizeof(datatype) is the memory size used by a single AI Core to perform a target stereo operator calculation. Next, you need to determine the value of num in the target stereo operator.
[0070] Take an ordinary binocular operator Add with the expression z=X+y as an example. To execute the binocular operator calculation once, two input data X and Y are required. One input data is called "one binocular operator". The two input data X and Y correspond to variables x and y respectively. Therefore, it is necessary to move the data corresponding to the two input variables x and y from the Global Memory of AI Core to the Local Memory of AI Core. In the Local Memory of AI Core, storing these two variables requires memory space of two data types. In addition, a memory space of a data type needs to be opened for the result variable z. Therefore, to execute a binocular operator Add calculation once, memory space of three data types is required.
[0071] However, when developing a custom target binocular operator using a programming language, the algorithm of the binocular operator can be designed to support in-place calculations by updating the data structure in place or using techniques that exchange values instead of copying values, such as using pointers and references to avoid unnecessary data copying.
[0072] Taking the above-mentioned ordinary binocular operator Add as an example, its expression can be replaced from z=x+y to y+=x during programming development, and the target binocular operator supporting in-place calculation with the expression y+=x can be obtained. From the expression y+=x, it can be seen that when performing the calculation, the operation can be performed directly on the input variable y, and the calculation result can be saved in the original memory space of the input variable y, without allocating additional memory space for the intermediate result z. At this time, to complete the calculation of the target binocular operator supporting in-place calculation, only two data types of memory space are needed, that is, the number of input and output variables num=2 required by the target binocular operator supporting in-place calculation.
[0073] Therefore, this solution can reduce the overhead of data copying and movement by developing a target binocular operator that supports in-situ calculation and scheduling the processing core to perform the calculation of the target binocular operator using the in-situ calculation method, thereby improving the memory utilization of a single processing core and reducing data transfer time.
[0074] Optionally, when the target binocular operator supports in-situ calculation, if the co-processing unit also supports the in-core pipeline parallel function, the second preset number is the memory space size of a single processing core, and the quotient of the memory size used and the product of the maximum parallel amount of the in-core pipeline parallel function is divided. The memory size used is the memory size used by a single AI Core to perform a target binocular operator calculation using the in-situ calculation method.
[0075] For example, when the co-processing unit NPU supports the intra-core pipeline parallel function, the second preset number is the memory space size of a single AI Core, and the quotient of the product of the memory size used for executing a target binocular operator calculation and the maximum parallel amount of the intra-core pipeline parallel function is divided by the in-situ calculation method for a single AI Core. For example, if the parallel amount doubleBuffer of the intra-core pipeline parallel function in the co-processing unit NPU can be set to 1 or 2, the maximum parallel amount of the intra-core pipeline parallel function is 2. Setting doubleBuffer = 1 means turning off the intra-core pipeline parallel function, and correspondingly, setting doubleBuffer greater than 1 means turning on the intra-core pipeline parallel function.
[0076] At this time, the second preset number ubLength is set to: ubLength = ubSize / (doubleBuffer * num * sizeof (datatype)). Among them, setting doubleBuffer = 2 is the maximum parallelism of the intra-core pipeline parallel function. Since the intra-core pipeline parallelism is turned on, the pipeline processing of instructions or tasks can be realized within a single AI Core, thereby improving the computing efficiency and throughput of the AICore. Therefore, for application scenarios with frequent large amounts of data, when the co-processing unit NPU supports the intra-core pipeline parallel function, it is more reasonable to set the second preset number according to the maximum parallelism of the intra-core pipeline parallel function.
[0077] Optionally, when the target binocular operator supports in-situ calculation, if the coprocessing unit also supports the in-core pipeline parallel function, and the number of target data that can be read by a single processing core each time the level 0 interface is called is within a preset range, the second preset number is the number of target data that can be read by a single processing core each time the level 0 interface is called. The memory size used is the memory size used by a single AI Core to perform a target binocular operator calculation using the in-situ calculation method.
[0078] In computers, interface levels (such as level 0, level 1, level 2, or level 3 interfaces) generally refer to different levels of abstraction for interacting with hardware. As the interface level increases, it is usually easier to use and integrate into an application. Lower-level interfaces may provide better control over hardware performance, but require more programming work. Accordingly, the level 0 interface is the interface closest to the hardware, providing direct control over hardware resources and allowing users to perform low-level operations such as memory access and register operations. The level 3 interface is the most abstract and provides more advanced functions and services, such as application frameworks, database management systems, advanced graphical user interface libraries, etc.
[0079] In the co-processing unit NPU, compared with level 1, 2 or 3 interfaces, the use of level 0 interface allows AI Core to directly access and control hardware resources such as CPU registers, memory addresses or dedicated hardware accelerators, thereby improving the real-time performance of the target stereo operator calculation.
[0080] Taking the above binocular operator Add as an example, if the Add operator supports in-place calculation and the co-processing unit NPU supports intra-core pipeline parallelism, the quotient of the memory size of a single AI Core divided by the product of the used memory size and the maximum parallelism of the intra-core pipeline parallel function is ubSize / (doubleBuffer*num*sizeof(datatype)), hereinafter referred to as the first quotient, which represents the number of target data processed by a single AI Core in this case. The memory size used is the memory size used by a single AI Core to perform a target binocular operator calculation using the in-place calculation method.
[0081] For an AI Core with a memory size of 256K Byte and target data of datatype float16, the memory space occupied by the target data of the first quotient is: sizeof(datatype)*(ubSize / (doubleBuffer*num*sizeof(datatype)))=256K / (2*2)=65536Byte, which is one-fourth of the memory size of a single AI Core. At this time, the first quotient is 65536Byte / sizeof(float16).
[0082] When the co-processing unit NPU uses a level 0 interface, the data size that allows a single AI Core to directly access and control hardware resources is 255*256B=65280Byte. Among them, 255 refers to the number of times that data can be read by calling a level 0 interface, and 256B refers to the size of the storage medium occupied by each read data. Therefore, the number of target data that can be read each time the level 0 interface is called is: 65280 Byte / sizeof(float16).
[0083] From the formula (65536Byte-65280Byte)=256Byte, it can be seen that the memory space occupied by the target data of the first quotient value is slightly larger than the storage space occupied by the data read by a single AI Core calling the level 0 interface in a single call, and the two are quite close. From the formula 65536Byte / sizeof(float16)-65280Byte / sizeof(float16)=(65536Byte-65280Byte) / sizeof(float16)=256Byte / 2, it can be seen that the number of target data that can be read by a single AI Core calling the level 0 interface in a single call is extremely small, and is within a very small preset range. Therefore, it can be roughly considered that the amount of data read each time by the Add 0-level interface is the same as the first quotient value, and the requirements for the system's software and hardware collaboration are basically the same, and consistent computing performance and computing indicators can be achieved.
[0084] Furthermore, each time the AI Core processes the target data of the first quotient value, the memory utilization rate can reach 100%. However, since the memory space occupied by the target data of the first quotient value is slightly larger than the storage space occupied by the data read by a single AI Core calling the level 0 interface once, it is necessary to call the level 0 interface twice and perform the scheduling of the level 0 interface twice.
[0085] When the AI Core processes and calls the level 0 interface to read the target data each time, although the memory utilization of the AI Core will be slightly reduced, only one level 0 interface scheduling is required.
[0086] Compared with the slight reduction in AI Core memory utilization, setting the second preset number to the number of target data that a single AI Core can read each time it calls the level 0 interface can avoid the situation where the AI Core calls the level 0 interface twice for one data transfer, thereby reducing the time spent on executing the target binocular operator calculation, and is therefore more reasonable.
[0087] In one implementation, based on the number range of target data corresponding to the second level, a lower boundary parameter of the third level is set to be greater than an upper boundary parameter of the second level, and the upper boundary parameter of the third level is infinite.
[0088] For example, for the co-processing unit NPU, the number range of the target data corresponding to the third level is set to (totalBlockDim*ubLength, +∞), where totalBlockDim is the total number of AI Cores in the co-processing unit NPU, and ubLength is the second preset number.
[0089] Therefore, this solution sets the upper and lower boundary parameters used at the target level based on the in-situ calculation characteristics of the target binocular operator, which can make the setting of the boundary parameters more reasonable. In addition, this solution can also improve the memory usage efficiency of each processing core and reduce data transfer time by performing in-situ calculation on the target binocular operator, thereby improving the performance of the system in calculating the target binocular operator.
[0090] Step S203, determining data segmentation parameters of the target data according to the target data volume and the target level. The data segmentation parameters include the target number of processing cores to be used, the number of processing times of each of the target number of processing cores, and the single data volume for each processing.
[0091] In one embodiment, the scheme designs a targeted data segmentation scheme for target data of different target data volumes, and determines the data segmentation parameters of the target data. The target number is the number of processing cores used for parallel processing of target binocular operator calculations by the coprocessing unit for target data of the target data volume, and the target number is not greater than the total number of processing cores included in the coprocessing unit.
[0092] Exemplarily, for the target data corresponding to the target data volume of the first level, the data segmentation scheme includes: the target number is the value obtained by dividing the target data volume by the first preset number and rounding up. The number of times each of the processing cores of the target number is 1. The single data volume processed each time by each of the processing cores that is 1 less than the target number is the first preset number, and the single data volume processed each time by the remaining processing core in the target number is the difference between the target data volume and the sum of the single data volume processed each time by each of the processing cores that is 1 less than the target number.
[0093] For example, for the co-processing unit NPU, the target number of AI Cores to be scheduled is blockDim=(X+Length-1) / Length, which means dividing the target data volume by the first preset number and rounding up. Where X is the target data volume, and Length is the first preset number. The target number of AI Cores each processes 1 time, and only one inter-core split can be performed to determine the single data volume processed by the target number of AI Cores each time. Wherein, the single data volume processed by the first (blockDim-1) AI Core (hereinafter referred to as the big core) is formerLength=Length, and the single data volume processed by the last AI Core (hereinafter referred to as the small core) is tailLength=X-(blockDim-1)*formerLength.
[0094] Exemplarily, for the target data corresponding to the second-level target data volume, the data segmentation scheme includes: the target number is the total number of multiple processing cores; the number of processing times of the target number of processing cores is 1; the single data volume processed each time by each processing core that is 1 less than the target number is the quotient of the target data volume divided by the target number, and the single data volume processed each time by the remaining 1 processing core in the target number is the difference between the target data volume and the sum of the single data volume processed each time by each processing core that is 1 less than the target number.
[0095] For example, for the co-processing unit NPU, the target number of AI Cores to be scheduled is blockDim = totalBlockDim, where totalBlockDim is the total number of AI Cores in the co-processing unit NPU. The target number of AI Cores each processes once, and only one inter-core split can be performed to determine the amount of data processed each time by the target number of AI Cores. Among them, the amount of data processed by the first (blockDim-1) AI Core (big core) is formerLength = X / blockDim, and the amount of data processed by the last AI Core (small core) is tailLength = X-(blockDim-1)*formerLength.
[0096] Exemplarily, for the target data corresponding to the target data volume of the third level, the data segmentation scheme includes: the target number is the total number of the plurality of processing cores. The total data volume processed by each of the processing cores that is one less than the target number is the quotient of the target data volume divided by the target number, and the total data volume processed by the remaining processing core of the target number is the difference between the target data volume and the sum of the total data volumes processed by each of the processing cores that is one less than the target number.
[0097] For each processing core among the target number of processing cores, the number of processing times of the processing core is the value obtained by dividing the corresponding total data amount by the second preset number and rounding up; wherein, for processing other than the last time, the single data amount processed by the processing core each time is the second preset number, and for the last time, the single data amount processed by the processing core each time is the difference between the corresponding total data amount and the sum of the single data amounts processed other than the last time.
[0098] For example, for the co-processing unit NPU, the target number of AI Cores to be scheduled is blockDim = totaIBlockDim, where totalBlockDim is the total number of AI Cores in the co-processing unit NPU. The number of times each of the target number of AI Cores processes is greater than 1, and one inter-core split and one intra-core split can be performed to determine the single amount of data processed by each of the target number of AI Cores each time.
[0099] First, perform an inter-core split to determine the total amount of data processed by each of the target number of AI Cores, where the total amount of data processed by the first (blockDim-1) AI Cores (large cores) is formerLength = XIblockDim, and the total amount of data processed by the last AI Core (small core) is tailLength = X-(blockDim-1)*formerLength. Since the total amount of data processed by a single AI Core exceeds the memory size of a single AI Core, the transfer calculation cannot be completed in one round. Therefore, it is necessary to perform an intra-core split on top of the inter-core split.
[0100] Secondly, perform an intra-core split to determine the amount of single data processed each time by each of the target number of AI Cores. The intra-core splitting strategies used for large cores and small cores are the same. Taking the large core as an example, calculate the number of processing times of a single AI Core of the target number formerNum = (formerLength + ubLength - 1) / ubLength. This formula represents dividing the total amount of data processed by the processing core by the second preset number and rounding up. The amount of single data processed by the target number of single AI Cores in the previous (formerNum-1) times formerTilelLength = ubLength, and the amount of single data processed in the last time formerTailLength = formerLength - (formerNum-1) * formerTilelLength.
[0101] Therefore, the target number of AI Cores each processes multiple times until the total amount of target data allocated to each of the target number of AI Cores is scheduled. In the calculation process, the memory utilization of each AI Core is improved while the parallel processing performance of the target number of AI Cores is improved, and the two are balanced as much as possible to improve the overall rate of using multi-core processors to carry the target amount of target data to execute the target binocular operator.
[0102] Step S204, sending the data segmentation parameters to the co-processing unit, so that it schedules the processing core to perform calculations according to the data segmentation parameters.
[0103] In one embodiment, the main processing unit instructs the co-processing unit to schedule multiple processing cores according to the data segmentation parameters by passing the data segmentation parameters to move target data of a target data volume to perform target binocular operator calculations.
[0104] Therefore, this solution designs targeted data segmentation schemes for target data of different sizes, determines data segmentation parameters according to the data segmentation schemes, so as to guide the co-processing unit to reasonably schedule and allocate multiple processing cores, reduce the communication requirements and overheads between multiple processing cores, and improve their parallel processing performance, thereby improving the computing performance of the system under different computing amounts.
[0105] The following example takes the target binocular operator as the above binocular operator Add that supports in-place calculation, the memory size of a single AI Core included in the co-processing unit NPU as 256K Byte, and the data type of the target data as float16. Figure 3-Figure 5 The data segmentation scheme used in this scheme is described in detail.
[0106] For example, Figure 3 A data segmentation schematic diagram provided in an embodiment of the present application is shown in FIG.
[0107] like Figure 3 As shown, the total number of AI Cores in the coprocessing unit NPU is totalBlockDim=N. For the target data corresponding to the first level of target data volume, the target number of AI Cores scheduled by the coprocessing unit NPU can be less than N. For the target number of AI Cores, each AI Core is transported once and processed once, so only one inter-core split is required.
[0108] For the large cores in the target number of AI Cores, the number of data processed by each AI Core is the first preset number Length, and the size of the memory space occupied is Length*sizeof(float16); the number of small cores in the target number of AI Cores is 1, and for a small core, the single data volume processed by the AI Core is the difference between the target data volume and the sum of the single data volumes processed by all large cores, and the difference is usually less than the first preset number Length. Therefore, for the target data corresponding to the first level of target data volume, the concurrency rate of the AI Core can be less than 100%, and the memory usage rate of each AI Core can also be less than 100%.
[0109] For the target data corresponding to the second-level target data volume, the target number of AI Cores scheduled by the coprocessing unit NPU is equal to N. For the target number of AI Cores, each AI Core carries and calculates once, so only one inter-core split is required.
[0110] For the large cores in the target number of AI Cores, the number of data processed by each AI Core is the first preset number ubLength, and the size of the memory space occupied is ubLength*sizeof(float16); the number of small cores in the target number is 1, and for the small core, the single data volume processed by the AI Core is the difference between the target data volume and the sum of the single data volumes processed by all large cores, and the difference is usually less than the second preset number ubLength. Therefore, for the target data corresponding to the second level of target data volume, the concurrency rate of the AI Core is 100%, and the memory usage rate of each AI Core is usually less than 100%.
[0111] For the target data corresponding to the target data volume of the third level, the target number of AI Cores scheduled by the co-processing unit NPU is equal to N. For the target number of AI Cores, each AI Core carries m times and processes m times, where m is greater than 1. Therefore, on the basis of an inter-core split, an intra-core split is required.
[0112] The first step is to perform inter-core segmentation. For the large cores in the target number of AI Cores, the total amount of data processed by each AI Core is the quotient of the target data amount divided by the target number. The number of small cores in the target number is 1. For a small core, the total amount of data processed by the AI Core is the difference between the target data amount and the sum of the total data amounts processed by all the large cores, which is usually smaller than the total amount of data allocated to be processed by a single large core.
[0113] The second step is to perform intra-core segmentation. Regardless of whether it is a large core or a small core, the same segmentation strategy is adopted. Taking the large core as an example, first determine the number of calculations of a single AI Core m as the value of dividing the corresponding total data volume by the second preset number and rounding up. For the first (m-1) processing times, the single data volume processed is the second preset number ubLength. For the mth processing, the single data volume processed is the difference between the corresponding total data volume and the sum of the single data volumes processed for non-last processing.
[0114] Therefore, for the target data corresponding to the target data volume of the third level, the concurrency rate of the AI Core is 100%, the memory usage of each AI Core may be 100% for the first (m-1) times out of m times, while the mth time is usually less than 100%, and the memory usage of the first (m-1) times is usually greater than the mth time.
[0115] As mentioned above, if the co-processing unit NPU supports the intra-core pipeline parallel function, the second preset number ubLength set will usually be reduced compared to not supporting the intra-core pipeline parallel function, and the relationship between the front and back is one of the maximum parallel amount of the intra-core pipeline parallel function. In this way, for the target data corresponding to the third level of target data volume, since the target number of AI Cores each processes more than once, the calculation rate of the target binocular operator can be further improved by turning on the intra-core pipeline parallel function and setting doubleBuffer to the maximum parallel amount. For the target data corresponding to the first or second level of target data volume, since the target number of AI Cores each processes only once, the parallel amount doubleBuffer=1 can be set to turn off the intra-core pipeline parallel function. The above settings can optimize the performance of multiple AI Cores executing the target binocular operator.
[0116] For example, Figure 4 A data segmentation schematic diagram provided in an embodiment of the present application is shown in FIG.
[0117] Among them, the target binocular operator supports in-situ calculation, the co-processing unit NPU supports intra-core pipeline parallelism, and the AI Core in the co-processing unit MPU uses a level 0 interface to read target data of the target data volume.
[0118] like Figure 4 As shown in the figure, since the target binocular operator uses the level 0 interface to read the target data, as mentioned above, the second preset number ubLength is slightly less than the maximum number of target data that a single AI Core can carry at one time. Therefore, for the target data corresponding to the third level of target data volume, the concurrency rate of a single AI Core is 100%, and the memory usage of a single AI Core is less than 100% in m times, and the memory usage of the first (m-1) rounds is usually greater than that of the mth round. Figure 3 Similar, no further elaboration.
[0119] For example, Figure 5 A data segmentation parameter schematic diagram provided in an embodiment of the present application is shown in FIG.
[0120] like Figure 5 As shown, the marking symbols involved in the embodiment are as follows:
[0121] The total number of AI Cores in the co-processing unit NPU: totalBlockDim,
[0122] The total amount of data calculated by the big core: formerLength,
[0123] The total amount of data calculated by the small core: tailLength,
[0124] Large number of cores: formerBlock.
[0125] The first, second, and third levels respectively indicate that the target data amounts of the target data are small, medium, and large data amounts.
[0126] The target data of the target data volume is aligned in the storage medium according to the preset alignment boundary 32Byte.
[0127] For the target data corresponding to the target data volume of the first level, the target data volume of the target data is in the range of [1, totalBlockDim*Length]. Among them, the first preset number Length=16*256 / sizeof(float16)=128*16, which is equivalent to calling the Add 0-level interface to read the target data, but the number of times the 0-level interface can be called to read the target data is set to 16; set to turn off the core pipeline parallel function, that is, set doubleBuffer=1.
[0128] For the target data corresponding to the target data volume of the second level, the target data volume of the target data is in the range of (totalBlockDim*Length, totalBlockDim*ubLength]. Among them, the first preset number Length=128*16; the second preset number ubLength=255*256 / sizeof(float16)=128*255; the same setting is used to turn off the intra-core pipeline parallel function, that is, doubleBuffer=1 is set.
[0129] For the target data corresponding to the target data volume of the third level, the target data volume of the target data is in the range of (totalBlockDim*ubLength, +∞), where ubLength=255*256 / sizeof(float16)=128*255; the core pipeline parallel function is enabled, that is, doubleBuffer=2 is set as the maximum parallel amount.
[0130] For target data corresponding to target data volumes at different levels, data segmentation parameters determined according to the data segmentation schemes corresponding to each level include:
[0131] For the target data corresponding to the first level of target data volume, the target number of AI Cores used by the co-processing unit NPU is blockDim = (X + Length - 1) / Length, where Length = 128 * 16. Perform one inter-core split, in the first (blockDim-1) large cores, the single data volume allocated to each large core for processing is formerLength = Length, and in the next small core, the single data volume allocated to the small core for processing is tailLength = X-(blockDim-1) * formerLength; where tailLength is usually <= formerLength.
[0132] For the target data corresponding to the second level target data volume, the target number of AI Cores used by the co-processing unit NPU is blockDim=totalBlockDim. Perform one inter-core split, and in the first (blockDim-1) large cores, the single data volume that each large core is assigned to process is formerLength=X / bIockDim, and in the last small core, the single data volume that the small core is assigned to process is tailLength=X-(blockDim-1)*formerLength. Among them, tailLength<=formerLength.
[0133] For the target data corresponding to the third level of target data volume, the target number of AI Cores used by the co-processing unit NPU is blockDim=totalBlockDim. First, perform one inter-core split. In the first (blockDim-1) large cores, the total amount of data that each large core is assigned to process is formerLength=X / blockDim. In the last small core, the total amount of data that the small core is assigned to process is tailLength=X-(blockDim-1)*formerLength; where tailLength<=formerLength.
[0134] Secondly, for each large core and one small core, the same strategy is used to perform one intra-core split:
[0135] Set formerTileLength=tailTileLength=128*255. In the first (blockDim-1) large cores, the number of processing times of each large core is formerNum=(formerLength+formerTileLength-1) / formerTileLength. The single data volume processed each time in the first (formerNum-1) times is formerTileLength. The single data volume processed in the last time is formerTailLength=formerLength-(formerNum-1)*formerTileLength; where formerTailLength<=formerTileLength:
[0136] In the latter small core, the number of processing times of the small core is tailNum = (tailLength + tailTileLength - 1) / / tailTileLength, the single data volume processed each time in the first (tailNum - 1) times is tailTileLength, and the single data volume processed in the last time is tailTailLength = tailLength - (tailNum - 1) * tailTileLength; wherein, tailNum <= formerNum, tailTailLength <= tailTileLength.
[0137] It is understandable that the size of the sequence number of each step in the above embodiment does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. In addition, in some possible implementations, each step in the above embodiment can be selectively executed according to actual conditions, and can be partially executed or fully executed, which is not limited here. In addition, all or part of any feature in the above embodiment can be freely and arbitrarily combined without contradiction. The combined technical solution is also within the scope of the present application.
[0138] The present application embodiment also provides a computing device 1000. Figure 6 As shown, the computing device 1000 includes: a bus 1002, a main processor 1004, a coprocessor 1006, a memory 1008, and a communication interface 1010. The main processor 1004, the coprocessor 1006, the memory 1008, and the communication interface 1010 communicate with each other through the bus 1002. It should be understood that the present application does not limit the number of main processors, coprocessors, and memories in the computing device 1000.
[0139] The bus 1002 may be a peripheral component interconnect (PC1) bus or an extended industry standard architecture (ElSA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 The bus 1002 may include a path for transmitting information between various components of the computing device 1000 (eg, the main processor 1004, the coprocessor 1006, the memory 1008, and the communication interface 1010).
[0140] The main processor 1004 may include any one or more processors such as a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP) or a digital signal processor (DSP).
[0141] The coprocessor 1006 may include any one or more of a graphics processor GPU, a neural network processing unit NPU, a tensor processing unit (TPU), or an image processing unit (IPU). For example, when the main processor 1004 is a central processing unit CPU, the coprocessor 1006 may be a graphics processor GPU, a neural network processing unit NPU, a tensor processing unit TPU, or an image processing unit IPU. When the main processor 1004 is a graphics processor GPU, the coprocessor 1006 may be a neural network processing unit NPU, a tensor processing unit TPU, or an image processing unit IPU.
[0142] The memory 1008 may include a volatile memory, such as a random access memory (RAM). The memory 1008 may also include a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD), or a solid state drive (SSD).
[0143] The memory 1008 stores executable program codes / instructions, and the main processor 1004 executes the executable program codes / instructions to implement Figure 2The method flow shown in , thereby implementing all or part of the steps of the method in the above embodiment, so that the coprocessor 1006 performs calculations. In other words, the memory 1008 stores programs / instructions for executing all or part of the steps in the method in the above embodiment.
[0144] The communication interface 1010 uses a transceiver module such as, but not limited to, a network interface card or a transceiver to implement communication between the computing device 1000 or a cluster of multiple computing devices 1000 and other devices or communication networks.
[0145] The embodiment of the present application provides a computing device, including: a memory, a main processor and a coprocessor; the memory is coupled with the main processor and the coprocessor; the memory is used to store programs; the main processor is used to execute the programs stored in the memory, and when the programs stored in the memory are executed, the main processor is used to execute the method in the above embodiment to enable the coprocessor to perform scheduling. In the embodiment of the present application, the computing device can be a server or a computer.
[0146] Based on the method in the above embodiment, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. When the computer program runs on a processor, the processor executes the method in the above embodiment.
[0147] Based on the method in the above embodiment, an embodiment of the present application provides a computer program product. When the computer program product runs on a processor, the processor executes the method in the above embodiment.
[0148] The method steps in the embodiments of the present application can be implemented by hardware, or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPRCM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, mobile hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor so that the processor can read information from the storage medium and can write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC.
[0149] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted by a computer-readable storage medium. The computer instructions can be transmitted from a website site, a computer, a server or a data center to another website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid state drive (SSD)), etc.
[0150] It should be understood that the various numerical numbers involved in the embodiments of the present application are only used for the convenience of description and are not used to limit the scope of the embodiments of the present application.
Claims
1. A data scheduling method, characterized in that: The method is applied to a main processing unit, the main processing unit is communicatively connected with a co-processing unit, the co-processing unit includes a plurality of processing cores, and the method includes: Aligning the target data of the target data volume according to the preset alignment boundary; the target data is any input data for executing the target binocular operator calculation; the target data volume is the number of the target data; Determining a target level according to the aligned target data volume; Determine the data segmentation parameters of the target data according to the target data volume and the target level; the data segmentation parameters include the target number of processing cores to be used, the number of times each of the target number of processing cores is processed, and the single data volume processed each time; The data segmentation parameters are sent to the co-processing unit, so that the co-processing unit schedules the processing core to perform calculations according to the data segmentation parameters.
2. The method according to claim 1, characterized in that Each of the processing cores includes a memory space of the same size; The target levels include a first level; The lower boundary parameter of the first level is 1, and the upper boundary parameter of the first level is the product value of the total number of multiple processing cores and the first preset number of the target data processed by a single processing core each time.
3. The method according to claim 2, characterized in that The target level also includes a second level; The lower boundary parameter of the second level is greater than the upper boundary parameter of the first level, and the upper boundary parameter of the second level is the product of the total number of multiple processing cores and the second preset number of the target data processed by a single processing core each time.
4. The method according to claim 3, characterized in that If the target binocular operator supports in-situ calculation, The second preset number is the memory space size of a single processing core, divided by the used memory size; the used memory size is the memory size used by a single processing core to perform the target binocular operator calculation once using an in-situ calculation method.
5. The method according to claim 4, characterized in that If the co-processing unit also supports the intra-core pipeline parallel function, The second preset number is the memory space size of a single processing core, and is the quotient of the product of the used memory size and the maximum parallel amount of the pipeline parallel function within the core.
6. The method according to any one of claims 3 to 5, characterized in that: The target level also includes a third level; The lower boundary parameter of the third level is greater than the upper boundary parameter of the second level.
7. The method according to claim 2, characterized in that For the target data corresponding to the target data volume of the first level, the target number is a value obtained by dividing the target data volume by the first preset number and rounding up; The processing times of each of the target number of processing cores is 1; The amount of single data processed each time by each processing core that is one less than the target number is the first preset number, and The single data volume processed each time by the remaining processing core among the target number is the difference between the target data volume and the sum of the single data volume processed each time by the processing cores less than the target number by one.
8. The method according to claim 3, characterized in that For the target data corresponding to the target data amount of the second level, the target number is the total number of the plurality of processing cores; The processing times of each of the target number of processing cores is 1; The single data volume processed each time by each processing core that is one less than the target number is the quotient of the target data volume divided by the target number, and The single data volume processed each time by the remaining processing core among the target number is the difference between the target data volume and the sum of the single data volume processed each time by the processing cores less than the target number by one.
9. The method according to claim 6, characterized in that For the target data corresponding to the target data volume of the third level, the target number is the total number of the plurality of processing cores; the total amount of data processed by each of the processing cores that is one less than the target number, which is the quotient of the target amount of data divided by the target number, and The total amount of data processed by the remaining processing core of the target number is the difference between the target amount of data and the sum of the total amounts of data processed by the processing cores that are one less than the target number.
10. The method according to claim 9, characterized in that For each processing core in the target number of processing cores, the number of times the processing core processes is a value obtained by dividing the corresponding total data volume by the second preset number and rounding up; Wherein, for non-last processing, the single data volume processed by the processing core each time is the second preset number, and For the last processing, the single data volume processed by the processing core each time is the difference between the corresponding total data volume and the sum of the single data volumes processed in non-last processing.
11. A computing device, characterized in that: include: Memory, main processor and coprocessor; The memory is coupled with the main processor and the coprocessor; Memory, used to store programs; The main processor is used to call a program to execute the method according to any one of claims 1 to 10, so that the coprocessor performs scheduling.
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