Semiconductor structure and method of forming the same

Abstract

The present disclosure provides a semiconductor structure and a forming method thereof, and relates to the technical field of semiconductors. The forming method comprises: forming a stack structure on a substrate, the stack structure comprising a first material layer and a second material layer; etching the stack structure by using a first etching gas to form a first opening penetrating through the second material layer, the first etching gas comprising fluorine ions; simultaneously introducing a first protective gas and a first auxiliary gas into the first opening and reacting to form a protective layer on the sidewall of the first opening, the first protective gas comprising silicon ions, and the first auxiliary gas comprising oxygen ions; continuing to etch the stack structure by using the first etching gas to form a second opening penetrating through the first material layer; and simultaneously introducing the first protective gas and the first auxiliary gas into the second opening and reacting to form a protective layer on the sidewall of the second opening. The forming method can improve the collimation and integrity of the sidewall of the opening by forming a protective layer on the sidewall of the opening.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor technology, and in particular, to a semiconductor structure and a forming method thereof. BACKGROUND

[0002] With the evolution of process technology, the integration level of semiconductor devices is also improved, and the feature size of the devices is continuously reduced, and the arrangement density is also increasing. Due to the size limitation, the element arrangement density in the planar semiconductor device has reached the limit, and therefore, in order to improve the density of the device, the semiconductor device can adopt a structure including a plurality of components vertically stacked, so as to obtain a larger device arrangement density.

[0003] At present, due to the multilayer component stack structure, the process technology needs to be performed in the film layer stacking direction, especially when a deep hole penetrating the stack structure needs to be formed, which will cause defects in the deep hole etching profile, such as misalignment of the etching profile, which limits the improvement of the structure layout and performance of the semiconductor device in the stacking direction.

[0004] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0005] Therefore, a semiconductor structure and a forming method thereof are provided, and the semiconductor structure formed by the method can avoid damage to the sidewall of the opening, improve the alignment of the sidewall of the opening, and further improve the performance of the device.

[0006] Other characteristics and advantages of the present disclosure will become apparent from the following detailed description, or will be learned by practice of the present disclosure.

[0007] According to one aspect of the present disclosure, a forming method of a semiconductor structure is provided, which comprises:

[0008] forming a stack structure on a substrate, the stack structure comprising at least one first material layer and at least one second material layer stacked in a direction perpendicular to the substrate, the materials of the first material layer and the second material layer being different;

[0009] etching the stack structure by using a first etching gas to form a first opening penetrating the second material layer, wherein the first etching gas comprises fluorine ions;

[0010] simultaneously introducing a first protective gas and a first auxiliary gas into the first opening and reacting to form a protective layer on the sidewall of the first opening, wherein the first protective gas comprises silicon ions, and the first auxiliary gas comprises oxygen ions;

[0011] continuing etching the stack structure with the first etching gas to form a second opening penetrating the first material layer, the second opening at least partially coinciding with the first opening in the orthographic projection on the substrate;

[0012] simultaneously introducing the first protective gas and the first auxiliary gas into the second opening and reacting to form the protective layer on the sidewall of the second opening.

[0013] In an example embodiment of the present disclosure, the stack structure further comprises a third material layer located at least between a pair of the first material layer and the second material layer, the first material layer, the second material layer and the third material layer being different in material, and the method further comprises:

[0014] etching the third material layer with a second etching gas to form a third opening penetrating the third material layer, the first opening, the second opening and the third opening at least partially coinciding in the orthographic projection on the substrate, wherein the second etching gas comprises chloride ions;

[0015] simultaneously introducing the first auxiliary gas and the first protective gas into the third opening and reacting to form the protective layer on the sidewall of the third opening.

[0016] In an example embodiment of the present disclosure, the method comprises:

[0017] after forming the first opening, simultaneously introducing the first protective gas and the first auxiliary gas into the first opening;

[0018] or during the formation of the first opening, continuously simultaneously introducing the first protective gas and the first auxiliary gas into the first opening formed.

[0019] In an example embodiment of the present disclosure, the method comprises:

[0020] after forming the second opening, simultaneously introducing the first protective gas and the first auxiliary gas into the second opening;

[0021] or during the formation of the second opening, continuously simultaneously introducing the first protective gas and the first auxiliary gas into the second opening formed.

[0022] In an example embodiment of the present disclosure, the method comprises:

[0023] after forming the third opening, simultaneously introducing the first protective gas and the first auxiliary gas into the third opening;

[0024] or in the process of forming the third opening, the first protective gas and the first auxiliary gas are continuously introduced into the third opening which has been formed.

[0025] In an exemplary embodiment of the present disclosure, the method further comprises:

[0026] removing the protective layer to form an opening in the stack structure which is collimated by the sidewall and extends through the stack structure to form a target semiconductor structure.

[0027] In an exemplary embodiment of the present disclosure, after forming the stack structure on the substrate, the method further comprises:

[0028] forming a mask structure on a side of the stack structure away from the substrate, the mask structure comprising a first mask layer and a second mask layer, the first mask layer and the second mask layer being made of different materials;

[0029] etching the stack structure using the mask structure and the first etching gas and the second etching gas.

[0030] In an exemplary embodiment of the present disclosure, the method comprises:

[0031] forming a photoresist layer on a side of the second mask layer away from the substrate;

[0032] patterning the photoresist layer;

[0033] etching the second mask layer using the patterned photoresist layer to form a patterned second mask layer.

[0034] In an exemplary embodiment of the present disclosure, before forming the stack structure, the method further comprises:

[0035] forming an etching stop layer on the substrate, the stack structure being formed on a side of the etching stop layer away from the substrate;

[0036] after forming the opening extending through the stack structure, the opening extends into the etching stop layer or the opening extends through the etching stop layer.

[0037] In an exemplary embodiment of the present disclosure, the first protective gas has a gas flow rate of 10sccm-100sccm and the first auxiliary gas has a gas flow rate of 100sccm-500sccm.

[0038] In an exemplary embodiment of the present disclosure, the method comprises:

[0039] The first auxiliary gas reacts with the first protective gas under a pressure of 5mT-30mT.

[0040] In an example embodiment of the present disclosure, the method comprises:

[0041] The first auxiliary gas reacts with the first protective gas under a bias voltage of 1000W-1500W.

[0042] In an example embodiment of the present disclosure, the first protective gas comprises at least one of silicon tetrachloride, monosilane, disilane, ethylene silane or silicate.

[0043] In an example embodiment of the present disclosure, the first auxiliary gas comprises at least one of oxygen, methanol or ethanol.

[0044] In an example embodiment of the present disclosure, the first etching gas comprises C X F Y , S X F Y , N X F Y , wherein X is a positive integer greater than or equal to 1, and Y is a positive integer greater than or equal to 1.

[0045] In an example embodiment of the present disclosure, the second etching gas comprises chlorine.

[0046] The method for forming a semiconductor structure provided by the present disclosure can form a protective layer on the sidewall of the opening in the stacked structure by introducing the first protective gas and the first auxiliary gas while etching the opening, so as to protect the structure of the etched opening from being damaged by the etching gas in the subsequent etching, thereby aligning the sidewall of the opening in the stacked structure with the substrate, breaking the limitation of the number of stacked layers of the film in the stacked structure, increasing the density of the device, and further optimizing the structure layout of the device and improving the performance of the device.

[0047] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0048] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0049] Figure 1 A flowchart of a method of forming a semiconductor structure in an example embodiment of the present disclosure.

[0050] Figure 2 A structure diagram of an existing semiconductor structure in an example embodiment of the present disclosure.

[0051] Figure 3 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0052] Figure 4 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0053] Figure 5 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0054] Figure 6 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0055] Figure 7 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0056] Figure 8 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0057] Figure 9 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0058] Figure 10 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0059] Figure 11 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0060] Figure 12 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0061] Figure 13 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0062] Figure 14 A structure diagram of a semiconductor structure in an example embodiment of the present disclosure.

[0063] Figure 15 Structure diagram of a semiconductor structure for forming a first opening in another exemplary embodiment of the present disclosure.

[0064] Figure 16 Structure diagram of a semiconductor structure for forming a first opening with a protection layer in another exemplary embodiment of the present disclosure.

[0065] Figure 17 Structure diagram of a semiconductor structure for forming a second opening with a protection layer in another exemplary embodiment of the present disclosure.

[0066] Figure 18 Structure diagram of a semiconductor structure for forming a third opening with a protection layer in another exemplary embodiment of the present disclosure.

[0067] Figure 19 Structure diagram of a semiconductor structure for forming an opening with a protection layer in another exemplary embodiment of the present disclosure.

[0068] Figure 20 Structure diagram of a target semiconductor structure in another exemplary embodiment of the present disclosure.

[0069] Figure 21 Final structure diagram of a semiconductor structure in another exemplary embodiment of the present disclosure.

[0070] In the drawings, the same reference numerals refer to the same or similar components throughout the several views.

[0071] 100, substrate; 200, stacked structure; 201, first material layer; 202, second material layer; 203, third material layer; 210, first opening; 220, second opening; 230, third opening; 300, mask structure; 301, first mask layer; 302, second mask layer; 303, photoresist layer; 400, protection layer; 500, etching stop layer; 600, dielectric layer; 700, conductive material layer; 1000, notch; 2000, opening. DETAILED DESCRIPTION

[0072] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings. Example embodiments, may, however, be implemented in many different forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided as non-limiting examples so that this disclosure will fully convey the scope thereof to those skilled in the art. Like reference numerals refer to like elements throughout the several views of the drawings and like reference numerals, reference characters, and characters over different figures identify the same or similar components, features, and structures unless otherwise indicated. Additionally, the drawings are not necessarily drawn to scale.

[0073] Although relative terms are used in this description, such as "upper," "lower," to describe one component's relationship to another component of the icon, these terms are used only for convenience, e.g., based on the example orientation of the figures. It is to be understood that if the icon's device were turned over, so that the "upper" component became the "lower" component, then the described orientation would be reversed. When a structure is "on" another structure, it can mean that the structure is formed integrally with the other structure or that the structure is "directly" on the other structure or that the structure is "indirectly" on the other structure with intervening structures therebetween.

[0074] The terms "one," "a," "an," "the," and "at least one" are used to mean that "one or more" of something is present; the terms "includes," "including," and "has" are used to mean "comprising," meaning "including one or more steps and / or components." The term "or" is used to mean, and is used in the alternative (e.g., either / or) unless explicitly indicated otherwise (e.g., "or else" or "or in the alternative").

[0075] In the related art, in order to improve the storage density and performance of the memory to obtain smaller size, the design of the memory can utilize vertically stacked storage units to increase the effective storage capacity of the memory, thereby providing more storage space in the same physical space, providing new possibilities for the high performance, high density and low power consumption of electronic devices.

[0076] And as an indispensable device in the memory, the capacitor can also be designed by stacking to meet the requirements of higher capacitance density, better performance and smaller size. The design of the capacitor can utilize the spatial distribution of the electrode and the dielectric layer to increase the effective surface area of the capacitor, thereby providing a higher capacitance value in the same physical space. For example, a stacked capacitor is achieved by stacking multiple electrodes and dielectric layers in the vertical direction, thereby increasing its capacitance value.

[0077] However, as the number of stacked layers increases, defects are often formed when forming deep hole etching, such as when etching different material film layers, as shown in FIG. 1, due to the difference in etching characteristics, there will be a gap 1000 in the sidewall of the deep hole after etching, which will affect the overall performance of the subsequent device and the structural layout of the device. Figure 2 As shown in FIG. 1, due to the difference in etching characteristics, there will be a gap 1000 in the sidewall of the deep hole after etching, which will affect the overall performance of the subsequent device and the structural layout of the device.

[0078] Based on this, the disclosure embodiment provides a forming method of a semiconductor structure, as shown in FIG. 2, in combination with FIG. 1, Figure 1 As shown in FIG. 2, in combination with FIG. 1, Figures 3 to 21 The forming method comprises steps S10-S50.

[0079] The step S10 is to form a stack structure 200 on the substrate 100, the stack structure 200 comprising at least one first material layer 201 and at least one second material layer 202 stacked along a direction perpendicular to the substrate 100, the first material layer 201 and the second material layer 202 being different in material.

[0080] The step S20 is to etch the stack structure 200 by using a first etching gas to form a first opening 210 penetrating the second material layer 202, wherein the first etching gas comprises fluorine ions.

[0081] The step S30 is to simultaneously introduce a first protective gas and a first auxiliary gas into the first opening 210 and react to form a protective layer 400 on a sidewall of the first opening 210, wherein the first protective gas comprises silicon ions, and the first auxiliary gas comprises oxygen ions.

[0082] The step S40 is to continue etching the stack structure 200 by using the first etching gas to form a second opening 220 penetrating the first material layer 201, the second opening 220 at least partially overlapping a normal projection of the first opening 210 on the substrate 100.

[0083] The step S50 is to simultaneously introduce the first protective gas and the first auxiliary gas into the second opening 220 and react to form the protective layer 400 on a sidewall of the second opening 220.

[0084] The method for forming a semiconductor structure provided by the present disclosure introduces the first protective gas and the first auxiliary gas into the stack structure 200 while etching the opening 2000, so that the first protective gas and the first auxiliary gas can form the protective layer 400 on the sidewall of the opening 2000 to protect the structure of the etched part of the opening 2000 from being damaged by the etching gas in subsequent etching, thereby making the sidewall of the opening 2000 formed in the stack structure 200 collimate to the substrate 100, breaking the limitation of the number of stacked layers of the film in the stack structure 200, increasing the density of the device, and further optimizing the structure layout of the device and improving the performance of the device.

[0085] The steps of the method for forming a semiconductor structure provided by the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings:

[0086] In the embodiments provided by the present disclosure, in the step S10, as shown in FIG. 1, the stack structure 200 is formed on the substrate 100, the stack structure 200 comprising at least one first material layer 201 and at least one second material layer 202 stacked along a direction perpendicular to the substrate 100, the first material layer 201 and the second material layer 202 being different in material. Figure 3

[0087] ​The substrate 100 can be a semiconductor substrate, for example, a silicon (Si) substrate, a germanium (Ge) substrate, a silicon germanium (GeSi) substrate, an SOI (Silicon On Insulator) or a GOI (Germanium On Insulator). In some embodiments, the semiconductor substrate can also be a substrate including other elemental semiconductors or compound semiconductors, for example, silicon carbide (SiC), indium phosphide (InP) or gallium arsenide (GaAs), etc. The embodiments provided in the present disclosure take the substrate 100 as an example of a substrate including silicon (Si) ions, and of course, for other types of substrates, corresponding modifications or improvements can be made to the embodiments of the present disclosure, which are all within the protection scope of the present disclosure.

[0088] The stack structure 200 is formed on the substrate 100, and the stack structure 200 includes at least one first material layer 201 and at least one second material layer 202. The number of the first material layer 201 and the second material layer 202 in the stack structure 200 can be selected according to the actual design requirements of the device structure, for example, the number of the first material layer 201 and the second material layer 202 can be one, two, four, six, eight or even more. The more the number of material layers in the stack structure 200, the greater the arrangement density of the formed device structure. The materials of the first material layer 201 and the second material layer 202 are different.

[0089] In the present disclosure, the first material layer 201 can be a conductive layer, a dielectric layer 600 or a semiconductor layer, and the material thereof can be a metal such as tungsten (W), copper (Cu), etc.; or a semiconductor layer such as polysilicon (poly), etc.; or a dielectric layer 600 such as silicon nitride (SiN x ), etc. The second material layer 202 can be an isolation layer or an insulating layer such as silicon oxide (SiO x ), etc. In the following embodiments, the first material layer 201 is taken as tungsten and the second material layer 202 is taken as silicon oxide as an example, and for other materials of the first material layer 201 and the second material layer 202, adaptive modifications can be made to the following embodiments, which are all within the protection scope of the present disclosure.

[0090] The first material layer 201 can be formed using chemical vapor deposition (CVD), such as atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), atomic layer deposition (ALD); or physical vapor deposition (PVD), such as sputtering, electron beam evaporation; or atomic layer epitaxy (ALE); or chemical vapor infiltration (CVI), etc. The second material layer 202 can be formed using one or more of the above methods, which will not be elaborated here.

[0091] In the embodiments provided in this disclosure, such as Figure 3 As shown, prior to step S10, the formation method further includes: forming an etch stop layer 500 on the substrate 100, with the stacked structure 200 formed on the side of the etch stop layer 500 away from the substrate 100. The etch stop layer 500 covers the surface of the substrate 100. When etching the stacked structure 200, because the etch stop layer 500 has a smaller etch selectivity relative to the substrate 100 and the film layers within the stacked structure 200, the etch stop layer 500 can protect the underlying film layers from damage, ensuring structural integrity and process precision.

[0092] Alumina (AlO) can be used as the etch stop layer 500. x It is made of materials such as titanium nitride (TiN), and its thickness can be from 20nm to 100nm, such as 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, etc. Its thickness can be adaptively selected according to the thickness of the film layer on it and the etching method to ensure the protective effect of the etch stop layer 500 on the film layer below it.

[0093] In order to ensure the vertical dimension of the opening 2000 after the opening 2000 is formed through the stacked structure 200, the opening 2000 may extend into the interior of the etch stop layer 500 or penetrate through the etch stop layer 500. Of course, the bottom of the opening 2000 may also be flush with the surface of the etch stop layer 500, and the opening 2000 only needs to expose the surface of the etch stop layer 500.

[0094] The substrate 100 below the etching stop layer 500 can further include a circuit layer (not shown in the figure), which can include a driving circuit or a wire routing structure. The opening 2000 can penetrate the etching stop layer 500 to communicate with the circuit layer, and the device on the etching stop layer 500 can form an electrical connection with the circuit layer through the opening 2000. Of course, other structures can be formed on the semiconductor structure to form an electrical connection with the circuit layer, such as a conductive lead, and the opening 2000 does not need to penetrate the etching stop layer 500, which is not specifically described here.

[0095] In the embodiments provided in the present disclosure, after step S10, the forming method further includes: Figure 4 As shown in the figure, a mask structure 300 is formed on the side of the stack structure 200 away from the substrate 100, and the mask structure 300 includes a first mask layer 301 and a second mask layer 302, and the materials of the first mask layer 301 and the second mask layer 302 are different.

[0096] The first mask layer 301 is formed on the side of the stack structure 200 away from the substrate 100, and the first mask layer 301 can be a bottom anti-reflective coating (BARC), an anti-reflective coating for photoresist (APF), a top anti-reflective coating (TARC), an organic anti-reflective coating (OARC), an inorganic anti-reflective coating (IARC), or a self-anti-reflective photoresist, etc., which is used to reduce or eliminate the reflection problem in the lithography process, thereby improving the accuracy and resolution of pattern transfer. The first mask layer 301 can be positive or negative, and can be selected according to the type of subsequent photoresist and the requirements of the lithography process.

[0097] The second mask layer 302 can be made of materials such as aluminum oxide (AlOx) or titanium nitride (TiN). After forming the second mask layer 302, as shown in the figure, Figure 5As shown, the formation method further includes: forming a photoresist layer 303 on the side of the second mask layer 302 away from the substrate 100; patterning the photoresist layer 303; and etching the second mask layer 302 using the patterned photoresist layer 303 to form a patterned second mask layer 302. The patterned second mask layer 302 can be patterned using an etchant selected based on its material. In some embodiments, when the second mask layer 302 is aluminum oxide, dry etching can be used, and the etchant can be chlorine gas and boron trichloride. In some embodiments, the second mask layer 302 can also be patterned using wet etching.

[0098] In this disclosure, after the mask structure 300 is formed, when etching the stacked structure 200 in the subsequent process, the patterned mask structure 300 can be used as a mask to make the etching proceed in a preset direction within the stacked structure 200.

[0099] In the embodiments provided in this disclosure, such as Figure 6 As shown, in step S20, the stacked structure 200 is etched using a first etching gas to form a first opening 210 penetrating the second material layer 202, wherein the first etching gas includes fluoride ions.

[0100] The first etching gas can be C X F Y S X F Y N X F Y Where X is a positive integer greater than or equal to 1, and Y is a positive integer greater than or equal to 1. Specifically, the first etching gas can be one or more etching gases containing fluoride ions, such as CF4, C4F6, C4F8, SF6, or NF3.

[0101] The first etching gas is C X F Y For example, a patterned mask structure 300 and a first etching gas are used to etch the second material layer 202 on top of the stacked structure 200. The first etching gas is decomposed into carbon ions and fluorine ions in a reaction chamber. The fluorine ions bombard the second material layer 202 to etch it. (SiO2 + F) - →SiF4↑+O2↑, SiF4 and O2 can be extracted in gaseous form, thereby etching the silicon dioxide film to form a first opening 210 in the second material layer 202. In some embodiments, the oxygen in the mixture of SiF4 and O2 can be purified and reused, forming a resource recycling system that is beneficial to environmental protection.

[0102] In the embodiments provided in this disclosure, such as Figure 7As shown in step S30, the first opening 210 is simultaneously supplied with the first protective gas and the first auxiliary gas and reacts to form the protective layer 400 on the sidewall of the first opening 210, wherein the first protective gas comprises silicon ions and the first auxiliary gas comprises oxygen ions.

[0103] The first protective gas can be at least one of silicon tetrachloride (SiCl4), monosilane (SiH4), disilane (SiH2), ethylene (Si2H6), or silicate, which is a salt containing silicon ions and the composition thereof can be determined according to actual use requirements. The first auxiliary gas can be at least one of oxygen (O2), methanol (CH3OH), or ethanol (C2H5OH).

[0104] Taking the first protective gas as silicon tetrachloride (SiCl4) and the first auxiliary gas as oxygen (O2) as an example, the first protective gas and the first auxiliary gas react to form the protective layer 400, which is attached to the sidewall of the first opening 210, wherein the reaction process is SiCl4+O2→SiO2+Cl2↑, wherein the silicon dioxide forms the protective layer 400 and the chlorine gas is removed. In the subsequent etching process, the protective layer 400 can ensure that the shape of the sidewall of the first opening 210 is not damaged, thereby ensuring the integrity of the first opening 210. Of course, the chlorine gas can also be separated and recycled.

[0105] Similarly, if the first protective gas and the first auxiliary gas are other gases, the reaction process thereof all includes the chemical reaction of Si + +O - →SiO2, and the byproduct generated can be removed or vaporized, so that the silicon dioxide is deposited on the sidewall of the first opening 210 to form the protective layer 400.

[0106] It should be noted that when the protective layer 400 is formed on the sidewall of the first opening 210, due to process limitations, the protective layer 400 is also formed on the bottom of the first opening 210 (the surface of the first material layer 201) at the same time, as shown in Figures 7 to 9 and Figures 16 to 19 However, the protective layer 400 on the bottom of the first opening 210 is removed at the same time when the first material layer 201 is etched subsequently. In addition, the protective layer 400 will also be formed on the sidewall and top surface of the mask structure 300 (not shown in the figure), but it does not affect the protective effect of the protective layer 400 on the sidewall of the first opening 210. In the subsequent process step of removing the protective layer 400, the protective layer 400 formed on the surface and sidewall of the mask structure 300 can also be removed at the same time.

[0107] In some embodiments, the introduction of the first auxiliary gas and the first protective gas into the first opening 210 can be introduced in two ways. In the first way, after the first opening 210 is formed, a mixture of the two gases is introduced into the first opening 210 to react to form a protective layer 400 to cover the sidewall of the first opening 210, which can simplify the process. In the second way, during the etching of the second material layer 202, the mixture of the two gases is introduced into the partially formed first opening 210 to form the protective layer 400 during the etching process, which can improve the collimation of the opening sidewall. Of course, for different second material layers 202, the same introduction node can be used, or different introduction nodes can be used, which can be selected as needed according to the actual process.

[0108] In the embodiments provided in the present disclosure, the reaction conditions of the first auxiliary gas and the first protective gas are as follows:

[0109] The gas flow of the first protective gas is 10sccm (standard cubic centimeter per minute flow rate) to 100sccm, for example, it can be 10sccm, 20sccm, 30sccm, 40sccm, 50sccm, 60sccm, 70sccm, 80sccm, 90sccm, 100sccm, etc. The gas flow of the first auxiliary gas is 100sccm to 500sccm, for example, it can be 100sccm, 200sccm, 300sccm, 400sccm, 500sccm, etc. The flow rates of the first protective gas and the first auxiliary gas can be adaptively adjusted within the above ranges according to actual process needs.

[0110] The reaction pressure is 5mT (milli-ton per square meter) to 30mT, for example, it can be 5mT, 10mT, 15mT, 20mT, 25mT, 30mT, etc. The reaction pressure can be selected and adjusted according to actual process needs.

[0111] The reaction bias voltage is 1000W (watt) to 1500W, for example, it can be 1000W, 1100W, 1200W, 1300W, 1400W, 1500W, etc. The reaction bias voltage can be adaptively selected and adjusted according to actual process needs.

[0112] In the embodiments provided in the present disclosure, as shown in Figure 8 In step S40, the first etching gas is used to continue etching the stack structure 200 to form a second opening 220 that penetrates the first material layer 201, and the orthographic projection of the second opening 220 on the substrate 100 at least partially overlaps the first opening 210.

[0113] The first material layer 201 is continuously etched by the first etching gas, wherein the first etching gas is decomposed into carbon ions and fluorine ions by the reaction chamber, and the first material layer 201 is bombarded by the fluorine ions to etch the first material layer 201, wherein W + F - → WF6↑, and the WF6 is extracted in the form of gas to realize etching of tungsten, so as to form the second opening 220 in the first material layer 201.

[0114] Since the materials of the first material layer 201 and the second material layer 202 are different, the etching selectivity ratios of the two materials are different under the same etching gas and etching conditions, so that the formation of the first opening 210 and the second opening 220 is not completely consistent or similar, especially the second material layer 202 is inclined to anisotropic etching in the etching characteristics, and the side wall of the first opening 210 is relatively collimated, while the first material layer 201 is inclined to isotropic etching in the etching characteristics, and the side wall profile of the second opening 220 is curved, that is, the orthographic projection of the first opening 210 and the second opening 220 on the substrate 100 has an overlapping part.

[0115] In order to improve the overall structure and shape of the opening 2000, a protection layer 400 can be formed on the side wall of the second opening 220 when the first material layer 201 is etched, so as to avoid that the first etching gas continues to etch the side wall of the second opening 220 when the first material layer 201 is etched, and the curved phenomenon of the side wall of the second opening 220 occurs.

[0116] In the embodiments provided in the present disclosure, as shown in Figure 8 The first protection gas and the first auxiliary gas are introduced into the second opening 220 and reacted to form the protection layer 400 on the side wall of the second opening 220 in step S50.

[0117] After the second opening 220 is formed in the first material layer 201, the first protection gas and the first auxiliary gas are introduced into the second opening 220 and reacted, wherein the reaction process is SiCl4+O2→SiO2+Cl2↑, wherein the silicon dioxide forms the protection layer 400, and the chlorine gas is extracted. In the subsequent etching process, the protection layer 400 can ensure that the shape of the side wall of the second opening 220 is not damaged, and the integrity of the second opening 220 is ensured.

[0118] In addition, the first protection gas and the first auxiliary gas used here are the same as or similar to the first protection gas and the first auxiliary gas introduced into the first opening 210, and the specific types and reaction conditions are not described again.

[0119] In some embodiments, the introduction of the first auxiliary gas and the first protective gas into the second opening 220 can be two nodes, wherein the first node can be that after the formation of the second opening 220, the mixed gas of the two gases is introduced into the second opening 220 to react to form the protective layer 400 to cover the sidewall of the second opening 220, which can simplify the process; the second node can be that during the formation of the second opening 220, the mixed gas of the two gases is introduced into the formed part of the second opening 220, that is, the first auxiliary gas and the first mixed gas are introduced during the etching of the first material layer 201 to form the protective layer 400 during etching, which can ensure that the alignment of the formed opening sidewall is higher. Of course, for different first material layers 201, the same introduction node can be used, or different introduction nodes can be used, which can be selected as needed according to the actual process.

[0120] By analogy, as shown in Figure 9 , in a plurality of film layer pairs, the protective layer 400 formation process provided in the above embodiments can be alternately realized, and each time a film layer is etched, the protective layer 400 is formed in the film layer in which the opening 2000 has been formed to protect the sidewall shape of the opening 2000 from being damaged by subsequent etching processes, thereby ensuring the integrity of the opening 2000. Especially when a semiconductor structure forms a high-aspect ratio contact (HARC), the formation method provided by the present disclosure can ensure the structural integrity and alignment of the HARC, thereby providing a good structural basis for the formation of subsequent devices.

[0121] The aspect ratio of the HARC structure described above can be understood as being greater than or equal to 5:1, which can meet the aspect ratio requirement of the HARC structure. Of course, different aspect ratios can also be selected according to the actual design requirements of the device.

[0122] Further, as shown in Figures 12 to 21 , in order to increase the adhesion between the first material layer 201 and the second material layer 202, a third material layer 203 can be formed between the first material layer 201 and the second material layer 202, wherein the materials of the first material layer 201, the second material layer 202 and the third material layer 203 are different.

[0123] The third material layer 203 can be made of titanium nitride (TiN) or the like, and can be formed by chemical vapor deposition (CVD), such as plasma-enhanced chemical vapor deposition (PECVD); or physical vapor deposition (PVD), such as sputtering, e-beam evaporation, ion plating; or atomic layer deposition (ALD); or electrochemical deposition; or laser cladding, etc.

[0124] It should be noted that the third material layer 203 is formed between at least one pair of first material layer 201 and second material layer 202, for example, the third material layer can be formed between each pair of adjacent film layers in the stack structure 200, or can be located between part of the adjacent film layers, and the formation position of the third material layer 203 can be adaptively arranged according to the actual structure.

[0125] As shown in FIG. 1, when the stack structure 200 includes the third material layer 203, the method further includes: Figures 15 to 18

[0126] The third material layer 203 is etched by using a second etching gas to form a third opening 230 penetrating through the third material layer 203, and the first opening 210, the second opening 220 and the third opening 230 have at least partial overlap in orthographic projection on the substrate 100, wherein the second etching gas includes chlorine ions; the first auxiliary gas and the first protective gas are introduced into the third opening 230 and reacted to form a protective layer 400 on the sidewall of the third opening 230.

[0127] The second etching gas can be chlorine, and the third material layer 203 can be etched by chlorine when forming the third opening 230, and the reaction process can include W+Cl － →WCl4↑, and the tungsten tetrachloride is removed to form the third opening 230 penetrating through the third material layer 203.

[0128] After forming the third opening 230, the first protective gas and the first auxiliary gas are introduced into the third opening 230, and the first protective gas and the first auxiliary gas are reacted, wherein the reaction process is SiCl4+O2→SiO2+Cl2↑, wherein the silicon dioxide forms the protective layer 400, and the chlorine gas can be reused, and in the subsequent etching process, the protective layer 400 can ensure that the shape of the sidewall of the third opening 230 is not damaged, thereby ensuring the integrity of the third opening 230.​

[0129] In some embodiments, the introduction node of the first auxiliary gas and the first protective gas into the third opening 230 can be two, wherein the first one can be that after the formation of the third opening 230, the mixed gas of the above two gases is introduced into the third opening 230 to react to form the protective layer 400 to cover the sidewall of the third opening 230, which can simplify the process engineering; the second one can be that in the process of forming the third opening 230, the mixed gas of the two is introduced into the formed part of the third opening 230, that is, the first auxiliary gas and the first mixed gas are introduced in the process of etching the third material layer 203, so as to form the protective layer 400 in the etching process, which can ensure that the collimation degree of the formed opening sidewall is higher. Of course, for different third material layers 203, the same introduction node can be used, or different introduction nodes can be used, which can be selected as needed according to the actual process.

[0130] In the embodiments provided in the present disclosure, as shown in Figure 10 and Figure 20 After the opening 2000 penetrating the stack structure 200 is formed, the forming method further includes: removing the protective layer 400 to form the opening 2000 penetrating the stack structure 200 and having a collimated sidewall in the stack structure 200, so as to form the target semiconductor structure.

[0131] It should be noted that in the present disclosure, the collimation of the sidewall of the opening 2000 can mean that the sidewall of the opening 2000 is perpendicular to the surface of the substrate 100. Here, the perpendicular can mean the strict sense of perpendicular, that is, the sidewall of the opening 2000 is strictly 90 degrees with the substrate 100; or it can mean approximate perpendicular. Due to the limitation of the process, the sidewall of the opening 2000 can be approximately perpendicular to the substrate 100, for example, the included angle between them can be between 85 degrees and 105 degrees, and both can be considered as the collimation of the sidewall of the opening 2000.

[0132] The removal of the protective layer 400 can adopt wet chemical etching, dry chemical etching and the like. When wet chemical etching is adopted, hydrofluoric acid (HF) or its mixed solution (such as buffered hydrofluoric acid, BHF) can be used to etch silicon dioxide.

[0133] In the embodiments provided in the present disclosure, as shown in Figure 10 and Figure 20As shown, the forming method further includes: removing the mask structure 300 to expose the surface of the stack structure 200. Wherein, removing the mask structure 300 includes removing the first mask layer 301 and the second mask layer 302. For example, methods such as chemical mechanical polishing (CMP), wet chemical etching, dry chemical etching, etc. can be used, and the corresponding removal method can be used according to the specific selected material of the mask structure 300.

[0134] In the embodiments provided in the present disclosure, as shown in Figure 11 and Figure 21 As shown, the forming method can further include: conformally forming a dielectric layer 600 in the opening 2000 of the target semiconductor structure; and forming a conductive material layer 700 in the opening 2000, so that the surface of the conductive material layer 700 is flush with the surface of the stack structure 200.

[0135] Wherein, the dielectric layer 600 can be a high dielectric constant film layer such as hafnium oxide (HfO2), zirconium oxide (ZrO2), hafnium aluminate (HfAlO), zirconium hafnium oxide (ZrHfO), strontium titanate (SrTiO3), strontium niobate (SrNbO3), strontium tantalum oxide (SrTaO3), or barium strontium titanate (BaTiO3). The conductive material layer 700 can be aluminum (Al), copper (Cu), gold (Au), tungsten (W), or titanium (Ti), etc.

[0136] The forming method of the semiconductor structure provided in the present disclosure, by passing the first protective gas and the first auxiliary gas while etching the opening 2000 in the stack structure 200, the first protective gas and the first auxiliary gas can form a protective layer 400 on the sidewall of the opening 2000, to protect the structure of the etched part of the opening 2000 from being damaged by the etching gas in the subsequent etching, thereby making the sidewall of the opening 2000 formed in the stack structure 200 collimate to the substrate 100, breaking the limitation of the number of film layer stacks in the stack structure 200, increasing the density of the device, and further optimizing the structure layout of the device, and improving the performance of the device.

[0137] It should be noted that although the steps of the forming method of the semiconductor structure in the present disclosure are described in a specific order in the drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, certain steps can be omitted, multiple steps can be combined into one step, and / or one step can be divided into multiple steps, etc.

[0138] The embodiments of the present disclosure also provide a semiconductor structure, as shown in Figure 10 The semiconductor structure includes: a substrate 100, a stack structure 200, and an opening 2000.

[0139] The stack structure 200 is formed on the substrate 100, and the stack structure 200 includes at least one first material layer 201 and at least one second material layer 202 stacked in a direction perpendicular to the substrate 100, and the first material layer 201 and the second material layer 202 are different in material; the opening 2000 penetrates the stack structure 200, and the opening 2000 includes a first opening 210 and a second opening 220, the first opening 210 penetrates the second material layer 202, and the second opening 220 penetrates the first material layer 201; the first opening 210 coincides with the second opening 220 having the protective layer 400 in the orthogonal projection on the substrate 100, and the sidewall of the opening 2000 is collimated to the surface of the substrate 100.

[0140] The semiconductor structure provided by the present disclosure has the opening 2000 penetrating the stack structure 200 with collimated sidewall, good device structure integrity and good functionality.

[0141] In the embodiments provided by the present disclosure, as shown in Figure 21 The stack structure 200 further includes a third material layer 203 formed between the first material layer 201 and the second material layer 202, and the opening 2000 further includes a third opening 230 penetrating the third material layer 203, and the sidewall of the third opening 230 includes the protective layer 400, and the first opening 210 having the protective layer 400 coincides with the third opening 230 having the protective layer 400 in the orthogonal projection on the substrate 100, so as to ensure the integrity and collimation of the opening 2000 formed in the stack structure 200.

[0142] The semiconductor structure provided by the present disclosure can be formed by the forming method of the semiconductor structure, and the specific structure of the semiconductor structure can refer to the embodiments provided in the forming method.

[0143] The semiconductor structure provided by the present disclosure can be applied to a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash memory and other storage devices. Of course, it can also be applied to other unlisted storage devices, which will not be listed one by one here.

[0144] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the features disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A method of forming a semiconductor structure, comprising: The method comprises: forming a stack structure on a substrate, the stack structure comprising at least one first material layer and at least one second material layer stacked along a direction perpendicular to the substrate, the first material layer and the second material layer being different in material; etching the stack structure with a first etching gas to form a first opening penetrating through the second material layer, wherein the first etching gas comprises fluorine ions; simultaneously introducing a first protective gas and a first auxiliary gas into the first opening and reacting to form a protective layer on a sidewall of the first opening, wherein the first protective gas comprises silicon ions and the first auxiliary gas comprises oxygen ions; continuing to etch the stack structure with the first etching gas to form a second opening penetrating through the first material layer, the second opening at least partially coinciding with a projection of the first opening on the substrate; simultaneously introducing the first protective gas and the first auxiliary gas into the second opening and reacting to form the protective layer on a sidewall of the second opening.

2. The method of forming a semiconductor structure of claim 1, wherein, The stack structure further comprises a third material layer located between at least one pair of the first material layer and the second material layer, the first material layer, the second material layer and the third material layer being different in material, and the method further comprises: etching the third material layer with a second etching gas to form a third opening penetrating through the third material layer, the first opening, the second opening and the third opening at least partially coinciding with a projection on the substrate, wherein the second etching gas comprises chlorine ions; simultaneously introducing the first auxiliary gas and the first protective gas into the third opening and reacting to form the protective layer on a sidewall of the third opening.

3. The method of forming a semiconductor structure of claim 2, wherein, The method comprises: after forming the first opening, simultaneously introducing the first protective gas and the first auxiliary gas into the first opening; or during the formation of the first opening, continuously simultaneously introducing the first protective gas and the first auxiliary gas into the first opening.

4. The method of forming a semiconductor structure of claim 2, wherein, The method comprises: after forming the second opening, simultaneously introducing the first protective gas and the first auxiliary gas into the second opening; or during the formation of the second opening, continuously simultaneously introducing the first protective gas and the first auxiliary gas into the second opening.

5. The method of forming a semiconductor structure of claim 2, wherein, The method comprises: after forming the third opening, simultaneously introducing the first protective gas and the first auxiliary gas into the third opening; or during the formation of the third opening, continuously simultaneously introducing the first protective gas and the first auxiliary gas into the third opening.

6. The method of forming a semiconductor structure of claim 2, wherein, The method further comprises: removing the protective layer to form an opening collimated by a sidewall and penetrating through the stack structure, so as to form a target semiconductor structure.

7. The method of forming a semiconductor structure of claim 2, wherein, After the step of forming the stack structure on the substrate, the method further comprises: forming a mask structure on a side of the stack structure away from the substrate, the mask structure comprising a first mask layer and a second mask layer, the first mask layer and the second mask layer being different in material; The stack structure is etched by using the mask structure and the first etching gas and the second etching gas.

8. The method of forming a semiconductor structure of claim 7, wherein, The method comprises: forming a photoresist layer on a side of the second mask layer away from the substrate; patterning the photoresist layer; etching the second mask layer by using the patterned photoresist layer to form a patterned second mask layer.

9. The method of forming a semiconductor structure of claim 1, wherein, Before forming the stack structure, the method further comprises: forming an etching stop layer on the substrate, and the stack structure is formed on a side of the etching stop layer away from the substrate; after forming the opening through the stack structure, the opening extends into the etching stop layer or the opening penetrates through the etching stop layer.

10. The method of forming a semiconductor structure according to any one of claims 1-9, wherein, The gas flow of the first protective gas is 10sccm-100sccm, and the gas flow of the first auxiliary gas is 100sccm-500sccm.

11. The method of forming a semiconductor structure according to any one of claims 1-9, wherein, The method comprises: The first auxiliary gas reacts with the first protective gas under the condition that the pressure is 5mT-30mT.

12. The method of forming a semiconductor structure according to any one of claims 1-9, wherein, The method comprises: The first auxiliary gas reacts with the first protective gas under the condition that the bias voltage is 1000W-1500W.

13. The method of forming a semiconductor structure according to any one of claims 1-9, wherein The first protective gas comprises at least one of silicon tetrachloride, monosilane, disilane, ethylene silane or silicate.

14. The method of forming a semiconductor structure according to any one of claims 1-9, wherein, The first auxiliary gas comprises at least one of oxygen, methanol or ethanol.

15. The method of forming a semiconductor structure according to any one of claims 1-9, wherein, The first etching gas includes C X F Y , S X F Y , N X F Y , wherein X is a positive integer greater than or equal to 1, and Y is a positive integer greater than or equal to 1.

16. The method of forming a semiconductor structure according to any one of claims 2-8, wherein, The second etching gas comprises chlorine.

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