Battery switching circuit and energy storage system

Abstract

The embodiment of the invention provides a battery switching circuit and an energy storage system, and relates to the technical field of battery management. In the battery switching circuit, when the main loop switch driving circuit is switched on, the voltage of the output end of the main loop switch driving circuit enables the bypass switch driving circuit to be switched off; when the bypass switch driving circuit is conducted, the voltage of the output end of the bypass switch driving circuit enables the main loop switch driving circuit to be cut off, it can be ensured that the bypass switch driving circuit and the main loop switch driving circuit are not conducted at the same time, simultaneous conduction of the main loop and the bypass loop is prevented, and short circuit of the battery unit is avoided. When a faulty battery unit occurs, the bypass loop can be safely closed only after the main loop of the faulty battery unit is effectively disconnected.

Description

Technical Field

[0001] The present application relates to the field of battery management technology, and in particular to a battery switching circuit and an energy storage system. Background Art

[0002] In high-voltage cascade energy storage battery management systems, in order to reduce frequent system shutdowns caused by single energy storage battery unit failures, a main circuit and bypass circuit design is often used. When a storage battery unit failure is detected, the control unit will send a command to switch the failed unit to the bypass state. After the energy storage battery unit is restored, it will be connected to the main circuit.

[0003] However, in a system of main circuits and bypass circuits, if the bypass circuit is closed before the main circuit is effectively disconnected, a short circuit will occur, causing failures and losses. Summary of the invention

[0004] One or more embodiments of the present application provide a battery switching circuit and an energy storage system to effectively prevent the main circuit and the bypass circuit from being electrically conductive at the same time, thereby reducing the possibility of a short circuit in the battery cell.

[0005] One or more embodiments of the present application adopt the following technical solutions.

[0006] In a first aspect, an embodiment of the present application provides a battery switching circuit, comprising at least two first circuit units connected in series; Each first circuit unit includes a main loop unit and a bypass unit connected in parallel; Each of the main circuit units comprises a main circuit switch and a battery unit connected in series; Each of the bypass units includes a bypass switch; The battery switching circuit also includes a controller and a control circuit; The control circuit includes a main circuit switch driving circuit and a bypass switch driving circuit; The input end of the main circuit switch driving circuit is connected to the first input end of the control circuit, and the output end of the main circuit switch driving circuit is connected to the control end of the main circuit switch; The input end of the bypass switch driving circuit is connected to the second input end of the control circuit, and the output end of the bypass switch driving circuit is connected to the control end of the bypass switch; When the main circuit switch driving circuit is turned on, the main circuit switch is turned on; when the main circuit switch driving circuit is turned off, the main circuit switch is turned off; When the bypass switch driving circuit is turned on, the bypass switch is turned on; when the bypass switch driving circuit is turned off, the bypass switch is turned off; When the main circuit switch driving circuit is turned on, the voltage at the output end of the main circuit switch driving circuit turns off the bypass switch driving circuit; When the bypass switch driving circuit is turned on, the voltage at the output end of the bypass switch driving circuit turns off the main loop switch driving circuit.

[0007] Optionally, when the main circuit switch driving circuit is turned on, the voltage at the output end of the main circuit switch driving circuit is conducted to the control end of the bypass switch driving circuit through a diode; When the bypass switch driving circuit is turned on, the voltage at the output end of the bypass switch driving circuit is transmitted to the control end of the main loop switch driving circuit through the diode.

[0008] Optionally, the main circuit switch driving circuit includes a dual switch tube driving protection circuit; The main circuit switch and the bypass switch are both contactors; The first end of the dual switch tube driving protection circuit is connected to the contactor power supply; The second end of the dual switch tube driving protection circuit is connected to the coil of the main loop switch; The control end of the dual switch tube driving protection circuit is connected to the output end of the bypass switch driving circuit; The dual switch tube driving protection circuit includes two switch tubes connected in series; The topological structure of the bypass switch driving circuit is symmetrical with that of the main loop switch driving circuit.

[0009] Optionally, the controller is used to generate a first signal and a second signal, and transmit the first signal to a first input terminal of the control circuit, and transmit the second signal to a second input terminal of the control circuit; The first state of the first signal indicates that the main circuit switch is controlled to be turned on, and the second state of the first signal indicates that the main circuit switch is controlled to be turned off; The first state of the second signal indicates that the bypass switch is controlled to be turned on, and the second state of the second signal indicates that the bypass switch is controlled to be turned off; The control circuit includes a logic gate interlock circuit, and the logic gate interlock circuit is used to: When the states of the first signal and the second signal are both in the first state, the main circuit switch driving circuit and the bypass switch driving circuit are both turned off; When the state of the first signal is the first state and the state of the second signal is the second state, the main circuit switch driving circuit is turned on and the bypass switch driving circuit is turned off; When the state of the first signal is the second state and the state of the second signal is the first state, the main circuit switch driving circuit is turned off and the bypass switch driving circuit is turned on.

[0010] Optionally, the logic gate interlock circuit includes a first buffer, a first NOT gate, a second buffer, a second NOT gate, a first AND gate, and a second AND gate; The input end of the first buffer and the input end of the second NOT gate are both used to receive state information of the first signal; The input end of the first NOT gate and the input end of the second buffer are both used to receive state information of the second signal; The output end of the first buffer and the output end of the first NOT gate are connected to the input end of the first AND gate; The output end of the second buffer and the output end of the second NOT gate are connected to the input end of the second AND gate; The output end of the first AND gate is connected to the control end of the main loop switch driving circuit; The output end of the second AND gate is connected to the control end of the bypass switch driving circuit.

[0011] Optionally, the control circuit further includes a PWM power supply control circuit; The PWM power supply control circuit is used to provide power to the logic gate interlock circuit when receiving a set PWM signal sent by the controller; The controller is used to send out a set PWM signal when the program is started and works stably.

[0012] Optionally, the PWM power supply control circuit includes a first capacitor, a first diode, a second capacitor and a switch module; The set PWM signal sent by the controller charges the second capacitor through the first capacitor and the first diode, so that the voltage of the second capacitor reaches the conduction threshold of the switch module. When the switch module is turned on, power is supplied to the logic gate interlock circuit through the switch module.

[0013] Optionally, the control circuit further includes a drive signal optimization circuit; The driving signal optimization circuit is used for: When the first signal switches from a first state to a second state, transmitting information about the state transition of the first signal to the logic gate interlock circuit after a first time; When the second signal switches from the second state to the first state, transmitting information of the state transition of the second signal to the logic gate interlock circuit after a second time; The second time is greater than the first time; When the second signal switches from the first state to the second state, transmitting information of the state transition of the second signal to the logic gate interlock circuit after a third time; When the first signal switches from the second state to the first state, transmitting information of the state transition of the first signal to the logic gate interlock circuit after a fourth time; The fourth time is greater than the third time.

[0014] Optionally, the driving signal optimization circuit includes a second circuit unit and a third circuit unit; the first state is a high level, and the second state is a low level; The first end of the second circuit unit is used to receive the first signal, and the second end of the second circuit unit is connected to the first input end of the logic gate interlock circuit; The first end of the third circuit unit is used to receive the second signal, and the second end of the third circuit unit is connected to the second input end of the logic gate interlock circuit; The second circuit unit includes a first resistor, a second diode and a third capacitor; When the first signal changes from a low level to a high level, the first signal charges the third capacitor via the first resistor; When the first signal changes from a high level to a low level, the third capacitor is discharged to the ground through the second diode; The structure of the third circuit unit is the same as that of the second circuit unit.

[0015] In a second aspect, an embodiment of the present application provides an energy storage system, which includes the battery switching circuit described in the first aspect.

[0016] Compared with the prior art, this application has the following beneficial effects: When the main circuit switch driving circuit is turned on, the voltage at the output end of the main circuit switch driving circuit turns off the bypass switch driving circuit; when the bypass switch driving circuit is turned on, the voltage at the output end of the bypass switch driving circuit turns off the main circuit switch driving circuit; it can ensure that the bypass switch driving circuit and the main circuit switch driving circuit are not turned on at the same time, preventing the main circuit and the bypass circuit from being conductive at the same time, and avoiding a short circuit of the battery unit. In the event of a faulty battery unit, it is ensured that the bypass circuit can be safely closed only after the main circuit of the faulty battery unit is effectively disconnected. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 A schematic diagram of two first circuit units connected in series provided in an embodiment of the present application; Figure 2 A schematic diagram of a bypass switch driving circuit and a main circuit switch driving circuit provided in an embodiment of the present application; Figure 3 A schematic diagram of a logic gate interlock circuit provided in an embodiment of the present application; Figure 4 A schematic diagram of a PWM power supply control circuit provided in an embodiment of the present application; Figure 5 A schematic diagram of a driving signal optimization circuit provided in an embodiment of the present application; Figure 6 A schematic diagram of the connection between a drive signal optimization circuit, a logic gate interlock circuit, a bypass switch drive circuit and a main loop switch drive circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. The described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described in the drawings here can be arranged and designed in various different configurations.

[0020] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application. In the absence of conflict, the following embodiments and features in the embodiments may be combined with each other.

[0021] In the description of this application, it should be noted that: Relational terms such as first and second, etc., are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any such actual relationship or order between these entities or operations; “Connection” should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0022] An embodiment of the present application provides a battery switching circuit, which can be applied in an energy storage system. That is, an embodiment of the present application also provides an energy storage system including the battery switching circuit.

[0023] See also Figure 1 , the battery switching circuit includes at least two first circuit units connected in series; Each first circuit unit includes a main circuit unit 10 and a bypass unit 20 connected in parallel; Each main circuit unit 10 includes a main circuit switch 101 and a battery unit connected in series; Each bypass unit 20 includes a bypass switch 202 .

[0024] The battery switching circuit also includes a control circuit and a controller, and the controller controls the on and off of the main circuit switch 101 and the bypass unit 20 through the control circuit.

[0025] The main circuit switch 101 and the bypass unit 20 can be in the form of electromagnetic switch devices such as relays and contactors, or in the form of transistors such as IGBTs. When the main circuit switch 101 and the bypass unit 20 are contactors, the switch can be controlled by energizing or de-energizing the coil of the contactor.

[0026] The controller is used to generate a first signal and a second signal, and transmit the first signal to a first input terminal of the control circuit, and transmit the second signal to a second input terminal of the control circuit. The states and meanings of the first signal and the second signal are as follows: The first state of the first signal indicates that the main circuit switch 101 is turned on, and the second state of the first signal indicates that the main circuit switch 101 is turned off. The first state of the second signal indicates that the bypass switch 202 is controlled to be turned on, and the second state of the second signal indicates that the bypass switch 202 is controlled to be turned off.

[0027] The first state and the second state correspond to high and low level states respectively, the first state can be a low level or a high level, and the second state can be a low level or a high level, and different logic design methods can be used.

[0028] This embodiment is further described by taking the first state being both at a high level and the second state being both at a low level as an example.

[0029] The control circuit may include a main circuit switch driving circuit and a bypass switch driving circuit, which respectively control the main circuit switch and the bypass switch. The specific control method includes: the main circuit switch 101 is turned on when the main circuit switch driving circuit is turned on, and the main circuit switch 101 is turned off when the main circuit switch driving circuit is turned off; the bypass switch 202 is turned on when the bypass switch driving circuit is turned on, and the bypass switch 202 is turned off when the bypass switch driving circuit is turned off.

[0030] In order to realize the above control method, the following connection relationship can be set: the input end of the main circuit switch driving circuit is connected to the first input end of the control circuit, the input end of the bypass switch driving circuit is connected to the second input end of the control circuit, the output end of the main circuit switch driving circuit is connected to the control end of the main circuit switch, and the output end of the bypass switch driving circuit is connected to the control end of the bypass switch.

[0031] In order to ensure that the bypass switch drive circuit and the main circuit switch drive circuit are not turned on at the same time, the main circuit switch drive circuit and the bypass switch drive circuit can be interlocked: when the main circuit switch drive circuit is turned on, the voltage at the output end of the main circuit switch drive circuit turns off the bypass switch drive circuit; when the bypass switch drive circuit is turned on, the voltage at the output end of the bypass switch drive circuit turns off the main circuit switch drive circuit.

[0032] Figure 2 An implementation method of a bypass switch driving circuit and a main circuit switch driving circuit is shown. The resistor R10 to the switch tube Q3B is the main circuit switch driving circuit, and the resistor R16 to the switch tube Q5B is the bypass switch driving circuit. The left end of the resistor R10 is used to receive a first signal from the controller, and the left end of the resistor R16 is used to receive a second signal from the controller. The signal H_OUT1 output by the switch tube Q3B controls the main circuit switch, and the signal H_OUT2 output by the switch tube Q5B controls the bypass switch.

[0033] At the same time, the output end of the switch tube Q3B is connected to the control end of the switch tubes Q5A and Q5B in the bypass switch driving circuit through the diode D4. Then, when the main circuit switch driving circuit is turned on, the signal H_OUT1 output by the switch tube Q3B is transmitted to the control end of the bypass switch driving circuit through the diode D4, so that the switch tubes Q5A and Q5B are turned off. At this time, the bypass switch driving circuit cannot power the bypass switch.

[0034] Similarly, the output end of the switch tube Q5B is connected to the control end of the switch tubes Q3A and Q3B in the main circuit switch driving circuit through the diode D7. Then, when the bypass switch driving circuit is turned on, the signal H_OUT2 output by the switch tube Q5B is transmitted to the control end of the main circuit switch driving circuit through the diode D7, so that the switch tubes Q3A and Q3B are turned off. At this time, the main circuit switch driving circuit cannot supply power to the main circuit switch.

[0035] like Figure 2 Both the bypass switch driving circuit and the main circuit switch driving circuit can be dual switch tube driving protection circuits. Each dual switch tube driving protection circuit includes two switch tubes connected in series. When one of the switch tubes is damaged and short-circuited, the other switch tube can still be disconnected to avoid short circuit, thereby enhancing the safety of the circuit.

[0036] The control circuit may further include a logic gate interlock circuit, which is used to: When the states of the first signal and the second signal are both in the first state, the main circuit switch driving circuit and the bypass switch driving circuit are both turned off; When the state of the first signal is the first state and the state of the second signal is the second state, the main circuit switch driving circuit is turned on and the bypass switch driving circuit is turned off; When the state of the first signal is the second state and the state of the second signal is the first state, the main loop switch driving circuit is turned off and the bypass switch driving circuit is turned on.

[0037] Figure 3 An implementation of a logic gate interlock circuit is shown. The logic gate interlock circuit includes a first buffer U1, a first NOT gate U3, a second buffer U2, a second NOT gate U4, a first AND gate U5 and a second AND gate U6. Each end has the following connection relationship and function: The input end of the first buffer U1 and the input end of the second NOT gate U4 are both used to receive the state information of the first signal; The input end of the first NOT gate U3 and the input end of the second buffer U2 are both used to receive state information of the second signal; The output end of the first buffer U1 and the output end of the first NOT gate U3 are connected to the input end of the first AND gate U5; The output end of the second buffer U2 and the output end of the second NOT gate U4 are connected to the input end of the second AND gate U6; The output end of the first AND gate U5 is connected to the control end of the main loop switch driving circuit; The output end of the second AND gate U6 is connected to the control end of the bypass switch driving circuit.

[0038] Figure 3 The logic design method shown can achieve the effect that the first AND gate U5 and the second AND gate U6 will not output high levels at the same time, and when the first signal and the second signal both indicate that the main circuit switch and the bypass switch are controlled to be turned on, the main circuit switch and the bypass switch can be turned off, further improving the circuit safety.

[0039] The control circuit may also include a pulse width modulation (PWM) power supply control circuit, which is used to provide power to the logic gate interlock circuit when receiving a set PWM signal sent by the controller; the controller is used to send a set PWM signal when the program is started and the operation is stable. This can avoid the situation where the logic gate interlock circuit obtains power and works when the controller is not started or the operation is not stable, and the logic gate interlock circuit does not output a signal without power, thereby avoiding the occurrence of an erroneous signal.

[0040] A PWM power supply control circuit such as Figure 4 The PWM power supply control circuit includes a first capacitor C1, a first diode D1, a second capacitor C2 and a switch module, and the switch module may be composed of switch tubes Q1 and Q2.

[0041] The set PWM signal sent by the controller charges the second capacitor C2 through the first capacitor C1 and the first diode D1, so that the voltage of the second capacitor C2 reaches the conduction threshold of the switch module. When the switch module is turned on, the power is supplied to the logic gate interlock circuit through the switch module. Therefore, when the controller sends the set PWM signal, the logic gate interlock circuit starts to work, which can better ensure that the controller program is in a stable operation state and avoid output errors caused by operation errors.

[0042] The control circuit may also include a drive signal optimization circuit; Drive signal optimization circuit for: When the first signal switches from the first state to the second state, information about the state transition of the first signal is transmitted to the logic gate interlock circuit after a first time; When the second signal switches from the second state to the first state, transmitting information of the second signal state transition to the logic gate interlock circuit after a second time; The second time is greater than the first time; that is, the main circuit is disconnected first, and then the bypass is closed, with a slow turn-on and a fast turn-off.

[0043] The drive signal optimization circuit is also used to: When the second signal switches from the first state to the second state, transmitting information of the second signal state transition to the logic gate interlock circuit after a third time; When the first signal switches from the second state to the first state, transmitting information of the state transition of the first signal to the logic gate interlock circuit after a fourth time; The fourth time is greater than the third time; that is, the bypass is disconnected first, and then the main circuit is closed, with a slow turn-on and a fast turn-off.

[0044] Figure 5 An implementation method of a drive signal optimization circuit is shown. For the main circuit switch: When the first signal changes from a low level to a high level, the first signal charges the capacitor C7 through the resistor R12; When the first signal changes from high level to low level, capacitor C7 passes through diode D5 ( Figure 5 In the manner shown, discharge is also conducted to ground via resistor R15).

[0045] The charging time through R12 can be adjusted by resistor R12, so the effect of slow turn-on and fast turn-off can be achieved. The bypass switch has the same structure as the main circuit switch.

[0046] In order to ensure that the capacitor C7 is discharged and the discharge time is short enough when the bypass switch is turned on, the diode D3 and the normally open contact K2 of the bypass switch can be connected to the capacitor C7. Then, when the bypass switch is turned on, the capacitor C7 is also discharged through the diode D3 and the normally open contact K2 of the bypass switch, thereby further improving the safety of the circuit.

[0047] In combination with the above implementation, the signal of the controller can pass through the drive signal optimization circuit, the logic gate interlock circuit, the bypass switch drive circuit and the main circuit switch drive circuit to reach the bypass switch and the main circuit switch, such as Figure 6 , Figure 6 The connection between the drive signal optimization circuit, logic gate interlock circuit, bypass switch drive circuit and main circuit switch drive circuit is demonstrated. At this time, the battery switching circuit has multiple interlocking mechanisms to improve circuit safety.

[0048] The above-described device and system embodiments are merely illustrative, and some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. A person skilled in the art may understand and implement the present embodiment without creative effort.

[0049] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A battery switching circuit, characterized in that: comprising at least two first circuit units connected in series; Each first circuit unit includes a main loop unit and a bypass unit connected in parallel; Each of the main circuit units comprises a main circuit switch and a battery unit connected in series; Each of the bypass units includes a bypass switch; The battery switching circuit also includes a controller and a control circuit; The control circuit includes a main circuit switch driving circuit and a bypass switch driving circuit; The input end of the main circuit switch driving circuit is connected to the first input end of the control circuit, and the output end of the main circuit switch driving circuit is connected to the control end of the main circuit switch; The input end of the bypass switch driving circuit is connected to the second input end of the control circuit, and the output end of the bypass switch driving circuit is connected to the control end of the bypass switch; When the main circuit switch driving circuit is turned on, the main circuit switch is turned on; when the main circuit switch driving circuit is turned off, the main circuit switch is turned off; When the bypass switch driving circuit is turned on, the bypass switch is turned on; when the bypass switch driving circuit is turned off, the bypass switch is turned off; When the main circuit switch driving circuit is turned on, the voltage at the output end of the main circuit switch driving circuit turns off the bypass switch driving circuit; When the bypass switch driving circuit is turned on, the voltage at the output end of the bypass switch driving circuit turns off the main loop switch driving circuit.

2. The battery switching circuit according to claim 1, characterized in that: When the main circuit switch driving circuit is turned on, the voltage at the output end of the main circuit switch driving circuit is transmitted to the control end of the bypass switch driving circuit through the fourth diode; When the bypass switch driving circuit is turned on, the voltage at the output end of the bypass switch driving circuit is transmitted to the control end of the main loop switch driving circuit through the seventh diode.

3. The battery switching circuit according to claim 1, characterized in that: The main circuit switch driving circuit includes a dual switch tube driving protection circuit; The main circuit switch and the bypass switch are both contactors; The first end of the dual switch tube driving protection circuit is connected to the contactor power supply; The second end of the dual switch tube driving protection circuit is connected to the coil of the main loop switch; The control end of the dual switch tube driving protection circuit is connected to the output end of the bypass switch driving circuit; The dual switch tube driving protection circuit comprises two switch tubes connected in series; The topological structure of the bypass switch driving circuit is symmetrical with that of the main loop switch driving circuit.

4. The battery switching circuit according to claim 1, characterized in that: The controller is used to generate a first signal and a second signal, and transmit the first signal to a first input terminal of the control circuit, and transmit the second signal to a second input terminal of the control circuit; The first state of the first signal indicates that the main circuit switch is controlled to be turned on, and the second state of the first signal indicates that the main circuit switch is controlled to be turned off; The first state of the second signal indicates that the bypass switch is controlled to be turned on, and the second state of the second signal indicates that the bypass switch is controlled to be turned off; The control circuit includes a logic gate interlock circuit, and the logic gate interlock circuit is used to: When the states of the first signal and the second signal are both in the first state, the main circuit switch driving circuit and the bypass switch driving circuit are both turned off; When the state of the first signal is the first state and the state of the second signal is the second state, the main circuit switch driving circuit is turned on and the bypass switch driving circuit is turned off; When the state of the first signal is the second state and the state of the second signal is the first state, the main circuit switch driving circuit is turned off and the bypass switch driving circuit is turned on.

5. The battery switching circuit according to claim 4, characterized in that: The logic gate interlock circuit includes a first buffer, a first NOT gate, a second buffer, a second NOT gate, a first AND gate and a second AND gate; The input end of the first buffer and the input end of the second NOT gate are both used to receive state information of the first signal; The input end of the first NOT gate and the input end of the second buffer are both used to receive state information of the second signal; The output end of the first buffer and the output end of the first NOT gate are connected to the input end of the first AND gate; The output end of the second buffer and the output end of the second NOT gate are connected to the input end of the second AND gate; The output end of the first AND gate is connected to the control end of the main loop switch driving circuit; The output end of the second AND gate is connected to the control end of the bypass switch driving circuit.

6. The battery switching circuit according to claim 4, characterized in that: The control circuit also includes a PWM power supply control circuit; The PWM power supply control circuit is used to provide power to the logic gate interlock circuit when receiving a set PWM signal sent by the controller; The controller is used to send out a set PWM signal when the program is started and works stably.

7. The battery switching circuit according to claim 6, characterized in that: The PWM power supply control circuit includes a first capacitor, a first diode, a second capacitor and a switch module; The set PWM signal sent by the controller charges the second capacitor through the first capacitor and the first diode, so that the voltage of the second capacitor reaches the conduction threshold of the switch module. When the switch module is turned on, power is supplied to the logic gate interlock circuit through the switch module.

8. The battery switching circuit according to claim 4, characterized in that: The control circuit also includes a drive signal optimization circuit; The driving signal optimization circuit is used for: When the first signal switches from a first state to a second state, information about the state transition of the first signal is transmitted to the logic gate interlock circuit after a first time; When the second signal switches from the second state to the first state, transmitting information of the state transition of the second signal to the logic gate interlock circuit after a second time; The second time is greater than the first time; When the second signal switches from the first state to the second state, transmitting information of the state transition of the second signal to the logic gate interlock circuit after a third time; When the first signal switches from the second state to the first state, transmitting information of the state transition of the first signal to the logic gate interlock circuit after a fourth time; The fourth time is greater than the third time.

9. The battery switching circuit according to claim 8, characterized in that: The first state is a high level, and the second state is a low level; The driving signal optimization circuit includes a second circuit unit and a third circuit unit; The first end of the second circuit unit is used to receive the first signal, and the second end of the second circuit unit is connected to the first input end of the logic gate interlock circuit; The first end of the third circuit unit is used to receive the second signal, and the second end of the third circuit unit is connected to the second input end of the logic gate interlock circuit; The second circuit unit includes a first resistor, a second diode and a third capacitor; When the first signal changes from a low level to a high level, the first signal charges the third capacitor via the first resistor; When the first signal changes from a high level to a low level, the third capacitor is discharged to the ground through the second diode; The structure of the third circuit unit is the same as that of the second circuit unit.

10. An energy storage system, characterized in that: The energy storage system comprises the battery switching circuit as described in any one of claims 1 to 9.

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