Power device driving method and circuit

Abstract

The invention relates to a power device driving method and circuit, the output of a multi-path driving circuit is controlled by adjusting an input driving signal, the driving signal comprises a main driving signal and at least one path of enable signal, the main driving signal forms a main output signal through the multi-path driving circuit, and the enable signal forms at least one path of output signal through the multi-path driving circuit. And the multi-path driving circuit is activated or disabled according to the received enable signal to determine whether to output an auxiliary output signal, and forms a driving voltage signal for driving a power device according to the main output signal or the auxiliary output signal. The driving rate can be quickly adjusted, the response speed is high, the stability is high, the turn-on rate or the turn-off rate can be independently adjusted through different inputs of the enable signals, and the adjustable adaptability is high.

Description

Technical Field

[0001] The present invention relates to the technical field of safety circuits, and in particular to a power device driving method and circuit. Background Art

[0002] When driving and controlling the power device, the drive circuit is a key component that connects the control circuit and the power device. It drives the power device to achieve the corresponding function by amplifying the driving signal for control. However, in some working scenarios, the voltage stress of the power device may reach its maximum tolerance, and the traditional fixed drive circuit solution is simple to implement and does not require an additional adjustment mechanism, making it difficult to achieve a balance between reducing voltage stress and reducing power transistor and drive circuit losses. In addition, in order to ensure the reliability of the equipment, it may be necessary to design a large safety margin for the power device and the drive circuit, which will undoubtedly increase the overall cost of the power converter. Therefore, it is necessary that in the working condition where the voltage stress of the power device may reach the maximum tolerance, the drive circuit should be able to reduce its own drive rate to suppress the voltage of the power device from rising too fast, so that the voltage stress of the power device is below the limit; in the working condition where the voltage stress of the power device is significantly lower than the maximum tolerance, the drive circuit should be able to increase its own drive rate to reduce the voltage and current overlap time in the power device and the voltage and current overlap time of the drive circuit, thereby reducing the loss of the power device and the drive circuit.

[0003] At present, there are mainly the following solutions to this problem: First, adjust the driving impedance network solution. Advantage: Allows direct adjustment of the drive impedance network.

[0004] Limitations: In order to directly adjust the driving impedance network, more additional circuits are required, including but not limited to amplification circuits and isolation circuits, etc. This results in a waste of board area and a significant increase in cost.

[0005] Second, adjust the driving voltage scheme. Advantage: The drive circuits of all power transistors can be adjusted uniformly.

[0006] Limitations: The drive voltage is usually filtered by a large-capacity capacitor, which results in a slow voltage change rate and makes it difficult to quickly respond to the need to adjust the drive rate.

[0007] Third, add multiple driving voltage schemes. Advantages: It can provide more flexible driving speed adjustment capability.

[0008] Limitations: The introduction of multiple driving voltage branches may cause some branches to be idle, which not only increases the cost of the power converter but also reduces its power density.

[0009] Fourth, adjust the number of drive circuits Advantages: stable and reliable.

[0010] Limitations: The drive circuit usually needs to output a certain level. When multiple drive circuits are connected in parallel, if they output different drive levels, the gate voltage of the power transistor may be unstable, thus affecting the working state of the system.

[0011] In summary, directly adjusting the driving impedance network requires more additional circuits, resulting in increased costs and space waste; uniformly adjusting the driving voltage makes it difficult to quickly respond to changes in driving rate because large-capacity capacitor filtering causes a slow voltage change rate; adjusting the number of driving circuits is limited by the output level of the driving circuit, resulting in system instability.

[0012] Therefore, how to achieve adjustable driving speed while ensuring stable system operation and controlling costs is the technical problem that this application aims to solve. Summary of the invention

[0013] A main purpose of the present invention is to overcome at least one of the above-mentioned defects, and to provide a power device driving method and circuit, which has high flexibility and adaptability, fast response speed, high stability, and safer operation.

[0014] In order to achieve the above object, the technical solution adopted by the present invention is: The present invention provides a power device driving method, wherein the output of a multi-channel driving circuit is controlled by adjusting an input driving signal, the driving signal includes a main driving signal and at least one enable signal, the main driving signal forms a main output signal through the multi-channel driving circuit, the multi-channel driving circuit determines whether to output an auxiliary output signal according to activation or deactivation of the received enable signal, and forms a driving voltage signal for driving the power device according to the main output signal or the auxiliary output signal.

[0015] According to one embodiment of the present invention, the auxiliary output signal follows the driving signal, and a waveform of the auxiliary output signal is substantially the same as a waveform of the main output signal.

[0016] According to one embodiment of the present invention, the main driving signal is divided into multiple inputs, one of which is processed and amplified to form a main output signal, and the remaining ones are processed and amplified together with the enable signals respectively, and the auxiliary output signal is output when the enable signal is activated. The auxiliary output signal is superimposed with the main output signal to form the driving voltage signal.

[0017] According to one embodiment of the present invention, the main drive signal is divided into multiple inputs, one of which is processed and amplified to form a main output signal, and the main output signal is sent to the first drive impedance network in the multi-channel drive circuit to control the operation of the first drive impedance network. The remaining channels are processed and amplified together with the enable signals, and the auxiliary output signals are output when the enable signals are activated. The auxiliary output signals are sent to the second drive impedance networks in the multi-channel drive circuit, and the auxiliary output signals control the second drive impedance networks to work together with the first drive impedance network to control and adjust the drive voltage signal for driving the power device.

[0018] According to one embodiment of the present invention, the multi-channel driving circuit includes at least one second driving impedance network, and the current flow direction of at least one of the at least one driving impedance network is unidirectional, and the conduction direction is that the output end of the driving impedance network points to the input end or the input end of the driving impedance network points to the output end.

[0019] According to one embodiment of the present invention, when the enable signal is disabled, a high impedance state is established between the input end of each enable signal and the output end of the drive voltage of the multi-channel drive circuit.

[0020] According to one embodiment of the present invention, it includes at least one first auxiliary output signal for controlling the turn-on rate of a power device and at least one second auxiliary output signal for controlling the turn-off rate of the power device, and whether the first auxiliary output signal or the second auxiliary output signal is output or not is determined according to the selection input of each enable signal.

[0021] According to one implementation manner of the present invention, at least two enable signals among the enable signals are merged, and the at least two enable signals are merged to jointly perform enable control.

[0022] In particular, the present invention further provides a power device driving circuit, which comprises a multi-channel driving circuit, wherein the input end of the multi-channel driving circuit is used to receive a driving signal, and the multi-channel driving circuit has at least two output ends; Wherein, the multi-channel driving circuit includes a main driving circuit and at least one auxiliary driving circuit, the driving signal includes a main driving signal and at least one enabling signal, the main driving signal is divided into at least two channels, and is respectively input to the main driving circuit and each auxiliary driving circuit, the main driving signal forms a main output signal through the main driving circuit, each enabling signal is respectively input to each auxiliary driving circuit, each auxiliary driving circuit is enabled or disabled according to the activation or disabling of the received enabling signal, and the enabling signal is activated so that the auxiliary driving circuit is enabled to form an auxiliary output signal; A driving voltage signal for driving a power device is formed according to the main output signal or the auxiliary output signal.

[0023] According to one embodiment of the present invention, the main driving circuit includes a main driving logic circuit and a main driving amplifier circuit, and the main driving signal is processed and amplified by the main driving logic circuit and the main driving amplifier circuit to form a main output signal; Optionally, the main driving circuit is further provided with an isolation circuit, and the isolation circuit is arranged between the main driving logic circuit and the main driving amplifier circuit, or inside the main driving logic circuit, or in the front stage of the main driving logic circuit.

[0024] According to one embodiment of the present invention, the auxiliary driving circuit includes an auxiliary driving logic circuit and an auxiliary driving amplifier circuit, the main driving signal and the enable signal are connected to the input end of the auxiliary driving logic circuit, the output end of the auxiliary driving logic circuit is connected to the auxiliary driving amplifier circuit, and the output end of the auxiliary driving amplifier circuit outputs the auxiliary output signal when the enable signal is activated; Optionally, the auxiliary driving circuit is further provided with an isolation circuit, and the isolation circuit is arranged between the auxiliary driving logic circuit and the auxiliary driving amplifier circuit, or inside the auxiliary driving logic circuit, or at a front stage of the auxiliary driving logic circuit.

[0025] According to one embodiment of the present invention, the auxiliary driving logic circuit includes a logic gate device or a tri-state buffer device, the enable signal and the main driving signal are connected to the input end of the logic gate device or the tri-state buffer device, and the output end of the logic gate device or the tri-state buffer device outputs the auxiliary output signal when the enable signal is activated; The auxiliary output signal follows the driving signal, and a waveform of the auxiliary output signal is substantially the same as a waveform of the main output signal.

[0026] According to one embodiment of the present invention, the main driving circuit includes a first driving impedance network, each of the auxiliary driving circuits includes a second driving impedance network, the main output signal is sent to the first driving impedance network and is used to control the operation of the first driving impedance network, and each of the auxiliary output signals is sent to each of the second driving impedance networks, and each of the auxiliary output signals respectively controls the second driving impedance network to work together with the first driving impedance network to control and adjust the driving voltage signal for driving the power device.

[0027] According to one embodiment of the present invention, the main driving circuit includes a first upper driving switch, a first lower driving switch, and a first driving impedance network. Wherein, a first end of a circuit formed by connecting the first upper drive switch and the first lower drive switch in series is connected to a power supply VCC terminal, and a second end is grounded; A first end of the first driving impedance network is connected to a midpoint between the first upper driving switch and the first lower driving switch, and a second end is connected to a control electrode of a power device; The main output signal is divided into two paths, which are respectively connected to the first upper drive switch and the first lower drive switch to control the on and off of the two; Optionally, a voltage stabilizing unit is connected in parallel at both ends of a circuit formed by the first upper driving switch and the first lower driving switch being connected in series.

[0028] According to one embodiment of the present invention, the auxiliary driving circuit includes a second upper driving switch and a second driving impedance network, the first end of the second upper driving switch is connected to the power supply VCC end, the second end is connected to the first end of the second driving impedance network, the second end of the second driving impedance network is connected to the second end of the first driving impedance network and then connected to the control electrode of the power device, and the auxiliary output signal is connected to the second upper driving switch to control its on and off.

[0029] According to one embodiment of the present invention, a unidirectional conducting device is provided in the second driving impedance network, and the unidirectional conducting direction of current is from the first end to the second end of the second driving impedance.

[0030] According to one embodiment of the present invention, the auxiliary driving circuit includes a second lower driving switch, a first end of the second lower driving switch is grounded, a second end of the second lower driving switch is connected to a second end of the second upper driving switch, and the auxiliary output signal is divided into two paths which are respectively connected to the second upper driving switch and the second lower driving switch to control the on and off of the two.

[0031] The first end of the second upper driving switch is connected to the high level signal, and the second end is connected to the first end of the second driving impedance. The second end of the second driving impedance is connected to the second end of the first driving impedance and then connected to the control electrode of the power device. The auxiliary output signal is connected to the second upper driving switch and controls its on and off.

[0032] According to one embodiment of the present invention, a unidirectional conductive device is provided in the second driving impedance network, and the unidirectional current flow direction is from the second end of the second driving impedance to the first end.

[0033] Compared with the prior art, the advantages and beneficial effects of the power device driving method and circuit of the patent application of the present invention are: The present application can form an auxiliary output signal that can follow the main drive signal by introducing an enable signal, and control the output of each auxiliary output signal according to the activation or disabling of each enable signal, and then combine the output auxiliary output signal with the main output signal to control the driving impedance of the power device, and finally realize the adjustment of the driving rate of the power device. The present application can quickly adjust the driving rate, with fast response speed and high stability, and can realize the separate adjustment of the turn-on rate or the turn-off rate respectively through different inputs of the enable signal, and has strong adjustable adaptability.

[0034] Furthermore, the power device driving method and circuit of the present application can be implemented by independent components, integrated circuits or a combination of the two, which can meet different design requirements and application scenarios, and can be adapted to different implementation methods according to different application scenarios, thereby further reducing configuration costs.

[0035] In addition, the power device driving method and circuit of the present application can introduce a high impedance state or an equivalent high impedance state at the output end of the auxiliary output signal when the enable signal is disabled so that the output of the auxiliary output signal is prohibited, thereby eliminating the control influence of the auxiliary driving circuit on the power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Hereinafter, some specific embodiments of the present invention will be described in detail in an exemplary and non-limiting manner with reference to the accompanying drawings. The same reference numerals in the accompanying drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the accompanying drawings: Figure 1 is a schematic diagram of the overall framework of a power device driving circuit according to an embodiment of the present invention; Figure 2 It is a schematic diagram of the logical relationship between the input and output ports of a multi-channel driving circuit in a power device driving circuit according to an embodiment of the present invention; Figure 3 It is a schematic diagram of the framework structure of a non-isolated multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 4a This is a schematic diagram of a framework structure of an isolated multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 4b This is a schematic diagram of a second frame structure of an isolated multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 4c This is a schematic diagram of a third frame structure of an isolated multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 5aThis is a schematic diagram of a power supply structure of a multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 5b This is a schematic diagram of a second power supply structure of a multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 5c This is a schematic diagram of a third power supply structure of a multi-channel driving circuit in a power device driving circuit according to an embodiment of the present application; Figure 6 is a circuit structure schematic diagram of a power device driving circuit according to Embodiment 3 of the present application; Figure 7 is a circuit structure diagram of a power device driving circuit according to Embodiment 4 of the present application; Figure 8 is a circuit structure diagram of a power device driving circuit according to Embodiment 5 of the present application; Figure 9a is a circuit structure schematic diagram of a power device driving circuit according to Embodiment 6 of the present application, wherein only the control of the opening driving rate is realized; Figure 9b is a schematic diagram of a second circuit structure of a power device driving circuit according to Embodiment 6 of the present application, wherein only the control of the opening driving rate is realized; Fig.9c is a third circuit structure schematic diagram of the power device driving circuit according to Embodiment 6 of the present application, wherein only the control of the opening driving rate is realized; Fig.10a is a circuit structure schematic diagram of a power device driving circuit according to Embodiment 7 of the present application, wherein only the shutdown driving rate is controlled; Fig.10b is a schematic diagram of a second circuit structure of a power device driving circuit according to Embodiment 7 of the present application, wherein only the shutdown driving rate is controlled; Fig.10c is a third circuit structure schematic diagram of the power device driving circuit according to Embodiment 7 of the present application, wherein only the shutdown driving rate is controlled; Fig.11 It is a schematic diagram of the framework structure of the power device driving circuit according to Example 7 of the present application. DETAILED DESCRIPTION

[0037] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0039] Embodiment 1: This embodiment describes a power device driving method, wherein the output of a multi-channel driving circuit is controlled by adjusting an input driving signal, wherein the driving signal includes a main driving signal and N-channel enabling signals, where N≥1. Figure 1 As shown, the main drive signal forms a main output signal through the multi-channel drive circuit, and the multi-channel drive circuit determines whether to output an auxiliary output signal according to activation or disablement of the received enable signal, and forms a drive voltage signal for driving the power device according to the main output signal or the auxiliary output signal.

[0040] First, after the driving signal is input to the multi-channel driving circuit, a main output signal can be generated, and the main output signal follows the main driving signal, and the output level of the main output signal is determined. The auxiliary output signal follows the driving signal, and the waveform of the auxiliary output signal is substantially the same as the waveform of the main output signal, so that the auxiliary output signal maintains synchronous control with the main output signal. It can be understood that each additional generation and output of the auxiliary output signal can change the driving impedance associated with the driving voltage signal, for example, each additional generation and output of the auxiliary output signal can increase an auxiliary driving impedance network that is equivalent to being connected in parallel to the main driving impedance network, reducing the driving impedance in the multi-channel driving circuit, thereby improving the driving rate for the power device.

[0041] Based on this design, the present application can allow the circuit architecture of the multi-channel driving circuit to be flexibly adjusted as needed, thereby achieving output control of the auxiliary output signal by activating or disabling each enable signal, thereby adjusting the driving rate of the power device to meet different application scenarios and performance requirements.

[0042] In one embodiment, if Figure 2 As shown in the logical relationship between the input and output ports of the multi-channel driving circuit, the main driving signal is divided into multiple inputs, one of which is processed and amplified to form a main output signal, and the remaining ones are processed and amplified together with the enable signals respectively, and the auxiliary output signal is output when the enable signal is activated. The auxiliary output signal is superimposed on the main output signal to form the driving voltage signal.

[0043] In another embodiment, the main drive signal is divided into multiple inputs, one of which is processed and amplified to form a main output signal, and the main output signal is sent to the first drive impedance network in the multi-channel drive circuit to control the operation of the first drive impedance network, and the remaining channels are processed and amplified together with the enable signals, and the auxiliary output signal is output when the enable signal is activated, and each of the auxiliary output signals is sent to each of the second drive impedance networks in the multi-channel drive circuit, and each of the auxiliary output signals controls the second drive impedance network to work together with the first drive impedance network, such as making the second drive impedance network connected in parallel with the first drive impedance network, changing the overall drive impedance, and controlling and adjusting the drive voltage signal for driving the power device. That is, after the auxiliary output signal and the main output signal are generated, they control the drive impedance networks to which they are connected, so that the overall drive impedance changes, thereby realizing the control of the drive rate of the power device.

[0044] In addition, in an application environment where there are multiple enable signals, enable signals 1 to N can be combined in any arrangement and combination. For example, enable signal 1 is combined with enable signal 2, enable signal 3 is combined with enable signal 4, and so on. Alternatively, all enable signals 1 to N are combined. In this way, the input drive signal can simultaneously control the enabling or disabling of two or more auxiliary drive circuits, so that the drive rate adjustment range of the power device can be more diversified.

[0045] When a certain enable signal is disabled, the corresponding auxiliary drive circuit is disabled. At this time, the auxiliary drive circuit and the control electrode of the power device need to be in a high impedance state or an equivalent high impedance state, so as to prevent the gate voltage of the power device from being abnormal and improve the working reliability of the power device. There are two ways to achieve a high impedance state or an equivalent high impedance state between the auxiliary drive circuit and the control electrode of the power device. One is that the auxiliary drive circuit is in a high impedance state, and the other is to use the unidirectional conduction capability of some components in the auxiliary drive circuit (such as logic devices in the auxiliary drive logic circuit or diodes in the second drive impedance network) to achieve an equivalent high impedance state.

[0046] Specifically, in one embodiment, when the enable signal is disabled, the input end of each enable signal and the output end of the drive voltage of the multi-channel drive circuit are in a high impedance state. For example, after the enable signal is disabled, the drive switch in the auxiliary drive circuit is in a normally-off state, so that the auxiliary drive circuit exhibits a high impedance characteristic. In other words, the drive impedance network in the auxiliary drive circuit can be designed as a circuit with a high impedance characteristic, and the high impedance characteristic of the drive impedance network when the enable signal is disabled can prevent the auxiliary drive circuit from affecting the operation of the power device.

[0047] In another embodiment, the multi-channel drive circuit includes at least one second drive impedance network, and part or all of the current flow direction in the at least one drive impedance network is unidirectional. The specific direction of the unidirectional current conduction depends on whether the shutdown drive rate control or the opening drive rate control is implemented. If the shutdown drive rate control for the power device is implemented, the current conduction direction is the output end of the drive impedance network pointing to the input end; if the opening drive rate control for the power device is implemented, the current conduction direction is the input end of the drive impedance network pointing to the output end. One implementation method is to design the logic device of the auxiliary drive circuit as a device such as a three-state buffer device, and another implementation method is to design a unidirectional conduction device such as a diode in the drive impedance network in the auxiliary drive circuit, so as to ensure that the influence on the power transistor is minimized when the auxiliary drive circuit is not required.

[0048] Embodiment 2: This embodiment describes a power device driving circuit, which includes a multi-channel driving circuit, wherein the input end of the multi-channel driving circuit is used to receive a driving signal, and the multi-channel driving circuit has at least two output ends; wherein the multi-channel driving circuit includes a main driving circuit and at least one auxiliary driving circuit, wherein the driving signal includes a main driving signal and at least one enabling signal, wherein the main driving signal is divided into at least two paths and is input to the main driving circuit and each auxiliary driving circuit respectively. Figure 1 As shown, the main drive signal forms a main output signal through the main drive circuit, and each enable signal is input into each auxiliary drive circuit respectively. Each auxiliary drive circuit is enabled or disabled according to the activation or disable of the received enable signal. The enable signal is activated so that the auxiliary drive circuit is enabled to form an auxiliary output signal; a drive voltage signal for driving the power device is formed according to the main output signal or the auxiliary output signal.

[0049] Each driving circuit in the multi-channel driving circuit may generally include a logic circuit for performing logic processing and an amplifier circuit for performing signal amplification, and an isolation circuit may also be provided in the driving circuit for isolating the input side and output side signals of the multi-channel driving circuit.

[0050] Specifically, if Figure 3As shown, the main driving circuit includes a main driving logic circuit and a main driving amplifier circuit, and the main driving signal is processed and amplified by the main driving logic circuit and the main driving amplifier circuit to form a main output signal. The auxiliary driving circuit includes an auxiliary driving logic circuit and an auxiliary driving amplifier circuit, the main driving signal and the enable signal are connected to the input end of the auxiliary driving logic circuit, the output end of the auxiliary driving logic circuit is connected to the auxiliary driving amplifier circuit, and the output end of the auxiliary driving amplifier circuit outputs the auxiliary output signal when the enable signal is activated. Wherein, the auxiliary driving logic circuit includes a logic gate device, the enable signal and the main driving signal are connected to the input end of the logic gate device or the three-state buffer device, and the output end of the logic gate device or the three-state buffer device outputs the auxiliary output signal when the enable signal is activated.

[0051] In addition, if Figures 4a to 4c As shown, an isolation circuit may be provided in the main driving circuit, and the isolation circuit may be provided between the main driving logic circuit and the main driving amplifier circuit, or inside the main driving logic circuit, or in the front stage of the main driving logic circuit. An isolation circuit may also be provided in the auxiliary driving circuit, and the isolation circuit may be provided between the auxiliary driving logic circuit and the auxiliary driving amplifier circuit, or inside the auxiliary driving logic circuit, or in the front stage of the auxiliary driving logic circuit.

[0052] The multi-channel drive circuit of this embodiment can be configured with a variety of power supply structures as needed. For example, when the input side and output side of the multi-channel drive circuit are not signal isolated, the following can be used: Figure 5a He Ru Figure 5b In the power supply mode, one or two power supply VCC terminals can be set to provide high-level signals for the driving logic circuit and the driving amplifier circuit, and only one ground terminal can be set. When isolating the input and output sides of the multi-channel driving circuit, the following can be used Figure 5c The power supply method provides a high-level signal to the driving logic circuit and the driving amplifier circuit through two power supply VCC terminals, and a ground terminal is set for the driving logic circuit and the driving amplifier circuit respectively.

[0053] In summary, after the drive signal is input to the main drive circuit, a main output signal can be generated, and the main output signal follows the main drive signal, and the output level of the main output signal is determined. When the enable signal input to the auxiliary drive circuit is activated, the auxiliary drive circuit is enabled, and the auxiliary output signal generated by the auxiliary drive circuit follows the drive signal, and the waveform of the auxiliary output signal is basically the same as the waveform of the main output signal, so that the auxiliary output signal maintains synchronous output with the main output signal and the waveform is basically consistent. It can be understood that, with each additional generation and output of the auxiliary output signal, the drive impedance network of the auxiliary drive circuit can be enabled to change the overall drive impedance, thereby improving the drive rate for the power device.

[0054] Embodiment 3: In order to facilitate the explanation of the power device driving method and circuit of the present application, this embodiment takes a multi-channel driving circuit combining one main driving circuit and one auxiliary driving circuit to drive a power transistor as an example to explain the circuit structure and working process. The number of main driving circuits or auxiliary driving circuits can be selected according to needs, but the general working principle is as described in the embodiment of the present application.

[0055] There are different implementation methods for the auxiliary driving logic circuit in the auxiliary driving circuit.

[0056] In this embodiment, if Figure 6 As shown, the auxiliary drive logic circuit includes a logic gate device, the enable signal and the main drive signal are connected to the input end of the logic gate device, and when the enable signal is activated, the output end of the logic gate device will output the auxiliary output signal to the second upper drive switch or the second lower drive switch, and the auxiliary output signal follows the drive signal, and the waveform of the auxiliary output signal is basically the same as the waveform of the main output signal.

[0057] The main driving circuit includes a first upper driving switch, a first lower driving switch, and a first driving impedance network, wherein the first end of the circuit formed by connecting the first upper driving switch and the first lower driving switch in series is connected to the power supply VCC end, and the second end is grounded; the first end of the first driving impedance network is connected to the midpoint between the first upper driving switch and the first lower driving switch, and the second end is connected to the control electrode of the power transistor; the main output signal is divided into two paths, which are respectively connected to the first upper driving switch and the first lower driving switch and control the on and off of the two. In addition, in order to ensure the voltage stability of the driving voltage signal input to the power transistor, a voltage stabilizing unit (a positive voltage stabilizing unit and a negative voltage stabilizing unit in the figure) is connected in parallel at both ends of the circuit formed by connecting the first upper driving switch and the first lower driving switch in series.

[0058] The auxiliary driving circuit includes a second upper driving switch and a second driving impedance network, wherein the first end of the second upper driving switch is connected to the power supply VCC end, and the second end is connected to the first end of the second driving impedance network, the second end of the second driving impedance network is connected to the second end of the first driving impedance network and then connected to the control electrode of the power transistor, and the auxiliary output signal is connected to the second upper driving switch to control its on and off.

[0059] The main output signal is sent to the first driving impedance network and is used to control the operation of the first driving impedance network. Each of the auxiliary output signals is sent to each of the second driving impedance networks. Each of the auxiliary output signals controls the second driving impedance network to work together with the first driving impedance network. In this embodiment, when the enable signal is activated, the corresponding auxiliary driving circuit is enabled, so that the second driving impedance network in the auxiliary driving circuit is connected in parallel with the first driving impedance network of the main driving circuit, so that the overall driving impedance changes, thereby controlling and adjusting the driving voltage signal for driving the power transistor.

[0060] After the auxiliary drive circuit receives the enable signal and is activated, an auxiliary output signal is generated. The auxiliary output signal and the main output signal change basically synchronously with the change of the drive signal (because there may be a certain delay between the two different drive circuits, but it can be basically ignored. Of course, the synchronization and consistency of the two can also be improved through the design of the delay circuit). Therefore, in this case, the auxiliary drive circuit is enabled, and it can be said that the main drive signal can drive the main drive circuit and the auxiliary drive circuit at the same time. According to the input change of the main drive signal, the first upper drive switch and the second upper drive switch can be allowed to work almost simultaneously, and the first lower drive switch and the second lower drive switch can also work almost simultaneously.

[0061] The first upper drive switch, the first lower drive switch, the second upper drive switch and the second lower drive switch can adopt any device with switching capability, including but not limited to transistors, MOSFETs, IGBTs, relays, etc. In general, the above four drive switches are in a normally-off state, and switch to a normally-on state after receiving a main output signal or an auxiliary output signal.

[0062] It can be understood that when the enable signal is activated, the auxiliary output signal is output, and the auxiliary drive circuit is enabled, and the first upper drive switch and the second upper drive switch can be controlled to be closed at the same time, or the first lower drive switch and the second lower drive switch can be controlled to be closed at the same time, so that the second drive impedance network in the auxiliary drive circuit is connected in parallel with the first drive impedance network of the main drive circuit, so that the overall drive impedance becomes smaller, and the drive voltage signal becomes larger, thereby improving the drive rate of the power transistor. On the contrary, when the enable signal is disabled, the auxiliary drive circuit is prohibited from use, and only the main drive signal acts on the main drive circuit, that is, only the first drive impedance network participates in driving the power transistor, thereby reducing the drive rate of the power transistor.

[0063] When the second upper drive switch is controlled to be closed at the same time as the first upper drive switch, the turn-on rate of the power transistor can be increased; when the second lower drive switch is controlled to be closed at the same time as the first lower drive switch, the turn-off rate of the power transistor can be increased. When the second upper drive switch is controlled to be turned off, the turn-on rate of the power transistor can be controlled to be in a lower state; when the second lower drive switch is controlled to be turned off, the turn-off rate of the power transistor can be controlled to be in a lower state. In view of this, by designing the auxiliary drive circuit to be unidirectionally conductive, or removing some drive switches in the auxiliary drive circuit, the drive rate adjustment for turning on or off the power transistor can also be realized separately to meet the needs of users in different application scenarios, which will be specifically expanded in the following embodiments 6 and 7.

[0064] Embodiment 4: This embodiment describes a power transistor drive rate adjustment circuit, and its main structure is basically the same as that of Embodiment 3, and the difference lies in the selection of logic devices in the auxiliary drive logic circuit.

[0065] In this embodiment, if Figure 7 As shown, the auxiliary drive logic circuit includes a three-state buffer device, the enable signal and the main drive signal are connected to the input end of the three-state buffer device, and when the enable signal is activated, the output end of the logic gate device will output the auxiliary output signal to the second upper drive switch or the second lower drive switch, and the auxiliary output signal follows the drive signal, and the waveform of the auxiliary output signal is basically the same as the waveform of the main output signal.

[0066] The three-state output of the three-state buffer device is controlled by the enable output terminal. When the enable signal output is activated, the device realizes normal logic state output (logic 0, logic 1). When the enable input is disabled, the output is in a high-impedance state, which is equivalent to being disconnected from the connected circuit. In this way, the auxiliary drive circuit can exhibit a high-impedance state, which can prevent abnormal gate voltage of the power transistor and improve the operating reliability of the power transistor.

[0067] Embodiment 5: This embodiment describes a power transistor drive rate adjustment circuit, the main structure of which is basically the same as that of Embodiment 4, and the difference lies in the selection of logic devices in the auxiliary drive logic circuit.

[0068] In this embodiment, if Figure 8 As shown, the auxiliary drive logic circuit includes a three-state buffer switch device, and the second upper drive switch and the second lower drive switch in Example 4 are cancelled, which is equivalent to integrating the three-state buffer device of the auxiliary drive circuit in Example 4 with the second upper drive switch and the second lower drive switch into a three-state buffer switch device.

[0069] Similarly, when the enable input is disabled, the tri-state buffer can output a high-impedance state, which is equivalent to being disconnected from the connected circuit. This allows the auxiliary drive circuit to exhibit a high-impedance state, prevents abnormal gate voltage of the power transistor, and improves the operating reliability of the power transistor.

[0070] Embodiment 6: This embodiment describes a power device driving circuit, which is improved on the basis of Embodiment 3. The improvement lies in that a unidirectional conducting device is provided in the second driving impedance network, and the unidirectional conducting direction of current is from the first end to the second end of the second driving impedance.

[0071] What is achieved in this embodiment is that the power transistor only needs to control the turn-on rate. The auxiliary drive circuit not only presents a high impedance state when the auxiliary drive signal is disabled, but also presents a high impedance state in the connection path between the second lower drive switch and the second drive impedance network. The second lower drive switch is grounded. Therefore, during the turn-on process, the first end of the second drive impedance points to the second end, which is a conductive state. During the turn-off process, the second end of the second drive impedance points to the first end, which is a cut-off high impedance state.

[0072] like Figures 9a to 9c As shown, three implementation methods for controlling only the turn-on drive rate of the power transistor are shown.

[0073] like Figure 9a As shown, by configuring the unidirectional conduction direction of the second driving impedance network as the turn-on direction, that is, the first end of the second driving impedance points to the second end in the turn-on state. In this way, the second driving impedance network only participates in the driving during the turn-on process, and maintains a high impedance state during the turn-off process. When the auxiliary driving circuit is activated and enabled by the enable signal and participates in the turn-on driving of the power device, the auxiliary output signal of the auxiliary driving circuit follows the input main driving signal, that is to say, the second upper driving switch can act simultaneously with the first upper driving switch, and the second lower driving switch can act simultaneously with the first lower driving switch.

[0074] In the process of turning on the power transistor, if it is necessary to increase the turn-on drive rate, the enable signal activates the auxiliary drive circuit, the second upper drive switch follows the first upper drive switch to act simultaneously and switch to normally on, the second lower drive switch follows the first lower drive switch to act simultaneously and switch to normally off, the second drive impedance network is connected in parallel with the first drive impedance network so that the overall drive impedance is reduced, thereby achieving an increase in the turn-on drive rate; if it is necessary to reduce the turn-on rate, the enable signal is disabled, the auxiliary drive circuit is also disabled, the second upper drive switch remains normally off, the second lower drive switch remains normally on, and the auxiliary drive circuit outputs a low level. Since the second drive impedance network is unidirectionally conductive and has unidirectional conductivity (the unidirectional current conduction direction is from the first end of the second drive impedance to the second end), the low level output by the auxiliary drive circuit does not affect the control electrode of the power transistor, so that the auxiliary drive circuit is in a high impedance state at this time, thereby achieving a reduction in the turn-on drive rate, and ensuring that when the auxiliary drive circuit is not required to participate, its influence on the power transistor is minimized as much as possible.

[0075] like Figure 9b As shown, in Figure 9a The second lower drive switch is further optimized on the basis of the embodiment, and the second lower drive switch is removed. The second drive impedance network can still participate in the driving during the opening process, and maintain a high impedance state during the closing process. In the process of turning on the power transistor, if it is necessary to reduce the opening rate, the enable signal is disabled, the auxiliary drive circuit is also disabled, and the second upper drive switch remains normally off, so that the voltage at the first end of the second drive impedance network cannot be pulled up. Since the second lower drive switch is removed, the voltage at the first end of the second drive impedance network will not be lowered. In addition, the second drive impedance network is unidirectionally conductive and has unidirectional conductivity (the unidirectional current conduction direction is from the first end of the second drive impedance to the second end). Therefore, the second drive impedance network can be kept in a high impedance state and does not participate in the driving while achieving a reduction in the opening drive rate, thereby ensuring that when the auxiliary drive circuit does not need to participate, its influence on the power transistor is minimized as much as possible.

[0076] like Fig.9c As shown, in Figure 9b The auxiliary drive circuit is simplified on the basis of the first embodiment, and the conduction direction restriction of the second drive impedance network is removed. This change will not affect the ability of the auxiliary drive circuit to participate in the driving when it is turned on, and during the shutdown process, the auxiliary drive circuit can still maintain a high impedance state because the second upper drive switch is in a normally off state.

[0077] The above current can be unidirectionally conducted through a device with unidirectional conductivity, such as a diode, or a controllable shutdown power switch, relay, etc.

[0078] Embodiment 7: This embodiment describes a power device driving circuit, which is improved on the basis of Embodiment 3. The improvement lies in that a unidirectional conducting device is provided in the second driving impedance network, and the unidirectional conducting direction of current is from the second end of the second driving impedance to the first end.

[0079] The present embodiment realizes that the power transistor only needs to control the turn-off rate, and the auxiliary drive circuit not only presents a high impedance state when the auxiliary drive signal is disabled, but also presents a high impedance state in the connection path between the second upper drive switch and the second drive impedance network. Therefore, during the turn-off process, the second end of the second drive impedance points to the first end, which is a conductive state, and during the turn-on process, the first end of the second drive impedance points to the second end, which is a cut-off high impedance state.

[0080] like Figures 10a to 10c As shown, three implementation methods for controlling only the turn-off drive rate of the power transistor are demonstrated.

[0081] like Fig.10a As shown, by configuring the unidirectional conduction direction of the second driving impedance network to the off direction, that is, the second end of the second driving impedance points to the first end in the on state. In this way, the second driving impedance network only participates in the driving during the off process, and maintains a high impedance state during the on process. When the auxiliary driving circuit is activated and enabled by the enable signal and participates in the off driving of the power device, the auxiliary output signal of the auxiliary driving circuit follows the input main driving signal, that is to say, the second upper driving switch can act simultaneously with the first upper driving switch, and the second lower driving switch can act simultaneously with the first lower driving switch.

[0082] In the process of turning on the power transistor, if it is necessary to increase the turn-off drive rate, the enable signal activates the auxiliary drive circuit, the second upper drive switch follows the first upper drive switch and switches to normally off at the same time, the second lower drive switch follows the first lower drive switch and switches to normally on at the same time, the second drive impedance network is connected in parallel with the first drive impedance network so that the overall drive impedance is reduced, thereby achieving an increase in the turn-off drive rate; if it is necessary to reduce the turn-off rate, the enable signal is disabled, the auxiliary drive circuit is also disabled, the second upper drive switch remains normally on, the second lower drive switch remains normally off, and the auxiliary drive circuit outputs a high level. Since the second drive impedance network is unidirectionally conductive and has unidirectional conductivity (the unidirectional current conduction direction is from the second end of the second drive impedance to the first end), the high level output by the auxiliary drive circuit does not affect the control electrode of the power transistor, so that the auxiliary drive circuit is in a high impedance state at this time, thereby achieving a reduction in the turn-off drive rate, and ensuring that when the auxiliary drive circuit is not required to participate, its influence on the power transistor is minimized as much as possible.

[0083] like Fig.10b As shown, in Fig.10aThe second upper drive switch is further optimized on the basis of the present invention, and the second upper drive switch is removed. The second drive impedance network can still participate in the driving during the shutdown process, and maintain a high impedance state during the shutdown process. In the process of turning on the power transistor, if the shutdown rate needs to be reduced, the enable signal is disabled, the auxiliary drive circuit is also disabled, and the second lower drive switch remains normally off, so the voltage at the first end of the second drive impedance network cannot be lowered. Since the second upper drive switch is removed, the voltage at the first end of the second drive impedance network will not be raised. In addition, the second drive impedance network is unidirectionally conductive and has unidirectional conductivity (the unidirectional current conduction direction is from the second end of the second drive impedance to the first end). Therefore, the second drive impedance network can be kept in a high impedance state and does not participate in the driving while achieving a reduction in the shutdown drive rate, thereby ensuring that when the auxiliary drive circuit does not need to participate, its impact on the power transistor is minimized as much as possible.

[0084] like Fig.10c As shown, in Fig.10b The auxiliary drive circuit is further simplified on the basis of the first embodiment, and the conduction direction restriction of the second drive impedance network is removed. This change will not affect the ability of the auxiliary drive circuit to participate in driving when it is turned off, and during the turn-on process, the auxiliary drive circuit can still maintain a high impedance state because the second lower drive switch is in a normally off state.

[0085] The above current can be unidirectionally conducted through a device with unidirectional conductivity, such as a diode, or a controllable shutdown power switch, relay, etc.

[0086] Embodiment 8: like Fig.11 As shown, according to the implementation methods in the above embodiments, the design of the multi-channel driving circuit can be adjusted so that the power device driving circuit can have a single first auxiliary output signal (auxiliary output turn-on signal) for controlling the turn-on rate of the power device, and the output of the first auxiliary output signal is determined according to the activation or disablement of the first enable signal; in addition, the power device driving circuit also has a single second auxiliary output signal (auxiliary output turn-off signal) for controlling the turn-off rate of the power device, and the output of the first auxiliary output signal is determined according to the activation or disablement of the second enable signal. In this way, the diversification of power device driving can be achieved to better meet the needs of users.

[0087] In addition, if necessary, the multi-channel driving circuit can be adjusted to have two or even three auxiliary driving circuits for generating auxiliary output turn-on signals, or two or even three auxiliary driving circuits for generating auxiliary output turn-off signals, which will not be described in detail here.

[0088] In addition, two or more enable signals in each of the enable signals can be combined, and the enable signals can be combined to jointly perform enable control to meet different needs of users. For example, after the first enable signal and the second enable signal are combined, if an enable signal is activated, the control of the turn-on and turn-off rate of the power device can be achieved.

[0089] The power device driving method and circuit described in the above embodiments are highly flexible and adaptable, and can be implemented in the following ways: Independent component implementation: This solution can be built entirely from discrete electronic components, such as resistors, capacitors, transistors and other basic components. This method provides maximum flexibility, allowing designers to select and adjust component parameters according to specific needs. The drive logic circuit and drive amplifier circuit can be implemented by independent components and connected to each other.

[0090] Integrated circuit implementation: To simplify the design and improve reliability, the solution can also use integrated circuits (ICs). Integrated circuits provide compact pre-design solutions, reduce the number of external components, reduce design complexity, and improve circuit performance and stability. The drive logic circuit and drive amplifier circuit can be implemented and connected by integrated circuits separately, or implemented in the same integrated circuit without external connections.

[0091] Combination of independent components and integrated circuits: In addition, the solution also supports the combined use of independent components and integrated circuits to give full play to the advantages of both. For example, the driving logic circuit can be implemented by an integrated circuit, and the driving amplifier circuit can be implemented by independent components, and then connected; or the driving logic circuit can be implemented by independent components, and the driving amplifier circuit can be implemented by an integrated circuit, and then connected to each other.

[0092] In summary, the present application can form an auxiliary output signal that can follow the main drive signal by introducing an enable signal, and control the output of each auxiliary output signal according to the activation or disabling of each enable signal, and then combine the output auxiliary output signal with the main output signal to control the driving impedance of the power device, and finally realize the adjustment of the driving rate of the power device. The present application can quickly adjust the driving rate, with fast response speed and high stability, and can realize the separate adjustment of the turn-on rate or the turn-off rate respectively through different inputs of the enable signal, and has strong adjustable adaptability.

[0093] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with this technology to understand the contents of the present invention and implement them accordingly. They cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A power device driving method, characterized in that: The output of the multi-channel driving circuit is controlled by adjusting the input driving signal, wherein the driving signal includes a main driving signal and at least one enabling signal, and the main driving signal forms a main output signal through the multi-channel driving circuit. The multi-channel driving circuit determines whether to output an auxiliary output signal according to activation or deactivation of the received enabling signal, and forms a driving voltage signal for driving a power device according to the main output signal or the auxiliary output signal.

2. The power device driving method according to claim 1, characterized in that: The auxiliary output signal follows the driving signal, and a waveform of the auxiliary output signal is substantially the same as a waveform of the main output signal.

3. The power device driving method according to claim 1 or 2, characterized in that: The main driving signal is divided into multiple inputs, one of which is processed and amplified to form a main output signal, and the remaining ones are processed and amplified together with the enable signals respectively. When the enable signal is activated, the auxiliary output signal is output, and the auxiliary output signal is superimposed with the main output signal to form the driving voltage signal.

4. The power device driving method according to claim 1 or 2, characterized in that: The main driving signal is divided into multiple inputs, one of which is processed and amplified to form a main output signal, and the main output signal is sent to the first driving impedance network in the multi-channel driving circuit to control the operation of the first driving impedance network. The remaining channels are processed and amplified together with the enable signals, and the auxiliary output signals are output when the enable signals are activated. The auxiliary output signals are sent to the second driving impedance networks in the multi-channel driving circuit, and the auxiliary output signals control the second driving impedance networks to work together with the first driving impedance network to control and adjust the driving voltage signal for driving the power device.

5. The power device driving method according to claim 4, characterized in that: The multi-channel driving circuit includes at least one second driving impedance network, and the current flow direction of at least one of the at least one driving impedance network is unidirectional conduction, and the conduction direction is that the output end of the driving impedance network points to the input end or the input end of the driving impedance network points to the output end.

6. The power device driving method according to claim 1, characterized in that: When the enable signal is disabled, a high impedance state is established between the input end of each enable signal and the output end of the drive voltage of the multi-channel drive circuit.

7. The power device driving method according to claim 1, characterized in that: It includes at least one first auxiliary output signal for controlling the turn-on rate of the power device and at least one second auxiliary output signal for controlling the turn-off rate of the power device, and determines whether to output the first auxiliary output signal or the second auxiliary output signal according to the selection input of each enable signal.

8. The power device driving method according to claim 1 or 7, characterized in that: At least two enable signals among the enable signals are combined, and the at least two enable signals are combined to jointly perform enable control.

9. A power device driving circuit, characterized in that: It comprises a multi-channel driving circuit, wherein the input end of the multi-channel driving circuit is used to receive a driving signal, and the multi-channel driving circuit has at least two output ends; Wherein, the multi-channel driving circuit includes a main driving circuit and at least one auxiliary driving circuit, the driving signal includes a main driving signal and at least one enabling signal, the main driving signal is divided into at least two channels, and is respectively input to the main driving circuit and each auxiliary driving circuit, the main driving signal forms a main output signal through the main driving circuit, each enabling signal is respectively input to each auxiliary driving circuit, each auxiliary driving circuit is enabled or disabled according to the activation or disabling of the received enabling signal, and the enabling signal is activated so that the auxiliary driving circuit is enabled to form an auxiliary output signal; A driving voltage signal for driving a power device is formed according to the main output signal or the auxiliary output signal.

10. The power device driving circuit according to claim 9, characterized in that: The main driving circuit includes a main driving logic circuit and a main driving amplifier circuit, and the main driving signal is processed and amplified by the main driving logic circuit and the main driving amplifier circuit to form a main output signal; Optionally, the main driving circuit is further provided with an isolation circuit, and the isolation circuit is arranged between the main driving logic circuit and the main driving amplifier circuit, or inside the main driving logic circuit, or in the front stage of the main driving logic circuit.

11. The power device driving circuit according to claim 9, characterized in that: The auxiliary driving circuit comprises an auxiliary driving logic circuit and an auxiliary driving amplifier circuit, the main driving signal and the enable signal are connected to the input end of the auxiliary driving logic circuit, the output end of the auxiliary driving logic circuit is connected to the auxiliary driving amplifier circuit, and the output end of the auxiliary driving amplifier circuit outputs the auxiliary output signal when the enable signal is activated; Optionally, the auxiliary driving circuit is further provided with an isolation circuit, and the isolation circuit is arranged between the auxiliary driving logic circuit and the auxiliary driving amplifier circuit, or inside the auxiliary driving logic circuit, or at a front stage of the auxiliary driving logic circuit.

12. The power device driving circuit according to claim 11, characterized in that: The auxiliary driving logic circuit includes a logic gate device or a three-state buffer device, the enable signal and the main driving signal are connected to the input end of the logic gate device or the three-state buffer device, and the output end of the logic gate device or the three-state buffer device outputs the auxiliary output signal when the enable signal is activated; The auxiliary output signal follows the driving signal, and a waveform of the auxiliary output signal is substantially the same as a waveform of the main output signal.

13. The power device driving circuit according to claim 9, characterized in that: The main driving circuit includes a first driving impedance network, and each of the auxiliary driving circuits includes a second driving impedance network. The main output signal is sent to the first driving impedance network and is used to control the operation of the first driving impedance network. Each of the auxiliary output signals is sent to each of the second driving impedance networks. Each of the auxiliary output signals controls the second driving impedance network to work together with the first driving impedance network to control and adjust the driving voltage signal for driving the power device.

14. The power device driving circuit according to claim 13, characterized in that: The main driving circuit includes a first upper driving switch, a first lower driving switch, and a first driving impedance network. Wherein, a first end of a circuit formed by connecting the first upper drive switch and the first lower drive switch in series is connected to a power supply VCC terminal, and a second end is grounded; A first end of the first driving impedance network is connected to a midpoint between the first upper driving switch and the first lower driving switch, and a second end is connected to a control electrode of a power device; The main output signal is divided into two paths, which are respectively connected to the first upper drive switch and the first lower drive switch to control the on and off of the two; Optionally, a voltage stabilizing unit is connected in parallel at both ends of a circuit formed by the first upper driving switch and the first lower driving switch being connected in series.

15. The power device driving circuit according to claim 14, characterized in that: The auxiliary driving circuit includes a second upper driving switch and a second driving impedance network, wherein the first end of the second upper driving switch is connected to the power supply VCC end, and the second end is connected to the first end of the second driving impedance network, the second end of the second driving impedance network is connected to the second end of the first driving impedance network and then connected to the control electrode of the power device, and the auxiliary output signal is connected to the second upper driving switch to control its on and off.

16. The power device driving circuit according to claim 15, characterized in that: A unidirectional conducting device is provided in the second driving impedance network, and the unidirectional conducting direction of current is from the first end to the second end of the second driving impedance.

17. The power device driving circuit according to any one of claims 13 to 16, characterized in that: The auxiliary driving circuit includes a second lower driving switch, a first end of the second lower driving switch is grounded, a second end of the second lower driving switch is connected to a second end of the second upper driving switch, and the auxiliary output signal is divided into two paths, which are respectively connected to the second upper driving switch and the second lower driving switch to control the on and off of the two. The first end of the second upper driving switch is connected to the high level signal, and the second end is connected to the first end of the second driving impedance. The second end of the second driving impedance is connected to the second end of the first driving impedance and then connected to the control electrode of the power device. The auxiliary output signal is connected to the second upper driving switch and controls its on and off.

18. The power device driving circuit according to claim 17, characterized in that: A unidirectional conducting device is provided in the second driving impedance network, and the unidirectional current flow direction is from the second end of the second driving impedance to the first end.

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