A radio frequency signal phase shifting network

Abstract

The application relates to the field of radio frequency microwave technology and provides a radio frequency signal phase-shifting network, which comprises a substrate, the substrate is provided with a first transistor, a second transistor, a third transistor, a fourth transistor, a first radio frequency component, a second radio frequency component and a third radio frequency component; wherein one end of the second radio frequency component is connected with the drain of the first transistor, one end of the first radio frequency component is connected with the source of the first transistor, the other end of the second radio frequency component is connected with the drain of the second transistor, one end of the third radio frequency component is connected with the source of the second transistor, the drain of the third transistor and the drain of the fourth transistor are connected with the other end of the first radio frequency component, the other end of the third radio frequency component is also connected with the drain of the fourth transistor, and the source of the third transistor and the source of the fourth transistor are connected with the ground. The application can effectively improve the port matching performance of the phase-shifting circuit and reduce the insertion loss.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency microwave technology, and in particular to a radio frequency signal phase shift network. BACKGROUND

[0002] A phase shifter is a device commonly used in the field of radio frequency and microwave, mainly used for controlling the phase change of radio frequency signals. It usually uses switches to control the signal through different paths to achieve different phase shifts. Phase shifters are widely used in phased array antenna systems, such as satellite communication and radar detection. By precisely controlling the phase difference of each TR component in the phased array antenna system, the electromagnetic beam of the entire array can form a specific direction and shape in space, thereby achieving accurate tracking and positioning of the target, to improve the performance and reliability of the wireless communication system.

[0003] The existing phase shifter network usually uses a single transistor as a switch, so it is difficult to compromise the insertion loss and parasitic capacitance of the transistor, and it occupies a large area. Parasitic capacitance will affect the port matching performance between ports. When the size of the transistor is selected to be large, although the on-resistance is reduced and the insertion loss is improved, the parasitic capacitance is increased and the port matching performance is deteriorated; when the size of the transistor is selected to be small, although the parasitic capacitance is reduced and the port matching performance between paths is improved, the on-resistance is increased, which will lead to an increase in insertion loss. SUMMARY

[0004] The present application aims to at least solve one of the technical problems existing in the related art. To this end, the present application provides a radio frequency signal phase shift network, which realizes the reduction of insertion loss and the improvement of port matching performance.

[0005] The present application provides a radio frequency signal phase shift network, comprising a substrate, the substrate is provided with a single-stage phase shift network, the single-stage phase shift network comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first radio frequency component, a second radio frequency component and a third radio frequency component; wherein the drain of the first transistor and one end of the second radio frequency component are connected, the source of the first transistor and one end of the first radio frequency component are connected, the drain of the second transistor and the other end of the second radio frequency component are connected, the source of the second transistor and one end of the third radio frequency component are connected, the drain of the third transistor and the other end of the first radio frequency component and the drain of the fourth transistor are connected, the drain of the fourth transistor is also connected to the other end of the third radio frequency component, and the source of the third transistor and the source of the fourth transistor are connected and grounded.

[0006] According to the application, a radio frequency signal phase shift network is provided, wherein the gate of the first transistor is connected to the drain of the first transistor, the gate of the second transistor is connected to the drain of the second transistor, the gate of the third transistor is connected to the drain of the third transistor, and the gate of the fourth transistor is connected to the drain of the fourth transistor.

[0007] According to the application, a radio frequency signal phase shift network is provided, wherein the substrate is provided with a control port, and the control port is connected to the drain of the first transistor and one end of the second radio frequency component.

[0008] According to the application, a radio frequency signal phase shift network is provided, wherein the substrate is provided with a parasitic tuning network, and the parasitic tuning network comprises a first tuning inductor, a second tuning inductor and a tuning capacitor; wherein one end of the first tuning inductor is connected to the drain of the first transistor and one end of an external circuit, the other end of the first tuning inductor is connected to one end of the tuning capacitor, one end of the second tuning inductor is connected to the other end of the tuning capacitor and the other end of the external circuit, and the other end of the second tuning inductor is connected to the source of the first transistor.

[0009] According to the application, a radio frequency signal phase shift network is provided, wherein the substrate is provided with a current limiting network, and the current limiting network comprises a current limiting resistor and a current limiting capacitor; wherein one end of the current limiting resistor is connected to one end of the current limiting capacitor, one end of the current limiting resistor is also connected to the source of the third transistor and the source of the fourth transistor, and the other end of the current limiting resistor is connected to the other end of the current limiting capacitor and then grounded.

[0010] According to the application, a radio frequency signal phase shift network is provided, wherein the substrate is provided with a first isolation resistor, a second isolation resistor, a third isolation resistor, a fourth isolation resistor and a control port; wherein one end of the first isolation resistor is connected to the gate of the first transistor, one end of the second isolation resistor is connected to the gate of the second transistor, the other end of the first isolation resistor and the other end of the second isolation resistor are connected to the control port, one end of the third isolation resistor is connected to the gate of the third transistor, one end of the fourth isolation resistor is connected to the gate of the fourth transistor, and the other end of the third isolation resistor and the other end of the fourth isolation resistor are connected to the control port.

[0011] According to the application, a radio frequency signal phase shift network is provided, the base is provided with a secondary phase shift network connected with a single stage phase shift network, the secondary phase shift network comprises a sub stage phase shift network, the sub stage phase shift network comprises a sub first radio frequency component, a sub second radio frequency component, a sub first transistor, a sub second transistor and a sub output port; wherein the drain of the sub first transistor, one end of the sub first radio frequency component and the gate of the sub first transistor are connected, the source of the sub first transistor and the other end of the sub second radio frequency component and the sub output port are connected; the drain of the sub second transistor, the other end of the sub second radio frequency component and the gate of the sub second transistor are connected, and the source of the sub second transistor is grounded.

[0012] According to the application, a radio frequency signal phase shift network is provided, the secondary phase shift network comprises a sub stage phase shift network, wherein the other end of the sub first radio frequency component and the drain of the sub second transistor are connected with the drain of the second transistor and the drain of the fourth transistor in sequence respectively.

[0013] According to the application, a radio frequency signal phase shift network is provided, the secondary phase shift network comprises a plurality of sub stage phase shift networks connected in series, wherein the other end of the sub first radio frequency component and the drain of the sub second transistor of the sub stage phase shift network closest to the single stage phase shift network are connected with the drain of the second transistor and the drain of the fourth transistor in sequence respectively, the other end of the sub first radio frequency component and the drain of the sub second transistor of the sub stage phase shift network farthest from the single stage phase shift network in the secondary phase shift network are connected with the drain of the sub first transistor and the drain of the sub second transistor of the adjacent sub stage phase shift network in sequence, and the other end of the sub first radio frequency component and the drain of the sub second transistor of the two adjacent sub stage phase shift networks farthest from the single stage phase shift network are connected with the drain of the sub first transistor and the drain of the sub second transistor of the sub stage phase shift network closest to the single stage phase shift network in sequence.

[0014] The above one or more technical solutions in the embodiments of the application have at least one of the following technical effects:

[0015] The application provides a radio frequency signal phase shift network, which reduces the number of cascaded transistors in the signal path, effectively reduces the input loss of the signal, thereby improving the working efficiency of the phased array antenna system, and improving the detection accuracy and signal-to-noise ratio of the array.

[0016] Additional aspects and advantages of the application will be made apparent by the following description. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to make the technical solutions in the present application or prior art clearer, the accompanying drawings needed in the embodiments or prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort based on these drawings.

[0018] Figure 1 Figure 1 is a structural schematic diagram of a single-stage phase shift network of a radio frequency signal phase shift network provided by the present application.

[0019] Figure 2 Figure 2 is a structural schematic diagram of a parasitic tuning network of a radio frequency signal phase shift network provided by the present application.

[0020] Figure 3 Figure 3 is a structural schematic diagram of a single-stage phase shift network with a current limiting network of a radio frequency signal phase shift network provided by the present application.

[0021] Figure 4 Figure 4 is a structural schematic diagram of a single-stage phase shift network with an isolation resistor of a radio frequency signal phase shift network provided by the present application.

[0022] Figure 5 Figure 5 is a structural schematic diagram of a single-stage phase shift network with a secondary phase shift network of a radio frequency signal phase shift network provided by the present application.

[0023] Figure 6 Figure 6 is a simulation analog result diagram when the control signal of a radio frequency signal phase shift network provided by the present application is high.

[0024] Figure 7 Figure 7 is a simulation analog result diagram when the control signal of a radio frequency signal phase shift network provided by the present application is low.

[0025] Reference signs:

[0026] 11, first transistor; 12, second transistor; 13, third transistor; 14, fourth transistor; 15, sub first transistor; 16, sub second transistor; 21, first radio frequency component; 22, second radio frequency component; 23, third radio frequency component; 24, sub first radio frequency component; 25, sub second radio frequency component; 31, input port; 32, control port; 33, output port; 34, sub output port; 41, first isolation resistor; 42, second isolation resistor; 43, third isolation resistor; 44, fourth isolation resistor; 51, control port current limiting resistor; 52, current limiting resistor; 53, pull-down resistor; 61, choke inductance; 62, first tuning inductance; 63, second tuning inductance; 71, input DC blocking capacitor; 72, output DC blocking capacitor; 73, tuning capacitor; 74, current limiting capacitor; 75, sub DC blocking capacitor; 100, current limiting network; 200, secondary phase shift network; 300, sub level phase shift network. DETAILED DESCRIPTION

[0027] In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be clearly and completely described below. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application. The following embodiments are used to illustrate the present application, but cannot be used to limit the scope of the present application.

[0028] In the description of the embodiments of the present application, it should be noted that the terms "first", "second", "third" are only used for description purpose, and cannot be understood as indicating or implying relative importance.

[0029] In the description of the embodiments of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected", "connected" should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0030] In the description of the specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the specification and the features of the different embodiments or examples without contradiction.

[0031] Embodiment:

[0032] Referring to Figures 1 to 5 In the embodiment, a radio frequency signal phase shift network is provided.

[0033] A single-stage phase shift network is provided on the substrate, Figure 1 The structural diagram of the single-stage phase shift network. The single-stage phase shift network includes a first transistor 11, a second transistor 12, a third transistor 13, a fourth transistor 14, a first radio frequency component 21, a second radio frequency component 22 and a third radio frequency component 23. Wherein, the drain of the first transistor 11 and one end of the second radio frequency component 22 are connected, the source of the first transistor 11 and one end of the first radio frequency component 21 are connected, the drain of the second transistor 12 and the other end of the second radio frequency component 22 are connected, the source of the second transistor 12 and one end of the third radio frequency component 23 are connected, the drain of the third transistor 13 and the other end of the first radio frequency component 21 and the drain of the fourth transistor 14 are connected, the drain of the fourth transistor 14 is also connected with the other end of the third radio frequency component 23, and the source of the third transistor 13 and the source of the fourth transistor 14 are connected and grounded. Wherein, the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 are bipolar junction transistors or field effect transistors.

[0034] In an alternative embodiment, the gate of the first transistor 11 is connected to the drain of the first transistor 11, the gate of the second transistor 12 is connected to the drain of the second transistor 12, the gate of the third transistor 13 is connected to the drain of the third transistor 13, and the gate of the fourth transistor 14 is connected to the drain of the fourth transistor 14. The substrate is provided with a control port 32, and is further provided with a control port current-limiting resistor 51 and a choke inductor 61; wherein the control port 32, the control port current-limiting resistor 51 and the choke inductor 61 are connected in sequence, and the choke inductor 61 is connected to the drain of the first transistor 11 and one end of the second RF component 22, wherein the control port current-limiting resistor 51 and the choke inductor 61 can filter out interference in the control signal output by the control port 32, and here the control signal is a direct current signal.

[0035] In addition, the substrate is provided with an input port 31 and an output port 33, and is further provided with an input DC blocking capacitor 71 and an output DC blocking capacitor 72; wherein the input port 31 is connected to one end of the input DC blocking capacitor 71, the other end of the input DC blocking capacitor 71 is connected to the source of the first transistor 11 and one end of the first RF component 21, the output port 33 is connected to one end of the output DC blocking capacitor 72, and the other end of the output DC blocking capacitor 72 is connected to the source of the second transistor 12 and one end of the third RF component 23; the input DC blocking capacitor 71 and the output DC blocking capacitor 72 can filter out the direct current part in the input signal and the output signal, respectively.

[0036] Here, the electrical length of the first RF component 21 and the third RF component 23 can be , so that when the signal passes through the first RF component 21 or the third RF component 23, a phase shift of 90° occurs. The electrical length of the second RF component 22 can be set according to the requirement for the phase of the output signal. The control port 32 controls the opening and closing of the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 by controlling the level of the gate of the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14, and when the control signal output by the control port 32 is at a high level, the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 are turned on.

[0037] When the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 are all in the on state, the relationship between the resistance and the capacitive reactance of the transistor when it is turned on is simplified as the parallel connection of the resistance and the parasitic capacitance of the transistor when it is turned on, and it can be analyzed that the capacitive reactance of the parasitic capacitance of the transistor when it is turned on has a small influence on the impedance, and therefore has a small influence on the port matching performance between the input port 31 and the output port 33.

[0038] When the third transistor 13 and the fourth transistor 14 are turned on, the first RF component 21 and the third RF component 23 are also in the ground state, and the first RF component 21 and the third RF component 23 are in the high impedance state due to the impedance transformation characteristics of the first RF component 21 and the third RF component 23. The input signal input through the input port 31 passes through the low impedance path, i.e., the first transistor 11, the second RF component 22 and the second transistor 12, and reaches the output port 33, and the second RF component 22 phase shifts the input signal. Since the input signal is a high-frequency signal in the RF system, the input signal is not limited by the directionality of the first transistor 11 and the second transistor 12, and can be bidirectional, and the first transistor 11 and the second transistor 12 can filter out the DC interference and control signal in the input signal.

[0039] When the control port 32 outputs a low level, the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 are all in the off state. At this time, since the resistance of the transistor in the off state is large, the effect of the stray capacitance on the impedance is also large. For example, assuming that the stray capacitance is -j300Ω, the resistance of the transistor in the on state is 1Ω, and the resistance of the transistor in the off state is 1000Ω, the relationship between the resistance and the stray capacitance of the transistor in the off state is simplified as the parallel connection of the resistance and the stray capacitance of the transistor in the off state, and the impedance at this time can be calculated as 82.6-j275.2Ω. Similarly, the impedance of the transistor in the on state can be calculated as 1-j0.003Ω. It can be seen that the effect of the stray capacitance on the impedance of the transistor in the off state is significantly increased.

[0040] The stray capacitance has a great influence on the port matching performance between the input port 31 and the output port 33, i.e., the stray capacitance causes the impedance mismatch in the loop, reduces the return loss, and increases the noise of the signal. At this time, since the first RF component 21 and the third RF component 23 have the impedance transformation characteristics, the stray capacitance of the third transistor 13 and the fourth transistor 14 can be converted into the inductance. In this embodiment, according to the center frequency of the phase shift network, appropriate transistors and RF components are selected to make the stray capacitance of the first transistor 11 and the second transistor 12 equal to the inductance of the third transistor 13 and the fourth transistor 14 after conversion. Then, the resonance between the inductance of the third transistor 13 and the fourth transistor 14 and the stray capacitance of the first transistor 11 and the second transistor 12 has a principle similar to that of an LC resonant circuit, so that the impedance matching characteristics in the loop are further improved, and the port matching performance between the input port 31 and the output port 33 is improved. Since the effect of the stray capacitance on the impedance matching characteristics is reduced, the size of the transistor can also be appropriately increased, thereby reducing the insertion loss.

[0041] When the impedance of the first transistor 11 and the second transistor 12 is relatively large, and the impedance of the first RF component 21 and the third RF component 23 is low, the input signal input through the input port 31 will pass through the path with low impedance, i.e. the first RF component 21 and the third RF component 23, to the output port 33, and the first RF component 21 and the third RF component 23 will phase shift the input signal by 180°. Since the signal does not pass through the transistor at this time, the insertion loss of the signal can be reduced, and the improvement of the port matching performance can also reduce the insertion loss.

[0042] Further, the substrate is provided with a parasitic tuning network, Figure 2 The parasitic tuning network includes a first tuning inductor 62, a second tuning inductor 63 and a tuning capacitor 73. One end of the first tuning inductor 62 is connected to the drain of the first transistor 11 and one end of an external circuit, the other end of the first tuning inductor 62 is connected to one end of the tuning capacitor 73, one end of the second tuning inductor 63 is connected to the other end of the tuning capacitor 73 and the other end of the external circuit, and the other end of the second tuning inductor 63 is connected to the source of the first transistor 11. Here, the external circuit refers to the circuit structure of the rest of the RF signal phase shifting network connected to the parasitic tuning network and the first transistor 11. The parasitic tuning network can tune the parasitic of the transistor when it is turned off or turned on, thereby eliminating the influence of the frequency of the parasitic signal and improving the quality of the signal. The parasitic tuning network can also be connected to the second transistor 12, the third transistor 13 and the fourth transistor 14 in the same way.

[0043] Further, the substrate is provided with a current limiting network 100, Figure 3 The current limiting network 100 includes a current limiting resistor 52 and a current limiting capacitor 74. One end of the current limiting resistor 52 is connected to one end of the current limiting capacitor 74, and the other end of the current limiting resistor 52 is connected to the source of the third transistor 13 and the source of the fourth transistor 14. The current limiting resistor 52 is connected to the other end of the current limiting capacitor 74 and then grounded. The current limiting network can limit the size of the current in the RF signal phase shifting network to prevent damage to the components in the circuit due to excessive current, and the current limiting capacitor 74 is used to form an AC ground.

[0044] In an alternative embodiment, the substrate is provided with a first isolation resistor 41, a second isolation resistor 42, a third isolation resistor 43, a fourth isolation resistor 44 and a control port 32. Figure 4The structure diagram of the single-stage phase shift network with isolation resistors. Wherein, one end of the first isolation resistor 41 is connected with the gate of the first transistor 11, one end of the second isolation resistor 42 is connected with the gate of the second transistor 12, the other end of the first isolation resistor 41 and the other end of the second isolation resistor 42 are connected with the control port 32, one end of the third isolation resistor 43 is connected with the gate of the third transistor 13, one end of the fourth isolation resistor 44 is connected with the gate of the fourth transistor 14, the other end of the third isolation resistor 43 and the other end of the fourth isolation resistor 44 are connected with the control port 32.

[0045] When the control port 32 outputs high level, the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 are turned on, at this time, the first RF component 21 and the third RF component 23 are in high impedance state, thus the input signal input through the input port 31 will pass through the path with low impedance, i.e. the first transistor 11, the second RF component 22 and the second transistor 12, to reach the output port 33, and the second RF component 22 performs phase shift on the input signal. When the control port 32 outputs low level, the first transistor 11, the second transistor 12, the third transistor 13 and the fourth transistor 14 are all in off state, the input signal input through the input port 31 passes through the first RF component 21 and the third RF component 23 to reach the output port 33, and the first RF component 21 and the third RF component 23 perform 180° phase shift on the input signal. Since the signal does not pass through the transistor at this time, the insertion loss of the signal can be reduced, and the improvement of the port matching performance can also reduce the insertion loss.

[0046] The phase shift of the signal through the path of the first RF component 21 and the third RF component 23 can make the signal not pass through the transistor during the 180° phase shift, thereby reducing the loss of the signal; at the same time, the resonance between the capacitive reactance of the first transistor 11 and the second transistor 12 and the inductive reactance of the third transistor 13 and the fourth transistor 14 can also improve the port matching performance between the input port 31 and the output port 33. The first isolation resistor 41, the second isolation resistor 42, the third isolation resistor 43 and the fourth isolation resistor 44 can avoid mutual interference between signals and improve the anti-interference ability of the RF signal phase shift network. The substrate is also provided with a pull-down resistor 53, wherein one end of the pull-down resistor 53 is connected with the drain of the fourth transistor 14 and the drain of the third transistor 13, and the other end of the pull-down resistor 53 is grounded; the pull-down resistor 53 can improve the anti-interference ability of the RF signal phase shift network.

[0047] Further, the substrate is provided with a secondary phase shift network 200 connected with the single-stage phase shift network, Figure 5The structure diagram of the single-stage phase shift network with the secondary phase shift network is shown in FIG. 1. The secondary phase shift network 200 includes one sub-stage phase shift network 300, and can also include a plurality of sub-stage phase shift networks 300 connected in series. The sub-stage phase shift network 300 includes a sub-first radio frequency component 24, a sub-second radio frequency component 25, a sub-first transistor 15, a sub-second transistor 16, and a sub-output port 34. The drain of the sub-first transistor 15 is connected to one end of the sub-first radio frequency component 24 and the gate of the sub-first transistor 15. The source of the sub-first transistor 15 is connected to one end of the sub-second radio frequency component 25 and the sub-output port 34. The drain of the sub-second transistor 16 is connected to the other end of the sub-second radio frequency component 25 and the gate of the sub-second transistor 16. The source of the sub-second transistor 16 is grounded. The sub-stage phase shift network 300 can further include a sub-direct current blocking capacitor 75. One end of the sub-direct current blocking capacitor 75 is connected to the source of the sub-first transistor 15 and one end of the sub-second radio frequency component 25. The other end of the sub-direct current blocking capacitor 75 is connected to the sub-output port 34.

[0048] Further, in the secondary phase shift network 200, when the sub-stage phase shift network 300 is included, the other end of the sub-first radio frequency component 24 and the drain of the sub-second transistor 16 are sequentially connected to the drain of the second transistor 12 and the drain of the fourth transistor 14, respectively.

[0049] Further, in the secondary phase shift network 200, when a plurality of sub-stage phase shift networks 300 connected in series are included, the other end of the sub-first radio frequency component 24 and the drain of the sub-second transistor 16 of the sub-stage phase shift network 300 closest to the single-stage phase shift network are sequentially connected to the drain of the second transistor 12 and the drain of the fourth transistor 14, respectively. The other end of the sub-first radio frequency component 24 and the drain of the sub-second transistor 16 of the sub-stage phase shift network 300 farthest from the single-stage phase shift network are sequentially connected to the drain of the sub-first transistor 15 and the drain of the sub-second transistor 16 of the adjacent sub-stage phase shift network 300. In the two adjacent sub-stage phase shift networks 300, the other end of the sub-first radio frequency component 24 and the drain of the sub-second transistor 16 farthest from the single-stage phase shift network are sequentially connected to the drain of the sub-first transistor 15 and the drain of the sub-second transistor 16 of the sub-stage phase shift network closest to the single-stage phase shift network.

[0050] The electrical length of the sub-first radio frequency component 24 can be set according to the requirement for the phase of the output signal. The electrical length of the sub-second radio frequency component 25 can be , so that when the signal through the second sub-radio frequency device 25, will occur 90° phase shift. Control port 32 can also be controlled by controlling the gate of the first sub-transistor 15 and the second sub-transistor 16 level to control the first sub-transistor 15 and the second sub-transistor 16, and when the control port 32 output high level, the first sub-transistor 15 and the second sub-transistor 16 are turned on, when the first sub-transistor 15 and the second sub-transistor 16 are in the on state, the second sub-radio frequency device 25 is in a high impedance state, at this time through the first transistor 11, the second radio frequency device 22 into the sub-level phase shift network 300 signal through the first sub-radio frequency device 24 and the first sub-transistor 15 to the sub-output port 34, the first sub-radio frequency device 24 to the signal into the sub-level phase shift network 300 phase shift.

[0051] When the control port 32 output low level, the first sub-transistor 15 and the second sub-transistor 16 are closed, because the impedance of the first sub-transistor 15 is relatively large, so that the signal into the sub-level phase shift network 300 through the first radio frequency device 21 through the second sub-radio frequency device 25 to the sub-output port 34, the second sub-radio frequency device 25 to the signal into the sub-level phase shift network 300 90° phase shift, and because in the single stage phase shift network the first radio frequency device 21 has been on the input signal 90° phase shift, therefore the output signal of the sub-output port 34 relative to the input signal occurs 180° phase shift. Sub-level phase shift network 300 can be adjusted by adjusting the number of secondary phase shift network 200 and the electrical length of the first sub-radio frequency device 24, flexible setting the phase change degree of the output signal of the sub-output port 34, each sub-output port 34 of the secondary phase shift network 200 has good port matching performance.

[0052] Further, the first radio frequency device 21, the second radio frequency device 22, the third radio frequency device 23, the first sub-radio frequency device 24, the second sub-radio frequency device 25 can be realized by distributed parameter elements or lumped parameter elements, the distributed parameter elements include microstrip line, strip line, waveguide, coplanar waveguide, slot line, fin line, suspended strip line, optical waveguide and other distributed parameter elements, the lumped parameter elements include high pass π type network, low pass π type network, high pass L type network, low pass L type network, T coil and any combination of the above network cascade network and other lumped parameter network.

[0053] The present invention also simulates an RF signal phase-shifting network, wherein the RF signal phase-shifting network is constructed based on a 45nm SOI process. The first transistor 11, the second transistor 12, the third transistor 13, and the fourth transistor 14 are NMOS devices with a size of 100μm / 40nm and a gate control voltage of 1.2V. The first RF component 21 and the third RF component 23 use T-coils, and the coupling coefficient of the inductance in the T-coil is 0.67, the inductance value is 158.8pH, and the capacitance value is 177.2fF. The second RF component 22 is composed of two T-coils with the same parameters as the first RF component 21 connected in series. The resistance values ​​of the first isolation resistor 41, the second isolation resistor 42, the third isolation resistor 43, and the fourth isolation resistor 44 are all 10kΩ, and the center frequency is set to 30GHz.

[0054] Figure 6 The simulation results of the traditional phase shift network and the present invention when the control signal is high are shown in FIG. Here, the input loss is represented by S parameters, where the absolute value of S11 |S11| is the return loss and the absolute value of S21 |S21| is the insertion loss. Figure 6 It can be seen that when the control signal is at a high level, that is, 1.2V, at the center frequency, if a traditional phase shift network using traditional technology is used, the signal insertion loss is 1.8dB and the return loss is 8.6dB, while the insertion loss of a RF signal phase shift network provided by the present invention is 1.5dB and the return loss is 21.7dB. Figure 7 The simulation results of the traditional phase shift network and the present invention when the control signal is low level are shown. Here, the input loss is represented by S parameters, the absolute value of S11 |S11| is the return loss, and the absolute value of S21 |S21| is the insertion loss. Figure 7 It can be seen that when the control signal is at a low level, i.e., 0V, a conventional phase-shifting network using conventional technology has an insertion loss of 2.2dB and a return loss of 9.0dB at the center frequency. However, the RF signal phase-shifting network provided by the present invention has an insertion loss of 0.8dB and a return loss of 36.8dB. The above simulation data shows that the RF signal phase-shifting network provided by the present invention has higher return loss and lower insertion loss.

[0055] In summary, the radio frequency signal phase shift network provided by the present invention can effectively improve the port matching performance of the phase shift network, and can also effectively reduce the insertion loss of the signal.

[0056] It should be pointed out finally that the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit the same; and although the present application has been described in detail with reference to the foregoing embodiments, it should be appreciated by those skilled in the art that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features thereof can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A radio frequency signal phase shifting network, characterized by, The application relates to a phase shifter, which comprises a substrate provided with a single-stage phase shifter network, the single-stage phase shifter network comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a first radio frequency component, a second radio frequency component and a third radio frequency component; wherein the drain of the first transistor is connected with one end of the second radio frequency component, the source of the first transistor is connected with one end of the first radio frequency component and is the input end of a signal, the drain of the second transistor is connected with the other end of the second radio frequency component, the source of the second transistor is connected with one end of the third radio frequency component and is the output end of the signal, the drain of the third transistor is connected with the other end of the first radio frequency component and the drain of the fourth transistor, the drain of the fourth transistor is also connected with the other end of the third radio frequency component, and the source of the third transistor is connected with the source of the fourth transistor and is grounded.

2. A radio frequency signal phase shifting network according to claim 1, wherein, The gate of the first transistor is connected with the drain of the first transistor, the gate of the second transistor is connected with the drain of the second transistor, the gate of the third transistor is connected with the drain of the third transistor, and the gate of the fourth transistor is connected with the drain of the fourth transistor.

3. A radio frequency signal phase shifting network according to claim 2, wherein, The substrate is provided with a control port, the control port is connected with the drain of the first transistor and one end of the second radio frequency component.

4. A radio frequency signal phase shifting network according to claim 1, wherein, The substrate is provided with a parasitic tuning network, the parasitic tuning network comprising a first tuning inductor, a second tuning inductor and a tuning capacitor; wherein one end of the first tuning inductor is connected with the drain of the first transistor and one end of an external circuit, the other end of the first tuning inductor is connected with one end of the tuning capacitor, one end of the second tuning inductor is connected with the other end of the tuning capacitor and the other end of the external circuit, and the other end of the second tuning inductor is connected with the source of the first transistor.

5. A radio frequency signal phase shifting network according to claim 1, wherein, The substrate is provided with a current limiting network, the current limiting network comprising a current limiting resistor and a current limiting capacitor; wherein one end of the current limiting resistor is connected with one end of the current limiting capacitor and the source of the third transistor and the source of the fourth transistor, and the other end of the current limiting resistor is connected with the other end of the current limiting capacitor and is grounded.

6. A radio frequency signal phase shifting network according to claim 1, wherein, The substrate is provided with a first isolation resistor, a second isolation resistor, a third isolation resistor, a fourth isolation resistor and a control port; wherein one end of the first isolation resistor is connected with the gate of the first transistor, one end of the second isolation resistor is connected with the gate of the second transistor, the other end of the first isolation resistor is connected with the other end of the second isolation resistor and the control port, one end of the third isolation resistor is connected with the gate of the third transistor, one end of the fourth isolation resistor is connected with the gate of the fourth transistor, and the other end of the third isolation resistor is connected with the other end of the fourth isolation resistor and the control port.

7. A radio frequency signal phase shifting network according to claim 2, wherein, The base is provided with a secondary phase shift network connected with the single-stage phase shift network, the secondary phase shift network comprises a sub-stage phase shift network, the sub-stage phase shift network comprises a sub-first radio frequency component, a sub-second radio frequency component, a sub-first transistor, a sub-second transistor and a sub-output port; wherein the drain of the sub-first transistor, one end of the sub-first radio frequency component and the gate of the sub-first transistor are connected, the source of the sub-first transistor and the other end of the sub-second radio frequency component and the sub-output port are connected; the drain of the sub-second transistor, the other end of the sub-second radio frequency component and the gate of the sub-second transistor are connected, and the source of the sub-second transistor is grounded.

8. A radio frequency signal phase shifting network according to claim 7, wherein, The secondary phase shift network comprises a sub-stage phase shift network, wherein the other end of the sub-first radio frequency component and the drain of the sub-second transistor are connected with the drain of the second transistor and the drain of the fourth transistor in sequence respectively.

9. A radio frequency signal phase shifting network according to claim 7, wherein, The secondary phase shift network comprises a plurality of sub-stage phase shift networks connected in series, wherein the other end of the sub-first radio frequency component and the drain of the sub-second transistor of the sub-stage phase shift network closest to the single-stage phase shift network are connected with the drain of the second transistor and the drain of the fourth transistor in sequence respectively, the other end of the sub-first radio frequency component and the drain of the sub-second transistor of the sub-stage phase shift network farthest from the single-stage phase shift network in the secondary phase shift network are connected with the drain of the sub-first transistor and the drain of the sub-second transistor of the adjacent sub-stage phase shift network in sequence respectively; in the two adjacent sub-stage phase shift networks, the other end of the sub-first radio frequency component and the drain of the sub-second transistor farthest from the single-stage phase shift network are connected with the drain of the sub-first transistor and the drain of the sub-second transistor of the sub-stage phase shift network closest to the single-stage phase shift network in sequence respectively.

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