Successive approximation type ADC capacitor mismatch calibration method

Abstract

The invention discloses a successive approximation type ADC capacitor mismatch calibration method, and belongs to the technical field of integrated circuits, and the method comprises the steps: setting an initial value of each capacitor weight in a to-be-calibrated ADC, inputting a preset type of input signal to the to-be-calibrated ADC, collecting an output code word of the to-be-calibrated ADC, and drawing an actual curve of the output code word; selecting a corresponding probability density function according to the type of the input signal, and drawing a function curve of the probability density function as an ideal curve of an output code word; and iteratively updating each capacitor weight, finding the capacitor weight which enables the actual curve and the ideal curve to be closest to each other as the optimal capacitor weight, and completing capacitor mismatch calibration. According to the invention, the calibration of all capacitor weights can be realized without introducing an additional analog-to-digital converter, adding a disturbance signal and matching an analog circuit.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a successive approximation ADC capacitance mismatch calibration method. Background Art

[0002] With the continuous development of integrated circuits, analog to digital converters (ADCs) are gradually developing towards high speed, high precision and low power consumption. Successive approximation register (SAR) ADCs are widely used in 5G and WIFI6 / 7 wireless communication fields due to their simple structure, low power consumption and good robustness. However, due to the influence of manufacturing process errors, problems such as capacitor mismatch occur, which greatly affects the performance of SAR ADCs.

[0003] In order to eliminate the impact of capacitor mismatch, calibration technology can be used. The first method is a mixed digital-analog self-calibration method, which first quantifies the capacitor mismatch, then compensates the mismatch error through the auxiliary capacitor DAC during the analog-to-digital conversion process, and adjusts the capacitor value to the design value. The second method is a purely digital calibration method, which realizes the capacitor calibration function by digitally estimating the capacitor mismatch and then correcting the capacitor weight in the digital domain.

[0004] However, the mixed analog-digital method requires the coordination of calibration circuits and timing circuits, which increases the complexity of circuit design and chip area. The pure digital calibration method has problems such as large data volume and slow iteration speed. Summary of the invention

[0005] The present invention provides a successive approximation ADC capacitor mismatch calibration method to solve the technical problems that the prior art requires the coordination of a calibration circuit and a timing circuit, which increases the complexity of circuit design and the chip area, as well as the prior art's large data volume and slow iteration speed.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] In one aspect, the present invention provides a method for calibrating capacitance mismatch of a successive approximation ADC, comprising:

[0008] Setting the initial value of each capacitor weight in the analog-to-digital converter ADC to be calibrated, inputting a preset type of input signal to the ADC to be calibrated, collecting the output codeword of the ADC to be calibrated, and drawing an actual curve of the output codeword;

[0009] According to the type of input signal, a corresponding probability density function is selected, and a curve corresponding to the probability density function is drawn as an ideal curve of the output codeword of the ADC to be calibrated;

[0010] Based on the initial value of each capacitor weight, each capacitor weight is iteratively updated with a preset weight change step, and the actual curve is redrawn after each iterative update of each capacitor weight, and the capacitor weight that makes the actual curve closest to the ideal curve is found as the optimal capacitor weight to complete the capacitor mismatch calibration.

[0011] Further, the collecting the output codeword of the ADC to be calibrated includes:

[0012] The output codewords of the ADC to be calibrated are collected through a logic analyzer or FPGA.

[0013] Furthermore, the process of drawing the actual curve of the output codeword includes:

[0014] Multiply each output codeword by the corresponding capacitor weight and calculate the weighted sum D out , the formula is:

[0015]

[0016] Among them, d i represents the i-th output codeword; W i Indicates d i The corresponding capacitance weight; n represents the number of bits of capacitance;

[0017] Right D out Perform histogram statistics to get the value D out Histograms of distribution characteristics;

[0018] The height of each bin in the histogram is obtained, and the data points corresponding to the heights of the bins in the histogram are used as discrete points for curve fitting, and the fitted curve is used as the actual curve of the output codeword.

[0019] Furthermore, the selecting a corresponding probability density function according to the type of the input signal includes:

[0020] When the input signal is a sinusoidal signal, the corresponding probability density function p(k) is:

[0021]

[0022] Among them, k represents the independent variable; C0 and C1 are both preset fitting parameters.

[0023] Furthermore, the selecting a corresponding probability density function according to the type of the input signal also includes:

[0024] When the input signal is a ramp or triangle wave signal, the corresponding probability density function p(k) is:

[0025] p(k)=C0k

[0026] Among them, k represents the independent variable; C0 is a preset fitting parameter.

[0027] Further, finding a capacitance weight that makes the actual curve closest to the ideal curve as the optimal capacitance weight includes:

[0028] The sum of square errors between the actual curve and the ideal curve is calculated; and a capacitance weight that minimizes the sum of square errors between the actual curve and the ideal curve is found as an optimal capacitance weight.

[0029] On the other hand, the present invention further provides an electronic device, comprising a processor and a memory; wherein the memory stores at least one instruction, and the instruction is loaded and executed by the processor to implement the above method.

[0030] In yet another aspect, the present invention further provides a computer-readable storage medium, wherein at least one instruction is stored in the storage medium, and the instruction is loaded and executed by a processor to implement the above method.

[0031] The beneficial effects brought about by the technical solution provided by the present invention include at least:

[0032] The present invention sets the initial value of each capacitor weight in the ADC to be calibrated, inputs a preset type of input signal to the ADC to be calibrated, collects the output codeword of the ADC to be calibrated, and draws the actual curve of the output codeword; selects the corresponding probability density function according to the type of the input signal, and draws the curve corresponding to the probability density function as the ideal curve of the output codeword of the ADC to be calibrated; based on the initial value of each capacitor weight, iteratively updates each capacitor weight with a preset weight change step, and redraws the actual curve after each iteration of updating each capacitor weight, and finds the capacitor weight that makes the actual curve closest to the ideal curve as the optimal capacitor weight. Therefore, there is no need to introduce an additional analog-to-digital converter, add a disturbance signal, or cooperate with an analog circuit, and the calibration of all capacitor weights can be achieved to obtain accurate capacitor weights. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0034] Figure 1 is a flow chart of a method for calibrating capacitance mismatch of a successive approximation ADC provided by an embodiment of the present invention;

[0035] Figure 2 is a statistical histogram of output codeword distribution corresponding to a sinusoidal input signal provided by an embodiment of the present invention;

[0036] Figure 3 is a statistical histogram of output codeword distribution corresponding to a harmonic or triangular wave input signal provided by an embodiment of the present invention;

[0037] Figure 4 It is a schematic diagram of SFDR results before and after 200 Monte Carlo calibrations with 0.5% capacitor mismatch provided in an embodiment of the present invention;

[0038] Figure 5 It is a schematic diagram of SNDR results before and after 200 Monte Carlo calibrations with 0.5% capacitor mismatch provided in an embodiment of the present invention;

[0039] Figure 6 It is a partial histogram before calibration by the calibration method with 0.5% capacitance mismatch provided by the embodiment of the present invention;

[0040] Figure 7 It is a partial histogram after calibration by the calibration method with 0.5% capacitance mismatch provided in the embodiment of the present invention;

[0041] Figure 8 It is a system block diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0042] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0043] First of all, it should be noted that in the embodiments of the present invention, words such as "exemplarily" and "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the word "exemplarily" is intended to present the concept in a concrete way. In addition, in the embodiments of the present invention, the meaning expressed by "and / or" can be both, or it can be either of the two.

[0044] First embodiment

[0045] This embodiment provides a successive approximation ADC capacitor mismatch calibration method to obtain accurate capacitor weights. Specifically, the execution process of the method is as follows: Figure 1 As shown, the following steps are included:

[0046] S1, setting the initial value of each capacitor weight in the ADC to be calibrated, inputting a preset type of input signal to the ADC to be calibrated, collecting the output codeword of the ADC to be calibrated, and drawing an actual curve of the output codeword;

[0047] It should be noted that the initial value of each capacitor weight can be set according to experience or relevant experimental data, and this embodiment does not specifically limit this. The input signal can be a sine wave signal, or a ramp wave or a triangle wave signal. The output codeword is obtained by collecting the output codeword of the ADC to be calibrated through a logic analyzer or FPGA. After collecting the output codeword, the actual curve of the output codeword is drawn as follows:

[0048] S11, SAR ADC output codewords d1, d2, d3…d n , and then with the corresponding weights W1, W2, W3…W n Multiply them together to get the weighted sum D out , the formula is:

[0049]

[0050] Among them, d i represents the i-th output codeword; W i Indicates d i The corresponding capacitance weight; n represents the number of bits of capacitance;

[0051] S12, to D out Perform histogram statistics to get the value D out Histograms of distribution characteristics;

[0052] S13, obtaining the height of each bin in the histogram, performing curve fitting using the data points corresponding to the heights of each bin in the histogram as discrete points, and using the fitted curve as the actual curve of the output codeword;

[0053] When the input signal is a sine wave signal, this embodiment performs out Perform histogram statistics to obtain bin[1], bin[2], bin[3]…bin[k], such as Figure 2 As shown, based on this, we can get the discrete points h(1), h(2), h(3)…h(k) representing the height of each bin, and use the discrete points to perform curve fitting to get the fitting function When the input signal is a ramp wave or a triangle wave signal, this embodiment performs D out Perform histogram statistics to obtain bin[1], bin[2], bin[3]…bin[k], such as Figure 3As shown, based on this, we can get the discrete points h(1), h(2), h(3)…h(k) representing the height of each bin, and use the discrete points to perform curve fitting to get the fitting function It should be noted that in the out When performing histogram statistics, we first need to determine D based on the effective number of bits of the ADC. out Then divide this value range into multiple intervals at equal intervals, and then count the D that falls into each interval out The number of samples, that is, each bin in the statistical histogram corresponds to a D in a certain interval. out The number of samples, as for the interval size, is based on the effective number of bits of the ADC and can be set based on experience. After obtaining the corresponding histogram, for each bin in the graph, the discrete point representing its height is the point with the middle value of the interval corresponding to the bin as the horizontal coordinate and the number of samples corresponding to the bin as the vertical coordinate.

[0054] S2, selecting a corresponding probability density function according to the type of the input signal, and drawing a curve corresponding to the probability density function as an ideal curve of the output codeword of the ADC to be calibrated;

[0055] Among them, when the input signal is a sine wave signal, its corresponding probability density function p(k) is:

[0056]

[0057] Wherein, k represents the independent variable; C0 and C1 are fitting parameters. These two values ​​are related to the effective number of ADC bits and can be set based on experience in practical applications.

[0058] When the input signal is a ramp or triangle wave signal, the corresponding probability density function p(k) is:

[0059] p(k)=C0k

[0060] Wherein, k represents the independent variable; C0 is the fitting parameter, which is related to the effective number of ADC bits and can be set based on experience in practical applications.

[0061] S3, based on the initial value of each capacitor weight, iteratively update each capacitor weight with a preset weight change step, and redraw the actual curve after each iterative update of each capacitor weight, find the capacitor weight that makes the actual curve closest to the ideal curve as the optimal capacitor weight, and complete the capacitor mismatch calibration;

[0062] Specifically, in this embodiment, the capacitance weights W1±Δ, W2±Δ, W3±Δ…W are continuously iterated. n ±Δ, where Δ is the weight change step size, so that the ideal function p(k) is consistent with the fitting function Error sum of squares The optimal weight is the weight that minimizes the sum of squares of the errors between the ideal function and the fitting function.

[0063] Furthermore, in order to illustrate the effectiveness and necessity of the present invention, a 12-bit SAR ADC circuit is constructed in this embodiment, and a 0.5% capacitor mismatch is added to simulate the error that may be caused in the actual process; Figure 4 The figure shows the SFDR results before and after 200 Monte Carlo calibrations (dark colors are before calibration, and light colors are after calibration) when a 0.5% capacitor mismatch is added in this embodiment; Figure 5 FIG. 4 shows a schematic diagram of the SNDR results before and after 200 Monte Carlo calibrations (dark colors are before calibration, and light colors are after calibration) when a 0.5% capacitor mismatch is added in this embodiment; FIG. 4 shows a schematic diagram of the SNDR results before and after 200 Monte Carlo calibrations (dark colors are before calibration, and light colors are after calibration); Figure 4 and Figure 5 As shown, it can be seen that after adding 0.5% capacitor mismatch, the performance of SAR ADC drops sharply; at the same time, the performance is greatly improved after calibration, the average SFDR (spurious free dynamic range) is increased from 61.43dB to 83.32dB, and the average SNDR (signal-to-noise and distortion ratio) is increased from 55.69dB to 71.63dB, which proves the effectiveness of the calibration method provided by the present invention.

[0064] Figure 6 The figure shows a partial histogram (bin[8]-bin

[26] ) before calibration by the calibration method with 0.5% capacitance mismatch added in this embodiment; Figure 7 FIG. 1 shows a partial histogram (bin[8]-bin

[26] ) after calibration by the calibration method with 0.5% capacitance mismatch added in this embodiment; FIG. 1 shows a partial histogram (bin[8]-bin

[26] ) after calibration by the calibration method; Figure 6 and Figure 7 As shown, it can be seen that after adding 0.5% capacitance mismatch, the discrete points and the curve fitting degree are low and scattered; at the same time, after calibration, the discrete points and the curve fitting degree are high and concentrated, which proves the necessity of the calibration method provided by the present invention.

[0065] Second embodiment

[0066] This embodiment provides an electronic device, such as Figure 8 As shown, the electronic device includes: a processor and a memory; wherein the processor and the memory can be connected via a communication bus; the memory stores at least one instruction, and the instruction is loaded and executed by the processor to implement the method of the first embodiment. In addition, the electronic device may also include a transceiver, the processor and the transceiver can be connected via a communication bus, and the transceiver is used to communicate with other devices.

[0067] Next, combine Figure 8The following is a detailed introduction to the various components of the electronic device:

[0068] Among them, the processor is the control center of the electronic device, and the electronic device may include multiple processors, each of which may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor here may be a processor or a general term for multiple processing elements. For example, the processor is one or more central processing units (CPUs), or other general-purpose processors, application specific integrated circuits (ASICs), or one or more integrated circuits configured to implement an embodiment of the present invention, such as one or more microprocessors (digital signal processors, DSPs), or one or more field programmable gate arrays (field programmable gate arrays, FPGAs), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor may execute various functions of the electronic device by running or executing software programs stored in the memory and calling data stored in the memory.

[0069] In a specific implementation, as an embodiment, the processor may include one or more CPUs, such as Figure 8 The CPU0 and CPU1 shown in the figure are, of course, only exemplary.

[0070] The memory is used to store the software program for executing the solution of the present invention, and the execution is controlled by the processor. The specific implementation method can refer to the above method embodiment and will not be repeated here.

[0071] Optionally, the memory may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may be integrated with the processor or exist independently and accessed through the interface circuit ( Figure 8 (not shown) is coupled to the processor, which is not specifically limited in this embodiment of the present invention.

[0072] The transceiver may include a receiver and a transmitter ( Figure 8 The receiver is used to implement the receiving function, and the transmitter is used to implement the sending function. The transceiver can be integrated with the processor or exist independently and communicate with the electronic device through the interface circuit ( Figure 8 (not shown) is coupled to the processor, which is not specifically limited in this embodiment of the present invention.

[0073] In addition, it should be noted that Figure 8 The structure of the electronic device shown in the figure does not constitute a limitation on the device, and the actual device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. In addition, the technical effects achieved by the electronic device when executing the method of the first embodiment above can refer to the technical effects described in the first embodiment above, so they are not repeated here.

[0074] Third embodiment

[0075] This embodiment provides a computer-readable storage medium, which stores at least one instruction, and the instruction is loaded and executed by a processor to implement the method of the first embodiment. The computer-readable storage medium may be a ROM, a random access memory, a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc. The instructions stored therein may be loaded by a processor in a terminal to execute the method.

[0076] In addition, it should be noted that the present invention can be provided as a method, an apparatus or a computer program product. Therefore, the embodiment of the present invention can be in the form of a full or partial hardware embodiment, a full or partial software embodiment or an embodiment combining software and hardware. Moreover, when implemented using software, the embodiment of the present invention can be in the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program codes. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center containing one or more available media sets. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium. The semiconductor medium may be a solid state hard disk.

[0077] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0078] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0079] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements. In addition, the term "and / or" is only an association relationship describing the associated objects, indicating that there can be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist at the same time, and B exists alone, wherein A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship. Please refer to the context for specific understanding. "At least one" means one or more, and "plurality" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can be represented by: a, b, c, ab, ac, bc or abc, where a, b, c can be single or plural.

[0080] In addition, it can be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0081] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0082] In several embodiments provided by the present invention, it should be understood that the disclosed equipment, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of functional modules / units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The unit described as a separate component may or may not be physically separated, and the component displayed as a unit may or may not be a physical unit, that is, it may be located in one place, or it may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the scheme of this embodiment. In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit.

[0083] If the method is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0084] Finally, it should be noted that the above is only a preferred embodiment of the present invention. It should be pointed out that although the preferred embodiment of the present invention has been described, for ordinary technicians in this technical field, once the basic creative concept of the present invention is known, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention. Therefore, the attached claims are intended to be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the embodiments of the present invention.

Claims

1. A method for calibrating capacitance mismatch of a successive approximation ADC, characterized in that: include: Setting the initial value of each capacitor weight in the analog-to-digital converter ADC to be calibrated, inputting a preset type of input signal to the ADC to be calibrated, collecting the output codeword of the ADC to be calibrated, and drawing an actual curve of the output codeword; According to the type of input signal, a corresponding probability density function is selected, and a curve corresponding to the probability density function is drawn as an ideal curve of the output codeword of the ADC to be calibrated; Based on the initial value of each capacitor weight, each capacitor weight is iteratively updated with a preset weight change step, and the actual curve is redrawn after each iterative update of each capacitor weight, and the capacitor weight that makes the actual curve closest to the ideal curve is found as the optimal capacitor weight to complete the capacitor mismatch calibration.

2. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: The collecting the output codeword of the ADC to be calibrated includes: The output codewords of the ADC to be calibrated are collected through a logic analyzer or FPGA.

3. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: The process of drawing the actual curve of the output codeword includes: Multiply each output codeword by the corresponding capacitor weight and calculate the weighted sum D out , the formula is: Among them, d i represents the i-th output codeword; W i Indicates d i The corresponding capacitance weight; n represents the number of bits of capacitance; Right D out Perform histogram statistics to get the value D out Histograms of distribution characteristics; The height of each bin in the histogram is obtained, and the data points corresponding to the heights of the bins in the histogram are used as discrete points for curve fitting, and the fitted curve is used as the actual curve of the output codeword.

4. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: The selecting a corresponding probability density function according to the type of the input signal includes: When the input signal is a sinusoidal signal, the corresponding probability density function p(k) is: Among them, k represents the independent variable; C0 and C1 are both preset fitting parameters.

5. The method for calibrating capacitance mismatch of a successive approximation ADC as claimed in claim 4, wherein: The selecting a corresponding probability density function according to the type of the input signal also includes: When the input signal is a ramp or triangle wave signal, the corresponding probability density function p(k) is: p(k)=C0k Among them, k represents the independent variable; C0 is a preset fitting parameter.

6. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: Finding a capacitance weight that makes the actual curve closest to the ideal curve as the optimal capacitance weight includes: The sum of square errors between the actual curve and the ideal curve is calculated; and a capacitance weight that minimizes the sum of square errors between the actual curve and the ideal curve is found as an optimal capacitance weight.

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