Transmission system, host end, peripheral end and data transmission method thereof

Abstract

The invention relates to the field of transmission protocol adaptation, and provides a transmission system, a host end, a peripheral end, a data transmission method of the host end and a data transmission method applied to the host end, and the data transmission method applied to the host end comprises the following steps: initiating a host end SPI transaction, and dividing data in the host end SPI transaction into forwarding packets; the forwarding packet is used for being transmitted to a peripheral end; receiving a return packet from the peripheral end; and reporting an error state to the electronic control unit according to the error detection result of the return packet. The data transmission method of the host end is used for providing a fault-tolerant mechanism to improve the stability of data transmission.

Description

Technical Field

[0001] The present invention relates to the field of transmission protocol adaptation, and in particular to a transmission system, a host end, a peripheral end and a data transmission method thereof. Background Art

[0002] In the related art, the Protocol Adaptation Layer (PAL) / Serial Peripheral Interface (SPI) acts as a relay station for the data stream at the peripheral end, and forwards all received SPI transactions indiscriminately, including data packets marked as damaged. For example, in an automotive application scenario, the Bad A-packet marked by the Automotive Physical Layer (A-PHY) continues to be forwarded to the SPI peripheral. Incorrect data transmission may cause the vehicle to lose control or an accident. The PAL / SPI system that lacks a fault-tolerant mechanism in the related art may increase the safety risk of vehicle operation. Therefore, there is an urgent need for a transmission system, a host end, a peripheral end, and a data transmission method thereof to improve the above problems. Summary of the invention

[0003] The object of the present invention is to provide a transmission system, a host end, a peripheral end and a data transmission method thereof, wherein the data transmission method of the host end is used to provide a fault-tolerant mechanism to improve the stability of data transmission.

[0004] In a first aspect, the present invention provides a data transmission method, which is applied to a host side, and the method includes: initiating a host side SPI transaction, dividing the data in the host side SPI transaction into forwarding packets; the forwarding packets are used for transmission to a peripheral side; receiving a return packet from the peripheral side; and reporting an error status to an electronic control unit (Electronic Control Unit, ECU for short) based on an error detection result of the return packet.

[0005] Optionally, it also includes: the host end performs integrity verification based on the return packet to generate a recovery verification result; the host end independently determines whether an error occurs in the return packet based on the recovery verification result.

[0006] Optionally, it also includes: when the host side determines that an error occurs in the return packet, the host side unpacks the return packet that is not affected by the error to generate unpacking data; generates a reorganization transaction based on the unpacking data; and the reorganization transaction is used to form an SPI transaction re-initiated by the host side.

[0007] Optionally, based on the error detection result of the return packet, the method of reporting the error status to the electronic control unit includes: based on the error detection result, reporting the error status to the electronic control unit through a silent response strategy; and / or based on the error detection result, reporting the error status to the electronic control unit through an interrupt notification mechanism.

[0008] Optionally, the silent response strategy includes that once an erroneous return packet is detected, the host side immediately stops sending a data ready notification to the electronic control unit.

[0009] Optionally, the interrupt notification mechanism includes: when an erroneous return packet is detected, the host side triggers an interrupt signal to notify the electronic control unit to access the status register of the host side and allow the electronic control unit to perform diagnostic or control operations.

[0010] Optionally, the forwarding packet is set as an A-packet data packet; dividing the data in the host-side SPI transaction into forwarding packets, including: according to the constraint of the maximum payload size (MAX_PLD_SIZE), dividing the data in the host-side SPI transaction into at least one A-packet data packet, and transmitting them one by one to the peripheral end through the physical layer interface to improve the flexibility and efficiency of the forwarding packet transmission.

[0011] In a second aspect, the present invention provides a data transmission method, which is applied to a peripheral end, and the method includes: receiving a forwarding packet from a host end, merging the forwarding packet into a peripheral end SPI transaction, performing error detection on the peripheral end SPI transaction, and shutting down the peripheral end transmission interface when an error is detected; generating a return packet based on the result of the error detection; and the return packet is used for transmission to the host end.

[0012] Optionally, the error detection performed on the peripheral-end SPI transaction includes at least one of field detection, integrity detection and sequential consistency detection.

[0013] Optionally, generating a return packet based on the result of the error detection also includes: switching the state machine to a normal working mode or an error working mode based on the result of the error detection; when an error is detected, the state machine switches from the normal working mode to the error working mode; in the error working mode, the peripheral end continues to receive forwarding packets, and sends a return packet to the host end through an error feedback mechanism of in-band special character data; the in-band special character data is packaged in the return packet to notify the host end of the result of the error detection.

[0014] Optionally, the state machine enters the error working mode and remains in the error working mode until the host initiates a new SPI transaction, and the state machine switches back to the normal working mode.

[0015] Optionally, the return packet is sent to the host end through the error feedback mechanism of in-band special character data, including when no valid data is returned to the host end, the peripheral end constructs a return packet; the construction method includes: constructing a return packet filled with all 0s, constructing a return packet filled with all 1s and copying and forwarding the packet as a return packet.

[0016] Optionally, the field detection includes verifying the Bad field in the header of each forwarded packet to quickly identify and filter out forwarded packets that have been marked as damaged to prevent these forwarded packets from being further processed.

[0017] Optionally, the integrity check includes checking the CRC8 field of each forwarded packet to ensure data integrity of the forwarded packet.

[0018] Optionally, the sequential consistency check includes confirming whether the Message Counter field in two consecutive forwarded packets increases as expected, so as to maintain the sequentiality and consistency of the forwarded packets.

[0019] In a third aspect, the present invention provides a host end for executing the method described in any one of the first aspects, including: a host end transmission interface for initiating an SPI transaction; an SPI to A-PHY conversion module for dividing the data in the SPI transaction into forwarding packets; the forwarding packets are used for transmission to the peripheral end; an A-PHY to SPI conversion module for receiving a return packet from the peripheral end; and a return packet error detection module for reporting an error status to an electronic control unit through a silent response strategy or an internal status registration and interrupt notification mechanism.

[0020] In a fourth aspect, the present invention provides a peripheral end for executing the method described in any one of the second aspects, including: a peripheral end transmission interface for receiving a forwarding packet from a host end; a forwarding packet to SPI conversion module for merging multiple forwarding packets into an SPI transaction; a forwarding packet error detection module for performing at least one error detection including field detection, integrity detection and sequence consistency detection, and shutting down the peripheral end transmission interface when an error is detected; a return module, when the peripheral end completes the SPI transaction, the return module generates a return packet based on the result of the error detection; the return packet is used to transmit to the host end.

[0021] Optionally, the forwarding packet error detection module and the forwarding packet to SPI conversion module are respectively connected to two input ends of an AND gate, and the output end of the AND gate is connected to the peripheral device transmission interface.

[0022] In a fifth aspect, the present invention provides a transmission system, comprising: a host end, a peripheral end and an electronic control unit; the peripheral end and the electronic control unit are both connected to the host end; the host end is used to send forwarding packets to the peripheral end, and to receive return packets from the peripheral end; the peripheral end is used to receive the forwarding packets, and to send the return packets to the host end; the host end is used to generate an error detection result when an error is detected in the return packet, and to trigger a host interrupt signal; the electronic control unit is used to access the host end when receiving the interrupt signal, analyze the error detection result, and take recovery measures for the host end, so that the host end re-sends the forwarding packet to the peripheral end.

[0023] Optionally, it also includes: the peripheral end is used to generate a peripheral error detection result when an error is detected in the forwarded packet, and the peripheral error detection result is packaged to generate a return packet; the host end is used to disassemble the return packet to obtain the peripheral error result, and trigger a peripheral interrupt signal; the electronic control unit is used to access the host end when receiving the peripheral interrupt signal, analyze the peripheral error detection result in the return packet, and take recovery measures for the peripheral end, so that the peripheral end can receive the forwarded packet again.

[0024] The beneficial effects of the present invention are as follows: the present invention combines a plurality of the forwarding packets into an SPI transaction, and by executing one or more error detection methods in field detection, integrity detection, and sequence consistency detection, when an error is detected, the transmission interface of the peripheral end is closed. This helps prevent any data packet marked as an error by the A-PHY standard from being forwarded to the SPI peripheral, thereby ensuring the stability of the system and the accuracy of the data, enhancing the fault tolerance of data transmission, and avoiding vehicle loss of control or accidents. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of a flow chart of a host-side data transmission method provided by the present invention; Figure 2 A schematic diagram of a flow chart of a data transmission method at a peripheral end provided by the present invention; Figure 3 A schematic diagram of the structure of a host terminal provided by the present invention; Figure 4 A schematic diagram of the structure of an external device provided by the present invention; Figure 5 A schematic diagram of the structure of a transmission system provided by the present invention; Figure 6 A schematic diagram of an electronic control unit access error state provided by the present invention.

[0026] Description of reference numerals in the figures: 1. Host side; 2. Peripheral side; 3. Transmission system; 11. Host transmission interface; 12. SPI to A-PHY conversion module; 13. A-PHY to SPI conversion module; 14. Return packet error detection module; 15. Host error status register; 21. Return module; 22. Forwarding packet to SPI conversion module; 23. Forwarding packet error detection module; 24. Peripheral transmission interface; 25. Peripheral error status register; 31. Electronic control unit. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0028] In view of the problems existing in the existing technology, such as Figure 1 As shown, the first embodiment provides a data transmission method, which is applied to the host side, and the method includes: initiating a host side SPI transaction, dividing the data in the host side SPI transaction into forwarding packets; the forwarding packets are used for transmission to the peripheral side; receiving a return packet from the peripheral side; and reporting an error status to an electronic control unit based on an error detection result of the return packet.

[0029] In some specific embodiments, the forwarding packet is set as an adaptation layer data packet (A-PHYpacket, referred to as A-packet) output by the host end; the data in the host-side SPI transaction is divided into forwarding packets, including: according to the constraint of the maximum load size, the data in the host-side SPI transaction is divided into at least one A-packet data packet, and transmitted one by one to the peripheral end through the physical layer interface to improve the flexibility and efficiency of the forwarding packet transmission.

[0030] In some embodiments, the host end performs an integrity check based on the return packet to generate a recovery check result; the host end independently determines whether an error occurs in the return packet based on the recovery check result.

[0031] In some embodiments, when the host determines that no error occurs in the return packet, the host unpacks the return packet that is not affected by the error to generate unpacking data; generates a reassembly transaction based on the unpacking data; and the reassembly transaction is used to form an SPI transaction re-initiated by the host.

[0032] In some specific embodiments, when the transmission of the forwarding packet fails and the forwarding packet fails to successfully reach the peripheral end, the peripheral end generates a specific return packet, and the host end determines that the return packet has an error based on the data in the received return packet, and generates the error detection result. It is worth noting that the host end can identify the return packet affected by the error, and the return packet not affected by the error will be returned to the processing flow of the SPI transmission transaction after being unpacked.

[0033] In some embodiments, based on the error detection result of the return packet, the method of reporting the error status to the electronic control unit includes: based on the error detection result, reporting the error status to the electronic control unit through a silent response strategy; and / or based on the error detection result, reporting the error status to the electronic control unit through an interrupt notification mechanism.

[0034] In some embodiments, the silent response strategy includes the host immediately stopping sending data ready notifications to the electronic control unit once an erroneous return packet is detected.

[0035] In some specific embodiments, once an erroneous return packet is detected, the host will immediately stop sending data ready notifications to the master device via the data ready (RDR) IO signal. This silent response method effectively avoids erroneous data from being received and processed incorrectly.

[0036] In some embodiments, the interrupt notification mechanism includes: when an erroneous return packet is detected, the host triggers an interrupt signal to notify the electronic control unit to access the status register of the host and allow the electronic control unit to perform diagnosis or control operations.

[0037] In some specific embodiments, in order to report the error status to the electronic control unit in time, the host side integrates a status register to record and track various error conditions. At the same time, by triggering an interrupt signal, the electronic control unit is quickly attracted to pay attention so that it can quickly intervene and take corresponding error recovery measures.

[0038] In some examples, the host sends an interrupt signal to the electronic control unit via a hardware interrupt pin. The hardware interrupt signal can ensure that the electronic control unit receives the error notification in the shortest time and responds quickly.

[0039] In other examples, an interrupt request is sent to the electronic control unit through the software interrupt mechanism. The software interrupt can be configured to be triggered under specific conditions, such as triggering an interrupt signal after multiple error detections. This setting is suitable for situations where frequent interrupts need to be avoided. By configuring the software interrupt to be triggered after multiple error detections, resource management can be optimized to ensure that the electronic control unit intervenes to handle errors at critical moments, reduce erroneous operations caused by instantaneous interference, avoid the system from overreacting to every small error, and ensure that the system can concentrate resources to handle real serious errors.

[0040] like Figure 2 As shown, the second embodiment provides a data transmission method, which is applied to a peripheral end, and the method includes: receiving a forwarding packet from a host end, merging the forwarding packet into a peripheral end SPI transaction, performing error detection on the peripheral end SPI transaction, and shutting down the peripheral end transmission interface when an error is detected; generating a return packet based on the result of the error detection; and the return packet is used for transmission to the host end.

[0041] In some specific embodiments, the return packet is set as an A-packet data packet output by the peripheral end, including necessary header information and load data. The header information includes packet type, length and sequence number. The packet type is used to identify the type of the return packet; the identifier is used for the total length of the return packet, and the sequence number is used to ensure the order consistency of the data packet. The load data includes normal response data or error information. If no error is detected, the response data after the peripheral end processes the SPI transaction is filled. If an error is detected, the error information is filled, including the error type, error location and error code.

[0042] In some embodiments, the error detection performed on the peripheral-side SPI transaction includes at least one of field detection, integrity detection, and sequential consistency detection.

[0043] In some other specific embodiments, before assembling the return packet, a CRC check is performed on the header and payload data of the return packet, and the calculated CRC value is appended to the end of the return packet. This embodiment can ensure the integrity of the data in the return packet through the CRC check.

[0044] In some embodiments, generating a return packet based on the result of the error detection also includes: switching the state machine to a normal working mode or an error working mode based on the result of the error detection; when an error is detected, the state machine switches from the normal working mode to the error working mode; in the error working mode, the peripheral end continues to receive forwarding packets and sends return packets to the host end through an error feedback mechanism with in-band special character data.

[0045] Generating a return packet based on the result of the error detection includes: assembling a header, load data and a CRC value into a complete A-Packet data packet as the return packet.

[0046] In some embodiments, the state machine enters the error working mode and remains in the error working mode until the host initiates a new SPI transaction, and the state machine switches back to the normal working mode.

[0047] In some specific embodiments, when the state machine enters the error working mode, the state machine records error information, including error type, error location, and error code, and the peripheral device stops the ongoing transmission task to prevent further propagation of the error data.

[0048] In some other specific embodiments, once a new SPI transaction request is detected, the state machine immediately switches from the error working mode back to the normal working mode. The peripheral device end provided in this embodiment has a faster response speed and can quickly restore the normal communication process.

[0049] In some specific embodiments, after detecting a new SPI transaction request, the state machine waits for the error information to be recorded before switching back to the normal working mode. This embodiment ensures that all error information on the peripheral end is fully recorded, which facilitates subsequent error analysis and debugging.

[0050] In some specific embodiments, after detecting a new SPI transaction request, the state machine immediately starts processing the new transaction, while continuing to complete the recording of error information in the background. This embodiment ensures that the peripheral device responds quickly to the new SPI transaction and ensures complete recording of error information.

[0051] In some embodiments, the error feedback mechanism of in-band special character data is used to send a return packet to the host end, including when no valid data is returned to the host end, the peripheral end constructs a return packet; the construction method includes: constructing a return packet filled with all 0s, constructing a return packet filled with all 1s, and copying and forwarding the packet as a return packet.

[0052] In some specific embodiments, constructing a return packet filled with all 0s or all 1s is easy to process and parse. The host does not need additional logic to determine the content of the return packet, which is easy to improve the compatibility of the transmission system.

[0053] In other specific embodiments, copying the forwarded packet as a return packet is usually faster, thereby improving the response speed of the overall system. When the host receives a response that is exactly the same (or highly matched) as a previously transmitted data packet, it can more accurately identify whether there are unforeseen deviations. Such deviations may be caused by noise in the channel, signal attenuation, or other communication anomalies. By comparing the differences between the forwarded packet and the return packet, potential sources of interference or fault points can be effectively located, and corresponding measures can be taken to optimize or repair them.

[0054] In some embodiments, the field detection includes verifying the Bad field in the header of each forwarded packet to quickly identify and filter out forwarded packets that have been marked as damaged to prevent these forwarded packets from being further processed.

[0055] In some embodiments, the integrity check includes checking the CRC8 field of each forwarded packet to ensure data integrity of the forwarded packet.

[0056] It is worth noting that the Cyclic Redundancy Check (CRC) is used to detect data errors in the Application Payload (A-Payload). The CRC field is an 8-bit CRC-8 value. The CRC field itself is excluded from the calculation, but the Descriptor field, any Descriptor Extension bytes, the Message Counter field, and all Data Bytes are included by default. Existence conditions: The CRC field only exists in the A-Payload when the following two conditions are met: the Address Length and Extended Information (ALEI) field value of the Application Header (A-Header) is 3'b001, indicating that the first byte of the A-Payload is the Descriptor byte; the CRC Existence (CRE) subfield value of the Descriptor byte is 1'b1, indicating that the last byte of the A-Payload is the CRC byte. Field size: The CRC field is one byte (8 bits) in size. Calculation method: The CRC calculation covers the entire A-Payload section, but does not include the CRC field itself. It uses a specific CRC algorithm to ensure data integrity.

[0057] In some embodiments, the sequential consistency check includes confirming whether the MessageCounter field in two consecutive forwarded packets is incremented as expected to maintain the sequentiality and consistency of the forwarded packets.

[0058] It is worth noting that the message counter (MC) is a counter used to identify the message sequence of a given SPI connection (i.e., between the PAL / SPI instance and the target SPI-CS). It is used to help the receiver confirm the integrity and order of the message. The MC field only exists in the A-Payload when the following two conditions are met: the ALEI field value of the A-Header is 3'b001, indicating that the first byte of the A-Payload is the Descriptor byte; the Message Counter Existence (MCE) subfield value of the Descriptor byte is 1'b1, indicating that there is a Message Counter byte before the Data Bytes.

[0059] In some embodiments, before the Protocol Adaptation Layer (PAL) / Serial Peripheral Interface (SPI) instance sends the first PAL / SPI A-Packet to the target Serial Peripheral Interface-Chip Select (SPI-CS), the Message Counter value is initialized to zero. For each PAL / SPI A-Packet sent to the target SPI-CS, the Message Counter value increases by 1. When the counter exceeds 255, it wraps around to 0. The MC field is one byte (8 bits) in size.

[0060] like Figure 3 As shown, the third embodiment provides a host end 1, which is used to execute the data transmission task performed by the host end 1 in the method described in any one of the above embodiments, including: a host-side transmission interface 11, which is used to initiate an SPI transaction; an SPI to A-PHY conversion module 12, which is used to divide the data in the SPI transaction into forwarding packets; the forwarding packets are used to transmit to the peripheral end 2; an A-PHY to SPI conversion module 13, which is used to receive a return packet from the peripheral end 2; a return packet error detection module 14, which is used to report the error status to the electronic control unit 31 through a silent response strategy or an internal status registration and interrupt notification mechanism.

[0061] In some embodiments, a host error status register 15 is provided in the host end 1 for recording and tracking error information of the host end 1 .

[0062] like Figure 4As shown, the fourth embodiment provides a peripheral end 2, which is used to execute the data transmission task performed by the peripheral end 2 in the method of any one of the above embodiments, including: a peripheral end transmission interface 24, which is used to receive a forwarding packet from the host end 1; a forwarding packet to SPI conversion module 22, which is used to merge multiple forwarding packets into an SPI transaction; a forwarding packet error detection module 23, which is used to perform at least one error detection including field detection, integrity detection and sequence consistency detection, and shut down the peripheral end transmission interface 24 when an error is detected; a return module 21, when the peripheral end 2 completes the SPI transaction, the return module 21 generates a return packet based on the result of the error detection; the return packet is used to transmit to the host end 1.

[0063] In some specific embodiments, the forwarding packet error detection module 23 and the forwarding packet to SPI conversion module 22 are respectively connected to two input ends of an AND gate, and the output end of the AND gate is connected to the peripheral end transmission interface 24. The forwarding packet error detection module 23 is used to trigger an enable signal, and the high level of the enable signal is used to indicate that no error is detected, and at this time, the result of the AND gate logic operation is equal to the data output by the A-PHY to SPI conversion module; the low level of the enable signal is used to indicate that an error is detected, and at this time, the result of the AND gate logic operation is a continuous low level, so as to prevent the peripheral end transmission interface 24 from transmitting an erroneous forwarding packet.

[0064] In some embodiments, the peripheral device end 2 is provided with a peripheral device error status register 25 for recording and tracking error information of the peripheral device end 2 .

[0065] like Figure 5 As shown, the fifth embodiment provides a transmission system 3, including: a host end 1, a peripheral end 2 and an electronic control unit 31; the peripheral end 2 and the electronic control unit 31 are both connected to the host end 1; the host end 1 is used to send a forwarding packet to the peripheral end 2, and to receive a return packet from the peripheral end 2; the peripheral end 2 is used to receive the forwarding packet, and to send the return packet to the host end 1; the host end 1 is used to generate an error detection result when an error in the return packet is detected, and to trigger a host interrupt signal; the electronic control unit 31 is used to access the host end 1 when receiving the interrupt signal, analyze the error detection result, and take recovery measures for the host end 1, so that the host end 1 re-sends the forwarding packet to the peripheral end 2.

[0066] In some embodiments, it also includes: the peripheral end 2 is used to generate a peripheral error detection result when an error is detected in the forwarding packet, and the peripheral error detection result is packaged to generate a return packet; the host end 1 is used to disassemble the return packet to obtain the peripheral error result, and trigger a peripheral interrupt signal; the electronic control unit 31 is used to access the host end 1 when receiving the peripheral interrupt signal, analyze the peripheral error detection result in the return packet, and take recovery measures for the peripheral end 2, so that the peripheral end 2 receives the forwarding packet again.

[0067] In some embodiments, the host end 1 is provided with a host error status register 15; the peripheral end 2 is provided with a peripheral error status register 25. The electronic control unit 31 is used to access the host error status register 15 when obtaining the host interrupt signal. The electronic control unit 31 is also used to access the peripheral error status register 25 when obtaining the peripheral interrupt signal.

[0068] like Figure 6 As shown, in some embodiments, as far as the user is concerned, the host end 1 and the electronic control unit 31 are deployed at the near end, and the peripheral end 2 is deployed at the far end. There are some error interrupts that need to be transmitted via the return packet of APHY. It is worth noting that when the peripheral end 2 finds that the forwarding packet is wrong, the error status needs to be embedded in the return packet, returned to the near-end host end 1, and finally transmitted to the electronic control unit 31 through the general purpose input / output interface (General Purpose Input / Output, referred to as GPIO) of the host end 1.

[0069] In some specific embodiments, at the peripheral end 2, when an error occurs, the relevant error status data will be recorded in the peripheral error status register 25. The peripheral end 2 maps and packages these error status data into a data packet carrying error status information through the general input and output interface GPIO. This data packet carrying the error status information is then sent to the host end 1 through the vehicle physical layer. After receiving this data packet, the host end 1 will unpack it and extract the error status information therein. The host end 1 uses this error status information to trigger the corresponding interrupt process in order to take appropriate response measures. Finally, the host end 1 transmits the error status information of the peripheral end to the electronic control unit 31 through its GPIO interface so that the electronic control unit 31 can perform further diagnosis or control operations based on this information.

[0070] In other embodiments, a special field in the SPI band is configured, and the electronic control unit 31 pre-configures the function of the special field. Once the special field appears in the read-back SPI data, it represents that the forwarding packet reception error of the peripheral terminal 2. The solution in this embodiment can detect transmission errors faster for the electronic control unit 31, and there is no need to wait in vain, which is conducive to improving efficiency.

[0071] In other embodiments, after the electronic control unit 31 completely recovers all data of the SPI transmission transaction, it is also used to check the host error status register 15 and the peripheral error status register 25, and output the transmission result after confirming that no new error information is added. Based on this transmission result, the electronic control unit 31 determines that the second transmission has been completed correctly, ensuring the integrity of the data and the reliability of the communication.

[0072] In some further specific embodiments, in the design of the transmission system, the forwarding packet and the return packet are transmitted via different channels respectively. This arrangement helps to avoid mutual interference between the data in the forwarding packet and the return packet during the transmission process.

[0073] In some further specific embodiments, in the design of the transmission system, the forwarding packet and the return packet are transmitted via the same channel. This arrangement is conducive to fully utilizing the channel and improving the integration of the transmission system.

[0074] In some possible embodiments, redundant communication paths are introduced into the design of the transmission system. When a primary path fails, the backup path can be switched to ensure the continuity and stability of data transmission.

[0075] It is worth noting that if the above method is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling an electronic device to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk.

[0076] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. A data transmission method, characterized in that: Applied to the host side, the method comprises: Initiate a host-side SPI transaction, and divide the data in the host-side SPI transaction into forwarding packets; the forwarding packets are used for transmission to the peripheral end; Receive the return packet from the peripheral end; According to the error detection result of the return packet, an error state is reported to the electronic control unit.

2. The method according to claim 1, characterized in that: Also includes: The host performs integrity check based on the returned packet and generates a recovery check result; The host terminal independently determines whether an error occurs in the return packet based on the recovery inspection result.

3. The method according to claim 2, characterized in that Also includes: When the host determines that an error occurs in the return packet, the host unpacks the return packet that is not affected by the error to generate unpacking data; A reorganization transaction is generated based on the unpacked data; the reorganization transaction is used to construct an SPI transaction re-initiated by the host end.

4. The method according to claim 1, characterized in that: According to the error detection result of the return packet, the method of reporting the error status to the electronic control unit includes: According to the error detection result, reporting the error status to the electronic control unit through a silent response strategy; And / or based on the error detection result, reporting the error status to the electronic control unit through an interrupt notification mechanism.

5. The method according to claim 4, characterized in that The silent response strategy includes that once an erroneous return packet is detected, the host end immediately stops sending a data ready notification to the electronic control unit.

6. The method according to claim 4, characterized in that The interrupt notification mechanism includes: when an erroneous return packet is detected, the host side triggers an interrupt signal to notify the electronic control unit to access the status register of the host side and allow the electronic control unit to perform diagnosis or control operations.

7. The method according to claim 1, characterized in that The forwarding packet is set as an A-packet data packet; The data in the host-side SPI transaction is divided into forwarding packets, including: according to the constraint of the maximum load size, the data in the host-side SPI transaction is divided into at least one A-packet data packet, and transmitted one by one to the peripheral end through the physical layer interface to improve the flexibility and efficiency of the forwarding packet transmission.

8. A data transmission method, characterized in that: Applied to an external device, the method includes: Receive a forwarding packet from the host end, merge the forwarding packet into a peripheral end SPI transaction, perform error detection on the peripheral end SPI transaction, and shut down the peripheral end transmission interface when an error is detected; A return packet is generated based on the result of the error detection; the return packet is used for transmission to the host end.

9. The method according to claim 8, characterized in that The error detection performed on the peripheral-end SPI transaction includes at least one of field detection, integrity detection and sequence consistency detection.

10. The method according to claim 8, characterized in that Generating a return packet based on the result of the error detection further includes: switching the state machine to a normal working mode or an error working mode based on the result of the error detection; When an error is detected, the state machine switches from a normal working mode to an error working mode; In the error working mode, the peripheral device continues to receive forwarding packets and sends return packets to the host through an error feedback mechanism of in-band special character data; the in-band special character data is packaged in the return packet to notify the host of the result of the error detection.

11. The method according to claim 9, characterized in that The state machine enters the error working mode and remains in the error working mode until the host initiates a new SPI transaction, and then the state machine switches back to the normal working mode.

12. The method according to claim 9, characterized in that The sending of a return packet to the host end through an error feedback mechanism of in-band special character data includes constructing a return packet by the peripheral end when no valid data is returned to the host end; The construction method includes: constructing a return packet filled with all 0s, constructing a return packet filled with all 1s, and copying a forwarding packet as a return packet.

13. The method according to claim 8, characterized in that The field detection includes verifying the Bad field in the header of each forwarded packet to quickly identify and filter out forwarded packets that have been marked as damaged to prevent these forwarded packets from being further processed.

14. The method according to claim 8, characterized in that The integrity check includes checking the CRC8 field of each forwarded packet to ensure the data integrity of the forwarded packet.

15. The method according to claim 8, characterized in that The sequential consistency detection includes confirming whether the Message Counter field in two consecutive forwarded packets increases as expected, so as to maintain the sequentiality and consistency of the forwarded packets.

16. A host terminal, used to execute the method described in any one of claims 1 to 7, characterized in that: include: Host-side transmission interface, used to initiate SPI transactions; An SPI to A-PHY conversion module, used for dividing the data in the SPI transaction into forwarding packets; The forwarding packet is used for transmission to the external device end; A-PHY to SPI conversion module, used to receive return packets from the peripheral end; The return packet error detection module is used to report the error status to the electronic control unit through the silent response strategy or the internal status registration and interrupt notification mechanism.

17. An external device, used to execute the method according to any one of claims 8 to 15, characterized in that: include: The peripheral transmission interface is used to receive the forwarding packet from the host; A forwarding packet to SPI conversion module, used for merging a plurality of the forwarding packets into an SPI transaction; A forwarding packet error detection module, used to perform at least one error detection including field detection, integrity detection and sequence consistency detection, and shut down the peripheral device transmission interface when an error is detected; A return module, when the peripheral end completes the SPI transaction, the return module generates a return packet based on the result of the error detection; the return packet is used to transmit to the host end.

18. The peripheral terminal according to claim 17, characterized in that: The forwarding packet error detection module and the forwarding packet to SPI conversion module are respectively connected to two input ends of an AND gate, and the output end of the AND gate is connected to the peripheral device transmission interface.

19. A transmission system, characterized in that: include: Host side, peripheral side and electronic control unit; The peripheral device end and the electronic control unit are both connected to the host end; The host end is used to send forwarding packets to the peripheral end, and receive return packets from the peripheral end; The peripheral device is used to receive the forwarding packet and send the return packet to the host; The host end is used to generate an error detection result when an error in the return packet is detected, and trigger a host interrupt signal; The electronic control unit is used to access the host end when receiving the interrupt signal, analyze the error detection result, and take recovery measures for the host end so that the host end resends the forwarding packet to the peripheral end.

20. The system according to claim 19, characterized in that Also includes: The peripheral device end is used to generate a peripheral device error detection result when an error in the forwarding packet is detected, and the peripheral device error detection result is packaged to generate a return packet; The host end is used to disassemble the return packet to obtain the peripheral error result and trigger a peripheral interrupt signal; The electronic control unit is used to access the host end when receiving the peripheral interrupt signal, analyze the peripheral error detection result in the return packet, and take recovery measures for the peripheral end so that the peripheral end receives the forwarding packet again.

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