Digital signal processor, message receiving method and message sending method
By designing a message transmission module and configuration module in the digital signal processor, the sequence number marking configuration unit to be configured as a message transmission unit solves the problem of the lack of the FIFO mechanism of the digital signal processor. Essence
Patent Information
- Application Number
- CN202411491860.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-24
- Publication Date
- 2025-01-28
AI Technical Summary
Some digital signal processors lack a first-in-first-out (FIFO) mechanism, making it difficult to ensure data transmission efficiency and accuracy.
Design a digital signal processor containing message transmission modules and configuration modules. The message transmission module consists of at least two units to be configured, and each to be configured to store the serial number mark. The configuration module is marked according to the serial number, and the configuration unit to be configured to be configured to the message transmission unit to realize the first entry and sending and sending of the packets.
Realizing the preliminary enrollment mechanism during the receiving and sending process, which improves the efficiency and accuracy of data transmission, and ensures the order of each message during multi -message data transmission.
Smart Images

Figure CN119383142A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of data communication, and in particular to a digital signal processor, a message receiving method, and a message sending method. Background Art
[0002] Some digital signal processors do not have a first-in first-out (FIFO) mechanism for receiving and sending data, so when performing data transmission, one mailbox is usually used to transmit multiple data.
[0003] In the process of receiving data, when a piece of data arrives in the mailbox, if the data has not been obtained yet, the next piece of data will arrive in the mailbox, which will cause the current unobtained data to be overwritten by the next arriving data, or cause the next arriving data to be discarded. In the process of sending data, it is necessary to wait for the current data to be sent before sending the next piece of data. In this way, neither the efficiency nor the accuracy of data transmission can be guaranteed. Summary of the invention
[0004] In order to solve the above technical problem or at least partially solve the above technical problem, the present disclosure provides a digital signal processor, a message receiving method and a message sending method.
[0005] The present disclosure provides a digital signal processor, including: a message transmission module, including at least two units to be configured, the units to be configured storing serial number tags; wherein the serial number tags are tag information reflecting the arrangement order of the units to be configured; a configuration module, used to sequentially configure each unit to be configured as a message transmission unit according to the serial number tags; wherein the message transmission unit is used to sequentially receive messages according to the serial number tags, and sequentially send messages according to the serial number tags.
[0006] Optionally, the digital signal processor also includes a reading module; the message transmission unit is also used to configure a first flag bit according to the received message; wherein the first flag bit is used to indicate that the message transmission unit has stored data; the reading module is used to read the messages received by the message transmission unit enabled by the first flag bit in sequence according to the serial number mark.
[0007] Optionally, the digital signal processor also includes a data sending module; the data sending module is used to store the messages to be sent in sequence according to the sequence number tags into the message transmission unit enabled by the second flag bit; wherein the second flag bit is used to indicate that the message transmission unit is used to send data; the message transmission unit is also used to send the messages to be sent in sequence according to the sequence number tags.
[0008] The present disclosure also provides a message receiving method, which is applied to any one of the above-mentioned digital signal processors; the digital signal processor includes a reading module; the method includes: obtaining a message receiving instruction; based on the message receiving instruction, controlling the message transmission unit to receive messages in sequence according to the sequence number mark, and controlling the reading module to read the messages received by the message transmission unit in sequence starting from the message transmission unit with the sequence number marked as the first sequence number.
[0009] Optionally, based on a message receiving instruction, the control reading module reads messages received by the message transmission unit in sequence based on the sequence number mark, including: based on the message receiving instruction, the control reading module reads the first flag bit of the message transmission unit whose sequence number is marked as the first sequence number; wherein the first flag bit is used to indicate that the message transmission unit has stored data; when the first flag bit is in an enabled state, the control reading module reads the message received by the message transmission unit; when the reading module completes the message reading, the control reading module reads the first flag bit of the message transmission unit marked with the next sequence number.
[0010] Optionally, based on the message receiving instruction, the control reading module reads the messages received by the message transmission unit in sequence based on the sequence number mark, and also includes: when the first flag bit of the next message transmission unit read is in a non-enabled state, the control reading module returns the first flag bit of the message transmission unit whose sequence number mark is the first sequence number.
[0011] The present disclosure also provides a message sending method, which is applied to any one of the above-mentioned digital signal processors; the digital signal processor includes a data sending module; the method includes: obtaining a message sending instruction; based on the message sending instruction, controlling the data sending module to output the to-be-sent messages to the message transmission unit in sequence according to the sequence number marks; controlling the message transmission unit to send the messages in sequence according to the sequence number marks.
[0012] Optionally, based on a message sending instruction, the control data sending module outputs the messages to be sent to the message transmission unit in sequence according to the sequence number mark, including: configuring the second flag bit of the message transmission unit based on the message sending instruction, and controlling the data sending module to read the second flag bit of the message transmission unit whose sequence number is marked as the first sequence number; wherein the second flag bit is used to indicate that the message transmission unit is used to send data; when the second flag bit is in an enabled state, the control data sending module outputs the messages to be sent to the message transmission unit; when the message transmission unit completes message storage, the control data sending module reads the second flag bit of the message transmission unit marked with the next sequence number.
[0013] Optionally, based on the message sending instruction, the control data sending module outputs the messages to be sent to the message transmission unit in sequence according to the sequence number mark, and also includes: when the second flag bit of the next message transmission unit read is in the non-enabled state and the message to be sent has been stored, the control data sending module returns the second flag bit of the message transmission unit whose sequence number is marked as the first sequence number; when the second flag bit of the next message transmission unit read is in the non-enabled state and the message to be sent has not been stored, it is determined that the message transmission unit is busy sending.
[0014] Optionally, when the second flag bit of the next message transmission unit read is in a disabled state and the message to be sent has not been stored completely, after determining that the message transmission unit is busy sending, it also includes: based on the message transmission unit being busy sending, configuring the second flag bit of at least one message transmission unit to be enabled.
[0015] The present disclosure provides a digital signal processor, a message receiving method and a message sending method. The digital signal processor includes a message transmission module and a configuration module. The message transmission module includes at least two units to be configured. Each unit to be configured is connected in parallel. According to the arrangement order of each unit to be configured, a sequence number mark is stored in the unit to be configured to determine the arrangement position of the unit to be configured in all units to be configured. The configuration module is used to configure the units to be configured in sequence according to the sequence number mark. The configured units to be configured are switched to message transmission units, which can be used to receive or send messages. In the process of receiving the message, each message transmission unit receives the message in sequence according to the sequence number mark, and sends the received message to the digital signal processor for storage in sequence according to the sequence number mark, thereby realizing the first-in-first-out receiving process of the message. In the process of sending the message, the digital signal processor stores the message to be sent in sequence according to the sequence number mark in each message transmission unit, and each message transmission unit sends the stored message to be sent out in sequence according to the sequence number mark, thereby realizing the first-in-first-out sending process of the message. Thus, the present disclosure realizes the first-in-first-out mechanism of the message in the process of receiving and sending, and in the process of multi-message data transmission, each message transmission unit can store the message to be transmitted, so that multiple message data can be transmitted in sequence in one transmission process, thereby improving the efficiency of data transmission. In addition, the messages to be transmitted can be stored in sequence according to the arrangement order of each message transmission unit, and then the messages to be transmitted can be transmitted in sequence according to the arrangement order, so that the arrangement order of the stored messages is consistent with the arrangement order of the transmitted messages, thereby ensuring the accuracy of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments of the present disclosure will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0017] Figure 1 A schematic diagram of the structure of a digital signal processor provided in an embodiment of the present disclosure.
[0018] Figure 2 A flowchart of a message receiving method provided in an embodiment of the present disclosure.
[0019] Figure 3 A flowchart of a message sending method provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0020] The features and exemplary embodiments of various aspects of the present disclosure will be described in detail below. In the detailed description below, many specific details are proposed to provide a comprehensive understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present disclosure by illustrating the examples of the present disclosure.
[0021] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure can be combined with each other. The embodiments will be described in detail below in conjunction with the accompanying drawings.
[0022] Figure 1 A schematic diagram of the structure of a digital signal processor provided by an embodiment of the present disclosure is shown in FIG. Figure 1 As shown, the digital signal processor includes: a message transmission module 100 and a configuration module 200.
[0023] The message transmission module 100 includes at least two units to be configured 110, and the units to be configured 110 store serial number tags; wherein the serial number tags are tag information reflecting the arrangement order of the units to be configured 110; the configuration module 200 is used to configure each unit to be configured 110 in sequence as a message transmission unit 120 according to the serial number tags; wherein the message transmission unit 120 is used to receive messages in sequence according to the serial number tags, and to send messages in sequence according to the serial number tags.
[0024] Exemplarily, the message transmission module 100 includes a first unit to be configured 111, a second unit to be configured 112, a third unit to be configured 113, a fourth unit to be configured 114, and a fifth unit to be configured 115. The first unit to be configured 111, the second unit to be configured 112, the third unit to be configured 113, the fourth unit to be configured 114, and the fifth unit to be configured 115 are connected in parallel, and sequentially store serial number marks in the order of arrangement, the serial number mark stored in the first unit to be configured 111 is 1, the serial number mark stored in the second unit to be configured 112 is 2, the serial number mark stored in the third unit to be configured 113 is 3, the serial number mark stored in the fourth unit to be configured 114 is 4, and the serial number mark stored in the fifth unit to be configured 115 is 5, so the serial number mark can reflect the arrangement order of the units to be configured 110 in each unit to be configured 110.
[0025] The configuration module 200 is connected to the message transmission module 100, and the configuration module 200 is used to configure the unit to be configured 110, and configure it as a message transmission unit 120 that can perform data transmission by setting the data transmission flag bit of the unit to be configured 110. For example, the data transmission flag bit of the first unit to be configured 111 is enabled to configure it as the first message transmission unit 121, the data flag bit of the second unit to be configured 112 is enabled to configure it as the second message transmission unit 122, the data flag bit of the third unit to be configured 113 is enabled to configure it as the third message transmission unit 123, the data transmission flag bits of the fourth unit to be configured 114 and the fifth unit to be configured 115 are maintained in a non-enabled state, and the sequence number mark stored in the first message transmission unit 121 is still No. 1, the sequence number mark stored in the second message transmission unit 122 is still No. 2, and the sequence number mark stored in the third message transmission unit 123 is still No. 3.
[0026] Taking the number of messages to be transmitted as 3 as an example, in the process of receiving messages, the message transmission unit 120 first receives and stores the first message in the first message transmission unit 121, then receives and stores the second message in the second message transmission unit 122, and finally receives and stores the third message in the third message transmission unit 123 according to the sequence number mark. The digital signal processor then reads the first message received by the first message transmission unit 121, then reads the second message received by the second message transmission unit 122, and finally reads the third message received by the third message transmission unit 123 according to the sequence number mark. In this way, each message transmission unit 120 stores the messages to be transmitted in sequence according to the arrangement order, and the digital signal processor reads the stored messages to be transmitted according to the arrangement order, thereby realizing the first-in-first-out reception process of the messages, so that the arrangement order of the messages received by the message transmission unit 120 is consistent with the arrangement order of the messages read by the digital signal processor, thereby ensuring the accuracy of data reception.
[0027] Taking the number of messages to be transmitted as 3 as an example, in the process of sending messages, the digital signal processor first stores the first message in the first message transmission unit 121 according to the arrangement order, then stores the second message in the second message transmission unit 122, and finally stores the third message in the third message transmission unit 123. The message transmission unit 120 then sends the first message stored in the first message transmission unit 121 according to the arrangement order, then sends the second message stored in the second message transmission unit 122, and finally sends the third message stored in the third message transmission unit 123. In this way, the digital signal processor stores the messages to be transmitted in the message transmission unit 120 in sequence according to the arrangement order, and the message transmission unit 120 then sends the stored messages to be transmitted according to the arrangement order, thereby realizing the first-in-first-out sending process of the messages, so that the arrangement order of the messages stored by the digital signal processor to the message transmission unit 120 is consistent with the arrangement order of the messages sent by the message transmission unit 120, thereby ensuring the accuracy of data transmission.
[0028] In the process of receiving the message of the present disclosure, each message transmission unit 120 receives the message in sequence according to the sequence number mark, and sends the received message to the digital signal processor for storage in sequence according to the sequence number mark, thereby realizing the first-in-first-out receiving process of the message. In the process of sending the message, the digital signal processor stores the message to be sent in sequence in each message transmission unit 120 according to the sequence number mark, and each message transmission unit then sends the stored message to be sent out in sequence according to the sequence number mark, thereby realizing the first-in-first-out sending process of the message. Therefore, the present disclosure realizes the first-in-first-out mechanism of the message in the process of receiving and sending, and in the process of multi-message data transmission, each message transmission unit 120 can store the message to be transmitted, so that multiple message data can be transmitted in sequence in one transmission process, thereby improving the efficiency of data transmission. Furthermore, the messages to be transmitted can be stored in sequence according to the arrangement order of each message transmission unit 120, and then transmitted in sequence according to the arrangement order, so that the arrangement order of the stored messages is consistent with the arrangement order of the transmitted messages, thereby ensuring the accuracy of data transmission.
[0029] It should be noted that the number of units to be configured, the number of message transmission units, and the number of messages to be transmitted are all examples, and the specific number settings need to be determined according to actual conditions and are not specifically limited here.
[0030] In some embodiments, the digital signal processor also includes a reading module; the message transmission unit is also used to configure a first flag bit according to the received message; wherein the first flag bit is used to indicate that the message transmission unit has stored data; the reading module is used to read the messages received by the message transmission unit enabled by the first flag bit in sequence according to the serial number mark.
[0031] Exemplarily, the number of message transmission units is 4, and the number of messages to be transmitted is 3. In the process of receiving messages, the message transmission unit first receives the first message and stores it in the first message transmission unit according to the sequence number mark. After the first message transmission unit determines to store the first message, it enables the first flag bit, indicating that the first message transmission unit has stored data. Then, the second message is received and stored in the second message transmission unit. After the second message transmission unit determines to store the second message, it enables the first flag bit, indicating that the second message transmission unit has stored data. Finally, the third message is received and stored in the third message transmission unit. After the third message transmission unit determines to store the third message, it enables the first flag bit, indicating that the third message transmission unit has stored data. Since no message is stored in the fourth message transmission unit, the first flag bit remains in the disabled state.
[0032] The reading module then identifies the first flag bit of the first message transmission unit according to the sequence number mark, and after determining that the first flag bit is enabled, reads the first message received by the first message transmission unit, and switches the first flag bit of the first message transmission unit to a non-enabled state. After completing the reading of the first message stored in the first message transmission unit, the reading module identifies the first flag bit of the second message transmission unit, and after determining that the first flag bit is enabled, reads the second message received by the second message transmission unit, and switches the first flag bit of the second message transmission unit to a non-enabled state. After completing the reading of the second message stored in the second message transmission unit, the reading module identifies the first flag bit of the third message transmission unit, and after determining that the first flag bit is enabled, reads the third message received by the third message transmission unit, and switches the first flag bit of the third message transmission unit to a non-enabled state. After completing the reading of the third message stored in the third message transmission unit, the reading module identifies the first flag bit of the fourth message transmission unit, and after determining that the first flag bit is in a non-enabled state, the reading module returns to identifying the first flag bit of the first message transmission unit. As a result, each message transmission unit stores the messages to be transmitted in sequence according to the arrangement order, and the digital signal processor reads the stored messages to be transmitted according to the arrangement order, thereby realizing the first-in-first-out reception process of the messages, so that the arrangement order of the messages received by the message transmission unit is consistent with the arrangement order of the messages read by the reading module, ensuring the accuracy of data reception. In addition, in the process of receiving multiple message data, each message transmission unit can store the received messages, so that multiple message data can be received in sequence in one receiving process, improving the efficiency of data reception.
[0033] It should be noted that the number of message transmission units being 4 and the number of messages to be transmitted being 3 are both examples, and the specific number of message transmission units and the data of the transmitted messages are determined according to actual conditions and are not specifically limited here.
[0034] In some embodiments, the digital signal processor also includes a data sending module; the data sending module is used to store the messages to be sent in sequence according to the sequence number tags into the message transmission unit enabled by the second flag bit; wherein the second flag bit is used to indicate that the message transmission unit is used to send data; the message transmission unit is also used to send the messages to be sent in sequence according to the sequence number tags.
[0035] For example, the number of message transmission units is 4. Before sending a message, the digital signal processor first configures the second flag bit of the message transmission unit, and only the message transmission unit enabled by the second flag bit can be used to send the message.
[0036] Take the configuration of enabling the second flag bits of the first message transmission unit, the second message transmission unit, and the third message transmission unit, and the number of messages to be transmitted is 4 as an example. In the process of sending messages, the data sending module identifies the second flag bits of the message transmission units in sequence according to the sequence number mark. The data sending module first identifies the second flag bit of the first message transmission unit. After determining that the second flag bit is enabled, the data sending module stores the first message in the first message transmission unit. After the first message is stored in the first message transmission unit, the data sending module identifies the second flag bit of the second message transmission unit. After determining that the second flag bit is enabled, the data sending module stores the second message in the second message transmission unit. After the second message is stored in the second message transmission unit, the data sending module identifies the second flag bit of the third message transmission unit. After determining that the second flag bit is enabled, the data sending module stores the third message in the third message transmission unit. After the third message is stored in the third message transmission unit, the data sending module identifies the second flag bit of the fourth message transmission unit, determines that the second flag bit is in the disabled state, and there are still messages to be transmitted that have not been stored in the message transmission unit, then the data sending module determines that the transmission is busy, and prompts that the number of message transmission units enabled by the second flag bit needs to be increased.
[0037] Take the configuration of enabling the second flag bits of the first message transmission unit, the second message transmission unit, and the third message transmission unit, and the number of messages to be transmitted is 3 as an example. In the process of sending messages, the data sending module identifies the second flag bits of the message transmission units in sequence according to the sequence number mark. The data sending module first identifies the second flag bit of the first message transmission unit. After determining that the second flag bit is enabled, the data sending module stores the first message in the first message transmission unit. After the first message is stored in the first message transmission unit, the data sending module identifies the second flag bit of the second message transmission unit. After determining that the second flag bit is enabled, the data sending module stores the second message in the second message transmission unit. After the second message is stored in the second message transmission unit, the data sending module identifies the second flag bit of the third message transmission unit. After determining that the second flag bit is enabled, the data sending module stores the third message in the third message transmission unit. After the third message is stored in the third message transmission unit, the data transmission module identifies the second flag of the fourth message transmission unit, determines that the second flag is in the non-enabled state, and all messages are stored in the message transmission unit, the data transmission module returns to the first message transmission unit, and waits for the next round of data transmission process. After all the messages to be transmitted are stored in the message transmission unit, the first message stored in the first message transmission unit is sent first, then the second message stored in the second message transmission unit is sent, and finally the third message stored in the third message transmission unit is sent. Thus, the first-in-first-out message transmission process is realized, so that the arrangement order of the messages stored in the message transmission unit by the data transmission module is consistent with the arrangement order of the messages sent by the message transmission unit, ensuring the accuracy of data transmission. And in the process of sending multiple message data, each message transmission unit can store the message to be sent, so that multiple message data can be sent in sequence in one sending process, which improves the efficiency of data transmission.
[0038] It should be noted that the number of message transmission units being 4 and the number of messages to be transmitted being 3 or 4 are all examples, and the specific number of message transmission units and the data of the transmitted messages are determined according to actual conditions and are not specifically limited here.
[0039] Figure 2 The flowchart of a message receiving method provided by an embodiment of the present disclosure is shown in FIG. 1 , wherein the message receiving method is applied to a digital signal processor provided by any of the above embodiments; the digital signal processor includes a reading module. Figure 2 As shown, the message receiving method includes: S310 and S320.
[0040] S310, obtaining a message receiving instruction.
[0041] Specifically, the message receiving instruction is an instruction to instruct the digital signal processor to receive message data. After obtaining the message receiving instruction, the digital signal processor initializes the reading module to make the reading module wait for reading the message transmission unit with the first sequence number.
[0042] S320 controls the message transmission unit to receive messages in sequence according to the sequence number tags based on the message receiving instruction, and controls the reading module to read the messages received by the message transmission unit in sequence starting from the message transmission unit with the sequence number marked as the first sequence number.
[0043] Specifically, after receiving the message receiving instruction, the digital signal processing module controls the message transmission unit to start receiving the messages sent by the external communication module to the digital signal processor in sequence according to the sequence number mark. While the message transmission unit receives the message, the reading module continues to read the message transmission unit with the sequence number marked as the first sequence number. After identifying that the message transmission unit with the sequence number marked as the first sequence number has data stored, the reading module reads and stores the data. After the storage is completed, the message transmission unit with the sequence number marked as the second sequence number is read again until all the message transmission units are read, or all the messages sent by the external communication module are received. Thus, the present disclosure realizes the first-in-first-out receiving process of the message. The reading module reads the data transmission unit that receives the message first, so that the arrangement order of the messages received by the message transmission unit is consistent with the arrangement order of the messages read by the reading module, thereby ensuring the accuracy of data reception.
[0044] In some embodiments, based on the message receiving instruction, controlling the reading module to sequentially read the messages received by the message transmission unit based on the sequence number tags includes:
[0045] Based on the message receiving instruction, the control reading module reads the first flag bit of the message transmission unit whose sequence number is marked as the first sequence number; wherein the first flag bit is used to indicate that the message transmission unit has stored data. When the first flag bit is in an enabled state, the control reading module reads the message received by the message transmission unit. When the reading module completes the message reading, the control reading module reads the first flag bit of the message transmission unit marked with the next sequence number.
[0046] Specifically, after receiving the message, the message transmission unit will enable the internal first flag bit to indicate that the storage of the received message is completed. After the digital signal processing module receives the message receiving instruction, the message transmission unit will receive the message in sequence according to the sequence number mark, and enable the first flag bit according to the received message. And the reading module starts to identify the first flag bit of the message transmission unit from the message transmission unit with the sequence number marked as the first sequence number. When it is identified that the first flag bit of the message transmission unit with the sequence number marked as the first sequence number is enabled, the reading module determines that the message transmission unit has received the message, and then reads and stores the message. At the same time, the first flag bit of the message transmission unit with the first sequence number is switched to a non-enabled state to avoid the reading module from mistakenly reading the message transmission unit with the first sequence number that has no stored message. After the reading module completes reading the message stored in the message transmission unit of the first sequence number, the reading module continues to identify the first flag bit of the message transmission unit marked with the next sequence number, that is, the first flag bit of the message transmission unit of the second sequence number, and reads the stored message until the messages stored in all the message transmission units are read. Thus, the present disclosure implements the first-in-first-out receiving process of the message, and the reading module reads the data transmission unit that receives the message first, so that the arrangement order of the message received by the message transmission unit is consistent with the arrangement order of the message read by the reading module, thereby ensuring the accuracy of data reception. In addition, in the process of the reading module identifying the first flag bit of the message transmission unit of the first sequence number and reading the stored message of the message transmission unit of the first sequence number, the subsequent message transmission unit has completed the reception and storage of all or part of the messages, so the reading module does not need to wait for the message transmission unit to store the message in the process of identifying the first flag bit of the message transmission unit of the subsequent sequence number and reading the stored message, thereby ensuring the speed of data transmission.
[0047] In some embodiments, based on the message receiving instruction, the control reading module reads the messages received by the message transmission unit in sequence based on the serial number mark, and also includes: when the first flag bit of the next message transmission unit read is in a non-enabled state, the control reading module returns the first flag bit of the message transmission unit whose read serial number is marked as the first serial number.
[0048] Specifically, when the reading module reads that the first flag bit of the next message transmission unit is in the disabled state, it can be determined that all messages have been fully accepted and stored at this time. The reading module can return to re-read the message transmission unit with the first sequence number to perform the next round of message receiving process.
[0049] Figure 3The flowchart of a message sending method provided by an embodiment of the present disclosure is shown in FIG. 1 , wherein the message sending method is applied to a digital signal processor provided by any of the above embodiments; the digital signal processor includes a data sending module. Figure 3 As shown, the message sending method includes: S410-S430.
[0050] S410: Obtain a message sending instruction.
[0051] Specifically, the message sending instruction is an instruction to instruct the digital signal processor to send message data. After obtaining the message sending instruction, the digital signal processor initializes the data sending module, so that the data sending module waits for the message transmission unit with the first sequence number to output the message to be sent.
[0052] S420. Based on the message sending instruction, control the data sending module to output the messages to be sent to the message transmission unit in sequence according to the sequence numbers.
[0053] S430. The control message transmission unit sends messages in sequence according to the sequence number tags.
[0054] Specifically, after receiving the message sending instruction, the digital signal processor controls the data sending module to output the first message to be sent to the message transmission unit with the first sequence number according to the sequence number mark, and after the first message to be sent is stored in the message transmission unit with the first sequence number, the data sending module outputs the second message to be sent to the message transmission unit with the second sequence number until all the messages to be sent are stored in the message transmission unit in sequence. After all the messages to be sent are stored in the message transmission unit, the message transmission unit sends messages to the external communication module in sequence starting from the message transmission unit with the first sequence number according to the sequence number mark until all the messages to be sent are completely sent and end. Thus, the present disclosure realizes the first-in-first-out message sending process, the data sending module first stores all the data to be sent in the message transmission unit in sequence according to the sequence number mark, and the message transmission unit then sends the data in sequence according to the sequence number mark, so that the arrangement order of the messages stored in the message transmission unit by the data sending module is consistent with the arrangement order of the messages sent by the message transmission unit, thereby ensuring the accuracy of data sending.
[0055] In some embodiments, based on a message sending instruction, the control data sending module outputs the to-be-sent messages to the message transmission unit in sequence according to the sequence number mark, including: based on the message sending instruction, configuring the second flag bit of the message transmission unit, and controlling the data sending module to read the second flag bit of the message transmission unit whose sequence number is marked as the first sequence number; wherein the second flag bit is used to indicate that the message transmission unit is used to send data; when the second flag bit is in an enabled state, the control data sending module outputs the to-be-sent messages to the message transmission unit; when the message transmission unit completes message storage, the control data sending module reads the second flag bit of the message transmission unit marked with the next sequence number.
[0056] Specifically, before sending a message, the digital signal processor first configures the second flag of the message transmission unit, and only the message transmission unit enabled by the second flag can be used to send a message. After receiving the message sending instruction, the digital signal processor configures the second flag of the message transmission unit that needs to send the message, so that it is in an enabled state. The data sending module first identifies the second flag of the message transmission unit marked with the first sequence number according to the sequence number mark. When it is identified that the second flag is in an enabled state, the data sending module outputs the message to be sent to the message transmission unit of the first sequence number. After the message transmission unit of the first sequence number completes the storage of the message, the data sending module reads and identifies the second flag of the message transmission unit marked with the next sequence number until the storage of all the messages to be sent is completed. After the storage of all the messages to be sent is completed, the message transmission unit sends the message to the external communication module in sequence according to the sequence number mark, thereby realizing the sending of the message. Therefore, the present invention realizes a first-in-first-out message sending process, in which the data sending module first stores all the data to be sent into the message transmission unit in sequence according to the sequence number marks, and the message transmission unit then sends the data in sequence according to the sequence number marks, so that the arrangement order of the messages stored in the message transmission unit by the data sending module is consistent with the arrangement order of the messages sent by the message transmission unit, thereby ensuring the accuracy of data sending.
[0057] In some embodiments, based on the message sending instruction, the control data sending module outputs the messages to be sent to the message transmission unit in sequence according to the serial number mark, and also includes: when the second flag bit of the next message transmission unit read is in a non-enabled state and the message to be sent is stored, the control data sending module returns the second flag bit of the message transmission unit whose serial number mark is the first serial number.
[0058] Specifically, when the data sending module reads that the second flag bit of the next message transmission unit is in a non-enabled state, it is determined that the next message transmission unit has not been configured for sending and cannot be sent, and the messages to be sent have been completely stored in the message transmission unit. Therefore, it can be considered that the number of messages to be sent is exactly the same as the number of message transmission units that have completed the configuration. The data sending module can return to read the second flag bit of the message transmission unit whose sequence number is marked as the first sequence number, and wait for the next round of message sending.
[0059] When the second flag bit of the next message transmission unit read is in a disabled state and the message to be sent has not been completely stored, it is determined that the message transmission unit is busy sending.
[0060] For example, the number of message transmission units is 4, the second flags of the first message transmission unit, the second message transmission unit, and the third message transmission unit are configured to be enabled, and the number of messages to be transmitted is 4. In the process of sending messages, the data sending module identifies the second flags of the message transmission units in sequence according to the sequence number mark. The data sending module first identifies the second flag of the first message transmission unit. After determining that the second flag is enabled, the data sending module stores the first message in the first message transmission unit. After the first message is stored in the first message transmission unit, the data sending module identifies the second flag of the second message transmission unit. After determining that the second flag is enabled, the data sending module stores the second message in the second message transmission unit. After the second message is stored in the second message transmission unit, the data sending module identifies the second flag of the third message transmission unit. After determining that the second flag is enabled, the data sending module stores the third message in the third message transmission unit. After the third message is stored in the third message transmission unit, the data sending module identifies the second flag bit of the fourth message transmission unit, and after determining that the second flag bit is in the disabled state, it is determined that the next message transmission unit has not been configured for sending and cannot be sent. If there are still messages to be transmitted that have not been stored in the message transmission unit, it can be considered that the number of messages to be sent is greater than the number of message transmission units that have completed the configuration, then the data sending module determines that the sending is busy, and the message transmission unit stops sending the message to avoid missing or wrong sending of the message.
[0061] It should be noted that the number of message transmission units and the number of messages to be transmitted are examples, and the specific number settings need to be determined according to actual conditions and are not specifically limited here.
[0062] In some embodiments, when the second flag bit of the next message transmission unit read is in a disabled state and the message to be sent has not been stored completely, after determining that the message transmission unit is busy sending, it also includes: based on the message transmission unit being busy sending, configuring the second flag bit of at least one message transmission unit to be enabled.
[0063] Specifically, when it is determined that the message transmission unit is busy, it can be considered that the number of messages to be sent exceeds the number of message transmission units that have completed configuration and are waiting to be sent, so it is necessary to configure other message transmission units whose second flags are in a non-enabled state so that they can send messages. Therefore, the present disclosure can adjust the number of message transmission units that can send messages according to the number of messages to be sent, thereby avoiding the problem that too many messages need to be sent, resulting in the inability to send messages or the occurrence of missing messages, and improving the accuracy of data transmission.
[0064] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0065] The above are only specific embodiments of the present disclosure, so that those skilled in the art can understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to these embodiments herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A digital signal processor, characterized in that: include: The message transmission module comprises at least two units to be configured, wherein the units to be configured store serial number marks; wherein the serial number marks are mark information reflecting the arrangement order of the units to be configured; A configuration module, configured to sequentially configure each of the units to be configured as a message transmission unit according to the sequence number mark; The message transmission unit is used to receive messages in sequence according to the sequence number tags, and to send messages in sequence according to the sequence number tags.
2. The digital signal processor according to claim 1, characterized in that Also includes a reading module; The message transmission unit is further used to configure a first flag bit according to the received message; wherein the first flag bit is used to indicate that the message transmission unit has stored data; The reading module is used to read the messages received by the message transmission unit enabled by the first flag in sequence according to the sequence number mark.
3. The digital signal processor according to claim 1, characterized in that: Also includes a data sending module; The data sending module is used to store the to-be-sent messages in the message transmission unit enabled by the second flag bit in sequence according to the sequence number mark; wherein the second flag bit is used to indicate that the message transmission unit is used to send data; The message transmission unit is also used to send the to-be-sent messages in sequence according to sequence number tags.
4. A message receiving method, characterized in that: A digital signal processor applied to any one of claims 1 to 3; The digital signal processor comprises a reading module; The method comprises: Get the message receiving instruction; Based on the message receiving instruction, the message transmission unit is controlled to receive messages in sequence according to the sequence number mark, and the reading module is controlled to read the messages received by the message transmission unit in sequence starting from the message transmission unit with the sequence number mark as the first sequence number.
5. The message receiving method according to claim 4, characterized in that: The controlling the reading module to sequentially read the messages received by the message transmission unit based on the sequence number mark based on the message receiving instruction comprises: Based on the message receiving instruction, control the reading module to read the first flag bit of the message transmission unit whose serial number is marked as the first serial number; wherein the first flag bit is used to indicate that the message transmission unit has stored data; When the first flag bit is in an enabled state, controlling the reading module to read the message received by the message transmission unit; When the reading module completes reading the message, the reading module is controlled to read the first flag bit of the message transmission unit marked with the next sequence number.
6. The message receiving method according to claim 5, characterized in that: The method of controlling the reading module to sequentially read the messages received by the message transmission unit based on the sequence number mark based on the message receiving instruction further includes: When the first flag bit of the next message transmission unit read is in a disabled state, the reading module is controlled to return to reading the first flag bit of the message transmission unit whose sequence number is marked as the first sequence number.
7. A message sending method, characterized in that: A digital signal processor applied to any one of claims 1 to 3; The digital signal processor includes a data sending module; The method comprises: Get the message sending instruction; Based on the message sending instruction, control the data sending module to output the to-be-sent messages to the message transmission unit in sequence according to the sequence number tags; Control the message transmission unit to send messages in sequence according to the sequence number tags.
8. The message sending method according to claim 7, characterized in that: The step of controlling the data sending module to output the to-be-sent messages to the message transmission unit in sequence according to the sequence number tags based on the message sending instruction comprises: Based on the message sending instruction, configure the second flag bit of the message transmission unit, and control the data sending module to read the second flag bit of the message transmission unit whose sequence number is marked as the first sequence number; wherein the second flag bit is used to indicate that the message transmission unit is used to send data; When the second flag bit is in the enabled state, controlling the data sending module to output the message to be sent to the message transmission unit; When the message transmission unit completes message storage, the data sending module is controlled to read the second flag bit of the message transmission unit marked with the next sequence number.
9. The message sending method according to claim 8, characterized in that: The method of controlling the data sending module to output the to-be-sent messages to the message transmission unit in sequence according to the sequence number tags based on the message sending instruction further includes: When the second flag bit of the next message transmission unit read is in a disabled state and the storage of the message to be sent is completed, control the data sending module to return to read the second flag bit of the message transmission unit whose sequence number is marked as the first sequence number; When the second flag bit of the next message transmission unit read is in a disabled state and the to-be-sent message has not been completely stored, it is determined that the message transmission unit is busy sending.
10. The message sending method according to claim 9, characterized in that: When the second flag bit of the next message transmission unit read is in a disabled state and the to-be-sent message has not been completely stored, after determining that the message transmission unit is busy sending, the method further includes: Based on the message transmission unit being busy sending, a second flag bit of at least one message transmission unit is configured to be enabled.