Semiconductor structure

Abstract

The invention discloses a semiconductor structure which comprises a substrate, a capacitor and an oxide semiconductor field effect transistor. The capacitor is on the substrate. The oxide semiconductor field effect transistor is located on the substrate. The oxide semiconductor field effect transistor is electrically connected to the capacitor.

Description

Technical Field

[0001] The present invention relates to a semiconductor structure, and in particular to a semiconductor structure including a capacitor. Background Art

[0002] Currently, an integrated capacitor that can be integrated with other semiconductor devices (such as complementary metal oxide semiconductor (CMOS) devices) has been developed. However, the leakage current of the current integrated capacitor is relatively large and cannot withstand a higher operating voltage. Therefore, how to effectively reduce the leakage current of the integrated capacitor and increase the operating voltage of the integrated capacitor is a goal that is being continuously worked on. Summary of the invention

[0003] The invention provides a semiconductor structure which can effectively reduce the leakage current of a capacitor and increase the operating voltage of the capacitor.

[0004] The present invention provides a semiconductor structure, including a substrate, a capacitor and an oxide semiconductor field effect transistor (OSFET). The capacitor is located on the substrate. The oxide semiconductor field effect transistor is located on the substrate. The oxide semiconductor field effect transistor is electrically connected to the capacitor.

[0005] According to an embodiment of the present invention, in the semiconductor structure, the capacitor may be a trench capacitor.

[0006] According to an embodiment of the present invention, in the semiconductor structure, the capacitor may be a parallel-plate capacitor.

[0007] According to an embodiment of the present invention, in the semiconductor structure, the oxide semiconductor field effect transistor may be an oxide semiconductor thin film transistor (OSTFT).

[0008] According to an embodiment of the present invention, in the semiconductor structure, the oxide semiconductor field effect transistor may be located above the capacitor.

[0009] According to an embodiment of the present invention, in the semiconductor structure, the oxide semiconductor field effect transistor may be located below the capacitor.

[0010] According to an embodiment of the present invention, in the semiconductor structure, the oxide semiconductor field effect transistor may be located on one side of the capacitor.

[0011] According to an embodiment of the present invention, in the above-mentioned semiconductor structure, the oxide semiconductor field effect transistor may include a first electrode layer, a first dielectric layer, a channel layer, a second electrode layer and a third electrode layer. The first electrode layer is located on the substrate. The first dielectric layer is located on the first electrode layer. The channel layer is located on the first dielectric layer and is located above the first electrode layer. The second electrode layer and the third electrode layer are located on the first dielectric layer and are located on both sides of the channel layer.

[0012] According to an embodiment of the present invention, in the semiconductor structure, the material of the first electrode layer is, for example, molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium or an alloy thereof.

[0013] According to an embodiment of the present invention, in the semiconductor structure, the material of the first dielectric layer is, for example, silicon oxide, silicon nitride, or hafnium nitride.

[0014] According to an embodiment of the present invention, in the semiconductor structure, the material of the channel layer may be an oxide semiconductor. The oxide semiconductor may include indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium zinc oxide (IZO), cobalt oxide (CoO x ), nickel oxide (NiO x ), Strontium copper oxide (SrCu2O x ), copper aluminum oxide (CuAlO2), copper indium oxide (CuInO2) or copper gallium oxide (CuGaO2).

[0015] According to an embodiment of the present invention, in the semiconductor structure, the material of the second electrode layer and the material of the third electrode layer may be an N-type oxide semiconductor. The N-type oxide semiconductor may include indium gallium zinc oxide (IGZO), zinc oxide (ZnO) or indium zinc oxide (IZO), and the N-type oxide semiconductor may have an N-type dopant.

[0016] According to an embodiment of the present invention, in the semiconductor structure, the material of the second electrode layer and the material of the third electrode layer may be a P-type oxide semiconductor. The P-type oxide semiconductor may include cobalt oxide (CoO x ), nickel oxide (NiO x ), Strontium copper oxide (SrCu2O x ), copper aluminum oxide (CuAlO2), copper indium oxide (CuInO2) or copper gallium oxide (CuGaO2), and the P-type oxide semiconductor may have a P-type dopant.

[0017] According to an embodiment of the present invention, in the semiconductor structure, the capacitor may be located in the substrate. The capacitor may include a fourth electrode layer, a fifth electrode layer, a second dielectric layer and a third dielectric layer. The fourth electrode layer is located in the substrate. The fifth electrode layer is located on the fourth electrode layer. The second dielectric layer is located between the fourth electrode layer and the substrate. The third dielectric layer is located between the fourth electrode layer and the fifth electrode layer.

[0018] According to an embodiment of the present invention, in the semiconductor structure, the second electrode layer may be electrically connected to the fourth electrode layer.

[0019] According to an embodiment of the present invention, in the semiconductor structure, the second electrode layer may be electrically connected to the fifth electrode layer.

[0020] According to an embodiment of the present invention, in the above-mentioned semiconductor structure, a dielectric layer structure may also be included. The dielectric layer structure is located on the substrate. The capacitor and the oxide semiconductor field effect transistor may be located in the dielectric layer structure. The capacitor may include a fourth electrode layer, a fifth electrode layer and a second dielectric layer. The fourth electrode layer is located in the dielectric layer structure. The fifth electrode layer is located on the fourth electrode layer. The second dielectric layer is located between the fourth electrode layer and the fifth electrode layer.

[0021] According to an embodiment of the present invention, in the semiconductor structure, the second electrode layer may be electrically connected to the fourth electrode layer.

[0022] According to an embodiment of the present invention, in the semiconductor structure, the second electrode layer may be electrically connected to the fifth electrode layer.

[0023] According to an embodiment of the present invention, the semiconductor structure may further include a through-substrate via (TSV). The substrate through-substrate via is located in the substrate and may penetrate the substrate.

[0024] Based on the above, in the semiconductor structure proposed by the present invention, since the oxide semiconductor field effect transistor is electrically connected to the capacitor, the leakage current of the capacitor can be effectively reduced and the operating voltage of the capacitor can be increased.

[0025] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 are cross-sectional views of semiconductor structures according to some embodiments of the present invention;

[0027] Figure 2 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0028] Figure 3are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0029] Figure 4 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0030] Figure 5 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0031] Figure 6 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0032] Figure 7 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0033] Figure 8 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0034] Fig. 9 are cross-sectional views of semiconductor structures according to other embodiments of the present invention;

[0035] Fig.10 sectional views of semiconductor structures according to some other embodiments of the present invention.

[0036] Explanation of symbols

[0037] 10,20,30,40,50:Semiconductor structure

[0038] 100: Base

[0039] 102,202:Capacitor

[0040] 104:Oxide semiconductor field effect transistor

[0041] 106,108,116,122,124,206,208: Electrode layer

[0042] 110,112,118,130,210: Dielectric layer

[0043] 114: Dielectric layer structure

[0044] 120: Channel layer

[0045] 126:Internal connection structure

[0046] 128: Base perforation DETAILED DESCRIPTION

[0047] The following examples are listed and described in detail with reference to the accompanying drawings, but the examples provided are not intended to limit the scope of the present invention. For ease of understanding, the same components will be described with the same symbols in the following description. In addition, the drawings are for illustrative purposes only and are not drawn to their original size. In fact, the size of various features may be increased or decreased arbitrarily for the sake of clarity.

[0048] Figure 1 is a cross-sectional view of a semiconductor structure according to some embodiments of the present invention. Figure 2 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention.

[0049] Please refer to Figure 1 , the semiconductor structure 10 includes a substrate 100, a capacitor 102, and an oxide semiconductor field effect transistor 104. In some embodiments, the substrate 100 may be a semiconductor substrate, such as a silicon substrate.

[0050] The capacitor 102 is located on the substrate 100. In some embodiments, the capacitor 102 may be an integrated capacitor. In this embodiment, the capacitor 102 may be a trench capacitor 102. In some embodiments, the capacitor 102 may be located in the substrate 100. In some embodiments, the capacitor 102 may include an electrode layer 106, an electrode layer 108, a dielectric layer 110, and a dielectric layer 112. The electrode layer 106 is located in the substrate 100. A portion of the electrode layer 106 may be located above the top surface of the substrate 100. In some embodiments, the material of the electrode layer 106 is, for example, doped polysilicon. The electrode layer 108 is located on the electrode layer 106. A portion of the electrode layer 108 may be located above the top surface of the substrate 100. In some embodiments, the material of the electrode layer 108 is, for example, doped polysilicon. The dielectric layer 110 is located between the electrode layer 106 and the substrate 100. In some embodiments, the material of the dielectric layer 110 is, for example, silicon oxide. The dielectric layer 112 is located between the electrode layer 106 and the electrode layer 108. In some embodiments, the material of the dielectric layer 112 is, for example, silicon oxide or a high-k dielectric layer.

[0051] The semiconductor structure 10 may further include a dielectric layer structure 114. The dielectric layer structure 114 is located on the substrate 100. The dielectric layer structure 114 may cover the capacitor 102. In some embodiments, the dielectric layer structure 114 may be a multi-layer structure. In some embodiments, the material of the dielectric layer structure is, for example, silicon oxide, silicon nitride, or a combination thereof.

[0052] The oxide semiconductor field effect transistor 104 is located on the substrate 100. In this embodiment, the oxide semiconductor field effect transistor 104 may be located above the capacitor 102, thereby effectively reducing the area of ​​the semiconductor structure 10. In some embodiments, the oxide semiconductor field effect transistor 104 may be located in the dielectric layer structure 114. In some embodiments, the oxide semiconductor field effect transistor 104 may be an oxide semiconductor thin film transistor.

[0053] In some embodiments, the oxide semiconductor field effect transistor 104 may include an electrode layer 116, a dielectric layer 118, a channel layer 120, an electrode layer 122, and an electrode layer 124. The electrode layer 116 is located on the substrate 100. In some embodiments, the electrode layer 116 can be used as a gate. In some embodiments, the electrode layer 116 can be located in the dielectric layer structure 114 above the capacitor 102. In some embodiments, the material of the electrode layer 116 is, for example, molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, or alloys thereof.

[0054] The dielectric layer 118 is disposed on the electrode layer 116. In some embodiments, the dielectric layer 118 may be used as a gate dielectric layer. In some embodiments, the material of the dielectric layer 118 is, for example, silicon oxide, silicon nitride, or hafnium nitride.

[0055] The channel layer 120 is located on the dielectric layer 118 and above the electrode layer 116. In some embodiments, the material of the channel layer 120 may be an oxide semiconductor. In some embodiments, the oxide semiconductor may include indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium zinc oxide (IZO), cobalt oxide (CoO x ), nickel oxide (NiO x ), Strontium copper oxide (SrCu2O x ), copper aluminum oxide (CuAlO2), copper indium oxide (CuInO2) or copper gallium oxide (CuGaO2).

[0056] The electrode layer 122 and the electrode layer 124 are located on the dielectric layer 118 and on both sides of the channel layer 120. In some embodiments, the electrode layer 122 and the electrode layer 124 may partially cover the channel layer 120. The electrode layer 122 and the electrode layer 124 may be used as one and the other of the source and the drain, respectively. In the present embodiment, the electrode layer 122 may be used as the drain, and the electrode layer 124 may be used as the source. The material of the electrode layer 122 and the material of the electrode layer 124 may be an N-type oxide semiconductor. In some embodiments, the N-type oxide semiconductor may include indium gallium zinc oxide (IGZO), zinc oxide (ZnO) or indium zinc oxide (IZO), and the N-type oxide semiconductor may have an N-type dopant. In some embodiments, the P-type oxide semiconductor may include cobalt oxide (CoO x), nickel oxide (NiO x ), Strontium copper oxide (SrCu2O x ), copper aluminum oxide (CuAlO2), copper indium oxide (CuInO2) or copper gallium oxide (CuGaO2), and the above-mentioned P-type oxide semiconductor may have P-type dopants.

[0057] The oxide semiconductor field effect transistor 104 is electrically connected to the capacitor 102. In this embodiment, Figure 1 As shown, the electrode layer 122 may be electrically connected to the electrode layer 106, but the present invention is not limited thereto. Figure 2 As shown, the electrode layer 122 may be electrically connected to the electrode layer 108 .

[0058] In some embodiments, the semiconductor structure 10 may further include an interconnect structure 126. The interconnect structure 126 is located in the dielectric layer structure 114. Figure 1 As shown, the electrode layer 122 can be electrically connected to the electrode layer 106 through the interconnect structure 126. In other embodiments, such as Figure 2 As shown, the electrode layer 122 can be electrically connected to the electrode layer 108 through an interconnect structure 126. In some embodiments, the interconnect structure 126 can include a contact, a wire, or a combination thereof. In some embodiments, the material of the interconnect structure 126 is, for example, tungsten, aluminum, copper, titanium, titanium nitride, tantalum, tantalum tantalum, or a combination thereof.

[0059] In some embodiments, the semiconductor structure 10 may further include a through-substrate via 128. The through-substrate via 128 is located in the substrate 100. The through-substrate via 128 may penetrate the substrate 100. In some embodiments, the material of the through-substrate via 128 is, for example, copper, tantalum, tantalum nitride, or a combination thereof.

[0060] In addition, although not shown in the figure, other required components (such as semiconductor devices, interconnect structures and / or dielectric layers) may be present on the substrate 100, in the substrate 100 and in the dielectric layer structure 114, and their description is omitted here. Figure 1 and Figure 2 In the drawings, the same or similar components are denoted by the same symbols, and their description is omitted.

[0061] Based on the above embodiments, it can be known that in the semiconductor structure 10 , since the oxide semiconductor field effect transistor 104 is electrically connected to the capacitor 102 , the leakage current of the capacitor 102 can be effectively reduced and the operating voltage of the capacitor 102 can be increased.

[0062] Figure 3 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention. Figure 4are cross-sectional views of semiconductor structures according to some other embodiments of the present invention.

[0063] Please refer to Figure 1 and Figure 3 , Figure 3 The semiconductor structure 20 and Figure 1 The differences of the semiconductor structure 10 are as follows. Figure 3 In the semiconductor structure 20, the oxide semiconductor field effect transistor 104 may be located on one side of the capacitor 102. In addition, the semiconductor structure 20 may further include a dielectric layer 130. The dielectric layer 130 is located between the electrode layer 116 and the substrate 100. In some embodiments, the material of the dielectric layer 130 is, for example, silicon oxide.

[0064] exist Figure 3 In the semiconductor structure 20, the electrode layer 122 may be electrically connected to the electrode layer 106, but the present invention is not limited thereto. Figure 3 In the semiconductor structure 20, the electrode layer 122 can be electrically connected to the electrode layer 106 through the interconnect structure 126. In other embodiments, such as Figure 4 As shown, the electrode layer 122 can be electrically connected to the electrode layer 108. For example, Figure 4 As shown, the electrode layer 122 may be electrically connected to the electrode layer 108 via an interconnect structure 126 .

[0065] In addition, Figure 1 , Figure 3 and Figure 4 In the drawings, the same or similar components are denoted by the same symbols, and their description is omitted.

[0066] Based on the above embodiments, it can be known that in the semiconductor structure 20 , since the oxide semiconductor field effect transistor 104 is electrically connected to the capacitor 102 , the leakage current of the capacitor 102 can be effectively reduced and the operating voltage of the capacitor 102 can be increased.

[0067] Figure 5 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention. Figure 6 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention.

[0068] Please refer to Figure 1 and Figure 5 , Figure 5 The semiconductor structure 30 and Figure 1 The differences of the semiconductor structure 10 are as follows. The capacitor 202 in the semiconductor structure 30 is different from the capacitor 102 in the semiconductor structure 10. In the semiconductor structure 30, the capacitor 202 may be a parallel plate capacitor.

[0069] In the semiconductor structure 30, the capacitor 202 and the oxide semiconductor field effect transistor 104 may be located in the dielectric layer structure 114. The oxide semiconductor field effect transistor 104 may be located above the capacitor 202, thereby effectively reducing the area of ​​the semiconductor structure 30. In some embodiments, the capacitor 202 may include an electrode layer 206, an electrode layer 208, and a dielectric layer 210. The electrode layer 206 is located in the dielectric layer structure 114. In some embodiments, the material of the electrode layer 206 is, for example, tantalum, tantalum nitride, or a combination thereof. The electrode layer 208 is located on the electrode layer 206. In some embodiments, the material of the electrode layer 208 is, for example, tantalum, tantalum nitride, or a combination thereof. The dielectric layer 210 is located between the electrode layer 206 and the electrode layer 208. In some embodiments, the material of the dielectric layer 114 is, for example, silicon nitride or a high dielectric constant (high-k) dielectric material. In some embodiments, the high dielectric constant dielectric material is, for example, aluminum oxide (Al2O3), zirconium oxide (ZrO2), or tantalum oxide (Ta2O5).

[0070] exist Figure 5 In the semiconductor structure 30, the electrode layer 122 may be electrically connected to the electrode layer 206, but the present invention is not limited thereto. Figure 5 In the semiconductor structure 30, the electrode layer 122 can be electrically connected to the electrode layer 206 through the interconnect structure 126. In other embodiments, such as Figure 6 As shown, the electrode layer 122 can be electrically connected to the electrode layer 208. For example, Figure 6 As shown, the electrode layer 122 may be electrically connected to the electrode layer 208 via the interconnect structure 126 .

[0071] In addition, Figure 1 , Figure 5 and Figure 6 In the drawings, the same or similar components are denoted by the same symbols, and their description is omitted.

[0072] Based on the above embodiments, it can be known that in the semiconductor structure 30 , since the oxide semiconductor field effect transistor 104 is electrically connected to the capacitor 202 , the leakage current of the capacitor 202 can be effectively reduced and the operating voltage of the capacitor 202 can be increased.

[0073] Figure 7 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention. Figure 8 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention.

[0074] Please refer to Figure 7 and Figure 5 , Figure 7 The semiconductor structure 40 and Figure 5The differences in the semiconductor structure 30 are as follows. Figure 7 In the semiconductor structure 40 , the oxide semiconductor field effect transistor 104 may be located below the capacitor 202 , thereby effectively reducing the area of ​​the semiconductor structure 40 .

[0075] exist Figure 7 In the semiconductor structure 40, the electrode layer 122 may be electrically connected to the electrode layer 206, but the present invention is not limited thereto. Figure 7 In the semiconductor structure 40, the electrode layer 122 can be electrically connected to the electrode layer 206 through the interconnect structure 126. In other embodiments, such as Figure 8 As shown, the electrode layer 122 can be electrically connected to the electrode layer 208. For example, Figure 8 As shown, the electrode layer 122 may be electrically connected to the electrode layer 208 via the interconnect structure 126 .

[0076] In addition, Figure 5 , Figure 7 and Figure 8 In the drawings, the same or similar components are denoted by the same symbols, and their description is omitted.

[0077] Based on the above embodiments, it can be known that in the semiconductor structure 40 , since the oxide semiconductor field effect transistor 104 is electrically connected to the capacitor 202 , the leakage current of the capacitor 202 can be effectively reduced and the operating voltage of the capacitor 202 can be increased.

[0078] Fig. 9 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention. Fig.10 are cross-sectional views of semiconductor structures according to some other embodiments of the present invention.

[0079] Please refer to Fig. 9 and Figure 5 , Fig. 9 The semiconductor structure 50 and Figure 5 The differences of the semiconductor structure 30 are as follows: The oxide semiconductor field effect transistor 104 may be located on one side of the capacitor 202 .

[0080] exist Fig. 9 In the semiconductor structure 50, the electrode layer 122 may be electrically connected to the electrode layer 206, but the present invention is not limited thereto. Fig. 9 In the semiconductor structure 50, the electrode layer 122 can be electrically connected to the electrode layer 206 through the interconnect structure 126. In other embodiments, such as Fig.10 As shown, the electrode layer 122 can be electrically connected to the electrode layer 208. For example, Fig.10 As shown, the electrode layer 122 may be electrically connected to the electrode layer 208 via the interconnect structure 126 .

[0081] In addition, Figure 5 , Fig. 9 and Fig.10 In the drawings, the same or similar components are denoted by the same symbols, and their description is omitted.

[0082] Based on the above embodiments, it can be known that in the semiconductor structure 50 , since the oxide semiconductor field effect transistor 104 is electrically connected to the capacitor 202 , the leakage current of the capacitor 202 can be effectively reduced and the operating voltage of the capacitor 202 can be increased.

[0083] In summary, the semiconductor structure of the above embodiment includes a capacitor and an oxide semiconductor field effect transistor, and the oxide semiconductor field effect transistor is electrically connected to the capacitor, thereby effectively reducing the leakage current of the capacitor and increasing the operating voltage of the capacitor.

[0084] Although the present invention is disclosed in conjunction with the above embodiments, they are not intended to limit the present invention. Any ordinary technician in the technical field may make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the definition of the attached claims.

Claims

1. A semiconductor structure comprising: substrate; a capacitor located on the substrate; as well as The oxide semiconductor field effect transistor is located on the substrate and is electrically connected to the capacitor.

2. The semiconductor structure of claim 1, wherein the capacitor comprises a trench capacitor.

3. The semiconductor structure of claim 1 wherein the capacitor comprises a parallel plate capacitor. 4 . The semiconductor structure of claim 1 , wherein the oxide semiconductor field effect transistor comprises an oxide semiconductor thin film transistor. 5 . The semiconductor structure of claim 1 , wherein the oxide semiconductor field effect transistor is located above the capacitor. 6 . The semiconductor structure of claim 1 , wherein the oxide semiconductor field effect transistor is located below the capacitor. 7 . The semiconductor structure of claim 1 , wherein the oxide semiconductor field effect transistor is located on one side of the capacitor.

8. The semiconductor structure of claim 1, wherein the oxide semiconductor field effect transistor comprises: A first electrode layer, located on the substrate; A first dielectric layer, located on the first electrode layer; a channel layer, located on the first dielectric layer and above the first electrode layer; as well as The second electrode layer and the third electrode layer are located on the first dielectric layer and on both sides of the channel layer. 9 . The semiconductor structure as claimed in claim 8 , wherein a material of the first electrode layer comprises molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium or an alloy thereof. 10 . The semiconductor structure of claim 8 , wherein a material of the first dielectric layer comprises silicon oxide, silicon nitride or hafnium nitride.

11. The semiconductor structure of claim 8, wherein a material of the channel layer comprises an oxide semiconductor, and the oxide semiconductor comprises indium gallium zinc oxide, zinc oxide, indium zinc oxide, cobalt oxide, nickel oxide, strontium copper oxide, copper aluminum oxide, copper indium oxide or copper gallium oxide.

12. The semiconductor structure as claimed in claim 8, wherein the material of the second electrode layer and the material of the third electrode layer include N-type oxide semiconductors, the N-type oxide semiconductors include indium gallium zinc oxide, zinc oxide or indium zinc oxide, and the N-type oxide semiconductors have N-type dopants.

13. The semiconductor structure of claim 8, wherein the material of the second electrode layer and the material of the third electrode layer include a P-type oxide semiconductor, the P-type oxide semiconductor includes cobalt oxide, nickel oxide, strontium copper oxide, copper aluminum oxide, copper indium oxide or copper gallium oxide, and the P-type oxide semiconductor has a P-type dopant.

14. The semiconductor structure of claim 8, wherein the capacitor is located in the substrate and comprises: a fourth electrode layer, located in the substrate; a fifth electrode layer, located on the fourth electrode layer; A second dielectric layer, located between the fourth electrode layer and the substrate; as well as The third dielectric layer is located between the fourth electrode layer and the fifth electrode layer. The semiconductor structure as claimed in claim 14 , wherein the second electrode layer is electrically connected to the fourth electrode layer. The semiconductor structure as claimed in claim 14 , wherein the second electrode layer is electrically connected to the fifth electrode layer.

17. The semiconductor structure of claim 8, further comprising: A dielectric layer structure is located on the substrate, wherein the capacitor and the oxide semiconductor field effect transistor are located in the dielectric layer structure, and the capacitor comprises: a fourth electrode layer, located in the dielectric layer structure; a fifth electrode layer, located on the fourth electrode layer; and The second dielectric layer is located between the fourth electrode layer and the fifth electrode layer. The semiconductor structure as claimed in claim 17 , wherein the second electrode layer is electrically connected to the fourth electrode layer. The semiconductor structure according to claim 17 , wherein the second electrode layer is electrically connected to the fifth electrode layer.

20. The semiconductor structure of claim 1, further comprising: The substrate through hole is located in the substrate and penetrates through the substrate.

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