Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, the semiconductor structure comprises a substrate, and the substrate comprises a partition region and an active region adjacent to the partition region along a first direction; the fin part is convexly arranged on the substrate of the active region, and the fin part extends along a first direction; the first supporting structure is positioned on the side wall of the fin part of the active region adjacent to the partition region; the partition openings are located in the partition regions and located between the adjacent fin portions in the first direction. In the process of forming the partition opening, in the extending direction perpendicular to the fin part, the first supporting structure can support the fin part, the probability that the fin part is bent and adjacent fin parts are fused in the extending direction perpendicular to the fin part is reduced, the quality of the fin part is improved, and the probability that the fin part is damaged due to the fin part in the subsequent technological process is reduced. Therefore, the short-circuit probability of the grid electrode and the source-drain doping layer is reduced, the performance of the semiconductor structure is improved, and the yield of the semiconductor device is also improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] With the rapid development of the semiconductor integrated circuit (IC) industry, semiconductor technology continues to move towards smaller process nodes driven by Moore's Law, making integrated circuits develop in the direction of smaller size, higher circuit precision and higher circuit complexity.

[0003] In order to better adapt to the requirement of device size reduction, semiconductor technology has gradually begun to transition from planar transistors to three-dimensional transistors with higher efficiency, such as Fin Field Effect Transistor (FinFET). Among them, in Fin Field Effect Transistor, the gate surrounds the fin-shaped channel on three sides. Compared with planar transistors, the gate of Fin Field Effect Transistor has stronger control over the channel and can better suppress the short channel effect.

[0004] In the semiconductor field, according to process requirements, it is usually necessary to form fins with different pitches. Currently, one approach is to form fins with different pitches through a fin cut process.

[0005] However, the performance of the fin field effect transistor formed after the fin cutting process still needs to be improved. Summary of the invention

[0006] The problem solved by the embodiments of the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of the semiconductor structure.

[0007] To solve the above problems, the present invention provides a semiconductor structure, comprising: a substrate, the substrate comprising a partition region and an active region adjacent to the partition region along a first direction; a fin protruding from the substrate of the active region, the fin extending along the first direction; a first supporting structure located on the side wall of the fin of the active region adjacent to the partition region; and a partition opening located in the partition region and between adjacent fins along the first direction.

[0008] Correspondingly, an embodiment of the present invention also provides a method for forming a semiconductor structure, comprising: providing a substrate, the substrate comprising a partition region, and an active region adjacent to the partition region along a first direction; forming a protruding fin on the substrate of the partition region and the active region, and the fin extends along the first direction; forming a first supporting structure on the side wall of the fin of the active region adjacent to the partition region; after forming the first supporting structure, removing the fin of the partition region, and forming a partition opening in the fin.

[0009] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0010] The semiconductor structure provided in the embodiment of the present invention comprises a substrate having the partition region and the active region, the active region being adjacent to the partition region along a first direction, a fin protruding from the substrate of the active region and extending along the first direction, a first supporting structure located on the side wall of the fin of the active region adjacent to the partition region, and a partition opening located in the partition region and between adjacent fins along the first direction; in the process of forming the partition opening, the first supporting structure can support the fin in a direction perpendicular to the extension direction of the fin, thereby reducing the probability of fin bending and adjacent fin merging in a direction perpendicular to the extension direction of the fin, thereby improving the quality of the fin, reducing the probability of the gate and the source-drain doping layer being short-circuited due to the fin in the subsequent process, that is, reducing the problem of serious leakage caused by the short-circuit between the gate and the source-drain doping layer, so as to make the device defective, and correspondingly reducing the pull-up during electrical testing. The probability of the value of the Up, PU) threshold voltage (Vt) rising, thereby improving the performance of the semiconductor structure and the yield of the semiconductor device.

[0011] In the method for forming a semiconductor structure provided by an embodiment of the present invention, the substrate includes a partition area and an active area adjacent to the partition area along a first direction, a protruding fin is formed on the substrate of the partition area and the active area, and the fin extends along the first direction, and a first supporting structure is formed on the side wall of the fin of the active area adjacent to the partition area. After the first supporting structure is formed, the fin of the partition area is removed to form a partition opening in the fin; in the process of forming the partition opening, the first supporting structure can support the fin in a direction perpendicular to the extension of the fin, thereby reducing the probability of fin bending and adjacent fin fusion in the direction perpendicular to the extension of the fin, thereby improving the quality of the fin, reducing the probability of the gate and the source and drain doping layer being short-circuited due to the fin in subsequent process steps, that is, reducing the problem of serious leakage caused by the short-circuit between the gate and the source and drain doping layers, so as to make the device defective, and correspondingly reducing the probability of the pull-up threshold voltage value rising during electrical testing, thereby improving the performance of the semiconductor structure and the yield rate of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figures 1 to 12 It is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure;

[0013] Figures 13 to 15 It is a structural schematic diagram of a semiconductor structure of the present invention;

[0014] Figures 16 to 36 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention. DETAILED DESCRIPTION

[0015] At present, the performance of semiconductor structures still needs to be improved. Now, combined with a method for forming a semiconductor structure, the reasons why the performance of semiconductor structures needs to be improved are analyzed. Figures 1 to 12 The present invention is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure.

[0016] refer to Figures 1 to 3 , Figure 1 is a top view, Figure 2 for Figure 1 The cross-sectional view at AA1, Figure 3 for Figure 1 In the cross-sectional view at BB1, a substrate 10 is provided, wherein the substrate includes a partition region i' and an active region ii' adjacent to the partition region i' along a first direction x'.

[0017] refer to Figures 4 to 6 , Figure 4 is a top view, Figure 5 for Figure 4 The cross-sectional view at AA1, Figure 6 for Figure 4 In the cross-sectional view at BB1 , a fin material layer 11 ′ is formed on the substrate 10 in the partition region i′ and the active region ii′.

[0018] refer to Figures 7 to 9 , Figure 7 is a top view, Figure 8 for Figure 7 The cross-sectional view at AA1, Fig. 9 for Figure 7 In the cross-sectional view at BB1, the fin material layer 11' is patterned to form protruding fins 11 on the substrate 10 in the partition area i' and the active area ii', and the fins 11 extend along the first direction x'.

[0019] refer to Figures 10 to 12 , Fig.10 is a top view, Fig.11 for Fig.10 The cross-sectional view at AA1, Fig.12 for Fig.10 In the cross-sectional view at BB1 , the fin 11 of the partition region i′ is removed, and a partition opening 12 is formed in the fin 11 .

[0020] Research has found that since the height of the fin 11 is often relatively large, the spatial aspect ratio between adjacent fins 11 is correspondingly relatively large. Therefore, in the process of forming the isolation opening 12, the fin 11 is prone to bending in the extension direction perpendicular to the fin 11 (i.e., the second direction y'), or even the adjacent fins 11 are fused. As a result, in the subsequent process flow, the gate and the source and drain doping layers are short-circuited due to the fin 11, which correspondingly causes a more serious leakage problem due to the short-circuit between the gate and the source and drain doping layers, thereby affecting the performance of the semiconductor structure.

[0021] In order to solve the above technical problems, an embodiment of the present invention provides a semiconductor structure, including: a substrate, the substrate including a partition region and an active region adjacent to the partition region along a first direction; a fin protruding from the substrate of the active region, the fin extending along the first direction; a first supporting structure located on the side wall of the fin of the active region adjacent to the partition region; and a partition opening located in the partition region and between adjacent fins along the first direction.

[0022] The semiconductor structure provided in the embodiment of the present invention includes a substrate having the partition area and the active area, the active area is adjacent to the partition area along the first direction, a fin protruding from the substrate of the active area and extending along the first direction, a first supporting structure located on the side wall of the fin of the active area adjacent to the partition area, and a partition opening located in the partition area and between adjacent fins along the first direction; in the process of forming the partition opening, the first supporting structure can support the fin in the extension direction perpendicular to the fin, thereby reducing the probability of fin bending and adjacent fin fusion in the extension direction perpendicular to the fin, thereby improving the quality of the fin, reducing the probability of the gate and the source-drain doping layer being short-circuited due to the fin in the subsequent process, that is, reducing the problem of serious leakage caused by the short-circuit between the gate and the source-drain doping layer, so as to make the device defective, and correspondingly reducing the probability of the pull-up threshold voltage value rising during electrical testing, thereby improving the performance of the semiconductor structure and the yield rate of the semiconductor device.

[0023] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0024] Figures 13 to 15 It is a schematic structural diagram of an embodiment of a semiconductor structure of the present invention.

[0025] refer to Figures 13 to 15 , Fig.13 is a top view, Fig.14 for Fig.13 The cross-sectional view at AA1, Fig.15 for Fig.13 In the cross-sectional view at BB1, in this embodiment, the semiconductor structure includes: a substrate 100, the substrate 100 includes a partition region i, and an active region ii adjacent to the partition region i along a first direction x; a fin 120 protruding from the substrate 100 in the active region ii, and the fin 120 extending along the first direction x; a first supporting structure 130 located on the side wall of the fin 120 of the active region ii adjacent to the partition region i; and a partition opening 140 located in the partition region i and between adjacent fins 120 along the first direction x.

[0026] In this embodiment, the substrate 100 is a silicon substrate. In other embodiments, the material of the substrate may also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the substrate may also be other types of substrates such as a silicon on insulator substrate or a germanium on insulator substrate.

[0027] In this embodiment, the substrate 100 is used to form a fin field effect transistor (FinFET).

[0028] The isolation area i is used to provide a process platform for forming an isolation opening.

[0029] The active area ii is used to provide a process platform for forming various semiconductor devices.

[0030] In this embodiment, the semiconductor structure also includes: a second supporting structure 110, protruding on the substrate 100 of the partition area i, the second supporting structure 110 extends along a second direction y, and the second direction y is perpendicular to the first direction x; in the first direction x, the fin 120 is located on both sides of the second supporting structure 110 and covers part of the side wall of the second supporting structure 110; the first supporting structure 130 is also located on the top and side wall of the second supporting structure 110 exposed by the fin 120.

[0031] The second support structure 110 extends along a second direction y, which is perpendicular to the first direction x. The fins 120 are located on both sides of the second support structure 110, that is, the fins 120 span the second support structure 110, so that during the process of forming the isolation opening 140, the second support structure 110 can support the fins 120 in the first direction x. In addition, the second support structure 110 is also used to provide a process platform for the formation of the first support structure 130.

[0032] In this embodiment, the second support structure 110 protrudes on the substrate 100 of the partition area i. Accordingly, after the first support structure 130 is located on the top and side walls of the second support structure 110 exposed by the fin 120, the first support structure 130 can cover the side walls of the fin 120 of the active area ii adjacent to the partition area i.

[0033] Moreover, the partition region i is not used to form devices, so disposing the second support structure 110 on the substrate 100 in the partition region i is also beneficial to reducing the impact on the devices.

[0034] In this embodiment, the material of the second supporting structure 110 is different from that of the substrate 100 .

[0035] The material of the second support structure 110 is different from that of the substrate 100 , so that the first support structure 130 is formed on the top and side walls of the second support structure 110 exposed by the fin 120 through a selective deposition process, so that the first support structure 130 is also located on the top and side walls of the second support structure 110 exposed by the fin 120 .

[0036] In this embodiment, the material of the second support structure 110 includes one or both of SiO2 and TiN. SiO2 and TiN have good insulation properties, which facilitates the isolation of the fin 120 from the substrate 100; moreover, when the material of the second support structure 110 includes one or both of SiO2 and TiN, it is convenient to form the first support structure by selective deposition, thereby facilitating the process difficulty of forming the first support structure. In other embodiments, the material of the second support structure may also be other suitable dielectric materials.

[0037] It should be noted that, along the normal direction of the top surface of the substrate 100, the height of the second support structure 110 should not be too small or too large. If the height of the second support structure 110 is too small, it is easy for the height of the first support structure 130 formed on the top and side walls of the second support structure 110 exposed by the fin 120 to be too small, which is easy to reduce the bending of the fin 120 and the fusion of adjacent fins 120 in the extension direction perpendicular to the fin 120 (i.e., the second direction y). If the height of the second support structure 110 is too large, it is easy to make the height of the effective fin too small, which is easy to have an adverse effect on the performance of the device. Therefore, in this embodiment, along the normal direction of the top surface of the substrate 100, the height of the second support structure 110 ranges from 0.5 nanometers to 100 nanometers.

[0038] In other embodiments, a buried layer may be used to replace the second supporting structure. Specifically, in this embodiment, the semiconductor structure further includes: a buried layer located in the substrate of the active region adjacent to the isolation region, the material of the buried layer being different from the material of the substrate; and the first supporting structure being located on top of the buried layer and in contact with the buried layer.

[0039] The mask layer is located in the substrate, thereby reducing the impact on the flatness of the top surface of the substrate.

[0040] It should be noted that the material of the buried layer includes one or both of SiO2 and TiN. SiO2 and TiN are compatible with the selective deposition process, so it is convenient to form the first support structure on the buried layer through the selective deposition process.

[0041] The fin 120 provides a process basis for forming an effective fin.

[0042] In this embodiment, the material of the fin 120 includes silicon. In other embodiments, the material of the fin may also be other materials such as germanium, silicon germanium, III-V group semiconductor materials, and single crystal silicon.

[0043] The first support structure 130 located on the side wall of the fin 120 of the active area ii adjacent to the isolation area i can support the fin 120 in the extension direction perpendicular to the fin 120 during the process of forming the isolation opening 140, thereby reducing the probability of the fin 120 bending and the fusion of adjacent fins 120 in the extension direction perpendicular to the fin 120, thereby improving the quality of the fin 120 and reducing the probability of the gate and the source-drain doping layer being short-circuited due to the fin 120 in the subsequent process flow, that is, reducing the problem of serious leakage caused by the short-circuit between the gate and the source-drain doping layer, so as to make the device defective, and correspondingly reducing the probability of the pull-up threshold voltage value rising during electrical testing, thereby improving the performance of the semiconductor structure and the yield rate of the semiconductor device.

[0044] In this embodiment, the first support structure 130 is also located on the top and side walls of the second support structure 110 exposed by the fin 120 . The second support structure 110 is helpful to accurately define the formation position of the first support structure 130 .

[0045] In this embodiment, the first support structure 130 is selectively deposited on the top and side walls of the second support structure 110 exposed by the fin 120, which is not only conducive to accurately defining the formation position of the first support structure 130, but also conducive to simplifying the steps of forming the first support structure 130 and reducing the process difficulty of forming the first support structure 130; in addition, when forming the first support structure 130, the etching step is also omitted, thereby reducing damage to the fin.

[0046] In this embodiment, the material of the first support structure 130 includes one or more of Al2O3, HfO2, In2O3, TiO2 and Ta2O5. Al2O3, HfO2, In2O3, TiO2 and Ta2O5 have good insulation properties, which are convenient for isolating adjacent fins 120; moreover, Al2O3, HfO2, In2O3, TiO2 and Ta2O5 are convenient for matching with the material of the second support structure 110, so that the first support structure 130 can be easily formed by selective deposition, thereby reducing the process difficulty of forming the first support structure 130 and improving the quality of the first support structure 130.

[0047] As an example, when the material of the second support structure 110 is SiO2, the material of the first support structure 130 may be one or more of Al2O3, HfO2, In2O3 and TiO2; or, when the material of the second support structure 110 is TiN2, the material of the first support structure 130 may be Ta2O5.

[0048] It should be noted that, along the first direction x, the length of the first support structure 130 located on the side wall of the fin 120 in the active area ii should not be too small or too large. If the length of the first support structure 130 located on the side wall of the fin 120 in the active area ii is too small, it is easy to reduce the bending of the fin 120 and the fusion of adjacent fins 120 in the extension direction perpendicular to the fin 120 (i.e., the second direction y) The effect is poor; if the length of the first support structure 130 located on the side wall of the fin 120 in the active area ii is too large, it is easy to cause a waste of process capacity, thereby increasing process costs. Therefore, in this embodiment, along the first direction x, the length of the first support structure 130 located on the side wall of the fin 120 in the active area ii ranges from 1 nanometer to 20 nanometers.

[0049] It should also be noted that the height of the first support structure 130 should not be too small or too large along the normal direction of the top surface of the substrate 100. If the height of the first support structure 130 is too small, it is easy to reduce the bending of the fin 120 and the fusion of adjacent fins 120 in the extension direction perpendicular to the fin 120 (i.e., the second direction y). If the height of the first support structure 130 is too large, it is easy to make the height of the effective fin too small, which is easy to have an adverse effect on the performance of the device. Therefore, in this embodiment, along the normal direction of the top surface of the substrate 100, the height of the first support structure 130 ranges from 0.5 nanometers to 100 nanometers.

[0050] The partition opening 140 is used to divide the fin portion 120 in the extending direction thereof.

[0051] In this embodiment, the semiconductor structure also includes: an isolation structure (not shown), which is located on the substrate 100 on the side of the fin 120, and the isolation structure covers a portion of the side wall of the fin 120, and along the normal direction of the top surface of the substrate 100, the top of the isolation structure is higher than or equal to the top of the first support structure 130.

[0052] The isolation structure is a shallow trench isolation (STI) structure, which is used to isolate various semiconductor devices to prevent leakage current from occurring between the devices.

[0053] The top of the isolation structure is higher than or equal to the top of the first support structure 130 , that is, the fin 120 exposed by the isolation structure serves as an effective fin (Active Fin), and the effective fin covered by the gate structure is used to provide a conductive channel when the device is working.

[0054] In this embodiment, the semiconductor structure also includes: a gate structure located on the isolation structure, the gate structure spanning the fin 120 and covering part of the top and part of the sidewall of the fin 120; and a source-drain doping layer located in the fin 120 on both sides of the gate structure.

[0055] Correspondingly, the present invention also provides a method for forming a semiconductor structure. Figures 16 to 36 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention.

[0056] refer to Figures 16 to 24 , Fig.16 is a top view, Fig.17 for Fig.16 The cross-sectional view at AA1, Fig.18 for Fig.16 In the cross-sectional view at BB1, a substrate 500 is provided. The substrate 500 includes a partition region I and an active region II adjacent to the partition region I along a first direction X.

[0057] in, Fig.16 A top view of the second support structure material layer is formed. Fig.17 for Fig.16 The cross-sectional view at AA1, Fig.18 for Fig.16 Cross-sectional view at BB1; Fig.19 A top view of the first photolithography mask layer when a pattern is formed. Fig. 20 for Fig.19 The cross-sectional view at AA1, Fig.21 for Fig.19 Cross-sectional view at BB1; Fig. 22 A top view of the second support structure is formed. Fig.23 for Fig. 22 The cross-sectional view at AA1, Fig.24 for Fig. 22 Cross-sectional view at BB1.

[0058] The substrate 500 is used to provide a process platform for subsequent process steps.

[0059] In this embodiment, the substrate 500 is a silicon substrate. In other embodiments, the material of the substrate may also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the substrate may also be other types of substrates such as a silicon on insulator substrate or a germanium on insulator substrate.

[0060] In this embodiment, the substrate 500 is used to form a fin field effect transistor.

[0061] The isolation area I is used to provide a process platform for the subsequent formation of isolation openings.

[0062] The active region II is used to provide a process platform for forming various semiconductor devices in subsequent process steps.

[0063] In this embodiment, after providing the substrate 500 and before forming the fin, the method further includes: forming a protruding second support structure 510 on the substrate 500 in the partition area I, wherein the second support structure 510 extends along a second direction Y, and the second direction Y is perpendicular to the first direction X.

[0064] The second support structure 510 extends along a second direction Y, which is perpendicular to the first direction X. The subsequently formed fin spans across the second support structure 510, so that in the process of subsequently forming the isolation opening, the second support structure 510 can support the fin in the first direction X.

[0065] Specifically, the step of forming a protruding second support structure 510 on the substrate 500 in the partition area I includes: forming a second support structure material layer 511 (such as Figures 16 to 18 As shown), and a first photolithography mask layer 512 covering the second support structure material layer 511; patterning the first photolithography mask layer 512, removing the first photolithography mask layer 512 located at the remaining positions outside the isolation region I (as shown); Figures 19 to 21 After patterning the first photolithography mask layer 512, the remaining first photolithography mask layer 512 is used as a mask to remove the second support structure material layer 511 exposed by the first photolithography mask layer 512, and the remaining second support structure material layer 511 is used as the second support structure 510; after forming the second support structure 510, the first photolithography mask layer 512 (as shown) is removed. Figure 22 to Figure 24 shown).

[0066] First, a second supporting structure material layer 511 and a first photolithography mask layer 512 covering the second supporting structure material layer 511 are formed on the substrate 500. After the first photolithography mask layer 512 is patterned, the patterned first photolithography mask layer 512 is used as a mask to remove the second supporting structure material layer 511 exposed by the first photolithography mask layer 512 to form a second supporting structure 510. This is beneficial to reducing the difficulty of forming the second supporting structure 510 and improving the quality of the second supporting structure 510, and correspondingly, it is also beneficial to improve the quality of the first supporting structure subsequently formed on the top and side walls of the second supporting structure 510 exposed on the fin.

[0067] It should be noted that the process of forming the second support structure material layer 511 on the substrate 500 includes one or both of a chemical vapor deposition process and a physical vapor deposition process. The chemical vapor deposition process is mature, has low process cost, and has high process compatibility; the physical vapor deposition process has the advantages of low deposition temperature, fast deposition speed, controllable composition and structure of the deposition layer, simple operation, high efficiency, and low cost.

[0068] It should also be noted that the process of removing the second support structure material layer 511 exposed by the first photolithography mask layer 512 includes a dry etching process. The dry etching process has anisotropic etching characteristics, so the etching accuracy is high and the controllability of the cross section is better, which is conducive to reducing the probability of other film layers (such as the substrate 500) being damaged during the formation of the second support structure 510.

[0069] In this embodiment, the material of the second support structure 510 is different from that of the substrate 500. The material of the second support structure 510 is different from that of the substrate 500, which facilitates the subsequent formation of the first support structure on the top and sidewall of the second support structure 510 exposed by the fin through a selective deposition process. In addition, the second support structure 510 is also used to provide a process platform for the subsequent formation of the first support structure.

[0070] Moreover, the isolation region I is not used to form devices, so disposing the second support structure 510 on the substrate 500 in the isolation region I is also beneficial to reducing the impact on the devices.

[0071] In this embodiment, the material of the second support structure 510 includes one or both of SiO2 and TiN. SiO2 and TiN have good insulation properties, which facilitates the isolation of the subsequently formed fin and the substrate 500; moreover, when the material of the second support structure 510 includes one or both of SiO2 and TiN, it is convenient to form the first support structure by selective deposition, thereby reducing the process difficulty of forming the first support structure. In other embodiments, the material of the second support structure can also be other suitable dielectric materials.

[0072] It should be noted that, along the normal direction of the top surface of the substrate 500, the height of the second support structure 510 should not be too small or too large. If the height of the second support structure 510 is too small, it is easy for the height of the first support structure formed on the top and sidewall of the second support structure 510 exposed by the fin to be too small, which is easy to reduce the effect of fin bending and adjacent fin fusion in the extension direction perpendicular to the fin (i.e., the second direction Y); if the height of the second support structure 510 is too large, it is easy to make the height of the effective fin formed subsequently too small, which is easy to have an adverse effect on the device performance. Therefore, in this embodiment, along the normal direction of the top surface of the substrate 500, the height of the second support structure 510 ranges from 0.5 nanometers to 100 nanometers.

[0073] In other embodiments, a buried layer may be used instead of the second supporting structure. Specifically, in this embodiment, before forming the fin, it also includes: forming a buried layer adjacent to the partition area in the substrate of the active area, and the material of the buried layer is different from the material of the substrate.

[0074] The buried layer is located in the substrate, thereby reducing the impact on the flatness of the top surface of the substrate.

[0075] A buried layer adjacent to the partition region is formed in the substrate of the active region, wherein the material of the buried layer is different from that of the substrate, so as to facilitate subsequent formation of a first supporting structure on the buried layer through a selective deposition process.

[0076] It should be noted that the material of the buried layer includes one or both of SiO2 and TiN. SiO2 and TiN are compatible with the selective deposition process. Therefore, it is convenient to form the first support structure on the buried layer through the selective deposition process.

[0077] refer to Figures 25 to 30 A protruding fin 520 is formed on the substrate 500 in the partition area I and the active area II, and the fin 520 extends along the first direction X.

[0078] in, Fig.25 This is a top view of the fin material layer being formed. Fig.26 for Fig.25 The cross-sectional view at AA1, Fig. 27 for Fig.25 Cross-sectional view at BB1; Fig.28 This is a top view of the fins being formed. Fig.29 for Fig.28 The cross-sectional view at AA1, Fig.30 for Fig.28 Cross-sectional view at BB1.

[0079] The fin 520 provides a process basis for subsequently forming an effective fin.

[0080] In this embodiment, after providing the substrate 500 and before forming the fin 520 , the method further includes: forming a protruding second support structure 510 on the substrate 500 in the partition region I, wherein the second support structure 510 extends along a second direction Y, and the second direction Y is perpendicular to the first direction X. Accordingly, in the step of forming the fin 520 , the fin 520 spans across the second support structure 510 and covers a portion of the top and a portion of the sidewall of the second support structure 510 .

[0081] In this embodiment, the steps of forming the fin 520 include: Figure 25 to Figure 27 As shown, a fin material layer 521 is formed on the second support structure 510 and the substrate 500, and the fin material layer 521 covers the top of the second support structure 510; Figures 28 to 30 As shown, the fin material layer 521 is patterned to form the fin 520 .

[0082] First, a fin material layer 521 is formed on the second support structure 510 and the substrate 500 , and then the fin material layer 521 is patterned to form the fin 520 , thereby reducing the process difficulty of forming the fin 520 and improving the quality of the fin 520 .

[0083] The fin material layer 521 is patterned by an etching process, and an etching selectivity ratio between the fin material layer 521 and the second supporting structure 510 is greater than 100.

[0084] The fin material layer 521 is patterned by an etching process, and the etching selectivity ratio of the fin material layer 521 to the second supporting structure 510 is greater than 100, so that the fin 520 can easily span the second supporting structure 510, that is, the fin 520 exposes part of the top and part of the side wall of the second supporting structure 510, and part of the top of the substrate 500.

[0085] It should be noted that the process of forming the fin material layer 521 on the second support structure 510 and the substrate 500 includes one or more of an epitaxial growth process, a chemical vapor deposition process, a physical vapor deposition process, and a furnace process. As an example, the process of forming the fin material layer 521 on the second support structure 510 and the substrate 500 includes an epitaxial growth process.

[0086] The epitaxial process can better control the process parameters, has high process controllability, and is easy to obtain a more precise film thickness size. The epitaxial process is easy to form a film layer with less impurities, so that the quality of the fin material layer 521 is higher, and correspondingly the quality of the fin is higher.

[0087] It should also be noted that after the fin material layer 521 is formed on the second supporting structure 510 and the substrate 500, and before the fin material layer 521 is patterned to form the fin 520, it also includes: flattening the fin material layer 521 (for example, chemical mechanical polishing) to improve the surface flatness of the fin material layer 521.

[0088] In this embodiment, the material of the fin 520 includes silicon. In other embodiments, the material of the fin may also be other materials such as germanium, silicon germanium, III-V semiconductor materials, and single crystal silicon.

[0089] refer to Figure 31 to Figure 33 , Fig.31 is a top view, Fig.32 for Fig.31 The cross-sectional view at AA1, Fig.33 for Fig.31 In the cross-sectional view at BB1 , a first support structure 530 is formed on the sidewall of the fin portion 520 of the active region II adjacent to the isolation region I.

[0090] A first supporting structure 530 is formed on the side wall of the fin 520 of the active area II adjacent to the isolation area I. After the first supporting structure 530 is formed, the fin 520 of the isolation area I is removed. In the process of forming the isolation opening in the fin 520, the first supporting structure 530 can support the fin 520 in the extension direction perpendicular to the fin 520, thereby reducing the probability of the fin 520 bending and the fusion of adjacent fins 520 in the extension direction perpendicular to the fin 520, thereby improving the quality of the fin 520 and reducing the probability of the gate and the source-drain doping layer being short-circuited due to the fin 520 in the subsequent process flow, that is, reducing the problem of serious leakage caused by the short-circuit between the gate and the source-drain doping layer, so as to make the device defective, and correspondingly reducing the probability of the pull-up threshold voltage value rising during electrical testing, thereby improving the performance of the semiconductor structure and the yield rate of the semiconductor device.

[0091] In this embodiment, in the step of forming the fin 520, the fin 520 spans across the second support structure 510 and covers a portion of the top and a portion of the sidewall of the second support structure 510. Correspondingly, in the step of forming the first support structure 530, the first support structure 530 is also located on the top and sidewall of the second support structure 510 exposed by the fin.

[0092] The first support structure 530 is also located on the top and sidewalls of the second support structure 510 exposed by the fin, and the second support structure 510 is helpful to accurately define the formation position of the first support structure 530.

[0093] In this embodiment, the second support structure 510 protrudes on the substrate 500 of the partition area I. Accordingly, after the first support structure 530 is located on the top and side walls of the second support structure 510 exposed by the fin 520, the first support structure 530 can cover the side walls of the fin 520 of the active area II adjacent to the partition area I.

[0094] In this embodiment, the method of forming the first supporting structure 530 includes: through a selective deposition process, selectively forming the first supporting structure 530 on the top and side walls of the second supporting structure 510 exposed by the fin 520 so that the first supporting structure 530 covers the side walls of the fin 520.

[0095] By selectively forming the first support structure 530 on the top and sidewalls of the second support structure 510 exposed by the fin 520 through a selective deposition process, it is not only conducive to accurately defining the formation position of the first support structure 530, but also conducive to simplifying the steps of forming the first support structure 530, and reducing the process difficulty of forming the first support structure 530 on the top and sidewalls of the second support structure 510 exposed by the fin 520, and correspondingly reducing the process difficulty of forming the first support structure 530 on the sidewalls of the fin 520 of the active area II adjacent to the partition area I. In addition, by forming the first support structure 530 through a selective deposition process, the etching step is omitted, thereby reducing damage to the fin.

[0096] In other embodiments, before forming the fin, it further includes: forming a buried layer adjacent to the partition area in the substrate of the active area, wherein the material of the buried layer is different from the material of the substrate. Forming a buried layer adjacent to the partition area in the substrate of the active area, wherein the material of the buried layer is different from the material of the substrate, facilitates the subsequent formation of a first support structure on the buried layer by a selective deposition process. Accordingly, the method of forming the first support structure includes: selectively forming the first support structure on the buried layer by selective deposition.

[0097] In this embodiment, the material of the first support structure 530 includes one or more of Al2O3, HfO2, In2O3, TiO2 and Ta2O5. Al2O3, HfO2, In2O3, TiO2 and Ta2O5 have good insulation properties, which are convenient for isolating adjacent fins 520; moreover, Al2O3, HfO2, In2O3, TiO2 and Ta2O5 are convenient for matching with the material of the second support structure 510, so that the first support structure 530 can be easily formed by selective deposition, thereby reducing the process difficulty of forming the first support structure 530 and improving the quality of the first support structure 530.

[0098] As an example, when the material of the second support structure 510 is SiO2, the material of the first support structure 530 may be one or more of Al2O3, HfO2, In2O3 and TiO2; or, when the material of the second support structure 510 is TiN2, the material of the first support structure 530 may be Ta2O5.

[0099] It should be noted that, along the first direction X, the length of the first support structure 530 located on the side wall of the fin 520 of the active region II should not be too small or too large. If the length of the first support structure 530 located on the side wall of the fin 520 of the active region II is too small, it is easy to reduce the bending of the fin 520 and the fusion of adjacent fins 520 in the extension direction perpendicular to the fin 520 (i.e., the second direction Y) The effect is poor; if the length of the first support structure 530 located on the side wall of the fin 520 of the active region II is too large, it is easy to cause a waste of process capacity, thereby increasing process costs. Therefore, in this embodiment, along the first direction X, the length of the first support structure 530 located on the side wall of the fin 520 of the active region II ranges from 1 nanometer to 20 nanometers.

[0100] It should also be noted that the height of the first support structure 530 should not be too small or too large along the normal direction of the top surface of the substrate 500. If the height of the first support structure 530 is too small, it is easy to reduce the bending of the fin 520 and the fusion of adjacent fins 520 in the extension direction perpendicular to the fin 520 (i.e., the second direction Y). If the height of the first support structure 530 is too large, it is easy to make the height of the effective fin formed subsequently too small, which is easy to have an adverse effect on the performance of the device. Therefore, in this embodiment, along the normal direction of the top surface of the substrate 500, the height of the first support structure 530 ranges from 0.5 nanometers to 100 nanometers.

[0101] refer to Figure 34 to Figure 36 , Fig.34 is a top view, Fig.35 for Fig.34The cross-sectional view at AA1, Fig.36 for Fig.34 In the cross-sectional view at BB1, after the first support structure 530 is formed, the fin 520 of the partition area I is removed, and a partition opening 540 is formed in the fin 520.

[0102] The partition opening 540 is used to divide the fin portion 520 in the extending direction thereof.

[0103] In this embodiment, the step of forming an isolation opening 540 in the fin 520 includes: forming a second photolithography mask layer (not shown) on the substrate 500 and the first supporting structure 530, the second photolithography mask layer covering the sidewalls and the top of the fin 520; after forming the second photolithography mask layer, patterning the fin 520 using a mask for patterning the first photolithography mask layer 512, and forming an isolation opening 540 in the fin 520, the first photolithography mask layer 512 and the second photolithography mask layer having opposite photosensitivity characteristics; after forming the isolation opening 540, removing the second photolithography mask layer.

[0104] The fin 520 is patterned by using the mask for patterning the first photolithography mask layer 512 to form a separation opening 540 in the fin 520 without adding a new mask, which is beneficial to saving the number of masks and reducing process costs.

[0105] The area where the first photolithography mask layer 512 is patterned is the remaining position except the isolation area I, and the position where the isolation opening 540 is formed is the isolation area I. It can be seen that the area where the first photolithography mask layer 512 is patterned is exactly opposite to the area where the fin 520 is patterned; therefore, when the first photolithography mask layer 512 and the second photolithography mask layer use the same mask, the first photolithography mask layer 512 and the second photolithography mask layer have opposite photosensitivity characteristics.

[0106] In this embodiment, the process of removing the fin 520 of the isolation region I and forming the isolation opening 540 in the fin 520 includes a dry etching process.

[0107] The dry etching process has anisotropic etching characteristics, so the etching accuracy is high and the controllability of the profile is better, which is beneficial to reduce the probability of damage to the fin 520 in the active area II during the process of removing the fin 520 in the isolation area I.

[0108] In the step of removing the fin 520 of the isolation region I and forming the isolation opening 540 in the fin 520 , the etching selectivity ratio of the fin 520 to the first supporting structure 530 is greater than 100.

[0109] In the step of forming the isolating opening 540 in the fin 520, the etching selectivity ratio of the fin 520 to the first supporting structure 530 is greater than 100, which can easily reduce the probability of the first supporting structure 530 being damaged in the process of forming the isolating opening 540, so that in the extension direction perpendicular to the fin 520 (i.e., the second direction X), the first supporting structure 530 can better support the fin 520, and correspondingly, in the extension direction perpendicular to the fin 520, the effect of reducing the bending of the fin 520 and the fusion of adjacent fins 520 is also better.

[0110] In this embodiment, after the isolation opening 540 is formed, it also includes: forming an isolation structure (not shown) on the substrate 500 on the side of the fin 520, wherein the isolation structure covers a portion of the side wall of the fin 520, and along the normal direction of the top surface of the substrate 500, the top of the isolation structure is higher than or equal to the top of the first support structure 530.

[0111] The isolation structure is a shallow trench isolation (STI) structure, which is used to isolate various semiconductor devices to prevent leakage current from occurring between the devices.

[0112] The top of the isolation structure is higher than or equal to the top of the first support structure 530 , that is, the fin 520 exposed by the isolation structure serves as an effective fin, and the effective fin covered by the subsequently formed gate structure is used to provide a conductive channel when the device is working.

[0113] In this embodiment, after the isolation structure is formed, the formation method also includes: forming a gate structure (not shown) across the fin 520 on the isolation structure, wherein the gate structure covers a portion of the top and side walls of the fin 520; and forming a source-drain doping layer (not shown) in the fin 520 on both sides of the gate structure.

[0114] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that: include: A substrate, the substrate comprising a partition region and an active region adjacent to the partition region along a first direction; A fin portion protrudes from the substrate of the active area, and the fin portion extends along a first direction; A first support structure is located on a sidewall of the fin portion of the active area adjacent to the partition area; The partition opening is located in the partition area and between adjacent fins along the first direction.

2. The semiconductor structure according to claim 1, wherein: The semiconductor structure further includes: a second support structure protruding on the substrate of the partition region, the second support structure extending along a second direction, the second direction being perpendicular to the first direction; In the first direction, the fins are located on both sides of the second supporting structure and cover part of the sidewalls of the second supporting structure; The first support structure is also located on the top and sidewalls of the second support structure exposed by the fin.

3. The semiconductor structure according to claim 2, wherein: The material of the second support structure is different from that of the substrate.

4. The semiconductor structure according to claim 2, characterized in that The material of the second support structure includes one or both of SiO2 and TiN.

5. The semiconductor structure according to claim 2, wherein: Along the normal direction of the top surface of the substrate, the height of the second support structure ranges from 0.5 nanometers to 100 nanometers.

6. The semiconductor structure according to claim 1, wherein: The semiconductor structure further comprises: a buried layer located in the substrate of the active region adjacent to the partition region, wherein the material of the buried layer is different from that of the substrate; The first supporting structure is located on top of the buried layer and contacts the buried layer.

7. The semiconductor structure according to claim 6, wherein: The material of the buried layer includes one or both of SiO2 and TiN.

8. The semiconductor structure according to any one of claims 1 to 7, characterized in that: The material of the first support structure includes one or more of Al2O3, HfO2, In2O3, TiO2 and Ta2O5.

9. The semiconductor structure according to any one of claims 1 to 7, characterized in that: Along the first direction, a length of the first support structure located on the sidewall of the fin portion of the active region ranges from 1 nanometer to 20 nanometers.

10. The semiconductor structure according to any one of claims 1 to 7, characterized in that: Along the normal direction of the top surface of the substrate, the height of the first support structure ranges from 0.5 nanometers to 100 nanometers.

11. The semiconductor structure according to any one of claims 1 to 7, characterized in that: The semiconductor structure also includes: an isolation structure located on the substrate on the side of the fin, the isolation structure covers a portion of the side wall of the fin, and along the normal direction of the top surface of the substrate, the top of the isolation structure is higher than or equal to the top of the first supporting structure.

12. A method for forming a semiconductor structure, characterized in that: include: Providing a substrate, the substrate comprising a partition region and an active region adjacent to the partition region along a first direction; Forming protruding fins on the substrate of the partition area and the active area, wherein the fins extend along the first direction; forming a first supporting structure on a sidewall of the fin portion of the active area adjacent to the partition area; After forming the first support structure, the fin portion of the partition area is removed, and a partition opening is formed in the fin portion.

13. The method for forming a semiconductor structure according to claim 12, wherein: After providing the substrate and before forming the fin, the method further includes: forming a protruding second support structure on the substrate in the partition region, wherein the second support structure extends along a second direction, and the second direction is perpendicular to the first direction; In the step of forming the fin, the fin spans across the second supporting structure and covers a portion of the top and a portion of the sidewall of the second supporting structure; In the step of forming the first supporting structure, the first supporting structure is also located on the top and sidewalls of the second supporting structure exposed by the fin.

14. The method for forming a semiconductor structure according to claim 13, wherein: The material of the second support structure is different from the material of the substrate; The method of forming the first supporting structure includes: selectively forming the first supporting structure on the top and sidewalls of the second supporting structure exposed by the fin through a selective deposition process, so that the first supporting structure covers the sidewalls of the fin.

15. The method for forming a semiconductor structure according to claim 13, wherein: The steps of forming the fins include: forming a fin material layer on the second supporting structure and the substrate, wherein the fin material layer covers the top of the second supporting structure; Patterning the fin material layer to form the fin; The fin material layer is patterned by an etching process, and an etching selectivity ratio between the fin material layer and the second supporting structure is greater than 100.

16. The method for forming a semiconductor structure according to claim 15, wherein: The process of forming the fin material layer on the second support structure and the substrate includes one or more of an epitaxial growth process, a chemical vapor deposition process, a physical vapor deposition process and a furnace process.

17. The method for forming a semiconductor structure according to claim 13, wherein: The step of forming a protruding second support structure on the substrate in the partition area includes: forming a second support structure material layer and a first photolithography mask layer covering the second support structure material layer on the substrate; patterning the first photolithography mask layer, and removing the first photolithography mask layer located at the remaining position outside the partition area; after patterning the first photolithography mask layer, using the remaining first photolithography mask layer as a mask, removing the second support structure material layer exposed by the first photolithography mask layer, and the remaining second support structure material layer serves as the second support structure; after forming the second support structure, removing the first photolithography mask layer; The step of forming an isolation opening in the fin portion includes: forming a second photolithography mask layer on the substrate and the first supporting structure, the second photolithography mask layer covering the sidewalls and the top of the fin portion; after forming the second photolithography mask layer, patterning the fin portion using a mask that patterns the first photolithography mask layer to form an isolation opening in the fin portion, the first photolithography mask layer and the second photolithography mask layer having opposite photosensitivity characteristics; after forming the isolation opening, removing the second photolithography mask layer.

18. The method for forming a semiconductor structure according to claim 12 or 13, characterized in that: After forming the isolation opening, it also includes: forming an isolation structure on the substrate on the side of the fin, the isolation structure covers part of the side wall of the fin, and along the normal direction of the top surface of the substrate, the top of the isolation structure is higher than or equal to the top of the first supporting structure.

19. The method for forming a semiconductor structure according to claim 12, wherein: Before forming the fin, the method further includes: forming a buried layer adjacent to the partition region in the substrate of the active region, wherein the material of the buried layer is different from that of the substrate; The method of forming the first supporting structure includes: selectively forming the first supporting structure on the buried layer by selective deposition.

20. The method for forming a semiconductor structure according to claim 12 or 13, characterized in that: Removing the fin portion of the partition area, wherein the process of forming a partition opening in the fin portion comprises a dry etching process; Wherein, in the step of removing the fin in the isolation area and forming an isolation opening in the fin, an etching selectivity ratio between the fin and the first supporting structure is greater than 100.

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