Display panel and display module

Abstract

The display panel comprises a substrate, a thin film transistor device layer and a light-emitting device layer, the thin film transistor device layer is arranged on one side of the substrate in the thickness direction, and the light-emitting device layer is arranged on one side, away from the substrate, of the thin film transistor device layer. An absolute value of a difference between a coefficient of thermal expansion of the thin film transistor device layer and a coefficient of thermal expansion of the substrate is less than or equal to 0.00001 per Kelvin. The warping amount generated when the temperature of the display panel rises can be reduced, and the display effect is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display module. Background Art

[0002] In order to improve the display effect, the brightness of the display panel has already reached hundreds of thousands, and the problem that arises is that the heat generated by the display panel has increased significantly.

[0003] During use, the increase in heat generation causes the temperature inside the display panel to rise. Since the thermal expansion coefficients of adjacent film layers inside the display panel are too different, the display panel will bend to a large extent during the heating process, affecting the display effect of the display panel.

[0004] Therefore, it is necessary to propose a new technical solution to solve the above technical problems. Summary of the invention

[0005] The purpose of the present application is to provide a display panel and a display module to reduce the amount of warping generated when the display panel is heated up and improve the display effect.

[0006] To solve the above problems, the technical solution of this application is as follows:

[0007] In a first aspect, the present application proposes a display panel, comprising:

[0008] substrate;

[0009] a thin film transistor device layer, disposed on one side of the substrate in the thickness direction; and

[0010] A light emitting device layer, disposed on a side of the thin film transistor device layer away from the substrate;

[0011] Wherein, an absolute value of a difference between a thermal expansion coefficient of the thin film transistor device layer and a thermal expansion coefficient of the substrate is less than or equal to 0.00001 per Kelvin.

[0012] In one embodiment of the present application, the thin film transistor device layer includes a first inorganic insulating layer, and the first inorganic insulating layer is provided between the substrate and the light emitting device layer;

[0013] The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer and the thermal expansion coefficient of the substrate is a first difference, and the first difference is less than or equal to 0.00001 per Kelvin.

[0014] In one embodiment of the present application, the thin film transistor device layer further includes a second inorganic insulating layer, and the second inorganic insulating layer is disposed on a side of the first inorganic insulating layer away from the substrate;

[0015] The absolute value of the difference between the thermal expansion coefficient of the second inorganic insulating layer and the thermal expansion coefficient of the substrate is a second difference, the second difference is less than or equal to 0.00001 per Kelvin, and the second difference is less than or equal to the first difference.

[0016] In one embodiment of the present application, the thin film transistor device layer further includes a first organic planar layer, and the first organic planar layer is disposed on a side of the first inorganic insulating layer away from the substrate;

[0017] The absolute value of the difference between the elastic modulus of the first organic planar layer and the elastic modulus of the substrate is less than or equal to 10 GPa.

[0018] In one embodiment of the present application, the display panel further comprises a plate layer, and the plate layer is arranged on a side of the substrate away from the first inorganic insulating layer;

[0019] Wherein, the elastic modulus of the plate layer is greater than the elastic modulus of the substrate.

[0020] In one embodiment of the present application, an absolute value of a difference between a thermal expansion coefficient of the first inorganic insulating layer and a thermal expansion coefficient of the plate layer is a third difference, and the third difference is less than or equal to 0.00001 per Kelvin.

[0021] In one embodiment of the present application, the material of the plate layer includes metal;

[0022] The display panel further includes a heat-conducting tape, which is disposed between the plate layer and the substrate and connects the plate layer and the substrate.

[0023] In an embodiment of the present application, the display panel further includes a sensor, which is disposed on one side of the substrate in a thickness direction and is used to monitor the warpage amount of the substrate.

[0024] In the second aspect, the present application proposes a display module, including the display panel, the display panel including a substrate, a thin film transistor device layer and a light-emitting device layer; the thin film transistor device layer is arranged on one side of the substrate in the thickness direction; the light-emitting device layer is arranged on the side of the thin film transistor device layer away from the substrate; the absolute value of the difference between the thermal expansion coefficient of the thin film transistor device layer and the thermal expansion coefficient of the substrate is less than or equal to 0.00001 per Kelvin.

[0025] In one embodiment of the present application, the display panel includes a display area and a non-display area located outside the display area;

[0026] The display module further comprises a limiting mechanism, a limiting groove is provided on the surface of the limiting mechanism, and at least a portion of the display panel located in the non-display area is accommodated in the limiting groove.

[0027] In the present application, a thin film transistor device layer is provided on one side of the substrate. The present application reduces the thermal expansion coefficient of the thin film transistor device layer and makes the value of the thermal expansion coefficient of the thin film transistor device layer approach the value of the thermal expansion coefficient of the substrate. When the absolute value of the difference between the thermal expansion coefficient of the thin film transistor and the thermal expansion coefficient of the substrate is less than or equal to 0.00001 per Kelvin, the warping amount generated when the display panel is heated can be reduced, thereby improving the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a schematic diagram of the warping of a traditional display module when the temperature rises;

[0029] Figure 2 is a schematic diagram of an embodiment of a display module of the present application;

[0030] Figure 3 yes Figure 2 Schematic diagram at A in the middle;

[0031] Figure 4 yes Figure 2 Schematic diagram at B in the middle;

[0032] Figure 5 is a schematic diagram of another embodiment of the display module of the present application. DETAILED DESCRIPTION

[0033] The meanings of the terms used in this specification and claims correspond to the meanings commonly understood by those of ordinary skill in the art to which this application belongs. The terms used in this specification and claims are only for the purpose of facilitating the description and understanding of this application, and are not intended to limit this application to the narrow interpretation of the specific terms used in the specification and claims.

[0034] See also Figure 1In the conventional display module 1000a, when the conventional display panel 100a is working, the light emitting device layer 30a emits light and generates a large amount of heat, which greatly increases the heat generated inside the conventional display panel 100a, resulting in the temperature rising inside the conventional display panel 100a. The conventional display panel 100a generally includes a substrate 10a, a thin film transistor device layer 20a and a light emitting device layer 30a stacked in sequence, wherein the material of the substrate 10a generally includes at least one of glass or organic materials, and the material of the thin film transistor device layer 20a located on one side of the substrate 10a includes inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, etc. In the conventional display panel 100a, the difference in thermal expansion coefficient between the material of the substrate 10a and the material of the thin film transistor device layer 20a is too large, and the thermal expansion coefficient of the thin film transistor device layer 20a is greater than the thermal expansion coefficient of the substrate 10a. When the conventional display panel 100a heats up, both the substrate 10a and the thin film transistor device layer 20a will expand due to the heat. However, since the thermal expansion coefficient of the thin film transistor device layer 20a is greater than the thermal expansion coefficient of the substrate 10a, the expansion of the thin film transistor device layer 20a due to temperature rise is greater than the expansion of the substrate 10a due to temperature rise. Therefore, stress will be generated inside the traditional display panel 100a, causing the traditional display panel 100a to warp, affecting the display effect of the traditional display panel 100a.

[0035] The present application proposes a display module 1000, which can be assembled in a display device, and the display device can be a mobile phone, a tablet computer, an e-reader, an electronic display screen, a laptop computer, a mobile phone, an augmented reality (AR) / virtual reality (VR) device, a media player, a wearable device, a digital camera, a car navigation system, etc. The display module 1000 includes a display panel 100.

[0036] See also Figure 2 The present application also proposes a display panel 100. The display panel 100 includes a substrate 10, a thin film transistor device layer 20, and a light emitting device layer 30. The thin film transistor device layer 20 is disposed on one side of the substrate 10 in the thickness direction. The light emitting device layer 30 is disposed on a side of the thin film transistor device layer 20 away from the substrate 10. The absolute value of the difference between the thermal expansion coefficient of the thin film transistor device layer 20 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin.

[0037] In this embodiment, a thin film transistor device layer 20 is provided on one side of the substrate 10. The present application reduces the thermal expansion coefficient of the thin film transistor device layer 20 and makes the value of the thermal expansion coefficient of the thin film transistor device layer 20 approach the value of the thermal expansion coefficient of the substrate 10. When the absolute value of the difference between the thermal expansion coefficient of the thin film transistor device layer 20 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin, the warping amount generated when the display panel 100 is heated can be reduced, thereby improving the display effect.

[0038] Optionally, the thickness of the substrate 10 is less than or equal to 1 mm, so the substrate 10 is greatly affected by the thermal expansion force of the film layer adjacent to it. The thickness of the substrate 10 is a value selected from 0.1 mm, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm, and 1 mm.

[0039] Optionally, the light emitting device layer 30 includes a light emitting device. The light emitting device may be one of an organic light emitting diode (OLED), a micro light emitting diode (Micro LED) and a sub-millimeter light emitting diode (Mini LED).

[0040] Optionally, the absolute value of the difference between the thermal expansion coefficient of the thin film transistor device layer 20 and the thermal expansion coefficient of the substrate 10 is E0 multiplied by 0.000001, where E0 is a positive real number less than or equal to 10.

[0041] Optional. The value of E0 is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5. .0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.

[0042] Optionally, the substrate 10 is a flexible substrate 10 , and the material of the substrate 10 may be polyimide.

[0043] Optionally, the substrate 10 is a hard substrate 10 , and the material of the substrate 10 may be glass.

[0044] Optionally, the material of the thin film transistor device layer 20 includes at least one inorganic material selected from silicon oxide and silicon nitride. By modifying the material of the thin film transistor device layer 20, the thermal expansion coefficient of the material of the thin film transistor device layer 20 is reduced, and the thermal expansion coefficient of the thin film transistor device layer 20 is made close to the thermal expansion coefficient of the substrate 10, thereby reducing the stress inside the display panel 100 during the heating process, thereby reducing the warping amount of the display panel 100 and improving the display effect.

[0045] Optionally, the thermal expansion coefficient of the thin film transistor device layer 20 may be reduced by doping metal into the inorganic material of the thin film transistor device layer 20. The thermal expansion coefficient of the inorganic material in the thin film transistor device layer 20 may also be reduced by heat treating the inorganic material of the thin film transistor device layer 20 (normalizing, quenching, annealing, etc.).

[0046] Optionally, under the premise of meeting the insulation requirements, the thickness of the inorganic material film layer of the thin film transistor device layer 20 can be reduced to reduce the influence of internal stress on the warping of the substrate 10 when the display panel 100 is heated.

[0047] The following description assumes that the substrate 10 is a hard substrate 10 and the material of the substrate 10 is glass.

[0048] Optionally, the thin film transistor device layer 20 includes a plurality of thin film transistors arranged in an array. When the thin film transistor device layer 20 is a bottom gate structure, the thin film transistor device layer 20 includes a first metal layer, a gate insulating layer, a semiconductor layer, an interlayer dielectric layer, a second metal layer, a first organic planar layer 23, a first passivation layer 221, a third metal layer, a second organic planar layer 24, a second passivation layer 222, a fourth metal layer and a third passivation layer 223 arranged in a stacked manner. The first metal layer includes a gate, the second metal layer includes a source and a drain arranged at intervals on the interlayer dielectric layer, and the second metal layer is electrically connected to the third metal layer and the semiconductor layer, respectively. The difference between the thermal expansion coefficient of at least one of the gate insulating layer, the interlayer dielectric layer, the first passivation layer 221, and the second passivation layer 222 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin.

[0049] Optional, see Figure 3 The thin film transistor device layer 20 further includes a first wiring 41, an interlayer dielectric layer, a second wiring 42, a first organic planar layer 23, a first passivation layer 221, a third wiring 43, a second organic planar layer 24, a second passivation layer 222, and a fourth wiring 44, which are stacked in sequence. The first wiring 41 is arranged in the same layer as the first metal layer, the second wiring 42 is arranged in the same layer as the second metal layer, the third wiring 43 is arranged in the same layer as the third metal layer, and the fourth wiring 44 is arranged in the same layer as the fourth metal layer. The first wiring 41 is electrically connected to the second wiring 42, the second wiring 42 is electrically connected to the third wiring 43, and the third wiring 43 is electrically connected to the fourth wiring 44.

[0050] Optionally, the first routing 41 is made of the same material as the first metal layer, the second routing 42 is made of the same material as the second metal layer, the third routing 43 is made of the same material as the third metal layer, and the fourth routing 44 is made of the same material as the fourth metal layer. The absolute value of the difference between the thermal expansion coefficient of the first routing 41 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin. The absolute value of the difference between the thermal expansion coefficient of the second routing 42 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin. The absolute value of the difference between the thermal expansion coefficient of the third routing 43 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin. The absolute value of the difference between the thermal expansion coefficient of the fourth routing 44 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin.

[0051] Optionally, in order to further reduce the problem of warping of the display panel 100 caused by temperature rise, the thickness of the film layer may be adjusted.

[0052] Optionally, the thickness of the second passivation layer 222 is less than or equal to the thickness of the first passivation layer 221. In the display panel 100, the second passivation layer 222 is located on the side of the first passivation layer 221 away from the substrate 10. Since the thermal expansion coefficient of the second passivation layer 222 is greater than the thermal expansion coefficient of the substrate 10, the display panel 100 will be warped during the temperature increase process of the display panel 100. By reducing the thickness of the second passivation layer 222 on the side away from the substrate 10, the warping of the display panel 100 during the temperature increase process can be reduced, thereby improving the display effect.

[0053] Optionally, the thickness of the first passivation layer 221 is less than or equal to the thickness of the interlayer dielectric layer. By reducing the thickness of the first passivation layer 221 away from the substrate 10, the warping of the display panel 100 during the heating process can be reduced, thereby improving the display effect.

[0054] Optionally, the thin film transistor device layer 20 further includes a buffer layer. The buffer layer is disposed between the first metal layer and the substrate 10. The material of the buffer layer is one of silicon oxide and silicon nitride. By modifying the material of the buffer layer, the thermal expansion coefficient of the buffer layer material is reduced, so that the thermal expansion coefficient of the thin film transistor device layer 20 approaches the thermal expansion coefficient of the substrate 10, thereby reducing the stress inside the display panel 100 during the heating process, thereby reducing the warping of the display panel 100 and improving the display effect.

[0055] Optionally, the thin film transistor device layer 20 includes a first inorganic insulating layer 21. The first inorganic insulating layer 21 is disposed between the substrate 10 and the light emitting device layer 30. The first inorganic insulating layer 21 may be at least one of silicon oxide, silicon nitride, and silicon oxynitride. The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer 21 and the thermal expansion coefficient of the substrate 10 is a first difference.

[0056] Optionally, the material of the first inorganic insulating layer 21 includes at least one of silicon oxide and nitrogen oxide. The material of the first inorganic insulating layer 21 may be at least one of silicon oxide, silicon nitride and silicon oxynitride.

[0057] Optionally, the first inorganic insulating layer 21 includes at least one film layer among a buffer layer, a gate insulating layer and an interlayer dielectric layer.

[0058] Optionally, the first difference is less than or equal to 0.00001 per Kelvin. The value of the first difference is E1 multiplied by 0.000001. Wherein, E1 is a positive real number less than 10.

[0059] Optional. The value of E1 is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5. .0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.

[0060] In one embodiment, the first inorganic insulating layer 21 is an interlayer dielectric layer, and the interlayer dielectric layer is disposed on one side of the substrate 10. By modifying the material of the buffer layer, the thermal expansion coefficient of the buffer layer material is reduced, and the thermal expansion coefficient of the first inorganic insulating layer 21 is made close to the thermal expansion coefficient of the substrate 10, thereby reducing the stress inside the display panel 100 during the heating process, thereby reducing the warping amount of the display panel 100 and improving the display effect.

[0061] In another embodiment, the first inorganic insulating layer 21 is two film layers among a buffer layer, a gate insulating layer and an interlayer dielectric layer.

[0062] In yet another embodiment, the first inorganic insulating layer 21 includes a buffer layer, a gate insulating layer, and an interlayer dielectric layer.

[0063] Optionally, the thermal expansion coefficient of the interlayer insulating layer is less than or equal to the thermal expansion coefficient of the gate insulating layer, and the difference between the thermal expansion coefficient of the interlayer dielectric layer and the thermal expansion coefficient of the gate insulating layer is less than or equal to 0.00001. Because the interlayer dielectric layer is located on the side of the gate insulating layer away from the substrate 10, reducing the thermal expansion coefficient of the interlayer dielectric layer can reduce the warping amount of the display panel 100 and improve the display effect.

[0064] Optionally, the thermal expansion coefficient of the gate insulating layer is less than or equal to the thermal expansion coefficient of the buffer layer, and the difference between the thermal expansion coefficient of the gate insulating layer and the thermal expansion coefficient of the buffer layer is less than or equal to 0.00001. Because the gate insulating layer is located on the side of the buffer layer away from the substrate 10, reducing the thermal expansion coefficient of the gate insulating layer can reduce the warping of the display panel 100 and improve the display effect.

[0065] Optionally, the thin film transistor device layer 20 further includes a second inorganic insulating layer 22. The second inorganic insulating layer 22 is disposed on a side of the first inorganic insulating layer 21 away from the substrate 10. The absolute value of the difference between the thermal expansion coefficient of the second inorganic insulating layer 22 and the thermal expansion coefficient of the substrate 10 is a second difference.

[0066] Optionally, the second inorganic insulating layer 22 includes at least one film layer of a first passivation layer 221 , a second passivation layer 222 and a third passivation layer 223 .

[0067] Optionally, the second difference is less than or equal to 0.00001 per Kelvin. The value of the second difference is E2 multiplied by 0.000001. Wherein, E2 is a positive real number less than or equal to 10.

[0068] Optional. The value of E2 is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5. .0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.

[0069] Optionally, the second difference is less than or equal to the first difference. In the display panel 100, the second inorganic insulating layer 22 is located on the side of the first inorganic insulating layer 21 away from the substrate 10. By setting the second difference to be less than or equal to the first difference, the second inorganic insulating layer 22 located on the other side of the first inorganic insulating layer 21 can share part of the stress, thereby reducing the stress on the substrate 10. This embodiment reduces the stress inside the display panel 100 during the heating process, thereby reducing the warping of the display panel 100 and improving the display effect.

[0070] Optionally, the second inorganic insulating layer 22 includes a first passivation layer 221 , a second passivation layer 222 and a third passivation layer 223 .

[0071] Optionally, the thermal expansion coefficient of the third passivation layer 223 is less than or equal to the thermal expansion coefficient of the second passivation layer 222, and the thermal expansion coefficient of the third passivation layer 223 and the thermal expansion coefficient of the second passivation layer 222 are less than or equal to 0.00001. Because the third passivation layer 223 is located on the side of the second passivation layer 222 away from the substrate 10, reducing the thermal expansion coefficient of the third passivation layer 223 can reduce the warping amount of the display panel 100 and improve the display effect.

[0072] Optionally, the thermal expansion coefficient of the second passivation layer 222 is less than or equal to the thermal expansion coefficient of the first passivation layer 221, and the thermal expansion coefficient of the second passivation layer 222 and the thermal expansion coefficient of the first passivation layer 221 are less than or equal to 0.00001. Because the second passivation layer 222 is located on the side of the first passivation layer 221 away from the substrate 10, reducing the thermal expansion coefficient of the second passivation layer 222 can reduce the warping amount of the display panel 100 and improve the display effect.

[0073] Optionally, the thin film transistor device layer 20 further includes a first organic planar layer 23 . The first organic planar layer 23 is disposed on a side of the first inorganic insulating layer 21 away from the substrate 10 , and is located between the first inorganic insulating layer 21 and the second inorganic insulating layer 22 .

[0074] Optionally, when the material of the substrate 10 is glass, the material of the first organic planarization layer 23 is an organic photoresist, and the elastic modulus of the material of the first organic planarization layer 23 is less than or equal to the elastic modulus of the substrate 10 .

[0075] The elastic modulus of the material of the first organic planar layer 23 can be increased by baking, doping, etc., so that the elastic modulus of the material of the first organic planar layer 23 approaches the elastic modulus of the substrate 10. When the display panel 100 is heated up, the first organic planar layer 23 can share part of the stress, thereby reducing the stress on the substrate 10. The present application reduces the warping of the display panel 100 and improves the display effect by reducing the stress inside the display panel 100 during the heating process.

[0076] Optionally, the absolute value of the difference between the elastic modulus of the first organic planar layer 23 and the elastic modulus of the substrate 10 is less than or equal to 10 gigapascals (GPa). The absolute value of the difference between the elastic modulus of the first organic planar layer 23 and the elastic modulus of the substrate 10 is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6 , 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9

[0077] Optionally, the thin film transistor device layer 20 further includes a second organic planar layer 24 . The second organic planar layer 24 is disposed on a side of the first organic planar layer 23 away from the substrate 10 .

[0078] Optionally, when the material of the substrate 10 is glass, the material of the second organic planarization layer 24 is an organic photoresist, and the elastic modulus of the material of the second organic planarization layer 24 is less than or equal to the elastic modulus of the substrate 10 .

[0079] The elastic modulus of the material of the second organic planar layer 24 can be increased by baking, doping, etc., so that the elastic modulus of the material of the second organic planar layer 24 approaches the elastic modulus of the substrate 10. When the display panel 100 is heated up, the second organic planar layer 24 can share part of the stress, thereby reducing the stress on the substrate 10. The present application reduces the warping of the display panel 100 and improves the display effect by reducing the stress inside the display panel 100 during the heating process.

[0080] Optionally, an absolute value of a difference between an elastic modulus of the second organic planarization layer 24 and an elastic modulus of the substrate 10 is less than or equal to 10 GPa. The absolute value of the difference between the elastic modulus of the second organic planarization layer 24 and the elastic modulus of the substrate 10 is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0 .7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.

[0081] In the above embodiment, the present application reduces the warpage of the display panel 100 when the temperature rises by modifying the film layers of the thin film transistor device layer 20 located on one side of the substrate 10, thereby improving the display effect. In the following embodiment, the present application may also reduce the warpage of the display panel 100 when the temperature rises by arranging the plate layer 200 on the side of the substrate 10 away from the thin film transistor device layer 20, thereby improving the display effect.

[0082] The above embodiments and the following embodiments can be independently configured to form specific embodiments, and the above embodiments and the following embodiments can also be configured simultaneously to form a combined embodiment. The above embodiments and the combined embodiments of the following embodiments will not be described one by one in the following.

[0083] Optional, see Figure 4 , the display panel 100 further includes a plate layer 200. The plate layer 200 is disposed on a side of the substrate 10 away from the first inorganic insulating layer 21. The plate layer 200 is disposed to improve the strength of the side of the substrate 10 away from the thin film transistor device layer 20, thereby increasing the structural strength of the display panel 100 and reducing the warpage of the display panel 100. In this embodiment, the material of the plate layer 200 may be metal, aluminum alloy, copper, steel plate, and plastic having a greater elastic modulus than metal.

[0084] Optionally, the elastic modulus of the plate layer 200 is greater than the elastic modulus of the substrate 10. This reduces the warping amount of the substrate 10 during the heating process and improves the display effect.

[0085] Optionally, the material of the plate layer 200 is aluminum alloy. The thermal expansion coefficient of the aluminum alloy is 0.00002 per Kelvin, the elastic modulus is 70 GPa, the Poisson's ratio is 0.3, and the thickness of the plate layer 200 is 0.5 mm.

[0086] Optionally, the absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer 21 and the thermal expansion coefficient of the plate layer 200 is a third difference, and the third difference is less than or equal to 0.00001 per Kelvin. In the present embodiment, the substrate 10 is located between the first inorganic insulating layer 21 and the plate layer 200. When the thermal expansion coefficient of the first inorganic insulating layer 21 is greater than the thermal expansion coefficient of the substrate 10, the edge of the substrate 10 will warp downward. When the thermal expansion coefficient of the plate layer 200 is greater than the thermal expansion coefficient of the substrate 10, the edge of the substrate 10 will warp upward. When the absolute value of the difference between the thermal expansion coefficients of the first inorganic insulating layer 21 and the plate layer 200 is less than or equal to 0.00001 per Kelvin, the warpage of the display panel 100 can be reduced, so that the display panel 100 only undergoes slight deformation during the heating process, thereby improving the display effect.

[0087] Optionally, the third difference is less than or equal to 0.00001 per Kelvin. The value of the third difference is E3 multiplied by 0.000001. Wherein, E3 is a positive real number less than or equal to 10.

[0088] Optional. The value of E3 is 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5. .0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.

[0089] In the above embodiment, as the value of E3 decreases, the warping amount of the display panel 100 also decreases, thereby achieving the purpose of improving the display effect.

[0090] Optionally, the material of the plate layer 200 includes metal.

[0091] The reason why the conventional display panel 100a warps is that during the heating process of the conventional display module 1000a, the difference in thermal expansion coefficient between the substrate 10a and the adjacent film layer is too large, resulting in excessive internal stress in the conventional display panel 100a, causing the conventional display panel 100a to warp, affecting the display effect.

[0092] Therefore, during the temperature rise of the display panel 100, the present embodiment can reduce the temperature rise of the display panel 100 per unit time by increasing the heat dissipation of the display panel 100, thereby achieving the purpose of reducing the warping of the display panel 100, thereby improving the display effect. When the material of the plate layer 200 is metal, the metal has good heat dissipation performance, and can quickly dissipate the heat generated by the light-emitting device and the thin film transistor in the display panel 100, thereby reducing the warping of the display panel 100.

[0093] Optionally, the display panel 100 further includes a thermally conductive tape 400, which is disposed between the plate layer 200 and the substrate 10, and connects the plate layer 200 and the substrate 10. The thermally conductive tape 400 is used as a medium to fill and transfer heat. The thermally conductive tape 400 can further improve the heat dissipation efficiency of the display panel 100, thereby reducing the temperature rise of the display panel 100 in the working state and reducing the warping of the display panel 100.

[0094] Optionally, the thermally conductive tape 400 includes three film layers. The thermally conductive tape 400 includes a first adhesive layer 410, a substrate layer 420, and a second adhesive layer 430. The material of the substrate layer 420 may be polyethylene terephthalate (PET), and the materials of the first adhesive layer 410 and the second adhesive layer 430 may be double-sided adhesive. The substrate layer 420 may improve the cohesion of the thermally conductive tape 400. The overall thickness of the thermally conductive tape 400 is 0.1 mm, the thickness of the first adhesive layer 410 and the second adhesive layer 430 is 0.04 mm, and the thickness of the substrate layer 420 is 0.03 mm. The elastic modulus of the substrate layer 420 is 1 gigapascal (GPa).

[0095] Optionally, the display panel 100 further includes an insulating tape 500 . The insulating tape 500 is disposed between the thermally conductive tape 400 and the substrate 10 . The thickness of the insulating tape 500 is 0.01 mm. The insulating tape 500 is used to shield signals and connect the thermally conductive tape 400 and the substrate 10 .

[0096] Optionally, the display panel 100 further includes a sensor 300 , which is disposed on one side of the substrate 10 in the thickness direction and is used to monitor the warpage amount of the substrate 10 .

[0097] Since the display panel 100 uses a heat-dissipating material with good thermal conductivity as the material of the plate layer 200, during the heating process of the display panel 100, the plate layer 200 can average the temperature of the film layer where the substrate 10 is located, thereby preventing uneven temperatures at various locations on the substrate 10 from affecting the display effect, and at the same time improving the heat dissipation effect. Under this premise, on the one hand, by setting a sensor 300 in the display panel 100, the temperature inside the display panel 100 can be monitored in real time to prevent the substrate 10 from being cracked due to excessive warping due to excessive temperature, and on the other hand, the temperature of the display panel 100 can be accurately monitored in real time to prevent the light-emitting device inside the display panel 100 from being burned.

[0098] Optionally, the sensor 300 may be a stress strain sensor 300. In various embodiments of the present application, the warping of the display panel 100 due to temperature rise is only weakened, and the warping of the display panel 100 due to temperature rise is not completely eliminated. The stress strain sensor 300 may be a piezoelectric film such as piezoelectric ceramic or PVDF. When the display panel 100 warps due to temperature rise, the stress strain sensor 300 may sense the strain in real time, generate a voltage value corresponding to the warping amount of the display panel 100, and then determine the specific temperature of the temperature rise by the magnitude of the voltage value.

[0099] It is understandable that when there is a difference in thermal expansion coefficient between the substrate 10 and the thin film transistor device layer 20, as the temperature inside the display panel 100 increases, the tiny warpage of the display panel 100 will gradually increase, and the stress strain sensor 300 will generate different voltage values ​​corresponding to different warpage values, and the real-time temperature inside the display panel 100 can be monitored according to different voltage values. This embodiment is a principle of realizing temperature detection of the display panel 100 by controlling the numerical relationship between temperature and warpage and monitoring the warpage.

[0100] In a traditional display panel 100a, the internal temperature of the display panel 100 is monitored by a temperature sensor 300. However, it is difficult for the temperature sensor 300 to monitor the real-time temperature inside the display panel 100. Because the battery inside the display device generates heat, high-power components and external infrared radiation heat sources will cause great interference to the temperature sensor 300, and the heat insulation design inside the display panel 100 must involve vacuum and insulation, so it is difficult to achieve accurate and real-time monitoring. The traditional display panel 100a can also monitor the temperature of the display panel 100 by monitoring the real-time brightness of the display panel 100. However, the change in brightness has a lag effect relative to the change in temperature. When the brightness decays, the high temperature inside the display panel 100 may have caused some components to burn out. The traditional display panel 100a also monitors the temperature by real-time monitoring of power consumption. Since the ratio of total power consumption to thermal power consumption changes dynamically due to the influence of the algorithm and the display screen, and there is a complex heat transfer process in the whole machine structure, it is usually inaccurate to judge the temperature by power consumption, which leads to a large power consumption gradient to control the influence of temperature on brightness when designing the terminal. This detection and control accuracy is too low and affects the user experience. Therefore, this embodiment reduces the warpage of the display panel 100 during the temperature rise process, controls the degree of warpage deformation of the substrate 10 with temperature change within a gentle and monitorable range, and monitors the tiny warpage of the display panel 100 during the temperature rise process through the stress strain sensor 300, so as to achieve the effect of accurately monitoring the real-time temperature of the display panel 100.

[0101] Optionally, the display panel 100 includes a display area AA and a non-display area NA located outside the display area AA. If the plate layer 200 is made of a heat-distributing material with good heat-distributing effect (such as copper, aluminum plate, etc.), the sensor 300 can be set in the non-display area NA.

[0102] Optionally, the thickness of the plate layer 200 located in the display area AA is greater than the thickness of the plate layer 200 located in the non-display area NA. In this embodiment, the portion of the plate layer 200 located in the non-display area NA is relatively thinned, and the portion of the plate layer 200 located in the display area AA is relatively thickened. On the one hand, the thickening of the portion of the plate layer 200 located in the display area AA can improve the thermal conductivity and heat dissipation effects of the portion of the display panel located in the display area AA. Under the premise of inputting the same power to the display panel 100, good thermal conductivity and heat dissipation effects can reduce the temperature rise of the display panel 100, so that the temperature rise of the display panel 100 is reduced, thereby reducing the warping of the display panel 100. On the other hand, since the non-display area NA is not provided with a light-emitting device and does not have a display function, in this embodiment, the portion of the plate layer 200 located in the non-display area NA is thinned without affecting the thermal conductivity of the plate layer 200. After the plate layer 200 corresponding to the portion of the substrate 10 located in the non-display area NA is thinned, the portion of the substrate 10 located in the non-display area NA will produce a micro-warping within the specification range of the display panel 100 during the temperature rise process. The slight warping within the specification range of the display panel 100 allows the sensor 300 of the present application to monitor the warping degree of the display panel 100 more accurately and precisely. Since the sensor 300 of the present application is a stress strain sensor 300, the sensor 300 can output a real-time voltage value under the premise that the sensor 300 accurately and precisely monitors the warping degree of the display panel 100. Since the higher the temperature rise of the display panel 100, the greater the warping degree of the display panel 100, the greater the voltage value output by the sensor 300 that monitors the warping degree of the display panel 100. Therefore, the effect of accurately and precisely monitoring the warping degree and real-time temperature of the display panel 100 can be achieved by thinning the thickness of the plate layer 200 located in the non-display area NA.

[0103] Since the display area AA is the concentrated heat generation area of ​​the panel, this embodiment increases the thickness of the plate layer 200 located in the display area AA through a partition design, thereby improving the heat dissipation effect of the display panel 100 and controlling the area of ​​thermal warping and deformation of the substrate 10 to a safe area of ​​the panel.

[0104] Optional, see Figure 5 The display module 1000 of the present application further includes a limiting mechanism 600 , a limiting groove 610 is provided on the surface of the limiting mechanism 600 , and at least a portion of the display panel 100 located in the non-display area NA is received in the limiting groove 610 .

[0105] The limiting mechanism 600 may be a middle frame, and the portion of the display panel 100 located in the non-display area NA is set in the limiting groove 610, and a certain gap is reserved between the inner wall of the limiting groove 610 and the display panel 100, and the length of the gap is in the range of 1 to 10 microns. During the temperature rise process of the display panel 100, the limiting groove 610 allows the display panel 100 to produce a slight warpage, and prevents the display panel 100 from producing a warpage beyond the allowable range. When the temperature of the display panel 100 is reached, the display panel 100 is prevented from being too large in warpage, causing irreversible deformation to the display panel 100 and affecting the display effect.

[0106] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. A display panel, characterized in that: include: substrate; A thin film transistor device layer is provided on one side of the substrate in the thickness direction; as well as A light emitting device layer, disposed on a side of the thin film transistor device layer away from the substrate; Wherein, an absolute value of a difference between a thermal expansion coefficient of the thin film transistor device layer and a thermal expansion coefficient of the substrate is less than or equal to 0.00001 per Kelvin.

2. The display panel according to claim 1, wherein: The thin film transistor device layer includes a first inorganic insulating layer, and the first inorganic insulating layer is provided between the substrate and the light emitting device layer; The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer and the thermal expansion coefficient of the substrate is a first difference, and the first difference is less than or equal to 0.00001 per Kelvin.

3. The display panel according to claim 2, wherein: The thin film transistor device layer further comprises a second inorganic insulating layer, wherein the second inorganic insulating layer is disposed on a side of the first inorganic insulating layer away from the substrate; The absolute value of the difference between the thermal expansion coefficient of the second inorganic insulating layer and the thermal expansion coefficient of the substrate is a second difference, the second difference is less than or equal to 0.00001 per Kelvin, and the second difference is less than or equal to the first difference.

4. The display panel according to claim 2, wherein: The thin film transistor device layer further comprises a first organic planar layer, wherein the first organic planar layer is disposed on a side of the first inorganic insulating layer away from the substrate; The absolute value of the difference between the elastic modulus of the first organic planar layer and the elastic modulus of the substrate is less than or equal to 10 GPa.

5. The display panel according to claim 2, wherein: The display panel further comprises a plate layer, and the plate layer is arranged on a side of the substrate away from the first inorganic insulating layer; Wherein, the elastic modulus of the plate layer is greater than the elastic modulus of the substrate.

6. The display panel according to claim 5, wherein: An absolute value of a difference between a thermal expansion coefficient of the first inorganic insulating layer and a thermal expansion coefficient of the plate layer is a third difference, and the third difference is less than or equal to 0.00001 per Kelvin.

7. The display panel according to claim 5, wherein: The material of the sheet material layer includes metal; The display panel further includes a heat-conducting tape, which is disposed between the plate layer and the substrate and connects the plate layer and the substrate.

8. The display panel according to claim 1, wherein: The display panel further includes a sensor, which is disposed on one side of the substrate in a thickness direction and is used to monitor the warpage amount of the substrate.

9. A display module, characterized in that: The invention comprises a display panel as claimed in any one of claims 1 to 8.

10. The display module according to claim 9, wherein: The display panel includes a display area and a non-display area located outside the display area; The display module further comprises a limiting mechanism, a limiting groove is provided on the surface of the limiting mechanism, and at least a portion of the display panel located in the non-display area is accommodated in the limiting groove.

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