Heterojunction solar cell with laminated intrinsic amorphous silicon structure and preparation method of heterojunction solar cell

Abstract

The invention discloses a heterojunction solar cell with a laminated intrinsic amorphous silicon structure and a preparation method thereof. Comprising an n-type crystalline silicon substrate, an intrinsic layer, a phosphorus-doped layer, a first conductive layer and a front electrode which are sequentially arranged on the front surface of the substrate, and an intrinsic layer, a boron-doped layer, a second conductive layer and a back electrode which are sequentially arranged on the back surface of the substrate, wherein the H concentrations of the intrinsic layer, the phosphorus-doped layer, the first conductive layer and the front electrode are sequentially reduced; wherein the intrinsic layer, the phosphorus-doped layer, the boron-doped layer and the conductive layer are of a plurality of pyramid-shaped structures. The process window of the crystalline silicon heterojunction solar cell is widened, the light transmittance of the front surface can be improved, interface passivation and high carrier mobility of the two sides of the cell are both considered, and therefore high cell conversion efficiency is obtained.

Description

Technical Field

[0001] The present invention relates to a technology in the field of solar photovoltaic cells, in particular to a heterojunction solar cell with a laminated intrinsic amorphous silicon structure and a preparation method thereof. Background Art

[0002] The passivation of silicon wafer surface defects is an important issue for heterogeneous crystalline silicon solar cells. Due to the complexity of the interface carrier recombination mechanism and its sensitivity to some elements, it is difficult to achieve good results by only using hydrogen passivation. Based on hydrogen passivation, this patent introduces oxygen element passivation, which helps to form Si-O-Si bonds at the silicon substrate interface and improve the comprehensive passivation effect of different elements; and the intrinsic hydrogenated amorphous silicon is designed with a stacked structure, and the hydrogen content of different film layers is different, which ensures the hydrogen passivation effect while avoiding the degradation of battery performance caused by excessive hydrogen content in the amorphous silicon layer. Summary of the invention

[0003] In view of the shortcomings of the prior art that the surface of a heterojunction silicon substrate cannot be passivated and the hydrogen content in hydrogenated amorphous silicon cannot be controlled, the present invention proposes a heterojunction solar cell with a stacked intrinsic amorphous silicon structure and a preparation method thereof, which broadens the process window of crystalline silicon heterojunction solar cells, can improve the light transmittance of the front surface, and takes into account the interface passivation and high carrier mobility on both sides of the cell, thereby obtaining a higher cell conversion efficiency.

[0004] The present invention is achieved through the following technical solutions:

[0005] The present invention relates to a heterojunction solar cell with a stacked intrinsic amorphous silicon structure, comprising: an n-type crystalline silicon substrate, three layers of intrinsic layers with decreasing H concentrations, a phosphorus-doped layer, a first conductive layer and a front electrode, which are sequentially arranged on the front surface of the substrate, and three layers of intrinsic layers with decreasing H concentrations, a boron-doped layer, a second conductive layer and a back electrode, which are sequentially arranged on the back surface of the substrate, wherein: the intrinsic layer, the phosphorus-doped layer, the boron-doped layer and the conductive layer are all pyramid-shaped structures.

[0006] The intrinsic layer comprises: a first amorphous silicon intrinsic layer or a first amorphous silicon oxide intrinsic layer, a second and a third amorphous silicon intrinsic layer sequentially arranged on the front surface of the substrate, and a fourth amorphous silicon intrinsic layer or a second amorphous silicon oxide intrinsic layer, a fifth and a sixth amorphous silicon intrinsic layer sequentially arranged on the back surface of the substrate, wherein: the thickness of the first to third intrinsic layers is 1-3nm, and the total thickness is within 6nm; the thickness of the fourth to sixth intrinsic layers is 1-4nm, and the total thickness is within 8nm.

[0007] The phosphorus-doped layer is a phosphorus-doped amorphous silicon layer or a phosphorus-doped nano silicon oxide layer.

[0008] The boron-doped layer is a boron-doped amorphous silicon layer or a boron-doped nano silicon layer.

[0009] The phosphorus-doped amorphous silicon a-Si:H(n + )The concentration of phosphorus atoms in the film is 1E+19cm -3 ~1E+20cm -3 , Boron-doped amorphous silicon a-Si:H(p + ) The concentration of boron atoms in the film is 5E+18cm -3 ~8E+19cm -3 ; Phosphorus-doped nano-silicon oxide nc-SiO x :H(n + ) has a phosphorus atomic concentration of 1E+19 cm -3 ~1E+20cm -3 ,boron-doped nanosilicon nc-Si:H(p + ) has a boron atomic concentration of 5E+18cm -3 ~1E+20cm -3 .

[0010] The present invention relates to a method for preparing the above-mentioned heterojunction solar cell, comprising:

[0011] Step 1, selecting an n-type single crystal silicon wafer with a resistivity between 0.5 and 1 Ω.cm and a thickness of 100 to 160 μm as a substrate, and removing a wire-cutting damage layer on the surface of the substrate with a NaOH solution;

[0012] Step 2, etching the substrate obtained in step 1 with a KOH alkaline solution to form a pyramid structure for light trapping on the front and rear surfaces of the substrate;

[0013] Step 3, placing the silicon wafer obtained in step 2 into a PECVD device, introducing SiH4 and H2 gas sources, and depositing three layers of intrinsic amorphous silicon with decreasing hydrogen contents on the front surface of the silicon wafer, specifically: first introducing a high flow rate of H2 to prepare the first amorphous silicon intrinsic layer a-Si:H(i-1), then reducing the H2 flow rate to prepare the second amorphous silicon intrinsic layer a-Si:H(i-2), and finally further reducing the H2 flow rate to prepare the third amorphous silicon intrinsic layer a-Si:H(i-3);

[0014] The deposition process has a process pressure of 50-80 Pa and a substrate temperature of 150-400°C.

[0015] The thickness of the three intrinsic layers is 1-3 nm, and the total thickness is controlled within 6 nm;

[0016] Preferably, when a high flow H2 gas source is introduced and CO2 is introduced at the same time, an amorphous silicon oxide intrinsic layer a-SiO x :H(i-1).

[0017] The gas flow ratio during the preparation of the first amorphous silicon intrinsic layer a-Si:H(i-1) is SiH4:H2=0.005-0.01, the gas flow ratio during the preparation of the second amorphous silicon intrinsic layer a-Si:H(i-2) is SiH4:H2=0.015-0.02, and the gas flow ratio during the preparation of the third amorphous silicon intrinsic layer a-Si:H(i-3) is SiH4:H2=0.025-0.04, wherein the gas flow ratio of a-Si:H(i-4) is the same as that of a-Si:H(i-1), the gas flow ratio of a-Si:H(i-5) is the same as that of a-Si:H(i-2), and the gas flow ratio of a-Si:H(i-6) is the same as that of a-Si:H(i-3).

[0018] The first amorphous silicon oxide intrinsic layer a-SiO x :H(i-1) gas flow ratio is SiH4:H2=0.005-0.01, CO2:H2=0.01-0.15, where a-SiO x :H(i-4) and a-SiO x :H(i-1) has the same gas flow ratio.

[0019] Step 4: Place the silicon wafer obtained in step 3 into a PECVD system, introduce SiH4, PH3 and H2 gases, and deposit phosphorus-doped amorphous silicon a-Si:H(n + )film;

[0020] Preferably, CO2 is introduced during the amorphous silicon deposition process, and the PECVD process conditions are optimized to obtain phosphorus-doped nano-silicon oxide nc-SiO x :H(n + )film.

[0021] The phosphorus-doped amorphous silicon a-Si:H(n + )The film thickness is 5-15nm, phosphorus-doped nano silicon oxide nc-SiO x :H(n + )The thickness of the film is 5-20nm.

[0022] Step 5, placing the silicon wafer obtained in step 4 into the PECVD equipment, introducing SiH4 and H2 gas sources, and depositing three layers of intrinsic amorphous silicon with decreasing hydrogen contents on the back surface of the silicon wafer, specifically: first introducing a high flow rate of H2 to prepare the fourth amorphous silicon intrinsic layer a-Si:H(i-4), then reducing the H2 flow rate to prepare the fifth amorphous silicon intrinsic layer a-Si:H(i-5), and finally further reducing the H2 flow rate to prepare the sixth amorphous silicon intrinsic layer a-Si:H(i-6);

[0023] The thickness of the three intrinsic layers is 1-4 nm, and the total thickness is controlled within 8 nm.

[0024] Preferably, when a high flow H2 gas source is introduced and CO2 is introduced at the same time, an amorphous silicon oxide intrinsic layer a-SiO x :H(i-4).

[0025] Step 6: Place the silicon wafer obtained in step 5 into a PECVD system, introduce SiH4, BH3 and H2 gases, and deposit boron-doped amorphous silicon a-Si:H (p + )film;

[0026] Preferably, the PECVD process conditions are optimized during the deposition process to obtain boron-doped nano-silicon nc-Si:H(p + ).

[0027] The boron-doped amorphous silicon a-Si:H(p + ) film thickness is 5-10nm, boron-doped nano-silicon nc-Si:H(p + ) has a thickness of 5-25nm.

[0028] Step 7, depositing a conductive layer on the front and rear surfaces of the silicon wafer obtained in step 6 respectively by a magnetron sputtering method;

[0029] Step 8, using a screen printing method, forming gate-line-shaped Ag, Au or Cu electrodes on the front and back surfaces of the silicon wafer obtained in step 7 respectively.

[0030] The phosphorus-doped nano silicon oxide nc-SiO x :H(n + ) films and boron-doped nano-silicon nc-Si:H(p + ) is formed by low temperature annealing under nitrogen protection, the annealing temperature is 500-850°C, and the annealing time is 1-2h. Technical Effects

[0031] The present invention utilizes a stacked intrinsic amorphous silicon structure with varying hydrogen content, and simultaneously dopes hydrogen and oxygen into the intrinsic amorphous silicon layer to achieve mixed passivation of the two elements, thereby improving the interface passivation performance of heterojunction solar cells. Compared with conventional single-layer intrinsic amorphous silicon structures, the introduction of the new structure of stacked intrinsic amorphous silicon can achieve an increase in the open circuit voltage and conversion efficiency of the cell by 2-10mV and 0.05-0.3%, respectively. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a schematic diagram of the structure of a heterojunction solar cell after a double-sided textured silicon wafer is laminated with an intrinsic amorphous silicon film, a doped silicon film, a transparent conductive layer and a metal grid electrode;

[0033] In the figure: 1 is an n-type single crystal silicon substrate, 2 is a first amorphous silicon intrinsic layer a-Si:H(i-1) with a high H concentration or a first amorphous silicon oxide intrinsic layer a-SiO x :H(i-1), 3 is the second amorphous silicon intrinsic layer with medium H concentration a-Si:H(i-2), 4 is the third amorphous silicon intrinsic layer with low H concentration a-Si:H(i-3), 5 is phosphorus-doped amorphous silicon a-Si:H(n + ) or phosphorus-doped nano-silicon oxide nc-SiO x :H(n + ), 6 and 11 are transparent conductive layers, 7 is a fourth amorphous silicon intrinsic layer a-Si:H(i-4) with a high concentration of H or a fourth amorphous silicon oxide intrinsic layer a-SiO x :H(i-4), 8 is the fifth amorphous silicon intrinsic layer with medium H concentration a-Si:H(i-5), 9 is the sixth amorphous silicon intrinsic layer with low H concentration a-Si:H(i-6), 10 is the boron-doped amorphous silicon a-Si:H(p + ) or boron-doped nanosilicon nc-Si:H(p + ), 12 and 13 are metal grid line electrodes. DETAILED DESCRIPTION

[0034] like Figure 1 As shown in the figure, this embodiment relates to a heterojunction solar cell with a laminated intrinsic amorphous silicon structure, comprising: an n-type single crystal silicon substrate 1, the front surface of the substrate is sequentially composed of: a first amorphous silicon oxide intrinsic layer a-SiO x :H(i-1) film 2, the second amorphous silicon intrinsic layer a-Si:H(i-2) film with medium H concentration 3, the third amorphous silicon intrinsic layer a-Si:H(i-3) film with low H concentration 4, phosphorus-doped nano-silicon oxide nc-SiO x :H(n + ) film 5, transparent conductive layer 6 and front electrode 12, the back surface of the substrate is sequentially composed of: a fourth amorphous silicon oxide intrinsic layer a-SiO x :H(i-4) film 7, the fifth amorphous silicon intrinsic layer with medium H concentration a-Si:H(i-5) film 8, the sixth amorphous silicon intrinsic layer with low H concentration a-Si:H(i-6) film 9, boron-doped nano-silicon nc-Si:H(p + ) film 10, transparent conductive layer 11 and back electrode 13.

[0035] This embodiment relates to a method for preparing the above-mentioned heterojunction solar cell, comprising the following steps:

[0036] Step 1: Select a single crystal silicon substrate. Use industrial-grade n-type single crystal silicon with a crystal orientation of (100), a resistivity of about 1Ω.cm, and a thickness of 150μm as the battery substrate 1;

[0037] Step 2: Double-sided texturing of silicon wafers. The n-type single crystal silicon substrate obtained in step 1 is texturized on both sides using a KOH solution, and then subjected to standard RCA cleaning to obtain a pre-treated silicon wafer;

[0038] Step 3: Deposition of laminated intrinsic amorphous silicon on the front surface. Place the double-sided textured silicon wafer into the PECVD equipment, and introduce SiH4, H2 and CO2 gas sources, where the gas flow ratio is SiH4:H2=0.008, CO2:H2=0.1, to obtain the first amorphous silicon oxide intrinsic layer a-SiO with a thickness of 1.5nm. x :H(i-1); then turn off the O2 gas source and reduce the H2 flow rate to a gas flow ratio of SiH4:H2=0.018 to obtain a second amorphous silicon intrinsic layer a-Si:H(i-2) with a thickness of 1nm; finally, further reduce the H2 flow rate to a gas flow ratio of SiH4:H2=0.03 to obtain a third amorphous silicon intrinsic layer a-Si:H(i-3) with a thickness of 2nm, and deposit three layers of intrinsic amorphous silicon with decreasing hydrogen content on the front surface of the silicon wafer.

[0039] Step 4: Deposit phosphorus-doped nano-silicon oxide film on the front surface. High-purity H2 is introduced into the PECVD system as a diluent gas, the process pressure is set to 70Pa, the substrate temperature is 250℃, and the gas flow ratio is set to SiH4:H2=0.025 to control the nc-SiO x The growth rate of H was 0.8 nm / min, and PH3 gas was introduced; after the process was completed, the sample was annealed at low temperature under nitrogen protection, the annealing temperature was 650 ° C, and the annealing time was 1 h to obtain nc-SiO x :H film, where the phosphorus atomic concentration and thickness of the film are 8E+19cm -3 and 15nm.

[0040] Step 5: Deposit a layer of intrinsic amorphous silicon on the back surface. Place the above silicon wafer into a PECVD device, introduce SiH4, H2 and CO2 gas sources, where the gas flow ratio is SiH4:H2=0.008, CO2:H2=0.1, and obtain a fourth amorphous silicon oxide intrinsic layer a-SiO with a thickness of 1.5nm. x:H(i-4); then turn off the O2 gas source and reduce the H2 flow rate. The gas flow ratio is SiH4:H2=0.018 to obtain the fifth amorphous silicon intrinsic layer a-Si:H(i-5) with a thickness of 2nm. Finally, further reduce the H2 flow rate. The gas flow ratio is SiH4:H2=0.03 to obtain the sixth amorphous silicon intrinsic layer a-Si:H(i-6) with a thickness of 3nm. Three layers of intrinsic amorphous silicon with decreasing hydrogen content are deposited on the back surface of the silicon wafer.

[0041] Step 6: Deposit boron-doped nano-silicon film on the back surface. In the PECVD system, the process pressure is set to 65Pa, the substrate temperature is 300℃, the gas flow ratio is set to SiH4:H2=0.025, the growth rate of nc-Si:H is controlled to 0.6nm / min, and BH3 gas is introduced; after the process is completed, the sample is low-temperature annealed under nitrogen protection, the annealing temperature is 600℃, and the annealing time is 1.5h to obtain a nc-Si:H film, in which the boron atomic concentration and thickness of the film are 2E+19cm -3 and 20nm.

[0042] Step 7: Deposit transparent conductive layers on both sides of the silicon wafer. A transparent conductive layer ITO is deposited on the front and back surfaces of the silicon wafer using a DC magnetron sputtering method; the chamber temperature of the magnetron sputtering machine is preferably 320°C and the chamber pressure is 85Pa; the thickness of the ITO layer on the front surface is preferably 80nm, and the thickness of the ITO layer on the back surface is preferably 95nm.

[0043] Step 8: Prepare metal electrodes on both sides of the silicon wafer. For the silicon wafer after depositing the transparent conductive layer, use the screen printing method to print Ag electrodes on the front and back surfaces of the silicon wafer respectively.

[0044] After specific practical experiments, under room temperature and dust-free workshop conditions, when PECVD equipment is used to deposit high-hydrogen-concentration amorphous silicon oxide, medium-hydrogen-concentration amorphous silicon and low-hydrogen-concentration amorphous silicon stacked films on the front and back surfaces of the battery respectively, the open-circuit voltage is increased by 2-10mV compared with the use of conventional a-Si:H films of the same thickness, and the corresponding heterojunction solar cell conversion efficiency can be increased by 0.05-0.3%.

[0045] Compared with the prior art, the present method adopts multiple layers of intrinsic amorphous silicon with varying hydrogen contents, controls the thickness and hydrogen content of each layer of intrinsic amorphous silicon, ensures that the total thickness and total hydrogen content are within a reasonable range, and introduces oxygen elements into the intrinsic amorphous silicon layer, so that the dangling bonds on the surface of the silicon substrate are fully passivated, thereby improving the open circuit voltage of the battery.

[0046] The above-mentioned specific implementation can be partially adjusted in different ways by those skilled in the art without departing from the principle and purpose of the present invention. The protection scope of the present invention shall be based on the claims and shall not be limited by the above-mentioned specific implementation. Each implementation scheme within its scope shall be subject to the constraints of the present invention.

Claims

1. A heterojunction solar cell with a stacked intrinsic amorphous silicon structure, characterized in that: include: An n-type crystalline silicon substrate, three layers of H concentrations decreasing in sequence, an intrinsic layer, a phosphorus-doped layer, a first conductive layer and a front electrode, which are sequentially arranged on the front surface of the substrate, and three layers of H concentrations decreasing in sequence, an intrinsic layer, a boron-doped layer, a second conductive layer and a back electrode, which are sequentially arranged on the back surface of the substrate, wherein the intrinsic layer, the phosphorus-doped layer, the boron-doped layer and the conductive layer are all pyramid-shaped structures; The phosphorus-doped amorphous silicon a-Si:H(n + )The concentration of phosphorus atoms in the film is 1E+19cm -3 ~1E+20cm -3 , Boron-doped amorphous silicon a-Si:H(p + ) The concentration of boron atoms in the film is 5E+18cm -3 ~8E+19cm -3 ; Phosphorus-doped nano-silicon oxide nc-SiO x :H(n + ) has a phosphorus atomic concentration of 1E+19 cm -3 ~1E+20cm -3 , boron-doped nanosilicon nc-Si:H(p + ) has a boron atomic concentration of 5E+18cm -3 ~1E+20cm -3 .

2. The heterojunction solar cell with a laminated intrinsic amorphous silicon structure and the method for preparing the same according to claim 1 is characterized in that: The intrinsic layer comprises: a first amorphous silicon intrinsic layer or a first amorphous silicon oxide intrinsic layer, a second and a third amorphous silicon intrinsic layer sequentially arranged on the front surface of the substrate, and a fourth amorphous silicon intrinsic layer or a second amorphous silicon oxide intrinsic layer, a fifth and a sixth amorphous silicon intrinsic layer sequentially arranged on the back surface of the substrate.

3. The heterojunction solar cell with a laminated intrinsic amorphous silicon structure and the method for preparing the same according to claim 1 is characterized in that: The phosphorus-doped layer is a phosphorus-doped amorphous silicon layer or a phosphorus-doped nano silicon oxide layer; The boron-doped layer is a boron-doped amorphous silicon layer or a boron-doped nano silicon layer.

4. A method for preparing a heterojunction solar cell according to any one of claims 1 to 3, characterized in that: include: Step 1, selecting an n-type single crystal silicon wafer with a resistivity between 0.5 and 1 Ω.cm and a thickness of 100 to 160 μm as a substrate, and removing a wire-cutting damage layer on the surface of the substrate with a NaOH solution; Step 2, etching the substrate obtained in step 1 with a KOH alkaline solution to form a pyramid structure for light trapping on the front and rear surfaces of the substrate; Step 3, placing the silicon wafer obtained in step 2 into a PECVD device, introducing SiH4 and H2 gas sources, and depositing three layers of intrinsic amorphous silicon with decreasing hydrogen contents on the front surface of the silicon wafer, specifically: first introducing a high flow rate of H2 to prepare the first amorphous silicon intrinsic layer a-Si:H(i-1), then reducing the H2 flow rate to prepare the second amorphous silicon intrinsic layer a-Si:H(i-2), and finally further reducing the H2 flow rate to prepare the third amorphous silicon intrinsic layer a-Si:H(i-3); Step 4: Place the silicon wafer obtained in step 3 into a PECVD system, introduce SiH4, PH3 and H2 gases, and deposit phosphorus-doped amorphous silicon a-Si:H(n + )film; Step 5, placing the silicon wafer obtained in step 4 into the PECVD equipment, introducing SiH4 and H2 gas sources, and depositing three layers of intrinsic amorphous silicon with decreasing hydrogen contents on the back surface of the silicon wafer, specifically: first introducing a high flow rate of H2 to prepare the fourth amorphous silicon intrinsic layer a-Si:H(i-4), then reducing the H2 flow rate to prepare the fifth amorphous silicon intrinsic layer a-Si:H(i-5), and finally further reducing the H2 flow rate to prepare the sixth amorphous silicon intrinsic layer a-Si:H(i-6); Step 6: Place the silicon wafer obtained in step 5 into a PECVD system, introduce SiH4, BH3 and H2 gases, and deposit boron-doped amorphous silicon a-Si:H (p + )film; Step 7, depositing a conductive layer on the front and rear surfaces of the silicon wafer obtained in step 6 respectively by a magnetron sputtering method; Step 8, using a screen printing method, forming gate-line-shaped Ag, Au or Cu electrodes on the front and back surfaces of the silicon wafer obtained in step 7 respectively.

5. The method according to claim 4, characterized in that: When a high-flow H2 gas source is introduced to prepare a-Si:H(i-1), CO2 is introduced at the same time to prepare amorphous silicon oxide intrinsic layer a-SiO x :H(i-1).

6. The method according to claim 4, characterized in that: The gas flow ratio during the preparation of the first amorphous silicon intrinsic layer a-Si:H(i-1) is SiH4:H2=0.005-0.01, the gas flow ratio during the preparation of the second amorphous silicon intrinsic layer a-Si:H(i-2) is SiH4:H2=0.015-0.02, and the gas flow ratio during the preparation of the third amorphous silicon intrinsic layer a-Si:H(i-3) is SiH4:H2=0.025-0.04, wherein the gas flow ratio of a-Si:H(i-4) is the same as that of a-Si:H(i-1), the gas flow ratio of a-Si:H(i-5) is the same as that of a-Si:H(i-2), and the gas flow ratio of a-Si:H(i-6) is the same as that of a-Si:H(i-3); The first amorphous silicon oxide intrinsic layer a-SiO x :H(i-1) gas flow ratio is SiH4:H2=0.005-0.01, CO2:H2=0.01-0.15, where a-SiO x :H(i-4) and a-SiO x :H(i-1) has the same gas flow ratio.

7. The method according to claim 4, characterized in that CO2 was introduced into the amorphous silicon deposition process, and the PECVD process conditions were optimized to obtain phosphorus-doped nano-silicon oxide nc-SiO x :H(n + )film.

8. The method according to claim 4, characterized in that: When a high-flow H2 gas source is introduced to prepare a-Si:H(i-4) and CO2 is introduced at the same time, the amorphous silicon oxide intrinsic layer a-SiO can be prepared. x :H(i-4).

9. The method according to claim 4, characterized in that: The phosphorus-doped nano silicon oxide nc-SiO x :H(n + ) films and boron-doped nano-silicon nc-Si:H(p + ) is formed by low temperature annealing under nitrogen protection, the annealing temperature is 500-850°C, and the annealing time is 1-2h.

Images