Chip interconnection method, device, electronic device and storage medium

Abstract

The embodiment of the present invention provides a chip interconnection method, device, electronic device and storage medium, which relates to the field of computer technology. In the method, a target message sent by a switching point to a target master node through a service network is obtained; based on the target address of the target message, the message type corresponding to the target message is determined; and the target message is responded to through a target line corresponding to the message type. In this way, the switching point can be used to process all types of messages through the service network, the message type is determined between the switching point and the master node, and different types of messages are processed through different lines, so that the switching point does not need to use different networks to process different types of messages, which effectively avoids the reduction of routing efficiency caused by the switching point performing network switching to process different types of messages during the chip interconnection process, and helps to improve the utilization rate of line resources in the chip interconnection architecture.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of computer technology, and in particular to a chip interconnection method, device, electronic device and storage medium. Background Art

[0002] With the continuous improvement of computer integration and the complexity of chip functions, the design of chip interconnection has become a crucial part of chip architecture. Chip interconnection refers to the architectural design of interconnection between various functional modules within a chip or between chips.

[0003] In the related art, in order to serve different types of messages, the chip interconnection architecture usually sets up multiple sets of networks for connecting different hardware devices for the switching points, such as business networks and configuration networks. The switching points route different types of messages to the corresponding hardware devices by switching between the multiple sets of networks.

[0004] However, since the messages corresponding to some networks are triggered only in specific scenarios, some networks are often in a cold state, which easily leads to low utilization of line resources. Summary of the invention

[0005] Embodiments of the present invention provide a chip interconnection method, device, electronic device and storage medium, which can improve the utilization rate of line resources in a chip interconnection architecture.

[0006] In order to solve the above problems, an embodiment of the present invention discloses a chip interconnection method, the method comprising:

[0007] Obtain the target message sent by the switching point to the target master node through the business network;

[0008] Based on the target address of the target message, determine the message type corresponding to the target message; wherein the message type includes a service type and an operation management and maintenance type;

[0009] The target message is responded to through the target line corresponding to the message type; wherein the target line includes a first line connected to the target master node and a second line connected to the node register corresponding to the target master node.

[0010] Optionally, determining the message type corresponding to the target message based on the target address of the target message includes:

[0011] Obtaining a target address of the target message, and determining a type address segment corresponding to the target address;

[0012] The message type corresponding to the target message is determined according to the type address segment.

[0013] Optionally, the message type includes an operation management and maintenance type and a service type, the type address segment includes a configuration address segment corresponding to the target master node, and determining the message type corresponding to the target message according to the type address segment includes:

[0014] In the case where the target address matches the configured address segment, determining that the message type corresponding to the target message is the operation management and maintenance type;

[0015] In a case where the target address does not match the configured address segment, it is determined that the message type corresponding to the target message is the service type.

[0016] Optionally, the method further includes:

[0017] Obtaining an operation instruction corresponding to the target message;

[0018] In the case where the operation instruction matches the target instruction, executing the step of determining the message type corresponding to the target message based on the target address of the target message;

[0019] In the case where the operation instruction does not match the target instruction, the target message is sent to the target master node.

[0020] Optionally, responding to the target message through the target line corresponding to the message type includes:

[0021] When the message type is the service type, sending the target message to the target master node through the first line;

[0022] In the case where the message type is the operation management and maintenance type, the operation instruction of the target message is executed through the second line and the node register.

[0023] Optionally, the first line includes the business network, and / or the second line includes an advanced peripheral bus.

[0024] Optionally, before acquiring the target message sent by the switching point to the target master node through the service network, the method further includes:

[0025] The target message is obtained from the upper node through the switching point, the target address of the target message is matched with the node address segment corresponding to each master node managed by the switching point, the target node address segment corresponding to the target address is determined, and the target message is sent to the target master node corresponding to the target node address segment through the service network; wherein the upper node includes other switching points or request nodes, and the node address segment is composed of the type address segment of the corresponding master node.

[0026] Optionally, the message priority of the target message of the operation management and maintenance type is higher than the message priority of the target message of the service type, so that the switching point preferentially sends the target message of the operation management and maintenance type.

[0027] On the other hand, an embodiment of the present invention discloses a chip interconnection device, the device comprising:

[0028] An acquisition module, used to acquire a target message sent by the switching point to the target master node through the service network;

[0029] A type module, used to determine the message type corresponding to the target message based on the target address of the target message; wherein the message type includes a business type and an operation management and maintenance type;

[0030] A response module is used to respond to the target message through a target line corresponding to the message type; wherein the target line includes a first line connected to a target master node and a second line connected to a node register corresponding to the target master node.

[0031] In another aspect, an embodiment of the present invention discloses a chip interconnection system, the system comprising: a switching point, a target master node and a message detection component;

[0032] The message detection component is used to obtain a target message sent by the switching point to the target master node through the service network, determine the message type corresponding to the target message based on the target address of the target message, and respond to the target message through a target line corresponding to the message type.

[0033] On the other hand, an embodiment of the present invention discloses an electronic device, comprising: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the aforementioned method.

[0034] The embodiment of the present invention further discloses a computer-readable storage medium on which instructions are stored. When executed by one or more processors, the processors execute the method as described above.

[0035] The embodiment of the present invention includes the following advantages: in the chip interconnection method provided in the embodiment of the present invention, a target message sent by a switching point to a target master node through a service network is obtained; based on the target address of the target message, the message type corresponding to the target message is determined; and the target message is responded to through a target line corresponding to the message type. In this way, a switching point can be used to process all types of messages through a service network, and the message type is determined between the switching point and the master node, and different types of messages are processed through different lines, so that the switching point does not need to use different networks to process different types of messages, effectively avoiding the reduction in routing efficiency caused by the switching point performing network switching to process different types of messages during the chip interconnection process, and helping to improve the utilization of line resources in the chip interconnection architecture.

[0036] In addition, this solution only requires the deployment of a business network at the exchange point, and all types of messages are forwarded through the business network through in-band transmission, which helps save valuable connection resources, leaving more connection resources for business use, and helps improve the utilization rate of hardware connection resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0038] Figure 1 is a flowchart of a chip interconnection method provided by an embodiment of the present invention;

[0039] Figure 2 A chip interconnection topology structure provided by an embodiment of the present invention;

[0040] Figure 3 It is another chip interconnection topology structure provided by an embodiment of the present invention;

[0041] Figure 4 is a schematic diagram of a chip interconnection system provided by an embodiment of the present invention;

[0042] Figure 5 is a block diagram of a chip interconnection device provided by an embodiment of the present invention;

[0043] Figure 6 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0045] The network on chip (NOC) is a part of the integrated circuit (IC) design, which is mainly used to connect different chip modules (such as processors, memory, peripherals, etc.) and enable them to communicate with each other, and to interconnect chips. It can also be called an on-chip network. Chip interconnection usually requires the establishment of a business network for business data transmission. The business network can also be called a data bus, which is used to carry business data that needs to be written and read. The communication protocol used by the business network can be flexibly set according to actual needs, such as the Coherent Hub Interface (CHI) protocol, the Advanced eXtensible Interface (AXI) protocol, etc.

[0046] The consistency bus interface protocol is a protocol for building high-performance, low-power multi-processor systems. A network that uses this protocol can be called a business network. Through the business network, an efficient, low-latency method can be provided to connect multiple processors, accelerators, memory, and other system components to achieve shared memory access and cache consistency. The consistency bus interface protocol is an evolution of the AXI consistency extension (ACE) protocol, which is part of Arm's AMBA bus and is designed to solve cache consistency problems in multi-core processor systems.

[0047] Operation Administration and Maintenance (OAM) refers to the technologies and mechanisms used to implement operation, management and maintenance functions in chip interconnection or other communication networks. In chip interconnection, the business network is usually used to implement business functions and transmit business messages, and another network (such as PUB network) is used to implement OAM-related functions and transmit OAM messages.

[0048] A request node (RN or RHF) is a node responsible for generating transaction requests and sending them to other nodes in the system. In the ARM AMBA CHI protocol, RN is a key component responsible for initiating transaction requests and interacting with other system nodes. Its main functions include generating transaction requests, address translation and routing, transaction management, and maintaining cache consistency. Through these functions, RN ensures the efficiency and consistency of data transmission in high-performance computing systems.

[0049] The Home Node (HN or HNF) is a node responsible for managing and storing data within a specific address range and processing requests from other nodes. HN plays a vital role in maintaining cache consistency and managing memory access.

[0050] The Exchange Point (EX) is responsible for forwarding and exchanging messages between different nodes or modules to ensure cache consistency and correct data transmission. It usually acts as a central node in the data flow, sending data from different sources to the destination according to the correct route.

[0051] Reference Figure 1 , shows a flow chart of the steps of a chip interconnection method provided by an embodiment of the present invention, such as Figure 1 As shown, the method may specifically include the following steps:

[0052] Step 101: Obtain a target message sent by a switching point to a target master node through a service network.

[0053] In an embodiment of the present invention, the requesting node may send a target message through the on-chip network. The target message may include a specific operation instruction and a target address corresponding to the operation instruction. When the operation instruction is a write instruction, it may also include write content.

[0054] The messages in the on-chip network can be forwarded to the corresponding nodes by the switching points based on the address information contained therein. Each switching point and each node can be connected to each other through the service network.

[0055] In an embodiment of the present invention, after the first switching node receives the target message sent by the requesting node, it can obtain the target address contained in the target message, and can determine the target master node corresponding to the target address through the routing table. Specifically, the node address segment corresponding to each node can be maintained in the routing table, and the node address segment can include all address ranges related to the corresponding node, such as the register address range corresponding to the node, the memory address range managed by the node, and so on. The first switching node can query the target address of the target message through the routing table, determine its corresponding node address segment, and thus determine the target master node corresponding to the node address segment. After the first switching node determines the target master node corresponding to the target message, it can send the target message to the target master node through the service network.

[0056] In the embodiment of the present invention, a message detection component may be provided between the first switching node and the target master node, and the message detection component may obtain the target message sent by the first switching node to the target master node. Specifically, the message detection component may be provided on the service network between the first switching node and the target master node, that is, the message detection component may be connected to the first switching node through the service network, and at the same time connected to the target master node through the service network.

[0057] It should be noted that, in the embodiment of the present invention, the network on chip may include a large number of master nodes, each of which may be connected to a switching node, and a corresponding message detection component may be provided between each master node and the corresponding switching node.

[0058] Step 102: Determine the message type corresponding to the target message based on the target address of the target message; wherein the message type includes a service type and an operation management and maintenance type.

[0059] In the embodiment of the present invention, the target message may have different message types. The messages of different message types implement different functions, and the required hardware is different, resulting in different addresses contained in messages of different types. Therefore, the message type corresponding to the target message can be determined by the hardware type corresponding to the target address of the target message. Among them, the hardware type may include but is not limited to the memory type, the register type, etc., and the embodiment of the present invention does not specifically limit it.

[0060] Specifically, addresses of different hardware types differ in address attributes, which may include but are not limited to address length, address format, address range, etc. Therefore, in an embodiment of the present invention, the hardware type corresponding to the target address may be determined based on one or more of the address length, address format, and address range of the target address. The message detection component may be configured with address detection rules for hardware types, and the address may be detected according to the address detection rules to determine whether it complies with a certain address detection rule, thereby determining the corresponding hardware type.

[0061] Exemplarily, if the hardware type includes a memory type and a register type, the corresponding message types are type 1 and type 2, respectively. After obtaining the target address of the target message, the address format of the target address can be identified. If the target address starts with "0X", it meets the address detection rule corresponding to the memory address, and the hardware type of the target address can be determined to be a memory type, and the message type of the target message can be further determined to be type 1; if the target address is composed of a register name, it meets the address detection rule of the register address, and the hardware type of the target address can be determined to be a register type, and the message type of the target message can be further determined to be type 2.

[0062] In the embodiment of the present invention, the target message may have different message types, and the messages of different message types implement different functions, and the required hardware addresses are different. Therefore, the message type corresponding to the target message can also be directly determined by the address segment where the target address of the target message is located.

[0063] Step 103: respond to the target message through the target line corresponding to the message type; wherein the target line includes a first line connected to the target master node and a second line connected to the node register corresponding to the target master node.

[0064] In the embodiment of the present invention, different message types have different effects on the hardware, and the destinations of the target messages to be processed may also be different. Therefore, different lines may be set to respond to different message types.

[0065] Specifically, for different message types, different lines connecting different hardware may be set. After the message type of the target message is determined, the target line corresponding to the message type may be used to send the target message to the corresponding hardware.

[0066] Exemplarily, the message type may include a service type and an operation management and maintenance type (i.e., an OAM type). The line corresponding to the service type may be a line A connected to the master node, and the line corresponding to the operation management and maintenance type may be a line B connected to the operation management and maintenance unit of the master node. Thus, after the message detection component of the target master node obtains the target message sent to the target master node, if it is determined that the message type of the target message is a service type, the target message may be forwarded to the target master node through the above line A, so that the target master node can process the target message normally; if it is determined that the message type of the target message is an operation management and maintenance type, the target message may be sent to the operation management and maintenance unit for processing the OAM-related functions of the target master node through the above line B, and the operation management and maintenance unit operates the relevant node register of the target master node based on the target message to implement configuration, management, maintenance and other related operations on the target master node.

[0067] In the embodiment of the present invention, messages of different message types can play different roles, and their processing methods may also be different. For example, the service message for the master node is usually used to operate the memory space managed by the master node, and the monitoring message for the master node is usually used to obtain the operating status of the master node from the register corresponding to the master node. Therefore, when responding to the target message through the lines corresponding to different message types, the response methods adopted may also be different.

[0068] Exemplarily, the message type may include a business type and a configuration type. The line corresponding to the business type may be line A connected to the master node, and the corresponding response mode may be forwarding; and the line corresponding to the configuration type may be line B connected to the node register related to the master node. Thus, after the message detection component of the target master node obtains the target message sent to the target master node, if it is determined that the message type of the target message is a business type, the target message may be forwarded to the target master node through the above-mentioned line A, so that the target master node can process the target message normally; if it is determined that the message type of the target message is a configuration type, the configuration instruction contained in the target message may be executed, and the node register of the target master node may be configured through the above-mentioned line B. The configuration operation is determined by the configuration instruction contained in the target message by the requesting node, and may specifically include deleting configuration information, writing configuration information, etc., which is not specifically limited in the embodiment of the present invention.

[0069] In an embodiment of the present invention, the message type may include a service type and an operation management and maintenance type, and the target line may include a first line connected to a target master node and a second line connected to a node register corresponding to the target master node. The first line may be used to respond to a target message of a service type, and the second line may be used to respond to a target message of an operation management and maintenance type. The operation instruction is directly implemented on the node register corresponding to the target address through the second line to implement the OAM operation on the target master node.

[0070] In summary, in a chip interconnection method provided by an embodiment of the present invention, a target message sent by a switching point to a target master node through a service network is obtained; based on the target address of the target message, the message type corresponding to the target message is determined; and the target message is responded to through a target line corresponding to the message type. In this way, the switching point can be used to process all types of messages through the service network, the message type is determined between the switching point and the master node, and different types of messages are processed through different lines, so that the switching point does not need to use different networks to process different types of messages, which effectively avoids the reduction in routing efficiency caused by the switching point performing network switching to process different types of messages during the chip interconnection process, and helps to improve the utilization of line resources in the chip interconnection architecture.

[0071] In addition, this solution only requires the deployment of a business network at the exchange point, and all types of messages are forwarded through the business network through in-band transmission, which helps save valuable connection resources, leaving more connection resources for business use, and helps improve the utilization rate of hardware connection resources.

[0072] Optionally, in some embodiments, the step of determining the message type corresponding to the target message based on the target address of the target message may specifically include:

[0073] Step S21, obtaining the target address of the target message, and determining the type address segment corresponding to the target address.

[0074] Step S22: determining the message type corresponding to the target message according to the type address segment.

[0075] In an embodiment of the present invention, the message detection component may record the correspondence between each message type of the corresponding master node and the corresponding type address segment. After the message detection component obtains the target message, it may query the above correspondence according to the target address of the target message, determine the type address segment to which the target address belongs, and determine the message type corresponding to the type address segment to which the target address belongs as the message type of the target message. Among them, the type address segment represents the possible address range of the address of the message of the corresponding message type.

[0076] Exemplarily, if the possible address range of all messages for a certain master node is [address 1 to address 10], the node address segment corresponding to the master node is [address 1 to address 10], so that the switching point connected to the master node will route all messages with addresses in the range [address 1 to address 10] to the master node. A message detection component corresponding to the master node may be provided between the master node and the switching point. If there are three types of messages sent to the master node, the message detection component may maintain type address segment 1 corresponding to type 1 (for example, [address 1 to address 4]), and may also maintain type address segment 2 corresponding to type 2 (for example, [address 5 to address 6]), and type address segment 3 corresponding to type 3 (for example, [address 7 to address 10]). When the master node routes a target message A with a target address of "address 6" to the master node, the message detection component may obtain the message A, and query the correspondence between the message type and the type address segment according to the target address of the target message A, and determine that the message type of the target message A is type 2.

[0077] It should be noted that type address segments corresponding to multiple message types can be set, or only a correspondence between one message type and a corresponding type address segment can be set. For example, a correspondence between type 1 and corresponding type address segment 1 can be set. If the target address of the target message matches the type address segment 1, the message type of the target message can be determined to be type 1. If the target address of the target message does not match the type address segment 1, the message type of the target message can be determined to be non-type 1.

[0078] In an embodiment of the present invention, the message detection component can be implemented as a packet filter (pkg_filter) or a probe component (Probe Component). The packet filter is used to filter each message data packet according to the target address of each target message, and filter out the target message of the specified type, and the target message that is not filtered out is a non-specified type. The probe component can be used to detect the target address of each target message, and match the target address with each type of address segment, so as to determine the message type corresponding to the target message.

[0079] In the embodiment of the present invention, the target address of the target message can be obtained, and the type address segment corresponding to the target address can be determined; and the message type corresponding to the target message can be determined according to the type address segment. In this way, the message type of the target message can be determined by a data range matching calculation with high computational efficiency, which helps to improve the efficiency of determining the message type, thereby reducing the delay of the system in processing messages and improving system performance.

[0080] Optionally, in some embodiments, the message type includes an operation management and maintenance type and a service type, the type address segment includes a configuration address segment corresponding to the target master node, and the step of determining the message type corresponding to the target message according to the type address segment may specifically include:

[0081] Step S221, when the target address matches the configured address segment, determining that the message type corresponding to the target message is the operation management and maintenance type.

[0082] In the embodiment of the present invention, the message type may include an operation management and maintenance type, ie, an OAM type, and a service type. The type address segment may include a configuration address segment corresponding to the target master node, ie, a corresponding address range for performing OAM operations on the target master node.

[0083] In an embodiment of the present invention, a target address of a target message may be matched with a configuration address segment. If the target address matches the configuration address segment, it may be determined that the message type corresponding to the target message is an operation management and maintenance type. Specifically, a probe component may be configured to perform address detection on a target message sent by a switching point to a target master node, thereby determining whether the target address of the target message matches the configuration address segment.

[0084] Step S222: When the target address does not match the configured address segment, determine that the message type corresponding to the target message is the service type.

[0085] In the embodiment of the present invention, if the target address of the target message does not match the configured address segment, it can be directly determined that the message type of the target message is a service type.

[0086] In an embodiment of the present invention, by setting the configuration address segment corresponding to the master node, it is possible to identify whether the message sent to the master node is of a business type or an operation management and maintenance type, so that only one address segment matching operation is required to determine the different types of messages, which helps to improve the efficiency of determining the message type.

[0087] Optionally, in some embodiments, before the step of determining the message type corresponding to the target message based on the target address of the target message, the following steps can be used to determine whether it is necessary to determine the message type corresponding to the target message, thereby reducing the frequency of determining the message type of the target message and improving the operating efficiency of the computer system.

[0088] Step S31, obtaining the operation instruction corresponding to the target message.

[0089] In an embodiment of the present invention, since messages of different message types generally contain differences in operating instructions, messages of certain message types may not contain operating instructions of a specific type, while messages of certain message types may only contain operating instructions of a specific type. Therefore, before determining the message type based on the address, the messages can be preliminarily screened by the operating instructions, thereby eliminating the need to perform address-based message type judgment for each message, which helps save valuable computer resources.

[0090] Specifically, the operation instruction corresponding to the target message may be obtained first. The operation instruction of the target message may include but is not limited to ReadSnp, ReadNoSnp, WriteSnp, WriteNoSnp, etc., which are not specifically limited in the embodiment of the present invention.

[0091] Step S32, when the operation instruction matches the target instruction, executing the step of determining the message type corresponding to the target message based on the target address of the target message.

[0092] In an embodiment of the present invention, different processing methods can be adopted for target messages of different message types, but most target messages are business type messages and need to be directly processed by the corresponding target master node. Therefore, non-business type messages can be filtered out through operation instructions for subsequent instruction matching operations to specifically determine the message type.

[0093] Specifically, the target instructions that may be included in the message type that needs to be further determined can be pre-set. For example, if the message type that needs to be further determined is an OAM type, since the OAM type message may only contain ReadNoSnp or WriteNoSnp instructions, the target instruction ReadNoSnp and the target instruction WriteNoSnp can be configured. Then the message instruction of the target message is matched with the configured target instruction. If the message instruction and the target instruction can be matched successfully, that is, the message instruction belongs to a type of target instruction, it can be determined that the target message may be a non-business type, that is, an OAM type. If the specific message type needs to be further determined, the step of determining the message type corresponding to the target message based on the target address of the target message is executed.

[0094] Step S33: When the operation instruction does not match the target instruction, send the target message to the target master node.

[0095] In an embodiment of the present invention, if the message instruction and the target instruction cannot be matched successfully, that is, the message instruction does not belong to at least one of the target instructions, it can be determined that the target message is a business type, and there is no need to further determine its message type. It is directly processed according to the message processing method of the business type and the target message is sent to the target master node.

[0096] In the embodiment of the present invention, the operation instruction corresponding to the target message can be obtained; when the operation instruction matches the target instruction, the step of determining the message type corresponding to the target message based on the target address of the target message is executed; when the operation instruction does not match the target instruction, the target message is sent to the target master node. In this way, the target message that does not meet the instruction requirements can be directly processed, and the target message that meets the instruction requirements can be specifically determined as the message type, thereby effectively reducing the number of messages that need to be determined based on the address, which helps to improve the chip processing efficiency.

[0097] In the embodiment of the present invention, the message type may include a business type and an operation management and maintenance type, and the target line may include a first line connected to a target master node and a second line connected to a node register corresponding to the target master node. The step of responding to the target message through the target line corresponding to the message type may specifically include:

[0098] Step S41, when the message type is the service type, sending the target message to the target master node through the first line.

[0099] Specifically, after the message detection component of the target master node obtains the target message sent to the target master node, it can determine the message type of the target message. If the message type of the target message is a business type, the target message can be directly processed by the target master node, and the message detection component can directly forward the target message to the target master node through the first line.

[0100] Step S42: When the message type is the operation management and maintenance type, execute the operation instruction of the target message through the second line and the node register.

[0101] In an embodiment of the present invention, if it is detected that the message type is an operation management and maintenance type, the target message can be parsed to obtain the operation instructions, target address and other information of the target message, and the operation instructions can be directly implemented on the node register corresponding to the target address through the second line to realize the OAM operation on the target master node.

[0102] Exemplarily, if there is a target message of operation management and maintenance type, whose target address points to register RNF configured with system address mapping (SAM) information of the corresponding target master node, whose operation instruction is opcode=writenosnp, and the target message also includes system address mapping data to be written, then the operation instruction opcode=writenosnp can be executed through the second line to write the above-mentioned system address mapping data to be written into the above-mentioned register RNF, and complete the response to the above-mentioned target message. If there is a target message of operation management and maintenance type, whose target address points to register REG storing the operation status information of the corresponding target master node, and whose operation instruction opcode=raednosnp, then the operation instruction opcode=raednosnp can be executed on register REG through the second line to read the register data therein and feed back the reading result to the request node corresponding to the target message, so that the request node can monitor the target master node.

[0103] Reference Figure 2 , Figure 2 FIG. 4 shows a chip interconnection topology structure provided by an embodiment of the present invention. Figure 2 As shown, the request node can be connected to the exchange point through the business network, and the exchange point can be connected to the target master node through the business network. A message detection component corresponding to the target master node can be set in the business network between the exchange point and the target master node. The message detection component has lines corresponding to different message types, such as Figure 2 As shown, the message detection component can be connected to the target master node through a first line corresponding to the business type, and connected to the node register of the target master node through a second line corresponding to the operation management and maintenance type.

[0104] In the embodiment of the present invention, when the message type is a business type, the target message can be sent to the target master node through the first line, and when the message type is an operation management and maintenance type, the operation instruction of the target message can be executed in the node register through the second line. In this way, different types of messages can be quickly routed to the corresponding master node, and different processing is performed according to the message type of the message. The business type message is forwarded to the corresponding master node for normal processing through the first line, and the operation management and maintenance type message is directly executed through the second line, which helps to improve the processing efficiency of the operation management and maintenance type message while improving the message routing efficiency.

[0105] Optionally, in an embodiment of the present invention, the first line may directly adopt the above-mentioned business network, or may adopt a line with the same protocol as the above-mentioned business network, thereby improving the simplicity of the chip interconnection network design. The second line may include an advanced peripheral bus (APB), and the second line may also be a line using other protocols or custom protocols, which is not specifically limited in the embodiment of the present application. Among them, the node registers of the target master node can be connected through the advanced peripheral bus, and even the node registers of all master nodes can be connected. The node registers of all master nodes and the message detection components of all master nodes are connected together through an advanced peripheral bus, and each message detection component can operate the corresponding node register through the advanced peripheral bus.

[0106] In the embodiment of the present invention, the service network has a relatively fast speed, and the target message of the service type usually needs to carry more service data, so the target message of the service type can be quickly processed and responded to through the first line to keep the service running smoothly at high speed. The advanced peripheral bus is usually used to connect devices with low bandwidth requirements, and has the advantages of simple design and less physical line resources. When the target message of the operation management and maintenance type with low data volume is met, more line resources can be further transferred to the processing and response of service data, which helps to improve the system operation efficiency.

[0107] Optionally, in some embodiments, before the step of obtaining the target message sent by the switching point to the target master node through the service network, the following steps may be specifically included:

[0108] The target message is obtained from the upper node through the switching point, the target address of the target message is matched with the node address segment corresponding to each master node managed by the switching point, the target node address segment corresponding to the target address is determined, and the target message is sent to the target master node corresponding to the target node address segment through the service network; wherein the upper node includes other switching points or request nodes, and the node address segment is composed of the type address segment of the corresponding master node.

[0109] In the embodiment of the present invention, the switching point may be connected to an upper-level node via a service network, and the target message received by the switching point may come from its upper-level node, which may include but is not limited to other switching points or requesting nodes.

[0110] In an embodiment of the present invention, the chip interconnection architecture may include multiple request nodes, multiple exchange points, and multiple master nodes. The request nodes and the master node exchange points are connected to each other through a service network, and one or more exchange points are distributed on the service network between the request node and the master node to form a topology structure. The message sent by the request node to the master node can be routed to the corresponding master node through one or more exchange points, and the message fed back by the master node to the request node can also be routed to the corresponding request node through the same exchange point.

[0111] In an embodiment of the present invention, the switching point connected to the target master node may be configured with node address segments corresponding to all the master nodes it manages, and the node address segment may be composed of type address segments corresponding to each message type of the corresponding master node. Exemplarily, if there are three types of messages for a master node, type 1 corresponds to type address segment 1 is [address 1 to address 4], type 2 corresponds to type address segment 2 is [address 5 to address 6], and type 3 corresponds to type address segment 3 is [address 7 to address 10], then the node address segment of the master node may be [address 1 to address 10].

[0112] In an embodiment of the present invention, after receiving a target message from an upper-level node, the switching point can obtain the target address of the target message and match the target address with the node address segments corresponding to each master node it manages. If the corresponding target node address segment is matched, the master node corresponding to the target node address segment can be determined as the target master node corresponding to the target message, and the target message can be sent to the target master node through a business network connected to the target master node.

[0113] In the embodiment of the present invention, the switching point also maintains the switching point address segments of other switching points connected thereto, and the switching point address segments are composed of the node address segments corresponding to the master nodes directly and indirectly managed by the corresponding switching point. If the switching point cannot match the target master node corresponding to the target message from the master nodes managed by itself, the target address of the target message can be matched with the switching point address segments of other switching points to determine the target switching point corresponding to the target message, thereby routing the target message to the target switching point for processing, until the target message is routed to its corresponding target master node.

[0114] It should be noted that the matching strategy of each switching point may be to match the node address segment first and then the switching point address segment, or to match the switching point address segment first and then the node address segment, which is not specifically limited in the embodiment of the present invention.

[0115] Furthermore, the target message sent by the requesting node can also be transmitted to the switching point connected to it through the corresponding system address mapping (System Address Mapping, SAM). Among them, the system address mapping can map the virtual address in the target message sent by the requesting node to the real hardware physical address in the system, so that the switching point can accurately route the target message to the corresponding hardware.

[0116] In the embodiment of the present invention, the switching point can obtain the target message from the upper node through the service network, match the target address of the target message with the node address segment corresponding to each master node managed by the switching point, determine the target node address segment corresponding to the target address, and send the target message through the service network connected to the target master node corresponding to the target node address segment. In this way, the switching point can determine the routing direction of the message by maintaining a set of address segments that do not need to distinguish the message function, and realize unified routing of different types of messages based on the service network, which helps to improve the efficiency of the switching point in routing messages.

[0117] Reference Figure 3 , Figure 3 Another chip interconnection topology structure provided by an embodiment of the present invention is shown. The chip interconnection topology structure may include multiple request nodes, multiple switching points and multiple master nodes, such as Figure 3 As shown, the first switching point can be connected to the first request node and the first main node respectively through the business network, the second switching point can be connected to the second request node and the second main node respectively through the business network, and the first switching point and the second switching point are connected to each other through the business network. A SAM unit for address mapping can be set on the business network between the switching point and the request node, and a message detection component of the corresponding main node can be set on the business network between the switching point and the main node. The message detection component can connect the corresponding switching point and the main node through the business network, and connect the node register of the corresponding main node through the second line. Therefore, the chip interconnection network constructed by each switching point only includes the business network connecting all request nodes and main nodes, and the messages between each request node and each main node can be transmitted through the business network, which helps to improve the message routing efficiency and the utilization rate of physical connection resources.

[0118] Optionally, in some embodiments, the message type includes a business type and an operation management and maintenance type, and the message priority of the target message of the operation management and maintenance type is higher than the message priority of the target message of the business type, so that the switching point gives priority to sending the target message of the operation management and maintenance type.

[0119] In the embodiment of the present invention, the request node can set different message priorities for messages of different message types, so that the switching point can give priority to messages of high-priority message types, improve the reliability and availability of messages of specific message types through in-band transmission, and thus improve the quality of service (QOS) for messages of specific message types. Among them, each switching point can sort a number of messages received within a preset time period according to the message priority, and route each message in order from high to low according to the message priority.

[0120] Specifically, a lower message priority can be set for the business type, and a higher message priority can be set for the operation, management and maintenance type, so that the target messages of the operation, management and maintenance type can be processed preferentially by each switching point, thereby ensuring that the OAM messages sent by the requesting node can be processed preferentially, which helps to improve the reliability of OAM messages transmitted through in-band.

[0121] Reference Figure 4 , shows a schematic diagram of a chip interconnection system provided by an embodiment of the present invention, such as Figure 4 As shown, the system may specifically include: a switching point, a target master node and a message detection component;

[0122] The message detection component is used to obtain a target message sent by the switching point to the target master node through the service network, determine the message type corresponding to the target message based on the target address of the target message, and respond to the target message through a target line corresponding to the message type.

[0123] Optionally, the message detection component is also used to implement each step in the embodiment of the method of the present invention, which will not be described in detail in the embodiment of the present application.

[0124] In summary, in the chip interconnection system provided by the embodiment of the present invention, a target message sent by a switching point to a target master node through a service network is obtained; based on the target address of the target message, the message type corresponding to the target message is determined; and the target message is responded to through a target line corresponding to the message type. In this way, a switching point can be used to process all types of messages through a service network, and message types are determined between the switching point and the master node, and different types of messages are processed through different lines, so that the switching point does not need to use different networks to process different types of messages, effectively avoiding the reduction in routing efficiency caused by network switching of the switching point to process different types of messages during the chip interconnection process, which helps to improve the utilization of line resources in the chip interconnection architecture.

[0125] In addition, this solution only requires the deployment of a business network at the exchange point, and all types of messages are forwarded through the business network through in-band transmission, which helps save valuable connection resources, leaving more connection resources for business use, and helps improve the utilization rate of hardware connection resources.

[0126] Reference Figure 5 , shows a block diagram of a chip interconnection device provided by an embodiment of the present invention, such as Figure 5 As shown, the device may specifically include:

[0127] An acquisition module 201 is used to acquire a target message sent by a switching point to a target master node through a service network;

[0128] A type module 202, configured to determine a message type corresponding to the target message based on a target address of the target message; wherein the message type includes a service type and an operation management and maintenance type;

[0129] The response module 203 is used to respond to the target message through the target line corresponding to the message type; wherein the target line includes a first line connected to the target master node and a second line connected to the node register corresponding to the target master node.

[0130] Optionally, the type module includes:

[0131] A type address segment submodule, used to obtain the target address of the target message and determine the type address segment corresponding to the target address;

[0132] The message type submodule is used to determine the message type corresponding to the target message according to the type address segment.

[0133] Optionally, the message type includes an operation management and maintenance type and a service type, the type address segment includes a configuration address segment corresponding to the target master node, and the message type submodule includes:

[0134] A first type unit, configured to determine that the message type corresponding to the target message is the operation management and maintenance type when the target address matches the configured address segment;

[0135] The second type unit is used to determine that the message type corresponding to the target message is the service type when the target address does not match the configured address segment.

[0136] Optionally, the device further comprises:

[0137] An operation instruction module, used to obtain the operation instruction corresponding to the target message;

[0138] an execution module, configured to execute, when the operation instruction matches the target instruction, the step of determining the message type corresponding to the target message based on the target address of the target message;

[0139] A sending module is used to send the target message to the target master node when the operation instruction does not match the target instruction.

[0140] Optionally, the response module includes:

[0141] A message sending submodule, used for sending the target message to the target master node through the first line when the message type is the service type;

[0142] The message execution submodule is used to execute the operation instruction of the target message through the second line and the node register when the message type is the operation management and maintenance type.

[0143] Optionally, the first line includes the business network, and / or the second line includes an advanced peripheral bus.

[0144] Optionally, the device further comprises:

[0145] A routing module is used to obtain the target message from the upper node through the switching point, match the target address of the target message with the node address segment corresponding to each master node managed by the switching point, determine the target node address segment corresponding to the target address, and send the target message to the target master node corresponding to the target node address segment through the service network; wherein the upper node includes other switching points or request nodes, and the node address segment is composed of the type address segment of the corresponding master node.

[0146] Optionally, the message priority of the target message of the operation management and maintenance type is higher than the message priority of the target message of the service type, so that the switching point preferentially sends the target message of the operation management and maintenance type.

[0147] In summary, in the chip interconnection device provided by the embodiment of the present invention, the target message sent by the switching point to the target main node through the service network is obtained; based on the target address of the target message, the message type corresponding to the target message is determined; and the target message is responded to through the target line corresponding to the message type. In this way, the switching point can be used to process all types of messages through the service network, the message type is determined between the switching point and the main node, and different types of messages are processed through different lines, so that the switching point does not need to use different networks to process different types of messages, which effectively avoids the reduction of routing efficiency caused by the switching point performing network switching to process different types of messages during the chip interconnection process, and helps to improve the utilization rate of line resources in the chip interconnection architecture.

[0148] In addition, this solution only requires the deployment of a business network at the exchange point, and all types of messages are forwarded through the business network through in-band transmission, which helps save valuable connection resources, leaving more connection resources for business use, and helps improve the utilization rate of hardware connection resources.

[0149] Reference Figure 6 , is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Figure 6 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the chip interconnection method of the above embodiment. The executable instructions can form a program.

[0150] An embodiment of the present invention provides a computer-readable storage medium having instructions stored thereon, which, when executed by one or more processors, enables the processors to execute the chip interconnection method of the aforementioned embodiment.

[0151] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0152] Those skilled in the art should understand that the embodiments of the present invention can be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes. It should be noted that all actions of acquiring signals, information or data in the present invention are carried out under the premise of complying with the corresponding data protection laws and policies of the country of residence and with the authorization given by the owner of the corresponding device. The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the process Figure 1 A process or multiple processes and / or boxes Figure 1A device that provides the functions specified in a block or multiple blocks.

[0153] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0154] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0155] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0156] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0157] The above is a detailed introduction to a chip interconnection method, a chip interconnection device, an electronic device and a storage medium provided by the present invention. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A chip interconnection method, characterized in that: The method comprises: Obtain the target message sent by the switching point to the target master node through the business network; Based on the target address of the target message, determine the message type corresponding to the target message; wherein the message type includes a service type and an operation management and maintenance type; In the case where the message type is the service type, sending the target message to the target master node through a first line connected to the target master node; In the case where the message type is the operation management and maintenance type, the operation instruction of the target message is executed by connecting the second line of the node register corresponding to the target master node and the node register.

2. The method according to claim 1, characterized in that The determining, based on the target address of the target message, a message type corresponding to the target message includes: Obtaining a target address of the target message, and determining a type address segment corresponding to the target address; The message type corresponding to the target message is determined according to the type address segment.

3. The method according to claim 2, characterized in that The message type includes an operation management and maintenance type and a service type, the type address segment includes a configuration address segment corresponding to the target master node, and determining the message type corresponding to the target message according to the type address segment includes: In the case where the target address matches the configured address segment, determining that the message type corresponding to the target message is the operation management and maintenance type; In a case where the target address does not match the configured address segment, it is determined that the message type corresponding to the target message is the service type.

4. The method according to claim 1, characterized in that: The method further comprises: Obtaining an operation instruction corresponding to the target message; In the case where the operation instruction matches the target instruction, executing the step of determining the message type corresponding to the target message based on the target address of the target message; In the case where the operation instruction does not match the target instruction, the target message is sent to the target master node.

5. The method according to claim 1, characterized in that The first line includes the service network, and / or the second line includes an advanced peripheral bus.

6. The method according to claim 2, characterized in that Before acquiring the target message sent by the switching point to the target master node through the service network, the method further includes: The target message is obtained from the upper node through the switching point, the target address of the target message is matched with the node address segment corresponding to each master node managed by the switching point, the target node address segment corresponding to the target address is determined, and the target message is sent to the target master node corresponding to the target node address segment through the service network; wherein the upper node includes other switching points or request nodes, and the node address segment is composed of the type address segment of the corresponding master node.

7. The method according to claim 1, characterized in that The message priority of the target message of the operation management and maintenance type is higher than the message priority of the target message of the service type, so that the switching point preferentially sends the target message of the operation management and maintenance type.

8. A chip interconnection device, characterized in that: The device comprises: An acquisition module, used to acquire a target message sent by the switching point to the target master node through the service network; A type module, used to determine the message type corresponding to the target message based on the target address of the target message; wherein the message type includes a business type and an operation management and maintenance type; A response module, configured to send the target message to the target master node through a first line connected to the target master node when the message type is the service type; In the case where the message type is the operation management and maintenance type, the operation instruction of the target message is executed by connecting the second line of the node register corresponding to the target master node and the node register.

9. An electronic device, characterized in that: include: A processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other via the communication bus; The memory is used to store executable instructions, and the executable instructions enable the processor to execute the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Instructions are stored thereon, which, when executed by one or more processors, cause the processors to perform the method as claimed in any one of claims 1 to 7.

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