A magnetic memory cell and array

Abstract

The application provides a magnetic storage unit and array, and relates to the technical field of semiconductors. The magnetic storage unit comprises at least a spin-orbit torque layer and a magnetic tunnel junction arranged above the spin-orbit torque layer. A first write voltage is applied to a write path between the top end of the magnetic tunnel junction and at least one end of the spin-orbit torque layer, and the magnetic tunnel junction is short-circuited and the corresponding end of the spin-orbit torque layer is open-circuited, so that the resistance state of the magnetic storage unit is in an open-circuit state. The data state stored in the magnetic storage unit is obtained by comparing the detection signal of the simultaneously read magnetic storage unit and the reference signal arranged outside the magnetic storage unit. The application realizes the data read and write of OTP or FTP based on the magnetic storage unit of SOT-MRAM, and reduces the size of the OTP unit or FTP unit.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a magnetic storage cell and array. Background Technology

[0002] Currently, with the continuous development of magnetoresistive random access memory (MRAM), MRAM technology has undergone three generations of evolution. Among them, the third-generation magnetic memory, spin-orbit torque magnetic random access memory (SOT-MRAM), typically consists of a spin-orbit torque layer and a magnetic tunnel junction (MTJ) disposed on the spin-orbit torque layer. As a novel non-volatile memory, SOT-MRAM is compatible with process technologies below 22nm and is expected to replace traditional memories such as flash memory. However, ensuring data storage security remains a pressing problem to be solved.

[0003] In memory chips, one-time programmable (OTP) memory devices are typically used to store critical data in a fixed manner, such as encryption keys, firmware signatures, serial numbers, and addresses. Alternatively, OTP memory devices can be used to store data that is updated multiple times, such as upgradeable firmware and data log records.

[0004] In implementing the embodiments of this disclosure, at least the following problems were found in the related art: The fuses in traditional one-time programmable memory devices are made of thin metal wires. Data writing is achieved by applying a large current to both ends of the metal wire to cause it to melt. This not only results in a large area of ​​the programmable memory device but also high power consumption. If a metal fuse scheme is used as the OTP cell in SOT-MRAM, it will increase the size of the SOT-MRAM. Therefore, how to implement OTP or Finite Time Programmable (FTP) data reading and writing based on the magnetic storage cells of SOT-MRAM, while reducing the size of the OTP or FTP cells, has become an urgent problem to be solved. Summary of the Invention

[0005] This application provides a magnetic storage unit and array that enables OTP or FTP data reading and writing using a SOT-MRAM-based magnetic storage unit, while reducing the size of the OTP or FTP unit.

[0006] In a first aspect, this application provides a magnetic storage unit, which includes at least a spin orbital layer and a magnetic tunnel junction disposed above the spin orbital layer;

[0007] Specifically, by applying a first write voltage to the write path between the top of the magnetic tunnel junction and at least one end of the spin orbital layer, while simultaneously short-circuiting the magnetic tunnel junction and disconnecting the corresponding end of the spin orbital layer, the resistive state of the magnetic memory cell is in an open-circuit state.

[0008] The data state stored in the magnetic storage unit is obtained by comparing the detection signal of the magnetic storage unit read simultaneously with the reference signal set outside the magnetic storage unit.

[0009] In employing the above technical solution, this application utilizes a spin-orbit moment layer and a magnetic tunnel junction disposed above the spin-orbit moment layer to form a magnetic storage cell. By applying a first write voltage simultaneously to open-circuit the spin-orbit moment layer and short-circuit the magnetic tunnel junction, the magnetic storage cell is placed in an open-circuit state with irreversible resistance, enabling an irreversible programming operation to store data. Furthermore, the data state stored in the magnetic storage cell is obtained through a detection signal and an external reference signal to achieve data reading. Thus, the magnetic storage cell based on SOT-MRAM serves as an OTP cell for OTP data reading and writing. Since the spin-orbit moment layer and magnetic tunnel junction have nanoscale structures, the OTP cell structure of this application has a smaller area and lower power consumption compared to memory devices using metal fuses. Therefore, this application can improve the integration density of the memory chip and reduce the power consumption of OTP storage. In addition, since the reference signal is disposed outside the magnetic storage cell, the flexibility of the reference cell location can be improved, thereby enhancing the scalability of the memory chip.

[0010] Secondly, this application provides a magnetic storage unit, which includes at least a spin-orbit meter layer and a magnetic tunnel junction disposed above the spin-orbit meter layer;

[0011] Specifically, by applying a second write voltage to the write path between the top of the magnetic tunnel junction and at least one end of the spin orbital moment layer, the magnetic tunnel junction is short-circuited, thereby making the magnetic storage cell short-circuited to achieve the first data write;

[0012] By applying a third write voltage to the write path, the corresponding end of the spin orbital matrix is ​​disconnected, so that the magnetic storage cell changes from a short-circuit state to an open-circuit state to achieve the second data write;

[0013] The data state stored in the storage unit is obtained by comparing the detection signals of the magnetic storage units read simultaneously with the reference signals set outside the storage units.

[0014] The second write voltage is lower than the third write voltage.

[0015] By employing the above technical solution, this application utilizes a spin-orbit junction layer and a magnetic tunnel junction disposed above the spin-orbit junction layer to form a magnetic storage cell. A first irreversible data write is achieved by applying a second write voltage to short-circuit the magnetic tunnel junction, making the magnetic storage cell short-circuited and irreversibly resistive. If reprogramming is required, such as changing the storage key, a second irreversible data write is achieved by applying a third write voltage to open-circuit the spin-orbit junction layer, making the magnetic storage cell open-circuited and irreversibly resistive. Therefore, this magnetic storage cell can achieve a finite number of irreversible programmable operations to store data. Thus, the SOT-MRAM-based magnetic storage cell serves as an FTP cell for two-stage data reading and writing. Furthermore, since the spin-orbit junction layer and magnetic tunnel junction have nanoscale structures, the FTP cell structure of this application has a smaller area and lower power consumption compared to memory devices using metal fuses. Therefore, this application can improve the integration density of the memory chip and reduce the power consumption of FTP storage. Furthermore, since the same magnetic storage cell has the capability to be irreversibly programmed and written to a limited number of times, this application can further improve the integration density of the memory chip. In addition, because the reference signal is located outside the magnetic storage cell, the flexibility of the reference cell location can be increased, thereby improving the scalability of the memory chip.

[0016] Thirdly, this application also provides a magnetic storage array, comprising at least: magnetic storage cells as described in the first and / or second aspects and at least one reference cell arranged in an array;

[0017] Specifically, the detection signal of the magnetic storage unit and the reference signal of the reference unit are read simultaneously and compared to read the data state stored in the magnetic storage unit.

[0018] When adopting the above technical solutions, this application uses magnetic storage cells based on existing SOT-MRAM array technology as OTP cells to realize OTP data read / write, or uses magnetic storage cells based on existing SOT-MRAM array technology as FTP cells for FTP data read / write. Since the spin-orbit moment layer and magnetic tunnel junction have nanoscale structures, the structure of the OTP cell in this application has a smaller area and lower power consumption compared to memory devices using metal fuses. Therefore, this application can improve the integration density of the memory chip and reduce the power consumption of OTP memory. Since the reference cell providing the reference signal is located outside the magnetic storage cell, the flexibility of the reference cell location can be improved, thus enhancing the scalability of the memory chip. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0020] Figure 1 A schematic diagram of the storage state of an SOT-MTJ provided in this application embodiment. Figure 1 ;

[0021] Figure 2 A schematic diagram of the storage state of an SOT-MTJ provided in this application embodiment. Figure 2 ;

[0022] Figure 3 A schematic diagram of the storage state of a magnetic storage unit provided in an embodiment of this application. Figure 1 ;

[0023] Figure 4 A schematic diagram of the storage state of a magnetic storage unit provided in an embodiment of this application. Figure 2 ;

[0024] Figure 5 A schematic diagram of the storage state of a magnetic storage unit provided in an embodiment of this application. Figure 3 ;

[0025] Figure 6 A schematic diagram of the storage state of a magnetic storage cell with a resistive state selection module provided in an embodiment of this application. Figure 1 ;

[0026] Figure 7 A schematic diagram of the storage state of a magnetic storage cell with a resistive state selection module provided in an embodiment of this application. Figure 2 ;

[0027] Figure 8 A schematic diagram of the structure of a magnetic storage cell with a resistive state selection module provided in an embodiment of this application;

[0028] Figure 9 This application provides a schematic diagram of the storage state changes of a magnetic storage cell in an embodiment of the present application. Figure 1 ;

[0029] Figure 10 This application provides a schematic diagram of the storage state changes of a magnetic storage cell in an embodiment of the present application. Figure 2 ;

[0030] Figure 11 This application provides a schematic diagram of the storage state changes of a magnetic storage cell in an embodiment of the present application. Figure 3 ;

[0031] Figure 12 An experimental data curve of oxide layer breakdown in a magnetic tunnel junction provided in this application embodiment;

[0032] Figure 13 An experimental data curve diagram of spin orbital moment layer melting provided in an embodiment of this application;

[0033] Figure 14 This application provides a schematic diagram of the storage state changes of a magnetic storage cell with a resistive state selection module, as shown in the embodiments of this application. Figure 1 ;

[0034] Figure 15 This application provides a schematic diagram of the storage state changes of a magnetic storage cell with a resistive state selection module, as shown in the embodiments of this application. Figure 2 ;

[0035] Figure 16 A schematic diagram illustrating the storage state changes of a magnetic storage unit having a short-circuit control module and an open-circuit control module, provided for an embodiment of this application;

[0036] Figure 17 A schematic diagram illustrating the storage state changes of a magnetic storage unit having a short-circuit control module and an open-circuit control module formed by switching transistors, provided for an embodiment of this application;

[0037] Figure 18 A schematic diagram of the structure of a magnetic storage unit having a short-circuit control module and an open-circuit control module formed by switching transistors, provided for an embodiment of this application;

[0038] Figure 19 This is a schematic diagram of the structure of a magnetic storage array provided in an embodiment of this application;

[0039] Figure 20 This is a schematic diagram of another magnetic storage array provided in an embodiment of this application;

[0040] Figure 21 A schematic diagram illustrating the setting of the reference current in a reference cell of a magnetic storage array, provided as an embodiment of this application;

[0041] Figure 22 This is a schematic diagram illustrating the setting of the reference current in a reference cell of another magnetic storage array provided in an embodiment of this application.

[0042] The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0043] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. It is understood that the terms “first,” “second,” etc., as used herein may be used to describe various information or data, but these elements are not limited by these terms. These terms are only used to distinguish first information from another type of information. For example, without departing from the scope of this application, first action information may be referred to as second action information, and similarly, second action information may be referred to as first action information. Both first action information and second action information are action information, but they are not the same action information.

[0045] First, let me explain the terms used in this application:

[0046] Magnetic tunnel junction (MTJ) is a spintronics-based nanostructure widely used in magnetic random access memory (MRAM) and sensors. The basic structure of an MTJ consists of two ferromagnetic layers and a thin insulating layer sandwiched between them.

[0047] Spin Orbit Torque (SOT): This is a technique that uses spin-orbit coupling to manipulate the magnetization direction in magnetic materials.

[0048] One-Time Programmable (OTP) memory is characterized by its permanent storage once programmed, preventing modification or erasure. OTP memory is non-volatile and suitable for applications where data is stored in fixed programs or configurations. Because the programming process of OTP is irreversible, it can store critical data (such as encryption keys, firmware signatures, serial numbers, and error correction addresses) in a fixed manner, or store data that is updated multiple times, such as upgradable firmware and data logs.

[0049] Finite Time Programmable (FTP): This is a type of memory that can be programmed and erased a limited number of times, unlike OTP. Specifically, FTP has a limited number of programming attempts; once the preset programming limit is reached, the memory cannot be programmed again. FTP is suitable for applications requiring a limited number of programming updates, such as specific testing or debugging, or scenarios where reprogramming is needed, such as changing the storage key.

[0050] The technical solution provided in this application is applied to memory chips as a programmable memory cell. It should be understood that, typically, in the first case, the programmable memory cell stores critical data in a fixed manner, such as encryption keys, firmware signatures, serial numbers, and addresses. In the second case, the programmable memory device cell needs to store data that requires multiple updates, such as upgradeable firmware and data log records.

[0051] Traditional one-time programmable memory (OTP) devices use fuses made of thin metal filaments. Data is written by applying a large current to both ends of the filament to cause it to melt and burn out. This results in a large area and high power consumption for the OTP device. Using a metal fuse scheme as the OTP cell in SOT-MRAM would further increase the size of the SOT-MRAM. Therefore, how to implement OTP or FTP data reading and writing based on the magnetic storage cells of SOT-MRAM while reducing the size of the OTP or FTP cells has become a pressing problem to be solved.

[0052] Based on this, this application proposes a programmable magnetic storage cell based on a magnetic tunnel junction and a spin-orbit moment layer, which can improve the integration density of storage chips.

[0053] MTJ stands for Magnetic Random Access Memory (MRAM), a fundamental magnetic storage unit and a leading candidate for novel memory technology based on resistive storage. The core structure of MTJ is a multilayer film structure consisting of ferromagnetic metals, oxides, and more ferromagnetic metals stacked sequentially. One ferromagnetic layer has a magnetization direction that is difficult to change and is called the fixed layer; the magnetization direction of another ferromagnetic layer can be changed by a magnetic field or current and is called the free layer. When the magnetization direction of the free layer is parallel to (P-state) or antiparallel to (AP-state) the magnetization direction of the fixed layer, the MTJ is in a low-resistance or high-resistance state, respectively, representing binary data "0" and "1". The oxide layer uses magnesium oxide (MgO) as the dielectric material, with a thickness on the nanometer scale, which affects the resistance of the MTJ.

[0054] The SOT-MTJ, based on the Spin Orbit Torque (SOT) effect, is a three-port device consisting of a bottom spin orbital torque layer and a magnetic tunneling junction film thereon, forming a read channel and a write channel.

[0055] Reference Figure 1 and Figure 2 The SOT-MTJ includes a spin-orbit moment layer 10 and a magnetic tunnel junction 20 disposed above the spin-orbit moment layer. In the magnetic tunnel junction 20, the magnetization direction of the free layer is parallel to the magnetization direction of the fixed layer, resulting in a low-resistivity state (e.g., ...). Figure 1In magnetic tunnel junction 20, the magnetization direction of the free layer is antiparallel to the magnetization direction of the fixed layer, resulting in a high-resistivity state (e.g., ...). Figure 2 The two resistive states can represent binary data "0" and "1" respectively.

[0056] The magnetic storage unit provided in this application embodiment is based on SOT-MTJ device. By utilizing the dielectric breakdown characteristics of SOT-MTJ device itself, higher storage density and more reliable data writing can be achieved.

[0057] The structure and principle of the technical solution provided in this application will be described in detail below with reference to the accompanying drawings.

[0058] In one embodiment, this application provides a magnetic storage cell, which includes at least the aforementioned spin orbital layer and a magnetic tunnel junction disposed above the spin orbital layer.

[0059] Reference Figures 3-5 During data writing, a first write voltage is applied to the write path between the top of the magnetic tunnel junction and at least one end of the spin orbital layer, while the magnetic tunnel junction is short-circuited and the corresponding end of the spin orbital layer is open-circuited, so that the resistive state of the magnetic storage cell is in an open-circuit state.

[0060] After the magnetic storage unit is in an open circuit state, the detection signal of the magnetic storage unit and the reference signal set outside the magnetic storage unit can be read simultaneously. By comparing these two signals, the data status of the magnetic storage unit can be obtained.

[0061] It should be understood that, since at least one end of the spin orbital layer is open-circuited, the structure of the magnetic storage unit itself is altered and the alteration process is irreversible. Therefore, the storage state of the magnetic storage unit is fixed and will not be changed. Thus, the magnetic storage unit can be used as a one-time programmable storage unit to store key data, such as encryption keys, firmware signatures, serial numbers, and addresses, in a fixed manner.

[0062] Based on the above description, this embodiment utilizes a spin-orbit moment layer and a magnetic tunnel junction disposed above the spin-orbit moment layer to form a magnetic storage cell. The magnetic storage cell based on SOT-MRAM serves as an OTP cell to realize OTP data reading and writing. Since the spin-orbit moment layer and the magnetic tunnel junction have nanoscale structures, the structure of the OTP cell in this application has a smaller area and lower power consumption compared to memory devices using metal fuses. Therefore, this application can improve the integration density of the memory chip and reduce the power consumption of OTP storage. Furthermore, since the reference cell providing the reference signal is disposed outside the magnetic storage cell, the flexibility of the reference cell's location can be improved, thereby enhancing the scalability of the memory chip.

[0063] The principles of short circuit in the magnetic tunnel junction and open circuit in the spin-orbit moment layer in the embodiments of this application are described below:

[0064] The oxide layer in the magnetic tunnel junction has a dielectric breakdown effect. When the voltage across the write path is large enough, it will permanently break down the oxide layer to form a short circuit. At this time, the magnetic tunnel junction is equivalent to an anti-fuse. After the magnetic tunnel junction is short-circuited and broken down, the current will increase significantly due to the significant decrease in resistance. The generated Joule heat will cause the corresponding end of the spin-orbit moment layer to be open-circuited. At this time, the spin-orbit moment layer is equivalent to a fuse.

[0065] The corresponding end of the spin orbital matrix can be understood as one or both ends of the spin orbital matrix forming the write path.

[0066] The following example illustrates the correspondence between the write path and the corresponding ends of the spin orbital moment layer.

[0067] Reference Figure 3 In one example, a write path is formed between the top of the magnetic tunnel junction 20 and the first end 101 of the spin orbital layer 10. Then, by applying a first write voltage to this write path, the magnetic tunnel junction is simultaneously short-circuited and the first end 101 of the spin orbital layer is open-circuited, so that the resistive state of the magnetic memory cell is in an open-circuit state. At this time, the first end 101 of the spin orbital layer is the corresponding end mentioned above.

[0068] It should be understood here that, in this example, the first write voltage can be applied from the top of the magnetic tunnel junction 20 into the write path, in which case the first end 101 of the spin-orbit junction layer is grounded or connected to a low-voltage terminal, and current flows from the top of the magnetic tunnel junction 20 to the first end 101 of the spin-orbit junction layer. Alternatively, the first write voltage can be applied from the first end 101 of the spin-orbit junction layer into the write path, in which case the top of the magnetic tunnel junction 20 is grounded or connected to a low-voltage terminal, and current flows from the first end 101 of the spin-orbit junction layer to the top of the magnetic tunnel junction 20.

[0069] Reference Figure 4 In another example, a write path is formed between the top of the magnetic tunnel junction 20 and the second end 102 of the spin orbital layer 10. Then, by applying a first write voltage to this write path, the magnetic tunnel junction is simultaneously short-circuited and the second end 102 of the spin orbital layer is open-circuited, so that the resistive state of the magnetic memory cell is in an open-circuit state. At this time, the second end 102 of the spin orbital layer is the corresponding end mentioned above.

[0070] It should be understood here that, in this example, the first write voltage can be applied from the top of the magnetic tunnel junction 20 into the write path, in which case the second end 102 of the spin-orbit junction layer is grounded or connected to a low-voltage terminal, and current flows from the top of the magnetic tunnel junction 20 to the second end 102 of the spin-orbit junction layer. Alternatively, the first write voltage can be applied from the second end 102 of the spin-orbit junction layer into the write path, in which case the top of the magnetic tunnel junction 20 is grounded or connected to a low-voltage terminal, and current flows from the second end 102 of the spin-orbit junction layer to the top of the magnetic tunnel junction 20.

[0071] Reference Figure 5 In another example, write paths are formed at the top of the magnetic tunnel junction 20 and between the first end 101 and the second end 102 of the spin orbital layer 10. A first write voltage is then applied to the write paths to simultaneously short-circuit the magnetic tunnel junction and open-circuit the first end 101 and the second end 102 of the spin orbital layer, thus making the resistive state of the magnetic memory cell open-circuit. In this case, the first end 101 and the second end 102 of the spin orbital layer are the corresponding ends described above.

[0072] It should be understood here that, in this example, the first write voltage can be applied to the write path from the top of the magnetic tunnel junction 20, in which case the first end 101 and the second end 102 of the spin-orbit junction layer are grounded or connected to a low-voltage terminal, and current flows from the top of the magnetic tunnel junction 20 to the first end 101 and the second end 102 of the spin-orbit junction layer. Alternatively, the first write voltage can be applied to the write path from the first end 101 and the second end 102 of the spin-orbit junction layer, in which case the top of the magnetic tunnel junction 20 is grounded or connected to a low-voltage terminal, and current flows from the first end 101 and the second end 102 of the spin-orbit junction layer to the top of the magnetic tunnel junction 20.

[0073] In this way, the position where the first write voltage is applied can be flexibly set, which helps to simplify the design of the peripheral circuit structure and improves the flexibility of programmable operation to enhance the scalability of the memory chip.

[0074] In one alternative implementation, refer to Figure 6 and Figure 7 The magnetic storage unit provided in this embodiment may further include a resistance selection module 30. The resistance selection module 30 is electrically connected to the write path.

[0075] By turning on the resistance selection module 30, a first write voltage can be applied to the write path, while simultaneously short-circuiting the magnetic tunnel junction and disconnecting the spin-orbit matrix, so that the magnetic storage cell is in an open-circuit state.

[0076] Specifically, in one example, refer to Figure 6One end of the resistance selection module 30 can be connected to the write path through the top of the magnetic tunnel junction 20, and the other end of the resistance selection module 30 is connected to the write voltage terminal. At this time, the first end 101 of the spin-orbit layer is connected to the source line SL, which provides a low voltage to the first end 101 of the spin-orbit layer. By turning on the resistance selection module 30, a first write voltage is applied to the write path. It should be understood that the first end 101 of the spin-orbit layer can also be directly grounded.

[0077] In another example, refer to Figure 7 The resistance selection module 30 can be connected to the write path via the first end 101 of the spin-orbit moment layer, and the other end of the resistance selection module 30 is connected to the write voltage terminal. At this time, the top end of the magnetic tunnel junction 20 is connected to the source line SL, which provides a low voltage to the top end of the magnetic tunnel junction 20. By turning on the resistance selection module 30, a first write voltage is applied to the write path. It should be understood that the top end of the magnetic tunnel junction 20 can also be directly grounded.

[0078] The two examples above only provide examples where... Figure 3 When the resistive state selection module 30 is set in the memory cell, for Figure 4 and Figure 5 The magnetic storage unit in the middle can be configured with the same method as the resistive state selection module 30, which will not be described in detail here.

[0079] Optionally, the resistance selection module 30 may include, but is not limited to, one or more switching transistors connected in parallel. The input terminal of the switching transistor is connected to the write voltage terminal, the output terminal is connected to the write path, and the control terminal is connected to an external control signal terminal. The external control signal terminal is used to control the conduction of the switching transistor.

[0080] For example, the switching transistor may include, but is not limited to, a bipolar junction transistor (BJT), a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), or one or more other types of switching transistors. This application does not impose any special limitations on this.

[0081] It should be understood that, in order to ensure the first write voltage applied to the write path, the magnetic tunnel junction can be short-circuited and the corresponding end of the spin-orbit moment layer can be open-circuited simultaneously. The saturation current of the resistive state selection module is greater than or equal to the open-circuit current of the spin-orbit moment layer.

[0082] For example, refer to Figure 8When the resistive selection module includes a switch S1, the saturation current of the switch S1 should be greater than or equal to the break-circuit current of the spin-orbit moment layer, so that the saturation current of the switch (i.e. the maximum current it can carry) is greater than or equal to the current that can cause the spin-orbit moment layer to break.

[0083] Optionally, when the open-circuit current of the spin-orbit moment layer is large, the resistive selection module includes multiple transistors connected in parallel. These transistors provide a first write voltage to the write circuit to satisfy the open-circuit current of the spin-orbit moment layer. The sum of the saturation currents of these transistors is greater than or equal to the open-circuit current of the spin-orbit moment layer. The number of transistors can be set to two or three.

[0084] In an optional implementation, to facilitate reading short-circuit and open-circuit data of the magnetic storage cell, a first write voltage can be applied to the write path between the top of the magnetic tunnel junction and one end of the spin-orbit layer, while simultaneously short-circuiting the magnetic tunnel junction and opening the corresponding end of the spin-orbit layer. The end with the open circuit is used as the data reading end, and the other end is used as the data read / write end. The detection signal of the magnetic storage cell can be read through the data reading end and the data read / write end.

[0085] Then, the detection signal is compared with the reference signal set outside the magnetic storage unit to obtain the data state stored in the magnetic storage unit.

[0086] The reference unit can be located anywhere in the memory chip where the magnetic storage unit is located, and this application embodiment does not impose any special limitations on this.

[0087] In this way, the end of the spin-orbit layer that is open-circuited can only be read but not written to, so it can read the open-circuit state data of the magnetic storage cell; while the end of the spin-orbit layer that is not open-circuited can be read and written to, so it can read the short-circuit state data of the magnetic storage cell, and can also reprogrammably write data. Reading the short-circuit state data and open-circuit state data of the magnetic storage cell, and being able to reprogrammably write data, is beneficial to improving the data storage density and increasing the number of programmable operations.

[0088] In some examples, the comparison between the reference signal and the detected signal can be implemented using a comparator circuit, and the comparison result is used to determine the data state of the magnetic storage cell. For example, if the detected signal matches the reference signal or exceeds a certain threshold, the magnetic storage cell is determined to be in a data state (e.g., "1"). If the detected signal is below the reference signal or does not match, the magnetic storage cell is determined to be in another data state (e.g., "0").

[0089] In another embodiment, this application also provides another magnetic storage unit, referred to Figure 9 , Figure 10 and Figure 11 The magnetic storage unit includes at least a spin orbital layer 10 and a magnetic tunnel junction 20 disposed above the spin orbital layer 10;

[0090] During data writing, a second write voltage is applied to the write path between at least one end of the spin orbital layer 10 at the top of the magnetic tunnel junction 20, causing the magnetic tunnel junction 20 to be short-circuited, thereby making the magnetic storage cell short-circuited and realizing the first data writing.

[0091] Subsequently, a third write voltage can be applied to the write path to disconnect the corresponding end of the spin orbital layer 10, thereby changing the magnetic storage cell from a short-circuit state to an open-circuit state to achieve a second data write.

[0092] The data state stored in the magnetic storage unit is obtained by comparing the detection signal of the magnetic storage unit read simultaneously with the reference signal set outside the magnetic storage unit.

[0093] In particular, after the first data write and after the second data write, the data status stored in the magnetic storage unit can be obtained by comparing the detection signal of the magnetic storage unit read at the same time with the reference signal set outside the magnetic storage unit.

[0094] The second write voltage is lower than the third write voltage.

[0095] It should be understood that the magnetic storage unit in this embodiment can perform a first irreversible data write and a second irreversible data write, so the magnetic storage unit can store data that needs to be updated, such as upgradable firmware, data log records, etc.

[0096] Based on the above description, this embodiment utilizes a spin-orbit moment layer and a magnetic tunnel junction disposed above the spin-orbit moment layer to form a magnetic storage cell. The magnetic storage cell, based on existing SOT-MRAM array technology, serves as an FTP cell to achieve data read / write operations with two programming steps. On one hand, because the spin-orbit moment layer and magnetic tunnel junction have nanoscale structures, the FTP cell structure of this application has a smaller area and lower power consumption compared to memory devices using metal fuses. Therefore, this application can improve the integration density of the memory chip and reduce the power consumption of FTP storage. On the other hand, the same magnetic storage cell in this embodiment has the ability to perform a limited number of irreversible programming writes, thus further improving the integration density of the memory chip. Furthermore, it can improve the flexibility of the reference cell location setting.

[0097] The principle behind the two data write operations in this embodiment is described below:

[0098] First data write: Breakdown of the oxide layer in the magnetic tunnel junction: After the first write voltage is applied to the write path, free electrons in the oxide layer crystal accelerate in the strong electric field, accumulating significant kinetic energy. This kinetic energy is sufficient to disrupt the molecular structure of the dielectric. When a chain reaction of collisional ionization occurs, a penetrating conductive channel is created in the oxide layer, causing it to lose its insulating properties and form a short circuit, leading to electrical breakdown. The breakdown effect of the oxide layer measured in the experiment is as follows: Figure 12 As shown:

[0099] When the second write voltage applied to the write channel increases from 0V, the oxide layer breaks down at -1.7V, the magnetic tunnel junction short-circuits, and the resistance drops from 20 kiloohms to several hundred ohms.

[0100] Second data writing: After the oxide layer breaks down, the resistance of the magnetic tunnel junction drops to the order of hundreds of ohms. At this point, the current generated by the same writing voltage will increase to the order of milliamperes. The resulting Joule heating causes atoms in the spin orbital layer, which is only a few tenths of a nanometer thick, to diffuse and form an open circuit, with the resistance reaching the order of billions of ohms. The resistance measured in the experiment after the spin orbital layer melts down is as follows: Figure 13 As shown.

[0101] The corresponding end of the spin orbital matrix can be understood as one or both ends of the spin orbital matrix forming the write path.

[0102] It should be understood that after a short circuit occurs in the magnetic tunnel junction, the resistance of the magnetic tunnel junction itself drops to the level of hundreds of ohms, which is relatively small. At this time, the current generated by using the same third write voltage as the second write voltage will increase to the level of milliamperes. The resulting Joule heat causes the atoms in the spin orbital moment layer, which is only a few tenths of a nanometer thick, to diffuse and form an open circuit. Therefore, the second write voltage can be basically the same as the third write voltage in some cases.

[0103] The following example illustrates the correspondence between the write path and the corresponding ends of the spin orbital moment layer.

[0104] Reference Figure 9 In one example, a write path is formed between the top of the magnetic tunnel junction 20 and the first end 101 of the spin-orbit layer 10. A second write voltage is then applied to this write path to short-circuit the magnetic tunnel junction, causing the magnetic storage cell to enter a short-circuit state for the first data write. A third write voltage is then applied to the write path to open-circuit the first end 101 of the spin-orbit layer, causing the magnetic storage cell to transition from a short-circuit state to an open-circuit state for the second data write. At this point, the first end 101 of the spin-orbit layer corresponds to the aforementioned end.

[0105] It should be understood here that, in this example, the second and third write voltages can be applied to the write path from the top of the magnetic tunnel junction 20, in which case the first end 101 of the spin-orbit junction layer is grounded or connected to a low-voltage terminal, and current flows from the top of the magnetic tunnel junction 20 to the first end 101 of the spin-orbit junction layer. Alternatively, the second and third write voltages can also be applied to the write path from the first end 101 of the spin-orbit junction layer, in which case the top of the magnetic tunnel junction 20 is grounded or connected to a low-voltage terminal, and current flows from the first end 101 of the spin-orbit junction layer to the magnetic tunnel junction 20.

[0106] Reference Figure 10 In another example, a write path is formed between the top of the magnetic tunnel junction 20 and the second end 102 of the spin-orbit layer 10. A second write voltage is then applied to this write path to short-circuit the magnetic tunnel junction, causing the magnetic storage cell to enter a short-circuit state for the first data write. A third write voltage is then applied to the write path to open-circuit the second end 102 of the spin-orbit layer, causing the magnetic storage cell to transition from a short-circuit state to an open-circuit state for the second data write. In this case, the second end 102 of the spin-orbit layer corresponds to the aforementioned end.

[0107] It should be understood here that, in this example, the second and third write voltages can be applied to the write path from the top of the magnetic tunnel junction 20, in which case the second end 102 of the spin-orbit junction layer is grounded or connected to a low-voltage terminal, and current flows from the top of the magnetic tunnel junction 20 to the second end 102 of the spin-orbit junction layer. Alternatively, the second and third write voltages can also be applied to the write path from the second end 102 of the spin-orbit junction layer, in which case the top of the magnetic tunnel junction 20 is grounded or connected to a low-voltage terminal, and current flows from the second end 102 of the spin-orbit junction layer to the magnetic tunnel junction 20.

[0108] Reference Figure 11 In another example, write paths are formed at the top of the magnetic tunnel junction 20 and between the first end 101 and the second end 102 of the spin-orbit layer 10. A second write voltage is then applied to these write paths to short-circuit the magnetic tunnel junction, thus short-circuiting the magnetic storage cell and achieving the first data write. A third write voltage is then applied to the write paths to open-circuit the first end 101 and the second end 102 of the spin-orbit layer, thus changing the magnetic storage cell from a short-circuit state to an open-circuit state and achieving the second data write. In this case, the first end 101 and the second end 102 of the spin-orbit layer are the corresponding ends described above.

[0109] It should be understood here that, in this example, the second and third write voltages can be applied to the write path from the top of the magnetic tunnel junction 20. In this case, the first end 101 and the second end 102 of the spin-orbit junction layer are grounded or connected to a low-voltage terminal, and current flows from the top of the magnetic tunnel junction 20 to the first end 101 and the second end 102 of the spin-orbit junction layer. Alternatively, the second and third write voltages can also be applied to the write path from the first end 101 and the second end 102 of the spin-orbit junction layer. In this case, the top of the magnetic tunnel junction 20 is grounded or connected to a low-voltage terminal, and current flows from the first end 101 and the second end 102 of the spin-orbit junction layer to the top of the magnetic tunnel junction 20.

[0110] In one optional implementation, the magnetic storage unit in this embodiment further includes at least a resistive state selection module 30, which is electrically connected to the write path.

[0111] Specifically, by using the on-resistance state selection module, a second write voltage is applied to the write path to short-circuit the magnetic tunnel junction, thereby putting the magnetic storage cell into a short-circuit state to achieve the first data write; or...

[0112] By applying a third write voltage to the write path through the on / off state selection module, the corresponding end of the spin orbital matrix is ​​disconnected, so that the magnetic storage cell changes from a short-circuit state to an open-circuit state to realize the second data write.

[0113] Specifically, in one example, refer to Figure 14 One end of the resistance selection module 30 can be connected to the write path through the top of the magnetic tunnel junction 20, and the other end of the resistance selection module 30 is connected to the write voltage terminal. At this time, the first end 101 of the spin-orbit junction layer is connected to the source line SL, which is used to provide a low voltage to the first end 101 of the spin-orbit junction layer. By turning on the resistance selection module 30, a second write voltage is applied to the write path to short-circuit the magnetic tunnel junction, so that the magnetic storage cell is in a short-circuit state to realize the first data write. Alternatively, by turning on the resistance selection module 30, a third write voltage is applied to the write path to open-circuit the first end 101 of the spin-orbit junction layer, so that the magnetic storage cell changes from a short-circuit state to an open-circuit state to realize the second data write.

[0114] It should be understood that the first end 101 of the spin orbital moment layer can also be directly grounded.

[0115] In another example, refer to Figure 15The resistance selection module 30 can be connected to the write path through the first end 101 of the spin-orbit layer, and the other end of the resistance selection module 30 is connected to the write voltage terminal. At this time, the top end of the magnetic tunnel junction 20 is connected to the source line SL, which is used to provide a low voltage to the top end of the magnetic tunnel junction 20. By turning on the resistance selection module 30, a second write voltage is applied to the write path, short-circuiting the magnetic tunnel junction to make the magnetic storage cell short-circuited and realize the first data write. Alternatively, by turning on the resistance selection module 30, a third write voltage is applied to the write path to open the first end 101 of the spin-orbit layer, so that the magnetic storage cell changes from the short-circuited state to the open-circuited state to realize the second data write.

[0116] It should be understood that the top of the magnetic tunnel junction 20 can also be directly grounded.

[0117] The two examples above only provide examples where... Figure 9 When the resistive state selection module 30 is set in the memory cell, for Figure 10 and Figure 11 The same method can be used to set the resistive state selection module 30 for the storage unit in the memory, which will not be described in detail here.

[0118] It should be understood that in this embodiment, when the resistance selection module is turned on, it can provide a second write voltage or a third write voltage to the write path. When providing the second write voltage, it must be ensured that the second write voltage can short-circuit the magnetic tunnel junction but not open-circuit the spin-orbit layer. However, when providing the third write voltage, the third write voltage can open-circuit the spin-orbit layer.

[0119] Therefore, the saturation current of the resistive selection module needs to be greater than or equal to the open-circuit current of the spin-orbit junction. This ensures that during the first data write, the current output by the resistive selection module to the write path is greater than or equal to the short-circuit current of the magnetic tunnel junction, while being less than the open-circuit current of the spin-orbit junction.

[0120] Furthermore, during the second data write, the current output by the resistive state selection module to the write path is greater than or equal to the open circuit current of the spin-orbit moment layer.

[0121] In one alternative implementation, refer to Figure 16 The resistance state selection module 30 includes at least a short-circuit state control module 301 and an open-circuit state control module 302.

[0122] By turning on the short-circuit control module 301 and turning off the open-circuit control module 302, a second write voltage can be input to the write path to short-circuit the magnetic tunnel junction 10, so that the magnetic storage cell is in a short-circuit state to realize the first data write.

[0123] By using the on / off state control module 302, a third write voltage is input to the write path to disconnect the corresponding end of the spin orbital layer 10, so that the magnetic storage unit changes from a short-circuit state to an open-circuit state to realize the second data write.

[0124] Specifically, the saturation current of the short-circuit control module 301 is greater than or equal to the short-circuit current of the magnetic tunnel junction, while being less than the open-circuit current of the spin-orbit moment layer, to ensure that a short circuit in the magnetic tunnel junction does not affect the spin-orbit moment layer. The saturation current of the open-circuit control module 302 is greater than or equal to the open-circuit current of the spin-orbit moment layer, to ensure that an open circuit can occur in the spin-orbit moment layer.

[0125] In the above, the short-circuit control module 301 and the open-circuit control module 302 control the short-circuit and open-circuit states of the magnetic storage unit respectively, so as to realize the data writing of the row twice, thereby improving the reliability of data writing and data storage density of the magnetic storage unit.

[0126] It is worth noting that, Figure 16 Only examples were given in Figure 9 In the case where the storage unit contains a short-circuit control module 301 and an open-circuit control module 302, for Figure 10 and Figure 11 The magnetic storage unit in the middle can be configured with the same method as the resistive state selection module 30, which will not be described in detail here.

[0127] Optional, refer to Figure 17 In one specific implementation, the short-circuit control module may include a first switch S1, and the open-circuit control module may include a first switch S1, a second switch S2, and a third switch S3, with these three switches connected in parallel and their control terminals connected to different control signal lines.

[0128] For example, refer to Figure 17 The control terminal of the first switch S1 is connected to the first control signal line CTL1, the control terminal of the second switch S2 is connected to the second control signal line CTL2, and the control terminal of the third switch S3 is connected to the third control signal line CTL3. The input terminals of the first switch S1, the second switch S2, and the third switch S3 are all connected to the bit line BL to receive the write voltage.

[0129] The first switch S1 is used to form a short-circuit control module 301, and the second switch S2 and the third switch S3 are used to form a circuit-open control module 302.

[0130] During the first data write, the first end of the spin orbital layer is connected to the low voltage end through the source line SL. The first control signal in the first control signal line CTL1 controls the first switch S1 to be turned on, while the second switch S2 and the third switch S3 are turned off. The bit line BL provides the second write voltage to the write path through the first switch S1, which short-circuits the magnetic tunnel junction and makes the magnetic storage cell short-circuited.

[0131] During the second data write, the first end of the spin orbital layer is connected to the low voltage end through the source line SL. The second control signal in the second control signal line CTL2 and the third control signal in the third control signal line CTL3 control the second switch S2 and the third switch S3 to conduct. The bit line BL provides the third write voltage to the write path through the second switch S2 and the third switch S3. The first end 101 of the spin orbital layer 10 is disconnected so that the magnetic storage cell changes from the short-circuit state to the open-circuit state.

[0132] For example, refer to Figure 18 The control terminal of the first switch S1 is connected to the read line RWL, and the control terminals of the second switch S2 and the third switch S3 are both connected to the finite-time programmable read line FTP-RWL. The first switch S1 is used to form the short-circuit state control module 301, and the second switch S2 and the third switch S3 are used to form the open-circuit state control module 302.

[0133] During the first data write, the read line RWL controls the first switch S1 to turn on, while the second switch S2 and the third switch S3 are turned off. The bit line BL provides a second write voltage to the write path through the first switch S1, which short-circuits the magnetic tunnel junction and makes the magnetic storage cell short-circuited.

[0134] During the second data write, the finite-time programmable read line FTP-RWL controls both the second switch S2 and the third switch S3 to be turned on. The bit line BL provides the third write voltage to the write path through the second switch S2 and the third switch S3. The corresponding end of the spin orbital layer is disconnected, so that the magnetic storage cell changes from the short-circuit state to the open-circuit state.

[0135] In this embodiment, the saturation current of the first switch S1 is greater than or equal to the short-circuit current of the magnetic tunnel junction, while being less than the open-circuit current of the spin-orbit junction, so as to ensure that the magnetic tunnel junction is short-circuited without affecting the spin-orbit junction.

[0136] The sum of the saturation currents of the second switch S2 and the third switch S3 is greater than or equal to the open-circuit current of the spin-orbit layer, so as to ensure that the spin-orbit layer can be opened.

[0137] In other examples, if the sum of the saturation currents of the second switch S2 and the third switch S3 is less than the open-circuit current of the spin-orbit moment layer, then during the second data write, the first switch S1, the second switch S2, and the third switch S3 can act as an open-circuit control module to control all three switches to be turned on, so as to ensure that the spin-orbit moment layer can be opened.

[0138] For example, the first switch S1, the second switch S2 and the third switch S3 can all be one of the following: bipolar transistor, metal-oxide-semiconductor field-effect transistor and insulated-gate bipolar transistor, or other types of switch transistors. This application embodiment does not make any special limitation on this.

[0139] It should be understood that in this embodiment, the short-circuit control module can also be configured with multiple switches connected in parallel, as long as the sum of the saturation currents of the multiple switches is greater than or equal to the short-circuit current of the magnetic tunnel junction, and less than the open-circuit current of the spin-orbit junction. In this embodiment, the open-circuit control module can also be configured with multiple switches of other numbers, such as 3 or 4, etc. This embodiment does not impose any special limitations on this, as long as the sum of the saturation currents of the multiple switches is greater than or equal to the open-circuit current of the spin-orbit junction.

[0140] In an optional implementation, to facilitate reading data in the open-circuit state of the magnetic storage cell, a second write voltage can be applied to the write path between the top of the magnetic tunnel junction and one end of the spin-orbit layer, short-circuiting the magnetic tunnel junction. Both ends of the spin-orbit layer then serve as data read / write terminals. This allows reading data in the short-circuit state of the magnetic storage cell, and each end of the spin-orbit layer can be reprogrammably written to. Reading data in the short-circuit state of the magnetic storage cell and being able to reprogrammably write data improves data storage density and increases the number of programmable operations.

[0141] Alternatively, by applying a third write voltage to the write path between the top of the magnetic tunnel junction and one end of the spin-orbit junction layer, one end of the spin-orbit junction layer is disconnected, thus serving as the second data read end, and the other end as the fourth data read / write end. In this way, the disconnected end of the spin-orbit junction layer can only be read, not written, and therefore can read the open-circuit state data of the magnetic storage cell; while the intact end of the spin-orbit junction layer can be read and written, thus can read the short-circuit state data of the magnetic storage cell, and can also be reprogrammed to write data. Reading both short-circuit and open-circuit state data of the magnetic storage cell, and being able to reprogrammatically write data, is beneficial for increasing data storage density and the number of programmable operations.

[0142] The detection signal of the magnetic storage unit can be read through the aforementioned data read / write terminal and data read terminal.

[0143] Then, the detection signal is compared with the reference signal set outside the magnetic storage unit to obtain the data state stored in the magnetic storage unit.

[0144] The reference unit can be located anywhere in the memory chip where the memory unit is located, and this application embodiment does not impose any special limitations on this.

[0145] This helps to increase data storage density and the number of programmable iterations.

[0146] Optionally, the first write voltage is equal to the third write voltage.

[0147] In this way, the write voltage for OTP data writing is the same as that for the second FTP data writing, which helps to simplify the external circuit structure and control logic.

[0148] Optionally, to ensure the accuracy of data reading, the magnetic storage unit and the reference unit can share a read line.

[0149] Optionally, the magnetic storage unit and the reference unit may not share a read line; it is sufficient to read and compare the signals of both units simultaneously.

[0150] In some examples, the comparison between the reference signal and the detected signal can be implemented using a comparator circuit, and the comparison result is used to determine the state of the magnetic storage cell. For example, if the detected signal matches the reference signal or exceeds a certain threshold, the magnetic storage cell is determined to be a data state (e.g., "1"). If the detected signal is below the reference signal or does not match, the magnetic storage cell is determined to be another data state (e.g., "0").

[0151] Based on the above description, this embodiment can adopt the existing SOT-MRAM memory cell design for the magnetic storage unit, which can be directly arranged in the original MRAM array, reducing design complexity.

[0152] Reference Figure 19 This application also provides a magnetic storage array, which includes at least: magnetic storage units arranged in an array as in the two embodiments above and at least one reference unit; the magnetic storage units arranged in an array as in the two embodiments above and at least one reference unit can form an OTP / FTP area.

[0153] Specifically, in the magnetic storage cell, the top of the magnetic tunnel junction is electrically connected to the read line RWL. One end of the spin-orbit layer is electrically connected to the source line SL and the read line RWL via a first switch S1, so that the top of the magnetic tunnel junction and the corresponding end of the spin-orbit layer form a write path. The other end of the spin-orbit layer is electrically connected to the bit line BL and the write line WWL via a fourth switch S4. The first switch S1 serves as a resistive state selection module.

[0154] Specifically, the detection signal of the magnetic storage unit and the reference signal of the reference unit are read simultaneously and compared to read the data state stored in the magnetic storage unit.

[0155] The magnetic storage unit and the reference unit may or may not share the read line, in order to simultaneously read and compare the signals of both.

[0156] For example, to improve the synchronization and accuracy of data comparison, the magnetic storage unit and the reference unit can be set to share a read line.

[0157] Thus, magnetic storage cells based on existing SOT-MRAM array technology can be used as OTP cells for OTP data read / write, or as FTP cells for FTP data read / write. Because the spin-orbit moment layer and magnetic tunnel junction have nanoscale structures, the OTP cell structure of this application has a smaller area and lower power consumption compared to memory devices using metal fuses. Therefore, this application can improve the integration density of the memory chip and reduce the power consumption of OTP memory. Since the reference cell providing the reference signal is located outside the magnetic storage cell, the flexibility of the reference cell placement can be improved, thus enhancing the scalability of the memory chip.

[0158] Optional, refer to Figure 20 In the magnetic storage cell, the top of the magnetic tunnel junction is electrically connected to the read line RWL. One end of the spin orbital layer, the first switch S1, is electrically connected to the source line SL and the read line RWL, respectively, so that the top of the magnetic tunnel junction and the corresponding end of the spin orbital layer form a write path. The other end of the spin orbital layer is left floating and is not electrically connected to the bit line BL or the write line WWL. The first switch S1 serves as a resistive state selection module.

[0159] Since the magnetic tunnel junction does not need to flip from the P state to the AP state in OTP or FTP, CMOS (Complementary Metal Oxide Semiconductor) is not placed between one end of the spin orbital moment layer and the bit line, but is left floating, which is beneficial to further improve the integration density of the magnetic memory array.

[0160] Optional, refer to Figure 21 When the magnetic tunnel junction is short-circuited by breakdown but the spin-orbit moment layer is not open-circuited, the reference signal provided by the reference element can be the reference current I. Ref Setting the P-state current I of the magnetic tunnel junction p With magnetic tunnel junction breakdown current I BD Between. Specifically, I Ref I is set in the sample of magnetic storage cellp The maximum value of I BD Between the minimum values.

[0161] Reference Figure 22 When the magnetic tunnel junction is short-circuited by breakdown and the spin-orbit moment layer is open-circuited, the reference signal provided by the reference element can be the reference current I. Ref The circuit breaker current I set in the spin orbital moment layer Open With magnetic tunnel junction AP state current I Ap Between. Specifically, I Ref I is set in the sample of magnetic storage cell Open The maximum value of I Ap Between the minimum values.

[0162] In this way, setting the reference current more accurately when reading data via OTP or FTP can improve the accuracy of OTP or FTP data reading.

[0163] Optionally, the number of reference cells can be set to one or more. When there is only one reference cell, during data reading, the detection signals of multiple magnetic storage cells are compared with the reference signal provided by one reference cell to obtain the data state stored in the magnetic storage cell. When there are multiple reference cells and the same number as the number of magnetic storage cells, during data reading, the detection signal of each magnetic storage cell is compared with the reference signal provided by the corresponding reference cell to obtain the data state stored in the magnetic storage cell.

[0164] This allows for greater flexibility in reference cell setup and also improves integration density.

[0165] Optional, refer to Figure 20 The reference unit includes at least: a spin-orbit matrix layer and a magnetic tunnel junction disposed above the spin-orbit matrix layer; the top end of the magnetic tunnel junction is electrically connected to the read line RWL, and one end of the spin-orbit matrix layer is electrically connected to the source line SL and the read line RWL respectively through a first switch S1, so that the top end of the magnetic tunnel junction and the corresponding end of the spin-orbit matrix layer form a write path; the other end of the spin-orbit matrix layer is suspended and is not electrically connected to the bit line BL or the write line WWL.

[0166] In this way, the connection method between the reference cell and the signal lines in the array is consistent with the connection method between the magnetic storage cell and the signal lines in the array, which helps to make the reference signal more accurate.

[0167] It should be understood that, since the magnetic storage array includes the aforementioned magnetic storage units, this magnetic storage array is similar to the one described above. Figures 3-18 The beneficial effects of the magnetic storage unit provided in the illustrated embodiment are the same, and will not be repeated here.

[0168] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A magnetic storage unit, characterized in that, The magnetic storage unit includes at least a spin orbital layer and a magnetic tunnel junction disposed above the spin orbital layer; Specifically, by applying a first write voltage to the write path between the top of the magnetic tunnel junction and at least one end of the spin orbital layer, while simultaneously short-circuiting the magnetic tunnel junction and disconnecting the corresponding end of the spin orbital layer, the resistive state of the magnetic storage cell is made to be in an open-circuit state. The data state stored in the magnetic storage unit is obtained by comparing the detection signal of the magnetic storage unit and the reference signal located outside the magnetic storage unit simultaneously. The first write voltage is applied to the write path between the top of the magnetic tunnel junction and one end of the spin-orbit layer, while the magnetic tunnel junction is short-circuited and one end of the corresponding spin-orbit layer is open-circuited, thus serving as the data read end and the other end as the data read / write end. The detection signal is obtained by reading the magnetic storage unit through the data read / write end and the data read end.

2. The magnetic storage unit according to claim 1, characterized in that, The magnetic storage unit further includes at least a resistive state selection module, which is electrically connected to the write path; Specifically, by turning on the resistance selection module, a first write voltage is applied to the write path, while simultaneously short-circuiting the magnetic tunnel junction and disconnecting the spin orbital layer, so that the magnetic storage cell is in an open-circuit state.

3. The magnetic storage unit according to claim 2, characterized in that, The saturation current of the resistive state selection module is greater than or equal to the open circuit current of the spin orbital moment layer.

4. A magnetic storage unit, characterized in that, The magnetic storage unit includes at least a spin orbital layer and a magnetic tunnel junction disposed above the spin orbital layer; Specifically, by applying a second write voltage to the write path between the top of the magnetic tunnel junction and at least one end of the spin orbital layer, the magnetic tunnel junction is short-circuited, thereby making the magnetic storage cell short-circuited to achieve the first data write; By applying a third write voltage to the write path, the corresponding end of the spin orbital matrix is ​​disconnected, so that the magnetic storage cell changes from a short-circuit state to an open-circuit state to achieve the second data write; The data state stored in the magnetic storage unit is obtained by comparing the detection signal of the magnetic storage unit and the reference signal located outside the magnetic storage unit simultaneously. Specifically, by applying the second write voltage to the write path between the top of the magnetic tunnel junction and one end of the spin-orbit layer, the magnetic tunnel junction is short-circuited, and both ends of the spin-orbit layer serve as data read / write terminals. Alternatively, by applying the third write voltage to the write path between the top of the magnetic tunnel junction and one end of the spin-orbit layer, one end of the spin-orbit layer is disconnected, serving as the data read terminal, and the other end as the data read / write terminal. The detection signal is obtained by reading the magnetic storage unit through the data read / write terminal and the data read terminal. The second write voltage is less than the third write voltage.

5. The magnetic storage unit according to claim 4, characterized in that, It also includes at least a resistance selection module, which is electrically connected to the write path; Specifically, by activating the resistance selection module, the second write voltage is applied to the write path to short-circuit the magnetic tunnel junction, thereby putting the magnetic storage cell into a short-circuit state to achieve the first data write; or... By turning on the resistance state selection module, the third write voltage is applied to the write path to disconnect the corresponding end of the spin orbital matrix, so that the magnetic storage cell changes from a short-circuit state to an open-circuit state to realize the second data write.

6. The magnetic storage unit according to claim 5, characterized in that, The saturation current of the resistive state selection module is greater than or equal to the open circuit current of the spin orbital moment layer. During the first data write, the current output by the resistance selection module to the write path is greater than or equal to the short-circuit current of the magnetic tunnel junction, and less than the open-circuit current of the spin-orbit moment layer. During the second data writing, the current output by the resistance selection module to the writing path is greater than or equal to the open circuit current of the spin-orbit moment layer.

7. The magnetic storage unit according to claim 5, characterized in that, The resistance state selection module includes at least a short-circuit state control module and an open-circuit state control module; By turning on the short-circuit control module and turning off the open-circuit control module, the second write voltage is input to the write path to short-circuit the magnetic tunnel junction, thereby making the magnetic storage cell short-circuit to realize the first data write; By turning on the circuit-free control module, the third write voltage is input to the write path to disconnect the corresponding end of the spin orbital matrix, so that the magnetic storage unit changes from the short-circuit state to the open-circuit state to realize the second data write. Wherein, the saturation current of the short-circuit control module is greater than or equal to the short-circuit current of the magnetic tunnel junction, and less than the open-circuit current of the spin-orbit junction; the saturation current of the open-circuit control module is greater than or equal to the open-circuit current of the spin-orbit junction.

8. A magnetic storage array, characterized in that, It includes at least: magnetic storage cells as described in any one of claims 1 to 7 arranged in an array and at least one reference cell; Specifically, the data state stored in the storage unit is obtained by simultaneously reading the detection signal of the magnetic storage unit and the reference signal of the reference unit and comparing the two.

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