Pulse width modulation sub-control circuit for double lasers

Abstract

The invention discloses a pulse width modulation sub-control circuit for double lasers. The sub-control circuit comprises a first operational amplifier, a second operational amplifier, a third trigger, a first triode, a second triode, a fourth resistor, a fifth resistor, a seventh resistor, a first diode, a second diode, a first capacitor and a first solid-state relay. The in-phase end of the first operational amplifier is connected with the anti-phase end of the second operational amplifier, one end of the first capacitor, one end of the fourth resistor and one end of the seventh resistor, the output end of the second operational amplifier is connected with the anode of the second diode, and the output end of the first operational amplifier is connected with the anode of the first diode. A cathode of the first diode is connected with a cathode of the second diode and one end of the first solid-state relay, the other end of the first solid-state relay is connected with a third pin of the third trigger and one end of the fifth resistor, and a second pin of the third trigger and a sixth pin of the third trigger are connected with a base electrode of the first triode. The first triode emitter is connected with the other end of the fourth resistor.

Description

Technical Field

[0001] The invention relates to the technical field of lasers, and in particular to a pulse width modulation sub-control circuit for dual lasers. Background Art

[0002] Lasers are divided into continuous lasers and pulsed lasers in terms of operation. Pulsed lasers refer to lasers with a single laser pulse width of less than 0.25 seconds, which work only once every certain period of time. They have a large output power and can be applied to applications with low repetition frequencies. The biggest difference between dual-pulse lasers and single-pulse lasers is the number and time of emitted pulses. They can control the laser to output alternately at two different time points. The control is to control the corresponding laser tube to conduct through two pulse signals with different duty cycles. When the outputs of the two lasers are merged and the combined output frequency is controlled, if any duty cycle is adjusted, the duty cycle of the other laser needs to be controlled to avoid intervals when the two lasers are switched on. Summary of the invention

[0003] In view of the above technical problems, the object of the present invention is to provide a pulse width modulation sub-control circuit for a dual laser, the sub-control circuit comprising a first operational amplifier U1, a second operational amplifier U2, a third trigger U3, a first transistor Q1, a second transistor Q2, a fourth resistor R4, a fifth resistor R5, a seventh resistor R7, a first diode D1, a second diode D2, a first capacitor C1, and a first solid-state relay S1; The in-phase end of the first operational amplifier U1 is connected to the inverting end of the second operational amplifier U2, one end of the first capacitor C1, one end of the fourth resistor R4, and one end of the seventh resistor R7; the output end of the second operational amplifier U2 is connected to the anode of the second diode D2; the output end of the first operational amplifier U1 is connected to the anode of the first diode D1; the cathode of the first diode D1 is connected to the cathode of the second diode D2, and one end of the first solid-state relay S1 is connected; the other end of the first solid-state relay S1 is connected to the third pin of the third trigger U3 and one end of the fifth resistor R5; the second pin of the third trigger U3 and the sixth pin of the third trigger U3 are connected The pin is connected to the base of the first transistor Q1, the emitter of the first transistor Q1 is connected to the other end of the fourth resistor R4, the fifth pin of the third trigger U3 is connected to the base of the second transistor Q2, the collector of the second transistor Q2 is connected to the other end of the seventh resistor R7, the first pin of the third trigger U3, the fourth pin of the third trigger U3, the collector of the second transistor Q2 are connected to the power supply, one end of the coil of the first solid-state relay S1 is connected to the first connector P1, the other end of the coil of the first solid-state relay S1, the other end of the first capacitor C1, the other end of the fifth resistor R5, the emitter of the second transistor Q2 and the ground are connected.

[0004] Furthermore, the sub-control circuit further includes a fourth operational amplifier U4, a fifth operational amplifier U5, a sixth resistor R6, an eighth resistor R8, a third diode D3, and a fourth diode D4; The anode of the third diode D3 is connected to the base of the second transistor Q2, the cathode of the third diode D3 is connected to the common-phase end of the fourth operational amplifier U4 and one end of the sixth resistor R6, the common-phase end of the fifth operational amplifier U5 is connected to the cathode of the fourth diode D4 and one end of the eighth resistor R8, the anode of the fourth diode D4 is connected to the base of the first transistor Q1, the inverting end of the fourth operational amplifier U4, the inverting end of the fifth operational amplifier U5 are connected to the pulse signal V1, and the other end of the sixth resistor R6, the other end of the eighth resistor R8 are connected to the ground.

[0005] Furthermore, the sub-control circuit also includes a first resistor R1, a second resistor R2, and a third resistor R3; One end of the first resistor R1 is connected to the power supply, the other end of the first resistor R1 is connected to one end of the second resistor R2 and the inverting end of the first operational amplifier U1, the other end of the second resistor R2 is connected to one end of the third resistor R3 and the non-inverting end of the second operational amplifier U2, and the other end of the third resistor R3 is connected to the ground.

[0006] Furthermore, the sub-control circuit also includes a sixth optical coupling module U6 and a seventh optical coupling module U7; The first pin of the sixth optocoupler module U6 is connected to the output end of the fourth operational amplifier U4, the first pin of the seventh optocoupler module U7 is connected to the output end of the fifth operational amplifier U5, the fourth pin of the sixth optocoupler module U6 is connected to the second connector P2, the fourth pin of the seventh optocoupler module U7 is connected to the third connector P3, the fifth pin of the sixth optocoupler module U6 and the fifth pin of the seventh optocoupler module U7 are connected to the power supply, and the second pin of the sixth optocoupler module U6 and the second pin of the seventh optocoupler module U7 are connected to the ground.

[0007] Furthermore, the seventh resistor R7 is an adjustable resistor.

[0008] Furthermore, the first resistor R1, the second resistor R2, and the third resistor R3 are adjustable resistors.

[0009] Furthermore, the V1 is an adjustable pulse signal generator.

[0010] The beneficial effects of the present invention compared with the prior art are: The present invention can realize the output division control and regulation of two pulsers through a pulse frequency signal, and the repetition frequency of each laser can be reduced to half of the original repetition frequency at most according to the division. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0012] Figure 1 This is a circuit structure diagram provided by the present invention. DETAILED DESCRIPTION

[0013] In order to make the objects and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific implementations of the present invention, and does not strictly limit the scope of protection specifically requested by the present invention.

[0014] The present invention discloses a pulse width modulation sub-control circuit for dual lasers, the sub-control circuit comprising a first operational amplifier U1, a second operational amplifier U2, a third trigger U3, a first triode Q1, a second triode Q2, a fourth resistor R4, a fifth resistor R5, a seventh resistor R7, a first diode D1, a second diode D2, a first capacitor C1, and a first solid-state relay S1; The in-phase end of the first operational amplifier U1 is connected to the inverting end of the second operational amplifier U2, one end of the first capacitor C1, one end of the fourth resistor R4, and one end of the seventh resistor R7; the output end of the second operational amplifier U2 is connected to the anode of the second diode D2; the output end of the first operational amplifier U1 is connected to the anode of the first diode D1; the cathode of the first diode D1 is connected to the cathode of the second diode D2, and one end of the first solid-state relay S1 is connected; the other end of the first solid-state relay S1 is connected to the third pin of the third trigger U3 and one end of the fifth resistor R5; the second pin of the third trigger U3 and the sixth pin of the third trigger U3 are connected The pin is connected to the base of the first transistor Q1, the emitter of the first transistor Q1 is connected to the other end of the fourth resistor R4, the fifth pin of the third trigger U3 is connected to the base of the second transistor Q2, the collector of the second transistor Q2 is connected to the other end of the seventh resistor R7, the first pin of the third trigger U3, the fourth pin of the third trigger U3, the collector of the second transistor Q2 are connected to the power supply, one end of the coil of the first solid-state relay S1 is connected to the first connector P1, the other end of the coil of the first solid-state relay S1, the other end of the first capacitor C1, the other end of the fifth resistor R5, the emitter of the second transistor Q2 and the ground are connected.

[0015] Specifically, the sub-control circuit further includes a fourth operational amplifier U4, a fifth operational amplifier U5, a sixth resistor R6, an eighth resistor R8, a third diode D3, and a fourth diode D4; The anode of the third diode D3 is connected to the base of the second transistor Q2, the cathode of the third diode D3 is connected to the common-phase end of the fourth operational amplifier U4 and one end of the sixth resistor R6, the common-phase end of the fifth operational amplifier U5 is connected to the cathode of the fourth diode D4 and one end of the eighth resistor R8, the anode of the fourth diode D4 is connected to the base of the first transistor Q1, the inverting end of the fourth operational amplifier U4, the inverting end of the fifth operational amplifier U5 are connected to the pulse signal V1, and the other end of the sixth resistor R6, the other end of the eighth resistor R8 are connected to the ground.

[0016] Specifically, the sub-control circuit further includes a first resistor R1, a second resistor R2, and a third resistor R3; One end of the first resistor R1 is connected to the power supply, the other end of the first resistor R1 is connected to one end of the second resistor R2 and the inverting end of the first operational amplifier U1, the other end of the second resistor R2 is connected to one end of the third resistor R3 and the non-inverting end of the second operational amplifier U2, and the other end of the third resistor R3 is connected to the ground.

[0017] Specifically, the sub-control circuit further includes a sixth optical coupling module U6 and a seventh optical coupling module U7; The first pin of the sixth optocoupler module U6 is connected to the output end of the fourth operational amplifier U4, the first pin of the seventh optocoupler module U7 is connected to the output end of the fifth operational amplifier U5, the fourth pin of the sixth optocoupler module U6 is connected to the second connector P2, the fourth pin of the seventh optocoupler module U7 is connected to the third connector P3, the fifth pin of the sixth optocoupler module U6 and the fifth pin of the seventh optocoupler module U7 are connected to the power supply, and the second pin of the sixth optocoupler module U6 and the second pin of the seventh optocoupler module U7 are connected to the ground.

[0018] Specifically, the seventh resistor R7 is an adjustable resistor.

[0019] Specifically, the first resistor R1, the second resistor R2, and the third resistor R3 are adjustable resistors.

[0020] Specifically, V1 is an adjustable pulse signal generator.

[0021] In the present invention, the sub-control circuit is started after the first connector P1 inputs a signal, and the required base frequency starting voltage is respectively input to the inverting terminal of the first operational amplifier U1 and the non-inverting terminal of the second operational amplifier U2. In this application, a three-resistance voltage division method is used instead. When an upper-level chip is provided, the initial base frequency is set by an adjustable power supply. The voltage at the inverting terminal of the first operational amplifier U1 needs to be greater than the voltage at the non-inverting terminal of the second operational amplifier U2. The smaller the difference, the greater the base frequency. When there is no signal output from the first connector P1, the first pin of the third trigger U3 is set, and the sixth pin complies with the output and inputs the signal to the base of the first transistor Q1. The first transistor Q1 is turned on, and the collector power supply of the first transistor Q1 stores energy in the first capacitor C1 through the fourth resistor R4 to the first operational amplifier. The amplifier U1 outputs, the output end of the first operational amplifier U1 is fed back to the first solid-state relay S1 through the first diode D1, when the first connector P1 inputs a signal, the sub-control circuit is started, the first solid-state relay S1 is closed, and the third pin of the initial third trigger U3 is pulled down through the fifth resistor R5. At this time, the first connector P1 is closed, and the output end signal of the first operational amplifier U1 is input to the third trigger U3 through the first diode D1 and the first solid-state relay S1. The sixth pin of the third trigger U3 is cut off to cut off the first transistor Q1, and the fifth pin outputs a signal to the base of the second transistor Q2. The voltage at the end of the first capacitor C1 will pass through the seventh resistor R7, the collector of the second transistor Q2, the emitter of the second transistor Q2, and the The ground end loop, when the voltage at the connection end of the first capacitor C1 and the seventh resistor R7 drops to lower than the base frequency starting voltage set by the first operational amplifier U1, the first operational amplifier U1 is cut off, and the third pin of the third trigger U3 is looped through the fifth resistor R5 again, waiting for the voltage at the connection end of the first capacitor C1 and the seventh resistor R7 to drop to lower than the base frequency starting voltage set by the in-phase end of the second operational amplifier U2, the output end signal of the second operational amplifier U2 is fed back to the third pin of the third trigger U3 through the second diode D2 and the first solid-state relay S1, and the sixth pin of the third trigger U3 outputs a signal to the base of the first transistor Q1 again, the first transistor Q1 is turned on, and the collector power supply of the first transistor Q1 is input to the first transistor Q1 through the fourth resistor R4. A capacitor C1, if the resistance value of the seventh resistor R7 is consistent with that of the fourth resistor R4, the output of the fifth pin and the sixth pin of the third trigger U3 is equally divided at the base frequency. After adjusting the knob of the seventh resistor R7, the distribution ratio can be changed at the base frequency. The fifth pin signal is input to the in-phase terminal of the fourth operational amplifier U4 through the third diode D3, and the sixth pin is input to the in-phase terminal of the fifth operational amplifier U5 through the fourth diode D4. The fourth operational amplifier U4 and the fifth operational amplifier U5 inverting terminals are connected in parallel to input the PWM pulse signal V1. The fourth operational amplifier U4 and the fifth operational amplifier U5 are in the cut-off state when a high-level pulse arrives, and are output based on the output of the fifth pin and the sixth pin of the third trigger U3 when a low-level pulse arrives.Let the actual output frequency of each high level width of the fourth operational amplifier U4 and the fifth operational amplifier U5 be equal to the sum of the distribution ratios. The output ends of the fourth operational amplifier U4 and the fifth operational amplifier U5 are amplified by the sixth optical coupling module U6 and the seventh optical coupling module U7 photodiodes to the internal photosensitive transistors and then output to the second connector P2 and the third connector P3 to the laser for operation. The amplification can also be done without isolation. The output drive signals of the fourth operational amplifier U4 and the fifth operational amplifier U5 are amplified by the transistors and then input to the laser, thereby completing the separate control of the two lasers. Under separate control, the input PWM pulse signal V1 can be used to control each high level pulse width (power) in the cycle to be composed of the proportion of the output adjusted by the fourth operational amplifier U4 and the fifth operational amplifier U5 based on the base frequency, and without changing the pulse width, the repetition frequency of each laser can be reduced to half of the original repetition frequency at most. ,

[0022] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and scope of the equivalent elements of the claims be included in the invention. Any marking in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A pulse width modulation sub-control circuit for dual lasers, characterized in that: The sub-control circuit includes a first operational amplifier, a second operational amplifier, a third trigger, a first triode, a second triode, a fourth resistor, a fifth resistor, a seventh resistor, a first diode, a second diode, a first capacitor, and a first solid-state relay; The non-inverting end of the first operational amplifier is connected to the inverting end of the second operational amplifier, one end of the first capacitor, one end of the fourth resistor, and one end of the seventh resistor. The output end of the second operational amplifier is connected to the anode of the second diode, the output end of the first operational amplifier is connected to the anode of the first diode, the cathode of the first diode is connected to the cathode of the second diode, and one end of the first solid-state relay is connected. The other end of the first solid-state relay is connected to the third pin of the third trigger and one end of the fifth resistor. The second pin of the third trigger, the sixth pin of the third trigger and the base of the first transistor are connected. The emitter of the first transistor is connected to the other end of the fourth resistor, the fifth pin of the third trigger is connected to the base of the second transistor, the collector of the second transistor is connected to the other end of the seventh resistor, the first pin of the third trigger, the fourth pin of the third trigger, the collector of the second transistor are connected to the power supply, one end of the first solid-state relay coil is connected to the first connector, and the other end of the first solid-state relay coil, the other end of the first capacitor, the other end of the fifth resistor, the emitter of the second transistor and the ground are connected.

2. A pulse width modulation control circuit for dual lasers according to claim 1, characterized in that: The sub-control circuit also includes a fourth operational amplifier, a fifth operational amplifier, a sixth resistor, an eighth resistor, a third diode, and a fourth diode; The anode of the third diode is connected to the base of the second transistor, the cathode of the third diode is connected to the in-phase end of the fourth operational amplifier and one end of the sixth resistor, the in-phase end of the fifth operational amplifier is connected to the cathode of the fourth diode and one end of the eighth resistor, the anode of the fourth diode is connected to the base of the first transistor, the inverting end of the fourth operational amplifier, the inverting end of the fifth operational amplifier and the pulse signal V1 are connected, and the other end of the sixth resistor, the other end of the eighth resistor and the ground are connected.

3. The pulse width modulation control circuit for dual lasers according to claim 1, characterized in that: The sub-control circuit also includes a first resistor, a second resistor, and a third resistor; One end of the first resistor is connected to the power supply, the other end of the first resistor is connected to one end of the second resistor and the inverting end of the first operational amplifier, the other end of the second resistor is connected to one end of the third resistor and the non-inverting end of the second operational amplifier, and the other end of the third resistor is connected to the ground.

4. The pulse width modulation control circuit for dual lasers according to claim 2, characterized in that: The sub-control circuit also includes a sixth optical coupling module and a seventh optical coupling module; The first pin of the sixth optocoupler module is connected to the output end of the fourth operational amplifier, the first pin of the seventh optocoupler module is connected to the output end of the fifth operational amplifier, the fourth pin of the sixth optocoupler module is connected to the second connector, the fourth pin of the seventh optocoupler module is connected to the third connector, the fifth pin of the sixth optocoupler module and the fifth pin of the seventh optocoupler module are connected to the power supply, and the second pin of the sixth optocoupler module and the second pin of the seventh optocoupler module are connected to the ground terminal.

5. The pulse width modulation control circuit for dual lasers according to claim 1, characterized in that: The seventh resistor is an adjustable resistor.

6. The pulse width modulation control circuit for dual lasers according to claim 2, characterized in that: The first resistor, the second resistor and the third resistor are adjustable resistors.

7. The pulse width modulation control circuit for dual lasers according to claim 2, characterized in that: The V1 is an adjustable pulse signal generator.

Images