Micro light-emitting device and display device

Abstract

The present application discloses a micro-light-emitting device and a display device, wherein the micro-light-emitting device includes: a driving substrate; a light-emitting layer, which is arranged on one side of the driving substrate; the light-emitting layer includes sub-pixels arranged at intervals from each other, and adjacent sub-pixels form pixel grooves; a bonding layer, which is arranged between the driving substrate and the light-emitting layer; the bonding layer is provided with a plurality of conductive holes corresponding to the sub-pixels, the conductive holes pass through the bonding layer, and conductors are provided in the conductive holes; the conductors are electrically connected to the driving substrate and the light-emitting layer respectively; wherein, in the stacking direction of the light-emitting layer and the bonding layer, the bottom of the pixel groove is arranged outside the bonding layer on a side away from the driving substrate, which solves the problem of low yield of traditionally manufactured high-resolution, high-brightness micro-light-emitting devices.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a micro light-emitting device and a display apparatus. Background Art

[0002] Currently, the main display screens on the market are divided into Liquid Crystal Display (LCD) and Organic Light-Emitting Diode (OLED). LCD is a passive light-emitting display that requires a backlight module to illuminate the pixels on the screen. Its advantages include high fidelity and a more natural display, but the use of a backlight module makes it thicker and consumes more energy. OLED has the characteristic of self-luminescence, and each pixel on the screen can independently control its light emission, thus achieving a more precise display effect. However, OLED is more expensive and prone to screen burn-in, resulting in a shorter lifespan.

[0003] With the development of augmented reality (AR) and virtual reality (VR) technologies, AR and VR technologies need to have high resolution, high brightness and long life in order to provide a better immersive experience. Traditional displays can no longer meet the higher display requirements.

[0004] Micro-LED displays (Micro Light Emitting Diode Displays, or Micro-LEDs) are considered the optimal display solution for AR and VR products. Micro-LED displays include a driver substrate, a light-emitting layer, and a metal bonding layer connecting the driver substrate and the light-emitting layer. The light-emitting layer includes sub-pixels spaced apart from each other, with pixel grooves formed between adjacent sub-pixels. After bonding, the metal bonding layer needs to be etched and disconnected in the pixel grooves, which is difficult to do, resulting in a low yield in the production of such high-resolution, high-brightness Micro-LED displays. Summary of the Invention

[0005] In view of this, the present application provides a micro-light-emitting device and a display device, aiming to solve the problem of low yield in the preparation of such high-resolution, high-brightness Micro-LED displays.

[0006] In a first aspect, an embodiment of the present application provides a micro-light emitting device, the micro-light emitting device comprising:

[0007] A backplane, the backplane comprising a driving circuit and a first bonding layer, the first bonding layer comprising:

[0008] a first dielectric layer; and

[0009] a first conductive structure electrically connected to the driving circuit; and

[0010] A micro light-emitting diode array, comprising a plurality of light-emitting chips and a second bonding layer, wherein the second bonding layer comprises:

[0011] a second dielectric layer; and

[0012] a second conductive structure electrically connected to the light-emitting chip, wherein the first bonding layer is bonded to the second bonding layer, and at least one of the first dielectric layer or the second dielectric layer includes a DBR reflective structure;

[0013] The DBR reflective structure is a composite structure formed by stacking material layers with different refractive indices.

[0014] Optionally, in some embodiments of the present application, the first dielectric layer is bonded to the second dielectric layer; and the first conductive structure is bonded to the second conductive structure.

[0015] Optionally, in some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of material layers with different refractive indices.

[0016] Optionally, in some embodiments of the present application, the material of the material layer includes any one of silicon dioxide, titanium dioxide, aluminum oxide, zirconium oxide, silicon nitride, and aluminum nitride.

[0017] Optionally, in some embodiments of the present application, both the first dielectric layer and the second dielectric layer include a DBR reflection structure.

[0018] Optionally, in some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of silicon dioxide and titanium dioxide.

[0019] Optionally, in some embodiments of the present application, a plurality of the light-emitting chips are spaced apart to form a gap between two adjacent light-emitting chips, and the micro-LED array further includes a DBR reflective structure located within the gap, and the DBR reflective structure covers the side walls of the two adjacent light-emitting chips.

[0020] Optionally, in some embodiments of the present application, the thickness of the DBR reflective structure has a value range greater than or equal to 0.5 μm and less than or equal to 5 μm.

[0021] Optionally, in some embodiments of the present application, the first conductive structure includes a first conductive hole passing through the first dielectric layer; and a first conductive layer arranged on the inner wall of the first conductive hole; the second conductive structure includes a second conductive hole passing through the second dielectric layer; and a second conductive layer arranged on the inner wall of the second conductive hole.

[0022] In a second aspect, an embodiment of the present application provides a display device comprising the aforementioned micro-light-emitting device.

[0023] The embodiment of the present application provides a micro-light-emitting device, which replaces the traditional metal bonding method. Metal bonding requires etching and disconnecting the entire surface of metal between adjacent light-emitting diodes in a micro-light-emitting diode array. The etching depth is too large, which affects the yield rate of the micro-light-emitting device manufacturing. The present application can process the first bonding layer and the second bonding layer on the backplane and the micro-light-emitting diode array respectively, and adopts the DBR reflection structure bonding method. There is no need to etch and disconnect the entire surface of metal between adjacent light-emitting diodes in the micro-light-emitting diode array, which significantly reduces the processing difficulty and solves the problem of low yield of traditional high-resolution, high-brightness micro-LED display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 This is a schematic structural diagram of a micro light-emitting device provided in an embodiment of the present application;

[0026] Figure 2 This is a flow chart of a method for manufacturing a micro light-emitting device provided in an embodiment of the present application.

[0027] Reference numerals:

[0028] 100, backplane; 110, first bonding layer; 111, first dielectric layer; 112, first conductive structure; 120, buffer layer;

[0029] 200, micro light-emitting diode array; 210, light-emitting diode; 211, p-type semiconductor layer; 212, active region; 213, n-type semiconductor layer; 220, second bonding layer; 221, second dielectric layer; 222, second conductive structure; 230, ITO conductive layer; 240, isolation trench. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described herein are only used to illustrate and explain the present application and are not used to limit the present application.

[0031] In this application, unless otherwise indicated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of a device in actual use or operation, specifically in the drawing directions of the accompanying drawings; whereas "inner" and "outer" refer to the outline of the device. Furthermore, in the description of this application, the term "including" means "including but not limited to." Terms such as first, second, and third are used merely as labels and do not impose numerical requirements or establish a sequence.

[0032] In this application, "and / or" describes the association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. A and B can be singular or plural.

[0033] In this application, "at least one" means one or more, and "plurality" means two or more. "One or more", "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single items or plural items. For example, "at least one of a, b, or c", or "at least one of a, b, and c" can all mean: a, b, c, ab (i.e., a and b), ac, bc, or abc, where a, b, and c can be single or multiple.

[0034] In the present application, when another layer is formed "on" a certain layer, the so-called "on" is a broad concept, which may indicate that the formed another layer is adjacent to a certain layer, or it may indicate that there are other spacing structural layers between the formed another layer and the certain layer. For example, when a second electrode is formed "on" the first carrier functional layer, the so-called "on" may indicate that the formed second electrode is adjacent to the first carrier functional layer, or it may indicate that there are other spacing structural layers between the second electrode and the first carrier functional layer, such as a light-emitting layer.

[0035] Various embodiments of the present application may be presented in the form of a range; it should be understood that the description in the form of a range is only for convenience and brevity and should not be understood as a hard limitation on the scope of the present application; therefore, the range description should be considered to have specifically disclosed all possible sub-ranges and single numbers within the range. For example, the description of a range from 1 to 6 should be considered to have specifically disclosed sub-ranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., as well as single numbers within the range, such as 1, 2, 3, 4, 5 and 6, which applies regardless of the range. In addition, whenever a numerical range is indicated herein, it is meant to include any cited number (fractional or integer) within the indicated range.

[0036] As used herein, the term "light emitting diode (LED)" refers to a light source that includes at least an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting region (i.e., an active region) between the n-type semiconductor layer and the p-type semiconductor layer. The light emitting region may include one or more semiconductor layers forming one or more heterostructures (e.g., quantum dots). In some embodiments, the light emitting region may include multiple semiconductor layers forming one or more quantum dots, each multi-quantum dopant including multiple (e.g., about 2 to 6) quantum dots.

[0037] As used herein, the term "micro-LED" or "μLED" refers to an LED having a chip wherein the linear dimension of the chip is less than about 200 μm, e.g., less than 100 μm, less than 50 μm, less than 10 μm, or less. For example, the linear dimension of a micro-LED may be as small as 6 μm, 5 μm, 4 μm, 2 μm, or less. Some micro-LEDs may have a linear dimension (e.g., length or diameter) comparable to the minority carrier diffusion length. However, the disclosure herein is not limited to micro-LEDs and may also be applied to mini-LEDs and large-scale LEDs.

[0038] To provide a more immersive experience for AR and VR devices, displays must feature high resolution, high brightness, and a long lifespan. Micro-LED displays, also known as mLED or μLED displays, consist of arrays of micron-sized semiconductor light-emitting units. These are electroluminescent devices that convert electrical energy into light. Their high resolution, high brightness, and long lifespan make them an ideal solution for AR and VR device displays.

[0039] Based on this, embodiments of the present application provide a micro light-emitting device and a display device.

[0040] In a first aspect, the embodiments of the present application provide a micro light emitting device, referring to Figure 1 ,include:

[0041] The backplane 100 includes a driving circuit and a first bonding layer 110. The first bonding layer 110 includes:

[0042] a first dielectric layer 111; and

[0043] a first conductive structure 112 , the first conductive structure 112 being electrically connected to the driving circuit; and

[0044] The micro-LED array 200 includes a plurality of light-emitting chips 210 and a second bonding layer 220. The second bonding layer 220 includes:

[0045] a second dielectric layer 221; and

[0046] The second conductive structure 222 is electrically connected to the light-emitting chip, wherein the first bonding layer 110 is bonded to the second bonding layer 220, and at least one of the first dielectric layer 111 or the second dielectric layer 221 includes a DBR reflective structure; wherein the DBR reflective structure is a composite structure formed by stacking material layers with different refractive indices.

[0047] The DBR reflective structure, whose full name is Distributed Bragg Reflector, is a reflector used in waveguides. It is composed of alternating high-refractive-index and low-refractive-index materials to form a periodic structure. This structure can make light of a specific wavelength strongly reflected in it, while light of other wavelengths can pass through. The present application applies the DBR reflective structure to the bonding layer of the light-emitting device. In addition to realizing the bonding effect of the backplane and the micro-light-emitting diode array, it also helps to reflect light within a specific wavelength range, improve the utilization rate of the reflected light, and thus improve the brightness of the light-emitting device.

[0048] In some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of material layers with different refractive indices.

[0049] In some embodiments of the present application, the material layer includes a first material layer and a second material layer, the first material layer has a first refractive index, the second material layer has a second refractive index, and the first refractive index is greater than or less than the second refractive index.

[0050] In some embodiments of the present application, the material layer includes a first material layer, a second material layer and a third material layer, the first material layer has a first refractive index, the second material layer has a second refractive index, the third material layer has a third refractive index, the first refractive index is greater than or less than the second refractive index, the first refractive index is greater than or less than the third refractive index, the second refractive index is greater than or less than the third refractive index, and the first refractive index is different from the second refractive index.

[0051] In some embodiments of the present application, the material of the material layer includes any one of silicon dioxide, titanium dioxide, aluminum oxide, zirconium oxide, silicon nitride, and aluminum nitride.

[0052] In some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of silicon dioxide and titanium dioxide.

[0053] In some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of silicon nitride and aluminum nitride.

[0054] In some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of aluminum oxide and zirconium oxide.

[0055] In some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of silicon dioxide, zirconium oxide, and titanium dioxide.

[0056] In some embodiments of the present application, the DBR reflective structure is a composite structure formed by vertically alternating stacking of aluminum nitride, zirconium oxide, and titanium dioxide.

[0057] In some embodiments of the present application, the specific structure of the material layer is shown in Table 1.

[0058] Table 1

[0059] Number of layers Material Thickness (nm) 1 <![CDATA[SiO2]]> 255.6 2 <![CDATA[TiO2]]> 25.41 3 <![CDATA[SiO2]]> 41.6 4 <![CDATA[TiO2]]> 38.8 5 <![CDATA[SiO2]]> 67.82 6 <![CDATA[TiO2]]> 23.93 7 <![CDATA[SiO2]]> 60.75 8 <![CDATA[TiO2]]> 40.15 9 <![CDATA[SiO2]]> 61.82 10 <![CDATA[TiO2]]> 19.88 11 <![CDATA[SiO2]]> 74.01 12 <![CDATA[TiO2]]> 111.39 13 <![CDATA[SiO2]]> 313.37 sum 1134.53

[0060] In some embodiments of the present application, the specific structure of the material layer is shown in Table 2.

[0061] Table 2

[0062]

[0063]

[0064] It should be noted that the number of material layers and the types of material layers are not particularly limited in this application and can be flexibly adjusted according to actual products.

[0065] In some embodiments of the present application, the DBR reflective structure can also be arranged in the first dielectric layer and the second dielectric layer, so that both the first dielectric layer and the second dielectric layer include a DBR reflective structure, which helps to improve the reflectivity of light in a specific wavelength range and further improve the brightness of the light-emitting device.

[0066] In some embodiments of the present application, multiple light-emitting chips are spaced apart to form a gap between adjacent light-emitting chips. The micro-LED array further includes a DBR reflective structure located within the gap, which covers the sidewalls of the adjacent light-emitting chips. In other words, the DBR reflective structure can be disposed not only within the first and second dielectric layers but also within the gap between adjacent light-emitting chips, thereby further enhancing reflection of light of specific wavelengths and improving brightness.

[0067] In some embodiments of the present application, the thickness of the DBR reflective structure ranges from greater than or equal to 0.5 μm to less than or equal to 5 μm.

[0068] In some embodiments of the present application, the thickness of the DBR reflective structure ranges from greater than or equal to 1 μm to less than or equal to 4 μm.

[0069] In some embodiments of the present application, the thickness of the DBR reflective structure ranges from greater than or equal to 1.5 μm to less than or equal to 3.5 μm.

[0070] In some embodiments of the present application, the thickness of the DBR reflective structure ranges from greater than or equal to 2 μm to less than or equal to 3 μm.

[0071] Exemplarily, the thickness of the DBR reflective structure can be one of 0.5μm, 0.75μm, 1μm, 1.25μm, 1.5μm, 1.75μm, 2μm, 2.25μm, 2.5μm, 2.75μm, 3μm, 3.25μm, 3.5μm, 3.75μm, 4μm, 4.25μm, 4.5μm, 4.75μm, 5μm, and the range of values ​​between any two adjacent values.

[0072] In some embodiments of the present application, the thickness of each layer in the DBR reflective structure can be any one of 10nm, 30nm, 50nm, 70nm, 100nm, 120nm, 150nm, 180nm, 200nm, 210nm, 230nm, 250nm, 270nm, 300nm, 320nm or any value within the range of two adjacent layers, and is not limited here.

[0073] It should be noted that although the present application does not limit the thickness of each layer in the DBR reflective structure, it is necessary to limit the total thickness of the DBR reflective structure, that is, the thickness of the first bonding layer and the second bonding layer.

[0074] In some embodiments of the present application, the first dielectric layer can be bonded to the second dielectric layer, and the first conductive structure can be bonded to the second conductive structure to achieve connection between the backplane and the micro light-emitting diode and local conduction to achieve alignment connection between the first bonding layer and the second bonding layer.

[0075] In some embodiments of the present application, the first conductive structure may include a first conductive hole penetrating the first dielectric layer and a first conductive layer arranged on the inner wall of the first conductive hole; the second conductive structure may include a second conductive hole penetrating the second dielectric layer and a second conductive layer arranged on the inner wall of the second conductive hole.

[0076] In some embodiments of the present application, the first conductive via and the second conductive via may be conductive vias.

[0077] In some embodiments of the present application, the materials of the first conductive layer and the second conductive layer can be selected from Cu, Ag or other materials with strong conductivity.

[0078] In some embodiments of the present application, the size range of the first conductive via and the second conductive via is greater than or equal to 0.01 μm and less than or equal to 1 μm.

[0079] In some embodiments of the present application, the size range of the first conductive via and the second conductive via is greater than or equal to 0.05 μm and less than or equal to 0.5 μm.

[0080] In some embodiments of the present application, the size range of the first conductive via and the second conductive via is greater than or equal to 0.1 μm and less than or equal to 0.3 μm.

[0081] Illustratively, the sizes of the first and second via holes may be 0.01 μm, 0.05 μm, 0.1 μm, 0.3 μm, 0.35 μm, 0.40 μm, 0.42 μm, 0.45 μm, 0.5 μm, 0.7 μm, 0.78 μm, 0.86 μm, 0.92 μm, 0.96 μm, 1 μm, or any value between two adjacent ones.

[0082] It should be noted that the sizes of the first conductive hole and the second conductive hole can be the same or different, which will not be elaborated here.

[0083] In some embodiments of the present application, the backplane may be a silicon-based backplane.

[0084] In some embodiments of the present application, the driving circuit includes a transistor, and may also be a driving circuit with other structures, which is not limited in the present application.

[0085] In some embodiments of the present application, the transistor may be a CMOS (Complementary Metal Oxide Semiconductor) transistor.

[0086] In some embodiments of the present application, the light emitting diode 210 in the light emitting chip includes:

[0087] p-type semiconductor layer 211;

[0088] an active region 212 configured to emit light; and

[0089] n-type semiconductor layer 213 .

[0090] In some embodiments of the present application, the p-type semiconductor layer may be prepared using a P-type semiconductor material; and the n-type semiconductor layer may be prepared using an N-type semiconductor material.

[0091] In some embodiments of the present application, an ITO conductive layer 230 may be deposited on the surface of the light emitting diode.

[0092] In some embodiments of the present application, partition grooves 240 are provided between adjacent light-emitting diodes to effectively isolate the light-emitting diodes and reduce mutual influence between them, thereby helping to improve the light-emitting characteristics and heat dissipation efficiency of the device.

[0093] See Figure 2 , the embodiment of the present application provides a method for preparing a micro light-emitting device, comprising:

[0094] depositing a first bonding layer on the surface of the backplane;

[0095] depositing a second bonding layer on the surface of the micro-LED array;

[0096] The transparent dielectric film on the surface of the P electrode on the back plate is removed by etching and patterning to expose the P electrode and form a first conductive hole, so as to form a first conductive structure in the first bonding layer;

[0097] The transparent dielectric film on the surface of the P electrode of the micro-LED array is removed by etching and patterning to form a second conductive hole, so as to form a second conductive structure in the second bonding layer;

[0098] Then, the first conductive hole and the second conductive hole are aligned with each other, and the back plate and the micro light emitting diode array are connected by aligning and bonding the first conductive structure and the second conductive structure.

[0099] In some embodiments of the present application, the first bonding layer uses SiO2 / TiO2 alternately stacked transparent dielectric films to form a DBR reflector, and the surface layer of the first bonding layer can be a SiO2 film.

[0100] In some embodiments of the present application, the second bonding layer uses SiO2 / TiO2 alternately stacked transparent dielectric films to form a DBR reflector, and the surface layer of the first bonding layer can also be a SiO2 film.

[0101] In some embodiments of the present application, conductive metal Cu is deposited on the surfaces of the backplane and the micro-LED array, respectively, and the conductive metal Cu in areas outside the conductive metal Cu is removed by a CMP process, leaving the conductive metal Cu in the first conductive hole and the second conductive hole.

[0102] In some embodiments of the present application, the backplane may be a silicon-based backplane having a driving circuit.

[0103] In some embodiments of the present application, a buffer layer is provided on the surface of the backplane, and the buffer layer serves as an insulator to prevent a short circuit between the backplane and the micro-LED array.

[0104] It should be noted that the CMP (Chemical Mechanical Polishing) process is a conventional process in semiconductor manufacturing and will not be described in detail here.

[0105] It should be noted that the micro-LED array may include a substrate structure. After the bonding is completed, the substrate structure of the micro-LED array is removed and the N electrode is exposed.

[0106] In some embodiments of the present application, the bonded micro-LED array is etched and patterned to remove unnecessary epitaxial etching between the LEDs according to pixel size requirements, and the etching stops at the surface SiO2 film to form each independent LED. A dielectric protection layer is deposited on the surface of the patterned micro-LED array. The dielectric protection can be CVD coating or ALD coating. There is no limit to the thickness of the dielectric protection layer. The surface of the LED and the dielectric protection layer that needs to be connected to the conductive area are etched and removed, leaving only the dielectric layer between the side wall of the LED and the surface of the LED.

[0107] The present application also relates to a display device, comprising a micro-light emitting device according to any embodiment of the first aspect.

[0108] The display device can be any electronic product with a display function, including but not limited to smart phones, tablet computers, laptops, digital cameras, digital video cameras, smart wearable devices, smart weighing electronic scales, car displays, televisions or e-book readers, among which smart wearable devices can be, for example, smart bracelets, smart watches, virtual reality (VR) helmets, etc.

[0109] The above is a detailed introduction to the micro-light-emitting devices and display devices provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A micro light-emitting device, characterized in that: The micro light emitting device comprises: A backplane, the backplane comprising a driving circuit and a first bonding layer, the first bonding layer comprising: a first dielectric layer; and a first conductive structure electrically connected to the driving circuit; and a micro light emitting diode array comprising a plurality of light emitting chips and a second bonding layer comprising: a second dielectric layer; and a second conductive structure electrically connected to the plurality of light-emitting chips, wherein the first bonding layer is bonded to the second bonding layer, and at least one of the first dielectric layer or the second dielectric layer comprises a DBR reflective structure; The DBR reflective structure is a composite structure formed by stacking material layers with different refractive indices.

2. The micro light emitting device according to claim 1, characterized in that: The first dielectric layer is bonded to the second dielectric layer; and the first conductive structure is bonded to the second conductive structure.

3. The micro light emitting device according to claim 1, wherein: The DBR reflective structure is a composite structure formed by vertically alternating stacking of material layers with different refractive indices.

4. The micro light emitting device according to claim 1, wherein: The material of the material layer includes any one of silicon dioxide, titanium dioxide, aluminum oxide, zirconium oxide, silicon nitride, and aluminum nitride.

5. The micro light emitting device according to claim 1, wherein: The first dielectric layer and the second dielectric layer both include a DBR reflection structure.

6. The micro light emitting device according to claim 1, characterized in that: The DBR reflective structure is a composite structure formed by vertically alternating stacking of silicon dioxide and titanium dioxide.

7. The micro light emitting device according to claim 1, characterized in that: The plurality of light emitting chips are spaced apart to form a gap between two adjacent light emitting chips. The micro light emitting diode array further includes a DBR reflective structure located in the gap, and the DBR reflective structure covers the side walls of the two adjacent light emitting chips.

8. The micro-light emitting device according to claim 1, characterized in that: The thickness of the DBR reflective structure ranges from greater than or equal to 0.5 μm to less than or equal to 5 μm.

9. The micro-light emitting device according to claim 1, characterized in that: The first conductive structure includes a first conductive hole penetrating the first dielectric layer and a first conductive layer arranged on the inner wall of the first conductive hole; the second conductive structure includes a second conductive hole penetrating the second dielectric layer and a second conductive layer arranged on the inner wall of the second conductive hole.

10. A display device, characterized in that: A micro-light emitting device comprising any one of claims 1 to 9.

Images