An abnormality detection protection circuit for a multi-graphics card terminal

Abstract

The present invention discloses a multi-graphics card terminal abnormality detection and protection circuit, which relates to the field of graphics card protection technology. The circuit includes a power supply regulation module for multi-channel high-frequency voltage conversion processing; a first output control module for rectification, power transmission control, power filtering, and power supplying the first graphics card; a second output control module for rectification, power transmission, power filtering, and power supplying the second graphics card; a third output control module for rectification, power transmission control, power filtering, and power supplying the third graphics card; a sampling switching module for switching the signal transmission path according to the signal state detected by the abnormality detection module; a power feedback module for voltage change detection; and an abnormality detection module for overvoltage detection. The multi-graphics card terminal abnormality detection and protection circuit of the present invention can disconnect the power when the graphics card terminal has abnormal power, switch the sampling object, and continue to maintain the power supply of the power supply control module, thereby avoiding graphics card failure and improving the working efficiency of multiple graphics cards.

Description

Technical Field

[0001] The present invention relates to the technical field of graphics card protection, in particular to an abnormality detection protection circuit for a multi-graphics card terminal. Background Art

[0002] A graphics card is one of the most basic and important computer accessories. As a crucial component of smart devices, it converts digital-to-analog signals and outputs and displays graphics. To improve data processing capabilities, smart devices can be equipped with multiple graphics cards. To facilitate power supply control for multi-graphics card terminals, existing multi-graphics card terminals generally utilize independent power supplies capable of providing multi-circuit regulated power. However, in actual use, a single power supply port may experience power anomalies, potentially preventing the graphics card terminal from functioning properly or even damaging it. Furthermore, independent power supplies often utilize switching power supply circuits. If a power anomaly occurs at the primary output port, this will also affect the remaining power supply ports, leading to potential improvements. Summary of the Invention

[0003] An embodiment of the present invention provides a multi-graphics card terminal abnormality detection and protection circuit to solve the problems raised in the above background technology.

[0004] According to an embodiment of the present invention, a multi-graphics card terminal abnormality detection and protection circuit is provided, comprising: a power regulation module, a first output control module, a second output control module, a third output control module, a power feedback module, an abnormality detection module, and a sampling switching module;

[0005] a power supply regulating module, connected to the power feedback module, for receiving direct current power, and performing multi-channel high-frequency voltage regulation processing on the direct current power and outputting the first power upon receiving the feedback signal output by the power feedback module;

[0006] a first output control module, connected to the power regulation module and the abnormality detection module, configured to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide the second electric energy to the connected first graphics card, and stop the electric energy transmission upon receiving the first abnormality signal output by the abnormality detection module;

[0007] a second output control module, connected to the power regulation module and the abnormality detection module, configured to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide third electric energy to the connected second graphics card, and stop the electric energy transmission upon receiving a second abnormality signal output by the abnormality detection module;

[0008] a third output control module, connected to the power regulation module and the abnormality detection module, configured to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide fourth electric energy to a connected third graphics card, and stop the electric energy transmission upon receiving a third abnormality signal output by the abnormality detection module;

[0009] a sampling switching module, connected to the first output control module, the second output control module, the third output control module, the abnormality detection module and the power feedback module, and configured to transmit the second electric energy to the power feedback module, transmit the third electric energy to the power feedback module upon receiving the first abnormality signal output by the abnormality detection module, and transmit the fourth electric energy to the power feedback module upon receiving the first abnormality signal and the second abnormality signal output by the abnormality detection module;

[0010] an electric energy feedback module, configured to set a voltage threshold, isolate and divide the received second electric energy, third electric energy, or fourth electric energy, and compare the voltage with the voltage threshold, and output a feedback signal when a voltage change occurs in the second electric energy, third electric energy, or fourth electric energy;

[0011] The abnormality detection module is used to set an overvoltage threshold and self-lock to output a first abnormality signal when the second electrical energy is greater than the overvoltage threshold, self-lock to output a second abnormality signal when the third electrical energy is greater than the overvoltage threshold, and self-lock to output a third abnormality signal when the fourth electrical energy is greater than the overvoltage threshold.

[0012] As a further solution of the present invention: the power regulation module includes a power interface, a first capacitor, a second capacitor, a first resistor, a first regulator, a first diode, a second diode and a first transformer;

[0013] Preferably, the first end of the power interface is connected to one end of the first capacitor, the anode of the first diode and the first end of the primary side of the first transformer, the cathode of the first diode is connected to the cathode of the second diode, the anode of the second diode is connected to the second end of the primary side of the first transformer and the D end of the first regulator, the S end of the first regulator is connected to the other end of the first capacitor and the second end of the power interface and is connected to the C end of the first regulator and the power feedback module through the second capacitor and the first resistor in sequence, and the first secondary side, the second secondary side, the third secondary side and the fourth secondary side of the first transformer are respectively connected to the first output control module, the second output control module, the third output control module and the power feedback module.

[0014] As a further solution of the present invention: the first output control module includes a sixth diode, a seventh capacitor, a fourth resistor, a third power tube, a third switch tube, a first inductor, an eighth capacitor and a first interface;

[0015] Preferably, the anode of the sixth diode is connected to the first end of the first secondary side of the first transformer, the cathode of the sixth diode is connected to the drain of the third power tube and one end of the seventh capacitor and is connected to the gate of the third power tube and the collector of the third switching tube through the fourth resistor, the source of the third power tube is connected to the first end of the first inductor, the second end of the first inductor is connected to the first end of the first interface and one end of the eighth capacitor, the emitter of the third switching tube is connected to the other end of the seventh capacitor, the second end of the first interface, the other end of the eighth capacitor and the second end of the first secondary side of the first transformer, and the base of the third switching tube is connected to the abnormality detection module.

[0016] As a further solution of the present invention: the abnormality detection module includes a ninth resistor, an eighth diode, a tenth resistor, a ninth diode, a tenth diode, a first logic chip, and a first power supply;

[0017] Preferably, the cathode of the eighth diode is connected to the first end of the first interface through the ninth resistor, the anode of the eighth diode is connected to the anode of the ninth diode and is connected to the second end of the first interface through the tenth resistor, the cathode of the ninth diode is connected to the cathode of the tenth diode and the A end of the first logic chip, the B end of the first logic chip is connected to the first power supply, and the Y end of the first logic chip is connected to the anode of the tenth diode, the base of the third switch tube and the sampling switching module.

[0018] As a further solution of the present invention: the second output control module includes a fifth diode, a fifth capacitor, a third resistor, a second power tube, a second switch tube, a second inductor, a sixth capacitor and a second interface; the abnormality detection module includes a second detection device;

[0019] Preferably, the anode of the fifth diode is connected to the first end of the second secondary side of the first transformer, the cathode of the fifth diode is connected to the drain of the second power tube and one end of the fifth capacitor and is connected to the gate of the second power tube and the collector of the second switching tube through the third resistor, the source of the second power tube is connected to the first end of the second inductor, the second end of the second inductor is connected to one end of the sixth capacitor, the first end of the second detection device and the first end of the second interface, the other end of the fifth capacitor is connected to the emitter of the second switching tube, the other end of the sixth capacitor, the second end of the second interface, the second end of the second detection device and the second end of the second secondary side of the first transformer, and the third end of the second detection device is connected to the sampling switching module.

[0020] As a further solution of the present invention: the third output control module includes a third diode, a third capacitor, a second resistor, a first switch tube, a first power tube, a third inductor, a fourth capacitor and a third interface; the abnormality detection module includes a third detection device;

[0021] Preferably, the anode of the third diode is connected to the first end of the third secondary side of the first transformer, the cathode of the third diode is connected to the drain of the first power tube and one end of the third capacitor and is connected to the gate of the first power tube and the collector of the first switching tube through the second resistor, the source of the first power tube is connected to the first end of the third inductor, the second end of the third inductor is connected to one end of the fourth capacitor, the first end of the third interface and the first end of the third detection device, the other end of the third capacitor is connected to the emitter of the first switching tube, the other end of the fourth capacitor, the second end of the third interface, the second end of the third detection device and the second end of the third secondary side of the first transformer, and the third end of the third detection device is connected to the sampling switching module.

[0022] As a further solution of the present invention: the power feedback module includes a seventh diode, a ninth capacitor, a first optocoupler, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first controllable voltage regulator, a tenth capacitor, and an eleventh capacitor;

[0023] Preferably, the anode of the seventh diode is connected to the first end of the fourth secondary side of the first transformer, the cathode of the seventh diode is connected to one end of the ninth capacitor and the third end of the first optocoupler, the fourth end of the first optocoupler is connected to the C end of the first regulator, the first end of the first optocoupler is connected to the sampling switching module, the second end of the first optocoupler is connected to the cathode of the first controllable voltage-stabilizing source, one end of the eleventh capacitor and the first end of the sixth resistor through the fifth resistor, the second end of the sixth resistor is connected to the other end of the eleventh capacitor, the control end of the first controllable voltage-stabilizing source and one end of the eighth resistor through the seventh resistor, the other end of the eighth resistor is connected to the anode of the first controllable voltage-stabilizing source, the second end of the third interface, the second end of the second interface and the second end of the first interface and is connected to the other end of the ninth capacitor, the second end of the fourth secondary side of the first transformer and the second end of the power supply interface through the tenth capacitor.

[0024] As a further solution of the present invention: the sampling switching module includes a first analog switch, a second analog switch, a second power supply, an eleventh resistor, a fourth switch tube, a second logic chip, a third logic chip, a first inverter, a second inverter and a fifth switch tube;

[0025] Preferably, the IN1 terminal and the IN2 terminal of the first analog switch are respectively connected to the first end and the second end of the first inductor, the CTRL1 terminal and the CTRL2 terminal of the first analog switch are both connected to the collector of the fourth switching tube and connected to the second power supply through the eleventh resistor, the base of the fourth switching tube is connected to the Y terminal of the first logic chip, the A terminal of the second logic chip and the A terminal of the third logic chip, the B terminal of the first logic chip is connected to the output terminal of the first inverter, the B terminal of the second logic chip is connected to the output terminal of the second inverter, the input terminal of the first inverter and the input terminal of the second inverter are respectively connected to the third terminal of the second detection device and the third terminal of the third detection device, The Y end of the second logic chip is connected to the base of the fifth switching tube, the thirteenth end and the fifth end of the second analog switch, the Y end of the third logic chip is connected to the collector of the fifth switching tube, the sixth end and the twelfth end of the second analog switch, the first end and the third end of the second analog switch are respectively connected to the first end and the second end of the second inductor, the first end and the second end of the third analog switch are respectively connected to the first end and the second end of the third inductor, the second end and the ninth end of the second analog switch are both connected to the OUT2 end of the first analog switch and the second end of the sixth resistor, and the fourth end and the eleventh end of the second analog switch are both connected to the first end of the first optocoupler and the OUT1 end of the first analog switch.

[0026] Compared with the prior art, the beneficial effects of the present invention are as follows: the multi-graphics card terminal abnormality detection protection circuit of the present invention performs multi-channel high-frequency voltage regulation processing on the input electric energy by the power regulation module in cooperation with the signal fed back by the electric energy feedback module, controls the electric energy feedback module through the sampling switching module to detect the electric change of the electric energy output by the first output control module, and then adjusts the output feedback signal, and processes the electric energy through the first output control module, the second output control module and the third output control module and supplies power to the multiple connected graphics card terminals. When the abnormality detection module detects that the first output control module, the second output control module or the third output control module has an electric energy abnormality, the output control module with the electric energy abnormality will be disconnected. If the first output control module has an electric energy abnormality, the sampling switching module will be controlled to switch the sampling object, and the power supply of the power control module will continue to be maintained, thereby avoiding graphics card failure caused by electric energy abnormality and improving the working efficiency of multiple graphics cards. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in describing the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 A schematic block diagram of a multi-graphics card terminal anomaly detection and protection circuit according to an embodiment of the present invention.

[0029] Figure 2 A circuit diagram of an abnormality detection and protection circuit for a multi-graphics card terminal provided by an embodiment of the present invention.

[0030] Figure 3 This is a circuit diagram of an anomaly detection module provided in an embodiment of the present invention.

[0031] Figure 4 This is a circuit diagram of a sampling switching module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0032] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0033] In one embodiment, see Figure 1 , a multi-graphics card terminal abnormality detection protection circuit, comprising: a power regulation module 1, a first output control module 2, a second output control module 3, a third output control module 4, a power feedback module 5, an abnormality detection module 6 and a sampling switching module 7;

[0034] Specifically, the power supply regulating module 1 is connected to the power feedback module 5, and is used to receive DC power, and when receiving the feedback signal output by the power feedback module 5, performs multi-channel high-frequency voltage regulation on the DC power and outputs the first power;

[0035] a first output control module 2 connected to the power regulation module 1 and the abnormality detection module 6, configured to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide the second electric energy to the connected first graphics card, and stop the electric energy transmission upon receiving the first abnormality signal output by the abnormality detection module 6;

[0036] a second output control module 3 connected to the power regulation module 1 and the abnormality detection module 6, configured to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide third electric energy for the connected second graphics card, and stop the electric energy transmission upon receiving the second abnormality signal output by the abnormality detection module 6;

[0037] a third output control module 4 connected to the power regulation module 1 and the abnormality detection module 6, configured to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide fourth electric energy for a connected third graphics card, and stop the electric energy transmission upon receiving a third abnormality signal output by the abnormality detection module 6;

[0038] a sampling switching module 7 connected to the first output control module 2, the second output control module 3, the third output control module 4, the abnormality detection module 6, and the power feedback module 5, and configured to transmit the second electric energy to the power feedback module 5, transmit the third electric energy to the power feedback module 5 upon receiving the first abnormality signal output by the abnormality detection module 6, and transmit the fourth electric energy to the power feedback module 5 upon receiving the first abnormality signal and the second abnormality signal output by the abnormality detection module 6;

[0039] The power feedback module 5 is used to set a voltage threshold, isolate and divide the received second power, third power or fourth power, and compare the voltage with the voltage threshold, and output a feedback signal when the voltage of the second power, third power or fourth power changes;

[0040] The abnormality detection module 6 is used to set the overvoltage threshold and self-lock and output the first abnormal signal when the second electrical energy is greater than the overvoltage threshold, self-lock and output the second abnormal signal when the third electrical energy is greater than the overvoltage threshold, and self-lock and output the third abnormal signal when the fourth electrical energy is greater than the overvoltage threshold.

[0041] In a specific embodiment, the power regulation module 1 may adopt a power regulation circuit composed of a power interface, capacitors, diodes, transformers, etc., and may perform high-frequency isolation and voltage regulation processing on the connected DC power according to the feedback signal output by the power feedback module 5, and perform multi-channel voltage stabilization power supply; the first output control module 2 may adopt a first output control circuit composed of diodes, capacitors, field effect transistors, inductors, etc., and may perform rectification processing, power transmission control and filtering processing on the power output of the power regulation module 1, and supply power to the connected graphics card terminal; the second output control module 3 may adopt a second output control circuit composed of diodes, capacitors, field effect transistors, inductors, etc., and may perform rectification processing, power transmission control and filtering processing on the power output of the power regulation module 1, and supply power to the connected graphics card terminal; the third output control module 4 may adopt a third output control circuit composed of diodes, capacitors, field effect transistors, inductors, etc., and may perform rectification processing, power transmission control and filtering processing on the power output of the power regulation module 1, and supply power to the connected graphics card terminal. The power feedback module 5 can adopt a power feedback circuit composed of a photoelectric coupler, a resistor, an adjustable voltage regulator, etc., can set a voltage threshold, and sample the power transmitted by the sampling switching module 7 and compare the sampling signal with the voltage threshold, and then judge the voltage change state and output a feedback signal; the abnormality detection module 6 can adopt an abnormality detection circuit composed of a resistor, a diode, a logic chip, etc., can perform overvoltage detection on the first output control module 2, the second output control module 3 and the third output control module 4, and perform high-level self-locking when overvoltage occurs; the sampling switching module 7 can adopt a sampling switching circuit composed of an analog switch, a transistor, an inverter, a logic chip, etc., can transmit the power output by the first output control module 2 to the power feedback module 5, and switch the connection state with the second output control module 3 and the third output control module 4 according to the detection device of the abnormality detection module 6.

[0042] In another embodiment, see Figure 1 、 Figure 2 、 Figure 3 and Figure 4 , the power regulation module 1 includes a power interface, a first capacitor C1, a second capacitor C2, a first resistor R1, a first regulator IC1, a first diode D1, a second diode D2 and a first transformer B1;

[0043] Specifically, the first end of the power interface is connected to one end of the first capacitor C1, the anode of the first diode D1 and the first end of the primary side of the first transformer B1, the cathode of the first diode D1 is connected to the cathode of the second diode D2, the anode of the second diode D2 is connected to the second end of the primary side of the first transformer B1 and the D end of the first regulator IC1, the S end of the first regulator IC1 is connected to the other end of the first capacitor C1 and the second end of the power interface and is connected to the C end of the first regulator IC1 and the power feedback module 5 through the second capacitor C2 and the first resistor R1 in sequence, and the first secondary side, second secondary side, third secondary side and fourth secondary side of the first transformer B1 are respectively connected to the first output control module 2, the second output control module 3, the third output control module 4 and the power feedback module 5.

[0044] In a specific embodiment, the first regulator IC1 may be TOP223Y; the first transformer B1 may be a high-frequency transformer.

[0045] Furthermore, the first output control module 2 includes a sixth diode D6, a seventh capacitor C7, a fourth resistor R4, a third power tube Q3, a third switch tube V3, a first inductor L1, an eighth capacitor C8 and a first interface;

[0046] Specifically, the anode of the sixth diode D6 is connected to the first end of the first secondary side of the first transformer B1, the cathode of the sixth diode D6 is connected to the drain of the third power tube Q3 and one end of the seventh capacitor C7, and is connected to the gate of the third power tube Q3 and the collector of the third switch tube V3 through the fourth resistor R4. The source of the third power tube Q3 is connected to the first end of the first inductor L1, the second end of the first inductor L1 is connected to the first end of the first interface and one end of the eighth capacitor C8, the emitter of the third switch tube V3 is connected to the other end of the seventh capacitor C7, the second end of the first interface, the other end of the eighth capacitor C8, and the second end of the first secondary side of the first transformer B1, and the base of the third switch tube V3 is connected to the abnormality detection module 6.

[0047] In a specific embodiment, the third power tube Q3 can be an N-channel field effect tube; the sixth diode D6, the seventh capacitor C7, the first inductor L1 and the eighth capacitor C8 perform rectification and filtering; the first interface is used to connect the power supply of the graphics card terminal; the third switch tube V3 can be an NPN transistor.

[0048] Furthermore, the abnormality detection module 6 includes a ninth resistor R9, an eighth diode D8, a tenth resistor R10, a ninth diode D9, a tenth diode D10, a first logic chip J1 and a first power supply VCC1;

[0049] Specifically, the cathode of the eighth diode D8 is connected to the first end of the first interface through the ninth resistor R9, the anode of the eighth diode D8 is connected to the anode of the ninth diode D9 and is connected to the second end of the first interface through the tenth resistor R10, the cathode of the ninth diode D9 is connected to the cathode of the tenth diode D10 and the A end of the first logic chip J1, the B end of the first logic chip J1 is connected to the first power supply VCC1, and the Y end of the first logic chip J1 is connected to the anode of the tenth diode D10, the base of the third switch tube V3 and the sampling switching module 7.

[0050] In a specific embodiment, the ninth resistor R9, the eighth diode D8 and the tenth resistor R10 set the overvoltage threshold; the first logic chip J1 can be an AND gate chip, which can self-lock the high level in conjunction with the ninth diode D9, the tenth diode D10 and the first power supply VCC1.

[0051] Furthermore, the second output control module 3 includes a fifth diode D5, a fifth capacitor C5, a third resistor R3, a second power tube Q2, a second switch tube V2, a second inductor L2, a sixth capacitor C6 and a second interface; the abnormality detection module 6 includes a second detection device;

[0052] Specifically, the anode of the fifth diode D5 is connected to the first end of the second secondary side of the first transformer B1, the cathode of the fifth diode D5 is connected to the drain of the second power tube Q2 and one end of the fifth capacitor C5, and is connected to the gate of the second power tube Q2 and the collector of the second switch tube V2 through the third resistor R3. The source of the second power tube Q2 is connected to the first end of the second inductor L2, the second end of the second inductor L2 is connected to one end of the sixth capacitor C6, the first end of the second detection device, and the first end of the second interface. The other end of the fifth capacitor C5 is connected to the emitter of the second switch tube V2, the other end of the sixth capacitor C6, the second end of the second interface, the second end of the second detection device, and the second end of the second secondary side of the first transformer B1. The third end of the second detection device is connected to the sampling switching module 7.

[0053] In a specific embodiment, the second power tube Q2 can be an N-channel field-effect tube; the fifth diode D5, the fifth capacitor C5, the second inductor L2 and the sixth capacitor C6 perform rectification and filtering processing; the second switch tube V2 can be an NPN-type transistor; the second interface is used to connect to the power supply end of the graphics card terminal; the circuit composition structure of the second detection device is the same as the circuit composition structure of the ninth resistor R9, the eighth diode D8, the tenth resistor R10, the ninth diode D9, the tenth diode D10, the first logic chip J1 and the first power supply VCC1.

[0054] Furthermore, the third output control module 4 includes a third diode D3, a third capacitor C3, a second resistor R2, a first switch tube V1, a first power tube Q1, a third inductor L3, a fourth capacitor C4 and a third interface; the abnormality detection module 6 includes a third detection device;

[0055] Specifically, the anode of the third diode D3 is connected to the first end of the third secondary side of the first transformer B1, the cathode of the third diode D3 is connected to the drain of the first power tube Q1 and one end of the third capacitor C3, and is connected to the gate of the first power tube Q1 and the collector of the first switching tube V1 through the second resistor R2. The source of the first power tube Q1 is connected to the first end of the third inductor L3, the second end of the third inductor L3 is connected to one end of the fourth capacitor C4, the first end of the third interface, and the first end of the third detection device. The other end of the third capacitor C3 is connected to the emitter of the first switching tube V1, the other end of the fourth capacitor C4, the second end of the third interface, the second end of the third detection device, and the second end of the third secondary side of the first transformer B1. The third end of the third detection device is connected to the sampling switching module 7.

[0056] In a specific embodiment, the first power tube Q1 can be an N-channel field-effect tube; the third diode D3, the third capacitor C3, the third inductor L3 and the fourth capacitor C4 perform rectification and filtering; the first switch tube V1 can be an NPN transistor; the circuit composition structure of the third detection device is the same as the circuit composition structure of the ninth resistor R9, the eighth diode D8, the tenth resistor R10, the ninth diode D9, the tenth diode D10, the first logic chip J1 and the first power supply VCC1.

[0057] Furthermore, the power feedback module 5 includes a seventh diode D7, a ninth capacitor C9, a first optocoupler IC2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first controllable voltage regulator IC3, a tenth capacitor C10 and an eleventh capacitor C11;

[0058] Specifically, the anode of the seventh diode D7 is connected to the first end of the fourth secondary side of the first transformer B1, the cathode of the seventh diode D7 is connected to one end of the ninth capacitor C9 and the third end of the first optocoupler IC2, the fourth end of the first optocoupler IC2 is connected to the C end of the first regulator IC1, the first end of the first optocoupler IC2 is connected to the sampling switching module 7, the second end of the first optocoupler IC2 is connected to the cathode of the first controllable voltage regulator IC3, one end of the eleventh capacitor C11 and the first end of the sixth resistor R6 through the fifth resistor R5, the second end of the sixth resistor R6 is connected to the other end of the eleventh capacitor C11, the control end of the first controllable voltage regulator IC3 and one end of the eighth resistor R8 through the seventh resistor R7, the other end of the eighth resistor R8 is connected to the anode of the first controllable voltage regulator IC3, the second end of the third interface, the second end of the second interface and the second end of the first interface, and is connected to the other end of the ninth capacitor C9, the second end of the fourth secondary side of the first transformer B1 and the second end of the power supply interface through the tenth capacitor C10.

[0059] In a specific embodiment, the first optocoupler IC2 may be a PC817 photoelectric coupler; and the first controllable voltage regulator IC3 may be a TL413.

[0060] Furthermore, the sampling and switching module 7 includes a first analog switch IC4, a second analog switch IC5, a second power supply VCC2, an eleventh resistor R11, a fourth switch tube V4, a second logic chip J2, a third logic chip J3, a first inverter J4, a second inverter J5 and a fifth switch tube V5;

[0061] Specifically, the IN1 and IN2 terminals of the first analog switch IC4 are connected to the first and second terminals of the first inductor L1, respectively. The CTRL1 and CTRL2 terminals of the first analog switch IC4 are both connected to the collector of the fourth switch tube V4 and connected to the second power supply VCC2 through the eleventh resistor R11. The base of the fourth switch tube V4 is connected to the Y terminal of the first logic chip J1, the A terminal of the second logic chip J2, and the A terminal of the third logic chip J3. The B terminal of the first logic chip J1 is connected to the output terminal of the first inverter J4, the B terminal of the second logic chip J2 is connected to the output terminal of the second inverter J5, the input terminal of the first inverter J4 and the input terminal of the second inverter J5 are connected to the third terminal of the second detection device and the third terminal of the third detection device, respectively. The Y end of the logic chip J2 is connected to the base of the fifth switch tube V5, the thirteenth end and the fifth end of the second analog switch IC5, the Y end of the third logic chip J3 is connected to the collector of the fifth switch tube V5, the sixth end and the twelfth end of the second analog switch IC5, the first end and the third end of the second analog switch IC5 are respectively connected to the first end and the second end of the second inductor L2, the first end and the second end of the third analog switch are respectively connected to the first end and the second end of the third inductor L3, the second end and the ninth end of the second analog switch IC5 are both connected to the OUT2 end of the first analog switch IC4 and the second end of the sixth resistor R6, and the fourth end and the eleventh end of the second analog switch IC5 are both connected to the first end of the first optocoupler IC2 and the OUT1 end of the first analog switch IC4.

[0062] In a specific embodiment, the first analog switch IC4 and the second analog switch IC5 can both be CD4066 chips; the fourth switch tube V4 and the fifth switch tube V5 can both be NPN transistors; the first inverter J4 and the second inverter J5 can both be NOT gate chips; the second logic chip J2 and the third logic chip J3 can both be AND gate chips.

[0063] In a multi-graphics card terminal abnormality detection protection circuit of this embodiment, DC power is connected to the power interface, and the C terminal of the first regulator IC1 receives the power transmitted by the fourth terminal of the first optocoupler IC2. The voltage value of the first transformer B1 is adjusted according to the voltage of the power transmitted by the fourth terminal of the first optocoupler IC2, and then the first secondary side, the second secondary side, the third secondary side and the fourth secondary side of the first transformer B1 are isolated and output, and the first power tube Q1, the second power tube Q2 and the third power tube Q3 are all turned on, the sixth diode D6 cooperates with the seventh capacitor C7, the first inductor L1 and the eighth capacitor C8 to perform rectification and filtering, output the second power and transmit it to the graphics card terminal connected to the first interface, and the fifth diode D5 cooperates with the fifth capacitor C5 and the second inductor L2 The third diode D3 cooperates with the third capacitor C3, the third inductor L3 and the fourth capacitor C4 to perform rectification and filtering, outputs the fourth electric energy and transmits it to the graphics card terminal connected to the third interface. Since the second power supply VCC2 and the eleventh resistor R11 control the CTRL1 and CTRL2 terminals of the first analog switch IC4 to become high level, the IN1 terminal and OUT1 terminal of the first analog switch IC4 are turned on, and the IN2 terminal and OUT2 terminal of the first analog switch IC4 are turned on, and the second electric energy is transmitted to the second optocoupler and the sixth resistor R6. Since the sixth resistor R6 cooperates with the seventh resistor R7, the eighth resistor R8, the eleventh capacitor C11 and the tenth resistor R11, the second electric energy is transmitted to the second optocoupler and the sixth resistor R6. Capacitor C10, the first thyristor voltage regulator, the fifth resistor R5 and the first optocoupler IC2 compare the second electric energy with the set voltage threshold, and then provide a feedback signal to the C terminal of the first regulator IC1. The ninth resistor R9, the eighth diode D8 and the tenth resistor R10 perform overvoltage detection on the electric energy input to the first interface. When overvoltage occurs, the first logic chip J1 controls the third switch tube V3 to turn on, controls the third power tube Q3 to turn off, and controls the fourth switch tube V4 to turn on. At this time, if the second detection device does not detect that there is an abnormality in the electric energy of the second interface, the Y terminal of the second logic chip J2 will output a high level, control the fifth switch tube V5 to turn on, control the first terminal and the second terminal of the second analog switch IC5 to turn on, and the third terminal of the second analog switch IC5 to turn on. The eighth and ninth terminals, the tenth and eleventh terminals of the second analog switch IC5 are turned on, so that the sixth resistor R6 and the second optocoupler detect the electric energy of the third interface, and the power regulation module 1 can normally perform voltage regulation and power supply. When the third detection device detects that the electric energy of the third interface is abnormal, it will control the first switch tube V1 and the first power tube Q1 to turn on and stop supplying power to the third interface.

[0064] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

[0065] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A multi-graphics card terminal abnormality detection and protection circuit, characterized by: The multi-graphics card terminal abnormality detection protection circuit includes: a power regulation module, a first output control module, a second output control module, a third output control module, an electric energy feedback module, an abnormality detection module and a sampling switching module; The power supply regulating module is connected to the power feedback module, and is used to receive the DC power and, upon receiving the feedback signal output by the power feedback module, perform multi-channel high-frequency voltage regulation on the DC power and output the first power; The first output control module is connected to the power regulation module and the abnormality detection module, and is used to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide the second electric energy to the connected first graphics card, and stop the electric energy transmission when receiving the first abnormality signal output by the abnormality detection module; The second output control module is connected to the power regulation module and the abnormality detection module, and is used to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide third electric energy to the connected second graphics card, and stop the electric energy transmission when receiving the second abnormality signal output by the abnormality detection module; The third output control module is connected to the power regulation module and the abnormality detection module, and is used to rectify the first electric energy and transmit the rectified electric energy, filter the transmitted electric energy and provide fourth electric energy for the connected third graphics card, and stop the electric energy transmission upon receiving the third abnormality signal output by the abnormality detection module; The sampling switching module is connected to the first output control module, the second output control module, the third output control module, the abnormality detection module and the power feedback module, and is used to transmit the second power to the power feedback module, transmit the third power to the power feedback module when receiving the first abnormality signal output by the abnormality detection module, and transmit the fourth power to the power feedback module when receiving the first abnormality signal and the second abnormality signal output by the abnormality detection module; The electric energy feedback module is used to set a voltage threshold, isolate and divide the received second electric energy, third electric energy or fourth electric energy, and compare it with the voltage threshold, and output a feedback signal when the voltage of the second electric energy, third electric energy or fourth electric energy changes; The abnormality detection module is used to set an overvoltage threshold and self-lock and output a first abnormality signal when the second electric energy is greater than the overvoltage threshold, self-lock and output a second abnormality signal when the third electric energy is greater than the overvoltage threshold, and self-lock and output a third abnormality signal when the fourth electric energy is greater than the overvoltage threshold; The abnormality detection module includes a ninth resistor, an eighth diode, a tenth resistor, a ninth diode, a tenth diode, a first logic chip, and a first power supply; The cathode of the eighth diode is connected to the first end of the first interface through a ninth resistor, the anode of the eighth diode is connected to the anode of the ninth diode and is connected to the second end of the first interface through a tenth resistor, the cathode of the ninth diode is connected to the cathode of the tenth diode and the A end of the first logic chip, the B end of the first logic chip is connected to the first power supply, and the Y end of the first logic chip is connected to the anode of the tenth diode, the base of the third switch tube, and the sampling switching module; The second output control module includes a fifth diode, a fifth capacitor, a third resistor, a second power tube, a second switch tube, a second inductor, a sixth capacitor and a second interface; the abnormality detection module includes a second detection device; The anode of the fifth diode is connected to the first end of the second secondary side of the first transformer, the cathode of the fifth diode is connected to the drain of the second power tube and one end of the fifth capacitor, and is connected to the gate of the second power tube and the collector of the second switching tube through the third resistor. The source of the second power tube is connected to the first end of the second inductor, the second end of the second inductor is connected to one end of the sixth capacitor, the first end of the second detection device, and the first end of the second interface. The other end of the fifth capacitor is connected to the emitter of the second switching tube, the other end of the sixth capacitor, the second end of the second interface, the second end of the second detection device, and the second end of the second secondary side of the first transformer. The third end of the second detection device is connected to the sampling switching module. The third output control module includes a third diode, a third capacitor, a second resistor, a first switch tube, a first power tube, a third inductor, a fourth capacitor and a third interface; the abnormality detection module includes a third detection device; The anode of the third diode is connected to the first end of the third secondary side of the first transformer, the cathode of the third diode is connected to the drain of the first power tube and one end of the third capacitor, and is connected to the gate of the first power tube and the collector of the first switching tube through the second resistor. The source of the first power tube is connected to the first end of the third inductor. The second end of the third inductor is connected to one end of the fourth capacitor, the first end of the third interface, and the first end of the third detection device. The other end of the third capacitor is connected to the emitter of the first switching tube, the other end of the fourth capacitor, the second end of the third interface, the second end of the third detection device, and the second end of the third secondary side of the first transformer. The third end of the third detection device is connected to the sampling switching module. The sampling and switching module includes a first analog switch, a second analog switch, a second power supply, an eleventh resistor, a fourth switch tube, a second logic chip, a third logic chip, a first inverter, a second inverter and a fifth switch tube; The IN1 and IN2 terminals of the first analog switch are connected to the first and second terminals of the first inductor respectively, the CTRL1 and CTRL2 terminals of the first analog switch are connected to the collector of the fourth switch tube and connected to the second power supply through the eleventh resistor, the base of the fourth switch tube is connected to the Y terminal of the first logic chip, the A terminal of the second logic chip and the A terminal of the third logic chip, the B terminal of the first logic chip is connected to the output terminal of the first inverter, the B terminal of the second logic chip is connected to the output terminal of the second inverter, the input terminal of the first inverter and the input terminal of the second inverter are connected to the third terminal of the second detection device and the third terminal of the third detection device respectively, and the second The Y end of the logic chip is connected to the base of the fifth switching tube, the thirteenth end and the fifth end of the second analog switch, the Y end of the third logic chip is connected to the collector of the fifth switching tube, the sixth end and the twelfth end of the second analog switch, the first end and the third end of the second analog switch are respectively connected to the first end and the second end of the second inductor, the first end and the second end of the third analog switch are respectively connected to the first end and the second end of the third inductor, the second end and the ninth end of the second analog switch are both connected to the OUT2 end of the first analog switch and the second end of the sixth resistor, and the fourth end and the eleventh end of the second analog switch are both connected to the first end of the first optocoupler and the OUT1 end of the first analog switch.

2. The multi-graphics card terminal abnormality detection protection circuit according to claim 1, characterized in that: The power regulation module includes a power interface, a first capacitor, a second capacitor, a first resistor, a first regulator, a first diode, a second diode and a first transformer; The first end of the power interface is connected to one end of the first capacitor, the anode of the first diode and the first end of the primary side of the first transformer, the cathode of the first diode is connected to the cathode of the second diode, the anode of the second diode is connected to the second end of the primary side of the first transformer and the D end of the first regulator, the S end of the first regulator is connected to the other end of the first capacitor and the second end of the power interface and is connected to the C end of the first regulator and the power feedback module through the second capacitor and the first resistor in sequence, and the first secondary side, the second secondary side, the third secondary side and the fourth secondary side of the first transformer are respectively connected to the first output control module, the second output control module, the third output control module and the power feedback module.

3. The multi-graphics card terminal abnormality detection protection circuit according to claim 2, characterized in that: The first output control module includes a sixth diode, a seventh capacitor, a fourth resistor, a third power tube, a third switch tube, a first inductor, an eighth capacitor and a first interface; The anode of the sixth diode is connected to the first end of the first secondary side of the first transformer, the cathode of the sixth diode is connected to the drain of the third power tube and one end of the seventh capacitor and is connected to the gate of the third power tube and the collector of the third switching tube through the fourth resistor, the source of the third power tube is connected to the first end of the first inductor, the second end of the first inductor is connected to the first end of the first interface and one end of the eighth capacitor, the emitter of the third switching tube is connected to the other end of the seventh capacitor, the second end of the first interface, the other end of the eighth capacitor and the second end of the first secondary side of the first transformer, and the base of the third switching tube is connected to the abnormality detection module.

4. The multi-graphics card terminal abnormality detection protection circuit according to claim 3, characterized in that: The electric energy feedback module includes a seventh diode, a ninth capacitor, a first optocoupler, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first controllable voltage regulator, a tenth capacitor and an eleventh capacitor; The anode of the seventh diode is connected to the first end of the fourth secondary side of the first transformer, the cathode of the seventh diode is connected to one end of the ninth capacitor and the third end of the first optocoupler, the fourth end of the first optocoupler is connected to the C end of the first regulator, the first end of the first optocoupler is connected to the sampling switching module, the second end of the first optocoupler is connected to the cathode of the first controllable voltage-stabilizing source, one end of the eleventh capacitor and the first end of the sixth resistor through the fifth resistor, the second end of the sixth resistor is connected to the other end of the eleventh capacitor, the control end of the first controllable voltage-stabilizing source and one end of the eighth resistor through the seventh resistor, the other end of the eighth resistor is connected to the anode of the first controllable voltage-stabilizing source, the second end of the third interface, the second end of the second interface and the second end of the first interface, and is connected to the other end of the ninth capacitor, the second end of the fourth secondary side of the first transformer and the second end of the power supply interface through the tenth capacitor.

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