OTS-based multi-valued dynamic storage unit read-write circuit

Abstract

The invention discloses a read-write circuit of a multi-valued dynamic storage unit based on OTS, and relates to the technical field of memory read-write circuits, the read-write circuit comprises a write control module and a read control module both connected with the multi-valued dynamic storage unit based on OTS; the write control module generates write operation voltages with different values according to a reference voltage and a plurality of input signals under the control of a write control signal, and acts on the two ends of a storage unit capacitor, so that the write operation of the multi-valued dynamic storage unit is realized; and the read control module reads the four storage states of the storage unit under the action of the read control signal, and outputs the four storage states in a four-bit coding form. According to the multi-valued dynamic storage unit, writing operation voltages with different values can be generated by adjusting the numerical value of each input signal, the writing operation voltages are used as writing voltages of different states of the multi-valued dynamic storage unit, in addition, different storage states of the storage unit can be read out through the reading control module, and the read-out data are output in a four-bit coding mode.

Description

Technical Field

[0001] The present application relates to the technical field of memory read / write circuits, and in particular to a read / write circuit of a multi-value dynamic storage unit based on an OTS. Background Art

[0002] The dynamic storage cell based on OTS (Ovonic Thresholdswitch, bidirectional threshold switch) is composed of a gate tube and a capacitor connected in series. It is a dual-port device. Compared with traditional DRAM memory, it has the advantages of high storage density and easy three-dimensional integration. It can adjust the operating voltage applied to the two ends of the storage cell to make the two ends of the storage cell show four voltage states, so it can realize two-value four-state multi-value storage, and improve the data storage capacity of a single device without changing the device structure. Compared with traditional storage cells, multi-value dynamic storage cells can store multi-bit information, and the information stored therein needs to be read and written through peripheral circuits. This puts forward the requirement that the peripheral read-write circuit of the multi-value storage cell can realize the reading and writing of each state, while the peripheral read-write circuit for single-value storage cells in the prior art is not suitable for the reading and writing of multi-value dynamic storage circuits. Therefore, how to build a peripheral read-write circuit suitable for multi-value dynamic storage circuits to realize the reading and writing of each state is a problem that needs to be solved urgently. Summary of the invention

[0003] The purpose of the present application is to provide a read / write circuit of a multi-value dynamic storage unit based on OTS, which can realize the read operation and write operation of the multi-value dynamic storage unit.

[0004] To achieve the above objectives, this application provides the following solutions: In the first aspect, the present application provides a read-write circuit of a multi-value dynamic storage unit based on OTS, including: a write control module and a read control module. The write control module and the read control module are both connected to the multi-value dynamic storage unit; the multi-value dynamic storage unit includes: an OTS selection tube and a storage unit capacitor; a write control signal, a reference voltage and a plurality of input signals are connected to the write control module, and the write control module is used to generate a write operation voltage according to the reference voltage and the plurality of input signals under the control of the write control signal, and act on both ends of the storage unit capacitor; a read control signal is connected to the read control module, and the read control module is used to output the working state of the multi-value dynamic storage unit in a four-bit encoding form under the action of the read control signal.

[0005] Optionally, the read control module includes: a first transistor, a first diode group, a second diode group, a third diode group, a fourth diode group, a first voltage comparison unit, a second voltage comparison unit, a third voltage comparison unit and a fourth voltage comparison unit.

[0006] The control terminal of the first transistor is connected to a read control signal; the first terminal of the first transistor is connected to a multi-value dynamic storage unit, and the second terminal of the first transistor is respectively connected to the positive electrode of the first diode group and the negative electrode of the third diode group; the negative electrode of the first diode group is respectively connected to the positive electrode of the second diode group and the voltage input terminal of the second voltage comparison unit; the positive electrode of the third diode group is respectively connected to the negative electrode of the fourth diode group and the voltage input terminal of the fourth voltage comparison unit; the negative electrode of the second diode group is connected to the voltage input terminal of the first voltage comparison unit, and the positive electrode of the fourth diode group is connected to the voltage input terminal of the third voltage comparison unit.

[0007] When the read control signal is at a high level, the read control module starts working, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit are respectively used to compare the voltages at their respective voltage input terminals with their respective preset voltages, and output a high level or a low level. The outputs of the four voltage comparison units are used to characterize the working status of the multi-value dynamic storage unit.

[0008] Optionally, when the multi-value dynamic storage unit is in a low voltage state of forward bias, the first diode group is turned on, the second diode group, the third diode group and the fourth diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 1, 0, 0 respectively.

[0009] When the multi-value dynamic storage unit is in a high voltage state of forward bias, the first diode group and the second diode group are turned on, the third diode group and the fourth diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 1, 1, 0, 0 respectively.

[0010] When the multi-value dynamic storage unit is in a low voltage state of negative bias, the third diode group is turned on, the first diode group, the second diode group and the fourth diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 0, 0, 1 respectively.

[0011] When the multi-value dynamic storage unit is in a high voltage state with negative bias, the third diode group and the fourth diode group are turned on, the first diode group and the second diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 0, 1, 1 respectively.

[0012] Optionally, the write control module includes a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first inverter, a second inverter, a third inverter and an operational amplifier.

[0013] The output end of the operational amplifier is connected to the multi-value dynamic storage unit; the inverting input end of the operational amplifier is respectively connected to the first end of the second transistor, the first end of the fourth transistor and the first end of the sixth transistor; the non-inverting input end of the operational amplifier is respectively connected to the first end of the fourth resistor, the first end of the third transistor, the first end of the fifth transistor and the first end of the seventh transistor.

[0014] After the second end of the sixth transistor is connected to the second end of the seventh transistor, it is connected to the first end of the first resistor; after the second end of the fourth transistor is connected to the second end of the fifth transistor, it is connected to the first end of the second resistor; after the second end of the second transistor is connected to the second end of the third transistor, it is connected to the first end of the third resistor; after the second end of the fourth resistor is connected to the second end of the third resistor, it is connected to the first end of the fifth resistor; after the second end of the second resistor is connected to the second end of the fifth resistor, it is connected to the first end of the sixth resistor; after the second end of the sixth resistor is connected to the second end of the first resistor, it is connected to the reference voltage.

[0015] The control terminal of the second transistor is connected to the first input signal, and the control terminal of the third transistor is connected to the first input signal through the first inverter; the control terminal of the fourth transistor is connected to the second input signal, and the control terminal of the fifth transistor is connected to the second input signal through the second inverter; the control terminal of the sixth transistor is connected to the third input signal, and the control terminal of the seventh transistor is connected to the third input signal through the third inverter.

[0016] The inverting input terminal of the operational amplifier is also connected to the write control signal through the seventh resistor, and the non-inverting input terminal of the operational amplifier is also grounded; the two ends of the eighth resistor are respectively connected to the inverting input terminal of the operational amplifier and the output terminal of the operational amplifier.

[0017] When the write control module is in operation, it is used to generate write operation voltages of different values ​​according to different values ​​of the reference voltage, the first input signal, the second input signal and the third input signal, and act on both ends of the storage unit capacitor.

[0018] Optionally, the resistance value of the first resistor is 2R, the resistance value of the second resistor is 2R, the resistance value of the third resistor is 2R, the resistance value of the fourth resistor is 2R, the resistance value of the fifth resistor is R, the resistance value of the sixth resistor is R, and the resistance value of the eighth resistor is 2R.

[0019] Optionally, the write control signal and the resistance value of the seventh resistor satisfy the relationship shown in the following formula: .

[0020] in, V CONTROL For write control signal, R 7 is the resistance value of the seventh resistor, V ref is the reference voltage value.

[0021] Optionally, the current flowing through the first resistor is , the current flowing through the second resistor is , the current flowing through the third resistor is The first input signal, the second input signal, and the third input signal are used to control the current IR 1. Current IR 2. Current IR 3 can flow into the inverting input of the operational amplifier.

[0022] Optionally, the write control signal and the set current generated by the seventh resistor are: , the output voltage of the operational amplifier is used to make the V O The absolute values ​​of the largest positive value and the smallest negative value are equal.

[0023] Optionally, the voltage at the output of the operational amplifier is as follows: .

[0024] in, V O is the output voltage of the operational amplifier, V ref is the reference voltage value, IN 1 is the first input signal, IN 2 is the second input signal, IN 3 is the third input signal.

[0025] Optionally, eight different output voltages can be generated by adjusting the values ​​of the first input signal, the second input signal and the third input signal. V O , two positive voltages and two negative voltages can be selected as write operation voltages.

[0026] According to the specific embodiments provided in this application, this application discloses the following technical effects: The present application provides a read-write circuit of a multi-value dynamic storage unit based on OTS, including: a write control module and a read control module both connected to the multi-value dynamic storage unit based on OTS; a write control signal, a reference voltage and a plurality of input signals are connected to the write control module, and under the control of the write control signal, write operation voltages of different values ​​are generated according to the reference voltage and the plurality of input signals, and act on both ends of the storage unit capacitor, thereby realizing the write operation of the multi-value dynamic storage unit; a read control signal is connected to the read control module, and under the action of the read control signal, four storage states of the storage unit are read out, and output in the form of four-bit coding. The present application can generate write operation voltages of different values ​​by adjusting the values ​​of each input signal, which are used as write voltages of different states of the multi-value dynamic storage unit. In addition, different storage states of the storage unit can be read out respectively through the read control module, and the read data can be output in the form of four-bit coding. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 A functional module diagram of a read / write circuit of a multi-value dynamic storage unit based on OTS provided in one embodiment of the present application.

[0029] Figure 2 A schematic diagram of the circuit structure of a read / write circuit of a multi-value dynamic storage unit based on OTS provided in one embodiment of the present application.

[0030] Reference numerals: M1-first transistor; M2-second transistor; M3-third transistor; M4-fourth transistor; M5-fifth transistor; M6-sixth transistor; M7-seventh transistor; D1-first diode group; D2-second diode group; D3-third diode group; D4-fourth diode group; C1-storage unit capacitor; OTS-OTS gating tube; Q1-operational amplifier; INV1-first inverter; INV2-second inverter; INV3-third inverter; R1-first resistor; R2-second resistor; R3-third resistor; R4-fourth resistor; R5-fifth resistor; R6-sixth resistor; R7-seventh resistor; R8-eighth resistor; IN 1- first input signal; IN 2- Second input signal; IN 3- the third input signal; V ref - reference voltage;V CONTROL -Write control signal; V Read_control - read control signal; OUT1 - output signal of the first voltage comparison unit; OUT2 - output signal of the second voltage comparison unit; OUT3 - output signal of the third voltage comparison unit; OUT4 - output signal of the fourth voltage comparison unit. DETAILED DESCRIPTION

[0031] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0032] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0033] First, the characteristics of the OTS-based dynamic storage unit are introduced: the OTS-based multi-value dynamic storage unit is composed of an OTS gate tube and a storage unit capacitor connected in series. The OTS gate tube has two states: a high-resistance state and a low-resistance state. When the voltage across the OTS gate tube exceeds the threshold voltage Vth, the OTS gate tube switches from a high-resistance state to a low-resistance state. When the voltage across the OTS gate tube in the low-resistance state is lower than the holding voltage Vhold, the OTS gate tube switches from a low-resistance state to a high-resistance state; when the operating voltage ±Vin1 (the amplitude range of Vin1 is between Vth and Vth+Vhold) is loaded across the OTS-based multi-value dynamic storage unit composed of an OTS gate tube and a storage unit capacitor connected in series, the voltage across the storage unit capacitor is maintained at ±(Vin1-Vhold); when the operating voltage ±Vin2 (the amplitude of Vin2 is greater than Vth+Vhold) is loaded across the OTS-based multi-value dynamic storage unit composed of an OTS gate tube and a storage unit capacitor connected in series, the voltage across the storage unit capacitor is maintained at ±Vhold.

[0034] Based on the characteristics of the above OTS-based multi-value dynamic memory cell, a write circuit is required to generate four different write operation voltages to write to the memory cell, and a read circuit is required to convert the four states of the memory cell into four different codes.

[0035] In an exemplary embodiment, Figure 1As shown, a read / write circuit of a multi-value dynamic storage unit based on OTS is provided, including: a write control module and a read control module. The write control module and the read control module are both connected to the multi-value dynamic storage unit; the multi-value dynamic storage unit includes: an OTS gate tube and a storage unit capacitor C1; the write control signal is connected to the write control module V CONTROL , reference voltage V ref and multiple input signals, the write control module is used to write the control signal V CONTROL Under the control of the reference voltage V ref and multiple input signals to generate a write operation voltage, and act on both ends of the storage unit capacitor C1; the read control signal is connected to the read control module V Read_control , the read control module is used to read the control signal V Read_control Under the action of, the working status of the multi-value dynamic storage unit is output in the form of four-bit code.

[0036] Specifically, Figure 2 As shown in the circuit structure, the read control module in the read-write circuit includes: a first transistor M1, a first diode group D1, a second diode group D2, a third diode group D3, a fourth diode group D4, a first voltage comparison unit, a second voltage comparison unit, a third voltage comparison unit and a fourth voltage comparison unit.

[0037] The control terminal of the first transistor M1 is connected to the read control signal V Read_control ; The first end of the first transistor M1 is connected to the multi-value dynamic storage unit, and the second end of the first transistor M1 is respectively connected to the anode of the first diode group D1 and the cathode of the third diode group; the cathode of the first diode group D1 is respectively connected to the anode of the second diode group D2 and the voltage input end of the second voltage comparison unit; the anode of the third diode group D3 is respectively connected to the cathode of the fourth diode group D4 and the voltage input end of the fourth voltage comparison unit; the cathode of the second diode group is connected to the voltage input end of the first voltage comparison unit, and the anode of the fourth diode group D4 is connected to the voltage input end of the third voltage comparison unit.

[0038] Read control signal V Read_controlWhen it is high level, the read control module starts to work, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit are respectively used to compare the voltage of their respective voltage input terminals with their respective preset voltages, and output high level or low level. The outputs (OUT1, OUT2, OUT3, OUT4) of the four voltage comparison units are used to characterize the working state of the multi-value dynamic storage unit. Specifically, in the first voltage comparison unit and the second voltage comparison unit, when the voltage at the input terminal of the voltage comparison unit is greater than the preset voltage of the voltage comparison unit, a high level is output, which is recorded as 1, otherwise it is recorded as 0; in the third voltage comparison unit and the fourth voltage comparison unit, when the voltage at the input terminal of the voltage comparison unit is less than the preset voltage of the voltage comparison unit, a high level is output, which is recorded as 1, otherwise it is recorded as 0.

[0039] Specifically, when the multi-value dynamic storage unit is in a low voltage state of forward bias, the first diode group D1 is turned on, the second diode group D2, the third diode group D3 and the fourth diode group D4 are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 1, 0, 0 respectively.

[0040] When the multi-value dynamic storage unit is in a high voltage state of forward bias, the first diode group D1 and the second diode group D2 are turned on, the third diode group D3 and the fourth diode group D4 are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 1, 1, 0, 0 respectively.

[0041] When the multi-value dynamic storage unit is in a low voltage state of negative bias, the third diode group D3 is turned on, the first diode group D1, the second diode group D2 and the fourth diode group D4 are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 0, 0, 1 respectively.

[0042] When the multi-value dynamic storage unit is in a high voltage state with negative bias, the third diode group D3 and the fourth diode group D4 are turned on, the first diode group D1 and the second diode group D2 are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 0, 1, 1 respectively.

[0043] Likewise Figure 2As shown in the circuit structure, the write control module in the read-write circuit includes a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first inverter INV1, a second inverter INV2, a third inverter INV3 and an operational amplifier Q1.

[0044] The output end of the operational amplifier Q1 is connected to the multi-value dynamic storage unit; the inverting input end of the operational amplifier Q1 is respectively connected to the first end of the second transistor M2, the first end of the fourth transistor M4 and the first end of the sixth transistor M6; the non-inverting input end of the operational amplifier Q1 is respectively connected to the first end of the fourth resistor R4, the first end of the third transistor M3, the first end of the fifth transistor M5 and the first end of the seventh transistor M7.

[0045] The second end of the sixth transistor M6 is connected to the second end of the seventh transistor M7, and then connected to the first end of the first resistor R1; the second end of the fourth transistor M4 is connected to the second end of the fifth transistor M5, and then connected to the first end of the second resistor R2; the second end of the second transistor M2 is connected to the second end of the third transistor M3, and then connected to the first end of the third resistor R3; the second end of the fourth resistor R4 is connected to the second end of the third resistor R3, and then connected to the first end of the fifth resistor R5; the second end of the second resistor R2 is connected to the second end of the fifth resistor R5, and then connected to the first end of the sixth resistor R6; the second end of the sixth resistor R6 is connected to the second end of the first resistor R1, and then connected to the reference voltage V ref .

[0046] The control terminal of the second transistor M2 is connected to the first input signal IN 1. The control terminal of the third transistor M3 is connected to the first input signal through the first inverter INV1. IN 1; the control terminal of the fourth transistor M4 is connected to the second input signal IN 2. The control terminal of the fifth transistor M5 is connected to the second input signal through the second inverter INV2. IN 2; The control terminal of the sixth transistor M6 is connected to the third input signal IN 3. The control terminal of the seventh transistor M7 is connected to the third input signal through the third inverter INV3. IN 3.

[0047] The inverting input terminal of the operational amplifier Q1 is also connected to the write control signal through the seventh resistor R7. V CONTROLThe non-inverting input terminal of the operational amplifier Q1 is also grounded; the two ends of the eighth resistor R8 are respectively connected to the inverting input terminal of the operational amplifier Q1 and the output terminal of the operational amplifier Q1.

[0048] When the write control module is working, it is used to V ref , the first input signal IN 1. Second input signal IN 2 and 3rd input signal IN 3 different values, generating different values ​​of write operation voltages, which act on both ends of the storage cell capacitor C1.

[0049] Specifically in this embodiment, the resistance of the first resistor R1 is 2R, the resistance of the second resistor R2 is 2R, the resistance of the third resistor R3 is 2R, the resistance of the fourth resistor R4 is 2R, the resistance of the fifth resistor R5 is R, the resistance of the sixth resistor R6 is R, and the resistance of the eighth resistor R8 is 2R. The write control signal V CONTROL The resistance value of the seventh resistor R7 satisfies the following relationship: .

[0050] in, V CONTROL For write control signal, R 7 is the resistance value of the seventh resistor R7, V ref is the reference voltage value.

[0051] according to Figure 2 From the structure of the read-write circuit shown in FIG. 1 , it can be seen that the current flowing through the first resistor R1 is , the current flowing through the second resistor R2 is , the current flowing through the third resistor R3 is , the first input signal IN 1. Second input signal IN 2. The third input signal IN 3 are used to control the current IR 1. Current IR 2. Current IR 3 can flow into the inverting input terminal of the operational amplifier Q1. In addition, the write control signal V CONTROL The set current generated by the seventh resistor R7 is , the output voltage of the operational amplifier Q1 is used to make the setting current V O The absolute values ​​of the maximum positive value and the minimum negative value are equal, that is, the operating voltage applied to the storage cell V OThe same values ​​can be achieved in the forward and reverse directions.

[0052] The voltage at the output of operational amplifier Q1 is as follows: .

[0053] in, V O is the output voltage of operational amplifier Q1, V ref is the reference voltage value, IN 1 is the first input signal, IN 2 is the second input signal, IN 3 is the third input signal; specifically, when the input signal IN 1. IN 2. IN When 3 is high, the corresponding value in the above formula is 1, otherwise it is 0.

[0054] Combined with the characteristics of the multi-value dynamic storage unit based on OTS analyzed before the implementation, by changing the input signal IN 1. IN 2. IN The value of 3 can change the output voltage V O , respectively select the appropriate input signal IN 1. IN 2. IN 3. Make the generated voltage meet the range of operating voltages VIN1 and VIN2: ±Vin1 (the amplitude range of Vin1 is between Vth and Vth+Vhold); ±Vin2 (the amplitude of Vin2 is greater than Vth+Vhold).

[0055] Specifically, by adjusting the first input signal IN 1. Second input signal IN 2 and 3rd input signal IN 3, eight different output voltages can be generated V O , two positive voltages and two negative voltages can be selected as write operation voltages. After the four write operation voltages are applied to the storage unit capacitor C1, the voltage across the storage unit capacitor C1 will have four states, thus realizing the write operation of the multi-value dynamic storage unit.

[0056] In another exemplary embodiment of the present application, the first diode group D1 , the second diode group D2 , the third diode group D3 and the fourth diode group D4 are all composed of crystal diodes with voltage drops.

[0057] As a specific example, for a multi-value dynamic memory cell based on OTS, its threshold voltage Vth is 4.1V and its holding voltage Vhold is 1.2V. Then its four operating voltages should meet the following requirements: ±Vin1 (the amplitude of Vin1 ranges between 4.1V and 5.3V); ±Vin2 (the amplitude of Vin2 is greater than 5.3V).

[0058] The operating voltage is selected as ±5V and ±7V respectively, then the operating voltage satisfies the following expression: .

[0059] In this embodiment, select V ref is -8V, then: When the input signal IN 1. IN 2. IN When 3 is 0, 1, and 1 respectively, the output voltage V O 5V; When the input signal IN 1. IN 2. IN When 3 is 1, 1, and 1 respectively, the output voltage V O 7V; When the input signal IN 1. IN 2. IN When 3 is 1, 0, and 0 respectively, the output voltage V O is -5V; When the input signal IN 1. IN 2. IN When 3 is 0, 0, and 0 respectively, the output voltage V O is -7V.

[0060] That is, you can set the input signal IN 1. IN 2. IN 3 is 011, 111, 100, 000 to achieve the writing of the corresponding status.

[0061] Correspondingly, the voltages of the four storage states of the multi-value dynamic memory cell are: ±3.8V and ±1.2V respectively.

[0062] When the storage unit is at 1.2V, the diode group D1 is turned on, the diode groups D2, D3, and D4 are turned off, and the four voltage comparison units output 0, 1, 0, and 0.

[0063] When the storage unit is at 3.8V, the diode groups D1 and D2 are turned on, the diode groups D3 and D4 are turned off, and the four voltage comparison units output 1, 1, 0, 0.

[0064] When the storage unit is at -1.2V, the diode group D3 is turned on, the diode groups D1, D2, and D4 are turned off, and the four voltage comparison units output 0, 0, 0, and 1.

[0065] When the storage unit is at -3.8V, the diode groups D3 and D4 are turned on, the diode groups D1 and D2 are turned off, and the four voltage comparison units output 0, 0, 1, 1.

[0066] Thus, the reading of the data stored in the four states of the multi-value dynamic storage unit can be realized.

[0067] The above-mentioned embodiment of the present application provides a read-write circuit of a multi-value dynamic storage unit based on OTS. Under the control of a write control signal, the write control module generates write operation voltages of different values ​​according to a reference voltage and multiple input signals, and acts on both ends of the storage unit capacitor, thereby realizing the write operation of the multi-value dynamic storage unit; under the action of the read control signal, the read control module reads out four storage states of the storage unit and outputs them in the form of four-bit encoding; the solution provided in this embodiment can generate write operation voltages of different values ​​by adjusting the numerical values ​​of each input signal, which are used as write voltages for different states of the multi-value dynamic storage unit. In addition, the different storage states of the storage unit can be read out separately through the read control module, and the read data can be output in the form of four-bit encoding.

[0068] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0069] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A read / write circuit of a multi-value dynamic storage unit based on OTS, characterized in that: include: Write control module and read control module; The write control module and the read control module are both connected to the multi-value dynamic storage unit; The multi-value dynamic storage unit includes: an OTS gate tube and a storage unit capacitor; A write control signal, a reference voltage and multiple input signals are connected to the write control module. The write control module is used to generate a write operation voltage according to the reference voltage and multiple input signals under the control of the write control signal, and act on the two ends of the storage unit capacitor; a read control signal is connected to the read control module. The read control module is used to output the working state of the multi-value dynamic storage unit in a four-bit encoding form under the action of the read control signal.

2. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 1, characterized in that: The read control module includes: a first transistor, a first diode group, a second diode group, a third diode group, a fourth diode group, a first voltage comparison unit, a second voltage comparison unit, a third voltage comparison unit and a fourth voltage comparison unit; The control terminal of the first transistor is connected to a read control signal; the first terminal of the first transistor is connected to a multi-value dynamic storage unit, and the second terminal of the first transistor is respectively connected to the positive electrode of the first diode group and the negative electrode of the third diode group; the negative electrode of the first diode group is respectively connected to the positive electrode of the second diode group and the voltage input terminal of the second voltage comparison unit; the positive electrode of the third diode group is respectively connected to the negative electrode of the fourth diode group and the voltage input terminal of the fourth voltage comparison unit; the negative electrode of the second diode group is connected to the voltage input terminal of the first voltage comparison unit, and the positive electrode of the fourth diode group is connected to the voltage input terminal of the third voltage comparison unit; When the read control signal is at a high level, the read control module starts working, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit are respectively used to compare the voltages at their respective voltage input terminals with their respective preset voltages, and output a high level or a low level. The outputs of the four voltage comparison units are used to characterize the working state of the multi-value dynamic storage unit.

3. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 2, characterized in that: When the multi-value dynamic storage unit is in a low voltage state of forward bias, the first diode group is turned on, the second diode group, the third diode group and the fourth diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 1, 0, 0 respectively; When the multi-value dynamic storage unit is in a high voltage state of forward bias, the first diode group and the second diode group are turned on, the third diode group and the fourth diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 1, 1, 0, 0 respectively; When the multi-value dynamic storage unit is in a low voltage state of negative bias, the third diode group is turned on, the first diode group, the second diode group and the fourth diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 0, 0, 1 respectively; When the multi-value dynamic storage unit is in a high voltage state with negative bias, the third diode group and the fourth diode group are turned on, the first diode group and the second diode group are turned off, and the first voltage comparison unit, the second voltage comparison unit, the third voltage comparison unit and the fourth voltage comparison unit output 0, 0, 1, 1 respectively.

4. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 1, characterized in that: The write control module includes a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first inverter, a second inverter, a third inverter and an operational amplifier; The output end of the operational amplifier is connected to the multi-value dynamic storage unit; the inverting input end of the operational amplifier is respectively connected to the first end of the second transistor, the first end of the fourth transistor and the first end of the sixth transistor; the non-inverting input end of the operational amplifier is respectively connected to the first end of the fourth resistor, the first end of the third transistor, the first end of the fifth transistor and the first end of the seventh transistor; After the second end of the sixth transistor is connected to the second end of the seventh transistor, it is connected to the first end of the first resistor; after the second end of the fourth transistor is connected to the second end of the fifth transistor, it is connected to the first end of the second resistor; after the second end of the second transistor is connected to the second end of the third transistor, it is connected to the first end of the third resistor; after the second end of the fourth resistor is connected to the second end of the third resistor, it is connected to the first end of the fifth resistor; after the second end of the second resistor is connected to the second end of the fifth resistor, it is connected to the first end of the sixth resistor; after the second end of the sixth resistor is connected to the second end of the first resistor, it is connected to the reference voltage; The control terminal of the second transistor is connected to the first input signal, and the control terminal of the third transistor is connected to the first input signal through the first inverter; the control terminal of the fourth transistor is connected to the second input signal, and the control terminal of the fifth transistor is connected to the second input signal through the second inverter; the control terminal of the sixth transistor is connected to the third input signal, and the control terminal of the seventh transistor is connected to the third input signal through the third inverter; The inverting input terminal of the operational amplifier is also connected to the write control signal through the seventh resistor, and the non-inverting input terminal of the operational amplifier is also grounded; the two ends of the eighth resistor are respectively connected to the inverting input terminal of the operational amplifier and the output terminal of the operational amplifier; When the write control module is in operation, it is used to generate write operation voltages of different values ​​according to different values ​​of the reference voltage, the first input signal, the second input signal and the third input signal, and act on both ends of the storage unit capacitor.

5. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 4, characterized in that: The resistance value of the first resistor is 2R, the resistance value of the second resistor is 2R, the resistance value of the third resistor is 2R, the resistance value of the fourth resistor is 2R, the resistance value of the fifth resistor is R, the resistance value of the sixth resistor is R, and the resistance value of the eighth resistor is 2R.

6. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 5, characterized in that: The write control signal and the resistance value of the seventh resistor satisfy the relationship shown in the following formula: ； in, V CONTROL For write control signal, R 7 is the resistance value of the seventh resistor, V ref is the reference voltage value.

7. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 6, characterized in that: The current flowing through the first resistor is , the current flowing through the second resistor is , the current flowing through the third resistor is The first input signal, the second input signal, and the third input signal are respectively used to control the current IR 1. Current IR 2. Current IR 3 can flow into the inverting input of the operational amplifier.

8. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 7, characterized in that: The write control signal and the set current generated by the seventh resistor are: , through the set current used to make the output voltage of the operational amplifier V O The absolute values ​​of the largest positive value and the smallest negative value are equal.

9. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 7, characterized in that: The output voltage of the operational amplifier is shown as follows: ； in, V O is the output voltage of the operational amplifier, V ref is the reference voltage value, IN 1 is the first input signal, IN 2 is the second input signal, IN 3 is the third input signal.

10. The read / write circuit of the multi-value dynamic storage unit based on OTS according to claim 9, characterized in that: By adjusting the values ​​of the first input signal, the second input signal and the third input signal, eight different output voltages can be generated. V O , two positive voltages and two negative voltages can be selected as write operation voltages.

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