Miniature light-emitting diode (LED) light-emitting unit, device, and fabrication method

Abstract

This invention relates to the field of micro light-emitting diode (LED) technology, disclosing a micro LED light-emitting unit, device, and method for fabricating the device. It includes: a driving circuit layer, an epitaxial structure, a first transparent conductive layer, a passivation layer, a second transparent conductive layer, an electrode structure, a dielectric material layer, and a metal collimation structure. The epitaxial structure includes a first semiconductor layer, an active layer, and a second semiconductor layer. The first transparent conductive layer is disposed between the driving circuit layer and the epitaxial structure. The passivation layer is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer, and on the upper surface of the driving circuit layer. The second transparent conductive layer covers the outer surface of the epitaxial structure and the passivation layer. The electrode structure is disposed on the second transparent conductive layer. The dielectric material layer is disposed on the epitaxial structure. The metal collimation structure is disposed on the dielectric material layer, forming through-holes and annular grooves. The dielectric material layer of this invention increases the critical angle of emitted light, improving light extraction efficiency; the metal collimation structure reduces the divergence angle and crosstalk, achieving convergence and collimation.

Description

Technical Field

[0001] This invention relates to the field of micro light-emitting diode technology, specifically to a micro light-emitting diode light-emitting unit, device, and method for fabricating the device. Background Technology

[0002] In recent years, with the rapid development of high-tech electronic products such as smartphones, tablets, and wearable devices, the requirements for product resolution and display performance have been increasing. Micro-LEDs, due to their ability to achieve extremely high pixel density and resolution, as well as advantages such as high brightness, high contrast, and fast response time, have become a promising next-generation display and light-emitting device.

[0003] In related technologies, the light extraction efficiency of Micro-LED devices is a major bottleneck restricting their development. The light extraction efficiency of a Micro-LED device can be reflected as its light extraction efficiency, i.e., the number of photons emitted by the Micro-LED device. Within the Micro-LED device, there is photon absorption by the material and photon reflection at the interface due to the material's high reflectivity, resulting in photon losses. Although internal reflection can increase the proportion of photons emitted from the sidewalls, it limits the light extraction efficiency on the front side (the light-emitting side), thus affecting the light extraction efficiency on the light-emitting side of the device. On the other hand, each Micro-LED light-emitting unit can be considered an approximate Lambertian light source, with its light intensity exhibiting a cosine distribution in a certain direction. The emitted beam has a large divergence angle, and the presence of a large amount of ineffective light will disperse the emitted light and significantly reduce beam quality. Furthermore, with the increasing demand for high-resolution, low-power displays, the size of individual light-emitting units (i.e., pixels) and the spacing between pixels in Micro-LED devices will gradually decrease as resolution requirements become more stringent, leading to increased optical crosstalk between pixels. This is especially true when Micro-LED devices are used in small-sized optical equipment, where lateral optical crosstalk becomes more pronounced. Summary of the Invention

[0004] In view of this, the present invention provides a micro light-emitting diode light-emitting unit, device, and method for fabricating the device, in order to solve the problems of low light extraction efficiency, large beam divergence angle, and optical crosstalk in existing Micro-LED devices.

[0005] In a first aspect, the present invention provides a micro light-emitting diode (LED) unit, comprising: a driving circuit layer, an epitaxial structure, a first transparent conductive layer, a passivation layer, a second transparent conductive layer, an electrode structure, a dielectric material layer, and a metal collimation structure; the epitaxial structure is disposed on the driving circuit layer, comprising a first semiconductor layer, an active layer, and a second semiconductor layer disposed sequentially; the first transparent conductive layer is disposed between the driving circuit layer and the epitaxial structure; the passivation layer is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer, and covers the exposed surface of the driving circuit layer near the epitaxial structure; the second transparent conductive layer covers the outer surface of the epitaxial structure and the passivation layer; the electrode structure is disposed on the second transparent conductive layer; the dielectric material layer is disposed on the second transparent conductive layer on the side of the epitaxial structure opposite to the driving circuit layer; the metal collimation structure is disposed on the side of the dielectric material layer opposite to the driving circuit layer, and the metal collimation structure forms a through-hole penetrating the metal collimation structure and a plurality of concentric annular grooves surrounding the through-hole.

[0006] In this invention, the light beam is a surface beam emitted upwards from one side of the metal collimation structure perpendicular to the surface of the driving circuit layer. A voltage is applied to the electrode structure to achieve electrical connection with the driving circuit layer, thereby causing carrier recombination in the epitaxial structure to generate photons. When the photons reach the dielectric material layer, compared to emitting directly from the semiconductor layer of the epitaxial structure, this embodiment passes through the dielectric material layer, significantly increasing the critical angle of the emitted light. This allows photons with larger incident angles to escape. The electrode structure does not obstruct the light-emitting side, enabling more light to escape and improving the extraction of forward light from the light-emitting side. Efficiency; when photons reach the interface between the dielectric material layer and the metal collimation structure, some photons are emitted directly from the through hole, which is equivalent to the light emitted by a point source, resulting in a concentrated beam. The other part of the photons, under the action of surface plasmon resonance, propagates along the interface to the through hole at the center and then is emitted from the through hole. The multiple concentrically spaced annular grooves are equivalent to forming a grating structure. When the photons that reach the annular grooves escape from the annular grooves, the light divergence angle will also decrease, ultimately achieving the effect of reducing lateral optical crosstalk and converging collimation, thus improving the light output quality.

[0007] In one alternative implementation, a plurality of concentric annular grooves surrounding the through-hole are formed on the side of the metal collimation structure opposite to the drive circuit layer.

[0008] In this invention, etching is performed on the side of the metal collimation structure facing outward and away from the epitaxial structure to form a through hole in the center and multiple concentric annular grooves surrounding the through hole. The contact surface between the metal collimation structure and the dielectric material layer is a plane, which facilitates the forming of the metal collimation structure, and the planar interface helps to enhance the stability of surface plasmon resonance.

[0009] In one alternative embodiment, a plurality of concentric annular grooves surrounding the through hole are formed on the side of the metal collimation structure near the drive circuit layer, and on the side of the dielectric material layer away from the drive circuit layer, a cylindrical protrusion and a plurality of concentric annular protrusions surrounding the cylindrical protrusion are formed, the cylindrical protrusion being located within the through hole, and the annular protrusions engaging with the annular grooves.

[0010] In this invention, the through-hole of the metal collimation structure and the multiple concentric annular grooves surrounding the through-hole are formed on the side facing inward and close to the epitaxial structure; the surface of the metal collimation structure away from the driving circuit layer is flat, which is not easily damaged, and the contact surface where the surface plasmon resonance occurs is a number of small contact surfaces with bent contact, which increases the overall contact area, enhances the surface plasmon resonance effect, further constrains the divergence angle, and improves the beam quality.

[0011] In one optional embodiment, the depth of the annular groove accounts for 30% to 80% of the depth of the through hole; the spacing between adjacent annular grooves ranges from 0.4 μm to 0.7 μm, and the ratio of the width of the annular groove to the spacing between adjacent annular grooves ranges from 0.3 to 0.8.

[0012] In this invention, the depth and diameter of the through hole, the depth and diameter of the annular groove, and the duty cycle within the above-mentioned range help to ensure the enhanced effect of surface plasmon resonance, further constrain the divergence angle of the emitted beam, avoid optical crosstalk, and improve beam quality.

[0013] In one optional embodiment, the epitaxial structure is formed into a stepped structure, including a bottom region and a ridge region. The bottom region includes a portion of a second semiconductor layer, and the ridge region includes another portion of a second semiconductor layer, an active layer, and a first semiconductor layer. The projected area of ​​the ridge region on the driving circuit layer is smaller than the projected area of ​​the bottom region on the driving circuit layer.

[0014] In this invention, the epitaxial structure is formed into a stepped structure, and the light beam is emitted from the ridge region with a smaller cross-sectional size, resulting in better light concentration. The bottom region with a larger cross-sectional size is electrically connected to the driving circuit, which helps the charge carriers flow to the active layer for recombination and improves the light extraction efficiency.

[0015] In an optional embodiment, the system further includes: a reflective layer disposed between the first transparent conductive layer and the driving circuit layer, and a bonding layer disposed between the reflective layer and the driving circuit layer.

[0016] In this invention, the reflective layer can reflect emitted photons on the reverse side, increasing the number of photons emitted in the forward direction on the light-emitting side, and the bonding layer is used to achieve a reliable electrical connection between the Micro-LED chip and the driving circuit layer, i.e., the Si-CMOS driving circuit layer.

[0017] In one alternative embodiment, the cross-sectional dimensions of the reflective layer and the bonding layer are equal, and the cross-sectional dimensions of the first transparent conductive layer and the bottom layer of the epitaxial structure are equal; in the direction from the driving circuit layer to the metal collimation structure, among the driving circuit layer, the reflective layer and the bonding layer, the first transparent conductive layer and the bottom layer, and the ridge region, the cross-sectional dimension of the structure relatively closer to the metal collimation structure is smaller than the cross-sectional dimension of the structure relatively farther away from the metal collimation structure.

[0018] In this invention, the sidewall of each micro LED light-emitting unit is formed in a stepped shape according to the structure and fabrication process, with the cross-sectional dimensions decreasing from bottom to top. The driving circuit layer has the largest cross-sectional dimension, followed by the bonding layer and reflective layer. The area smaller than the driving circuit layer is used to set the electrode structure, ensuring that the electrode structure does not block forward light emission. At the same time, the cross-sectional dimensions of the bonding layer and reflective layer are larger than the cross-sectional dimensions of the first transparent conductive layer and the bottom layer of the epitaxial structure, ensuring that the reflective layer can reflect all photons emitted in the reverse direction, effectively increasing the number of photons emitted in the forward direction. In the reverse direction, it also ensures sufficient carrier flow between the first transparent conductive layer and the driving circuit layer, ensuring that electrons and holes in the epitaxial structure can fully recombine in the active layer to generate photons. The cross-sectional dimension of the ridge region is further smaller than the cross-sectional dimension of the first transparent conductive layer, ensuring concentrated light emission on the upper surface light-emitting side. The same cross-sectional dimensions can be formed simultaneously using the same process, ensuring molding accuracy.

[0019] In a second aspect, the present invention also provides a miniature light-emitting diode device, comprising:

[0020] Multiple micro LED light-emitting units are arranged in an array and share a common driving circuit layer.

[0021] In this invention, multiple micro-light-emitting diode (LED) units arranged in an array are disposed on the same driving circuit layer, thereby forming a high pixel density two-dimensional micro-light-emitting diode device. Each pixel can be addressed, controlled, and driven to emit light independently. Each light-emitting unit has high light intensity and small divergence angle. Optical crosstalk between different light-emitting units is reduced, making the overall light emission of the device concentrated and the beam quality good. It can be used in small-sized display devices and has a wide range of applications.

[0022] Thirdly, the present invention also provides a method for fabricating a miniature light-emitting diode device, used to fabricate the aforementioned miniature light-emitting diode device, the fabrication method comprising:

[0023] An epitaxial structure is formed, comprising a first semiconductor layer, an active layer, and a second semiconductor layer sequentially disposed thereon;

[0024] A first transparent conductive layer is formed on one side of the second semiconductor layer of the epitaxial structure;

[0025] An epitaxial structure and a first transparent conductive layer are disposed on the driving circuit layer, with the first transparent conductive layer facing the driving circuit layer.

[0026] A passivation layer is provided on the sidewalls of the epitaxial structure and the first transparent conductive layer, as well as on the surface of the driving circuit layer exposed near the epitaxial structure.

[0027] A second transparent conductive layer is formed on the outer surface of the epitaxial structure and the passivation layer;

[0028] An electrode structure is formed on the second transparent conductive layer;

[0029] A dielectric material layer is formed on the second transparent conductive layer on the side of the epitaxial structure away from the driving circuit layer;

[0030] A metal collimation structure is formed on the side of the dielectric material layer away from the driving circuit layer, forming multiple light-emitting units; the metal collimation structure has through holes penetrating the metal collimation structure, and multiple concentric annular grooves surrounding the through holes.

[0031] In this invention, after fabricating a Micro-LED chip via epitaxy, it is flip-chip fixed onto the driving circuit layer. A voltage is applied to the electrode structure to achieve electrical connection with the driving circuit layer, thereby causing carrier recombination in the epitaxial structure to generate photons. When the photons reach the dielectric material layer, compared to directly emitting light from the semiconductor layer of the epitaxial structure, this embodiment further increases the critical angle of the emitted light by setting a dielectric material layer on the light-emitting side. This allows photons with larger incident angles to escape, and the electrode structure does not block the light-emitting side, enabling more light to be emitted and improving the forward light output on the light-emitting side. Extraction efficiency; when photons reach the interface between the dielectric material layer and the metal collimation structure, some photons are emitted directly from the through hole, which is equivalent to the light emitted by a point source, resulting in a concentrated beam. The other part of the photons, under the action of surface plasmon resonance, propagates along the interface to the through hole at the center and then is emitted from the through hole. The multiple concentrically spaced annular grooves are equivalent to forming a grating structure. When the photons that reach the annular grooves escape from the annular grooves, the light divergence angle will also decrease, ultimately achieving the effect of reducing lateral optical crosstalk and converging collimation, thus improving the light output quality.

[0032] In one alternative embodiment, forming a metal collimation structure on the side of the dielectric material layer opposite to the driving circuit layer includes:

[0033] A metal layer is formed on the side of the dielectric material layer that is away from the driving circuit layer;

[0034] Etching is performed on the side of the metal layer away from the driving circuit layer to form a through-hole penetrating the metal layer and multiple concentric annular grooves surrounding the through-hole, in order to form a metal collimation structure.

[0035] In this invention, etching is performed on the side of the metal layer facing outward and away from the epitaxial structure in the above manner to form a through hole in the center and multiple concentric annular grooves around the through hole; the contact surface between the metal collimation structure and the dielectric material layer is a plane, which facilitates the adhesion and forming of the metal layer, and the planar interface helps to enhance the stability of surface plasmon resonance, thereby improving the light output quality.

[0036] In one alternative embodiment, after forming a dielectric material layer on the second transparent conductive layer on the side of the epitaxial structure away from the driving circuit layer, and before forming a metal collimation structure on the side of the dielectric material layer away from the driving circuit layer, the method further includes: etching the side of the dielectric material layer away from the driving circuit layer to form a columnar protrusion and a plurality of concentric annular protrusions surrounding the columnar protrusion.

[0037] Forming a metal collimation structure on the side of the dielectric material layer away from the driving circuit layer includes: growing a metal layer on the side of the dielectric material layer away from the driving circuit layer; filling the gaps between cylindrical protrusions and annular protrusions and between adjacent annular protrusions on the side of the metal layer near the driving circuit layer to form a through hole penetrating the metal layer and a plurality of concentric annular grooves surrounding the through hole, thereby forming a metal collimation structure, wherein the cylindrical protrusions are located inside the through hole and the annular protrusions are fitted into the annular grooves.

[0038] In this invention, a metal layer is grown on the surface after etching the dielectric material layer. The metal layer fills the gaps between adjacent annular protrusions, ultimately forming a metal collimation structure with an annular groove facing the epitaxial structure. The metal collimation structure is formed by filling with metal material, resulting in good molding quality. Finally, the surface facing away from the driving circuit layer is formed into a plane, reducing the possibility of damage to the metal collimation structure. Furthermore, the contact surface where surface plasmon resonance occurs consists of multiple small contact surfaces with bent contact, increasing the overall contact area and enhancing the surface plasmon resonance effect, further constraining the divergence angle and improving beam quality.

[0039] In one alternative implementation, forming the epitaxial structure includes:

[0040] Provide a substrate layer;

[0041] A buffer layer is formed on one side surface of the substrate layer;

[0042] A first semiconductor layer is formed on the side of the buffer layer facing away from the substrate layer;

[0043] An active layer is formed on the surface of the first semiconductor layer that is away from the substrate layer;

[0044] A second semiconductor layer is formed on the side of the active layer that is away from the substrate layer.

[0045] In this invention, the substrate layer serves as a support structure for the epitaxial fabrication of high-quality gallium nitride epitaxial structures. Subsequently, a buffer layer is set on the substrate layer to effectively improve lattice matching, increase surface flatness, relieve stress, enhance electrical performance, provide a high-quality template, and reduce optical performance degradation. This provides necessary support and guarantee for the growth of high-quality epitaxial structures, significantly improving the overall performance and production yield of Micro-LED devices.

[0046] In an optional embodiment, after the epitaxial structure and the first transparent conductive layer are disposed on the driving circuit layer, and before a passivation layer is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer and on the surface of the driving circuit layer exposed near the epitaxial structure, the method further includes:

[0047] Etching is performed on the side of the epitaxial structure away from the driving circuit layer to form multiple stepped structures. The stepped structures include a bottom region and a ridge region. The bottom region includes a portion of the second semiconductor layer, and the ridge region includes another portion of the second semiconductor layer, the active layer, and the first semiconductor layer. The projected area of ​​the ridge region on the driving circuit layer is smaller than the projected area of ​​the bottom region on the driving circuit layer.

[0048] In this invention, etching is performed on an epitaxial structure in which the first semiconductor layer, the active layer, and the second semiconductor layer are completely correspondingly formed. The etching extends from one side of the first semiconductor layer to a portion of the second semiconductor layer. The first semiconductor layer, the active layer, and a portion of the second semiconductor layer form a ridge region with a smaller cross-sectional size. The light beam is emitted from the ridge region, which is more concentrated and has better light output quality.

[0049] In one optional embodiment, after forming a first transparent conductive layer on one side of the second semiconductor layer of the epitaxial structure, and before disposing the epitaxial structure and the first transparent conductive layer on the driving circuit layer, the method further includes:

[0050] A reflective layer is formed on the surface of the first transparent conductive layer that is away from the second semiconductor layer;

[0051] A bonding layer is formed on the surface of the reflective layer that is away from the second semiconductor layer;

[0052] The flip-chip epitaxial structure consists of a first transparent conductive layer, a reflective layer, and a bonding layer, with the bonding layer facing the drive circuit layer.

[0053] In this invention, the reflective layer can reflect emitted photons on the opposite side of the light-emitting side, increasing the number of photons emitted in the forward direction on the light-emitting side; the bonding layer is used to realize the electrical connection between the Micro-LED chip and the driving circuit layer, i.e., the Si-CMOS driving circuit layer; after flipping the above structure, the bonding layer with excellent conductivity directly contacts the driving circuit layer, which facilitates efficient conduction with the driving circuit layer.

[0054] In one alternative embodiment, after the epitaxial structure and the first transparent conductive layer are disposed on the driving circuit layer, and before etching is performed on the side of the epitaxial structure facing away from the driving circuit layer, the method further includes:

[0055] Remove the substrate and buffer layers of the epitaxial structure to expose the first semiconductor layer.

[0056] In this invention, the sapphire substrate layer can be removed before subsequent etching processes on the epitaxial structure using laser lift-off technology, and the buffer layer can be completely removed by etching, which facilitates subsequent processing on the epitaxial structure.

[0057] In one optional embodiment, a passivation layer is provided on the sidewalls of the epitaxial structure and the first transparent conductive layer, as well as on the exposed surface of the driving circuit layer near the epitaxial structure, including:

[0058] A first passivation sublayer is applied to one side of the ridge region;

[0059] Etching is performed at the edge of the first passivation sublayer to remove a portion of the first passivation sublayer, the second semiconductor layer, and the first transparent conductive layer to expose the reflective layer.

[0060] Etching is performed at the edge of the reflective layer to remove part of the reflective layer and bonding layer, so as to expose the driving circuit layer.

[0061] The second passivation sublayer covers the sidewalls of the first passivation sublayer, the sidewalls of the second semiconductor layer, the sidewalls of the first transparent conductive layer, the exposed surface and sidewalls of the reflective layer, the sidewalls of the bonding layer, and the exposed surface of the driving circuit layer. The first passivation sublayer and the second passivation sublayer constitute a passivation layer.

[0062] In this invention, a passivation layer is formed by step-by-step etching of the stepped main structure and step-by-step deposition. Step-by-step etching allows for different etching methods to be used for different materials, improving etching accuracy and ensuring the performance of the structural layer. Step-by-step deposition allows for the selection of different materials to achieve the purpose of the passivation layer, which helps to save costs, and the passivation layer has high reliability. Attached Figure Description

[0063] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0064] Figure 1 This is a schematic diagram of the structure of a miniature light-emitting diode (LED) unit according to an embodiment of the present invention;

[0065] Figure 2 This is a schematic diagram of another micro LED light-emitting unit according to an embodiment of the present invention;

[0066] Figure 3 This is a schematic flowchart of the method for fabricating a micro LED light-emitting unit according to an embodiment of the present invention;

[0067] Figure 4 This is a schematic diagram of the structure after the epitaxial structure is formed according to an embodiment of the present invention;

[0068] Figure 5 This is a schematic diagram of the structure of forming a first transparent conductive layer on the epitaxial structure according to an embodiment of the present invention;

[0069] Figure 6 This is a schematic diagram of the structure of forming a reflective layer and a bonding layer on the first transparent conductive layer according to an embodiment of the present invention;

[0070] Figure 7 This is a schematic diagram of the structure of the present invention, in which all the epitaxial structures are flipped and disposed after the driving circuit layer;

[0071] Figure 8 This is a schematic diagram of the structure after removing the substrate layer and buffer layer according to an embodiment of the present invention;

[0072] Figure 9 This is a schematic diagram of the structure after etching to form the ridge region according to an embodiment of the present invention;

[0073] Figure 10 This is a schematic diagram of the structure after the first passivation sublayer is provided on the ridge region according to an embodiment of the present invention;

[0074] Figure 11 This is a schematic diagram of the structure after etching at the edge of the first passivation sublayer according to an embodiment of the present invention;

[0075] Figure 12 This is a schematic diagram of the structure after the passivation layer is formed according to an embodiment of the present invention;

[0076] Figure 13 This is a schematic diagram of the structure after the formation of the second transparent conductive layer and electrode structure according to an embodiment of the present invention;

[0077] Figure 14 This is a schematic diagram of the structure of forming a dielectric material layer in the first type of micro light-emitting diode light-emitting unit according to an embodiment of the present invention;

[0078] Figure 15 This is a schematic diagram of the structure after forming a metal collimation structure in the first type of micro light-emitting diode light-emitting unit according to an embodiment of the present invention;

[0079] Figure 16This is a schematic diagram of the structure after etching the dielectric material layer in the second type of micro light-emitting diode light-emitting unit according to an embodiment of the present invention;

[0080] Figure 17 This is a schematic diagram of the structure after forming a metal collimation structure in the second type of micro light-emitting diode light-emitting unit according to an embodiment of the present invention.

[0081] Explanation of reference numerals in the attached figures:

[0082] 1. Driving circuit layer; 2. First semiconductor layer; 3. Active layer; 4. Second semiconductor layer; 5. Ridge region; 6. First transparent conductive layer; 7. Passivation layer; 8. Second transparent conductive layer; 9. Electrode structure; 10. Dielectric material layer; 101. Columnar protrusion; 102. Annular protrusion; 11. Metal collimation structure; 111. Through hole; 112. Annular groove; 12. Reflective layer; 13. Bonding layer; 14. Substrate layer; 15. Buffer layer. Detailed Implementation

[0083] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. It should also be noted that, for ease of description, only the parts relevant to the invention are shown in the drawings, not all structures. In the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concept of the invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the drawings. These figures are not drawn to scale, and some details are enlarged for clarity, and some details may be omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from actual practices due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Additionally, if one layer / component is "above" another layer / component in one orientation, then when the orientation is reversed, that layer / component can be "below" that other layer / component.

[0084] Micro-LED devices consist of a micrometer-scale array of light-emitting units, each equivalent to a pixel. Each pixel can be addressed, controlled, and independently driven to emit light. However, Micro-LED devices in applications suffer from poor light extraction efficiency, light dispersion, and optical crosstalk. Specifically, on one hand, the light extraction efficiency of Micro-LED devices is inherently low, meaning that the number of photons emitted in the forward direction is relatively small. On the other hand, the photons from each Micro-LED light-emitting unit exhibit a large divergence angle when forming a light beam, leading to light dispersion and poor beam quality. Furthermore, with the increasing demand for high-resolution, low-power displays, the size of pixels and the spacing between pixels in Micro-LED devices are decreasing, increasing optical crosstalk between pixels. This is especially pronounced when Micro-LED devices are used in small-sized optical equipment, where lateral optical crosstalk becomes more significant, ultimately resulting in poor light quality.

[0085] Based on this, this embodiment provides a micro light-emitting diode (LED) unit, a micro LED device including multiple micro LED units, and a method for fabricating the same. Each micro LED unit adopts a flip-chip structure and a dielectric material layer 10 on the light-emitting side, which allows more photons to escape from the light-emitting side and improves the forward light extraction efficiency. On the other hand, a metal collimation structure 11 is provided on the dielectric material layer 10 on the light-emitting side. The interface region between the metal collimation structure 11 and the dielectric material layer forms an electromagnetic mode, which improves the light extraction efficiency and reduces optical crosstalk between adjacent sub-pixels. Furthermore, the surface plasmon resonance effect is used to effectively constrain the light divergence angle, perform beam collimation and shaping, and improve the light extraction quality.

[0086] See Figure 1 and Figure 2This embodiment provides a micro LED light-emitting unit comprising: a driving circuit layer 1, an epitaxial structure, a first transparent conductive layer 6, a passivation layer 7, a second transparent conductive layer 8, an electrode structure 9, a dielectric material layer 10, and a metal collimation structure 11; the epitaxial structure is disposed on the driving circuit layer 1, including a first semiconductor layer 2, an active layer 3, and a second semiconductor layer 4 disposed sequentially; the first transparent conductive layer 6 is disposed between the driving circuit layer 1 and the epitaxial structure; the passivation layer 7 is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer 6, and covers the... The surface of the driving circuit layer 1 exposed near the epitaxial structure; the second transparent conductive layer 8 covers the outer surface of the epitaxial structure and the passivation layer 7; the electrode structure 9 is disposed on the second transparent conductive layer 8; the dielectric material layer 10 is disposed on the second transparent conductive layer 8 on the side of the epitaxial structure away from the driving circuit layer 1; the metal collimation structure 11 is disposed on the side of the dielectric material layer 10 away from the driving circuit layer 1, and the metal collimation structure 11 has a through hole 111 penetrating the metal collimation structure 11 and a plurality of concentric annular grooves 112 surrounding the through hole 111.

[0087] Specifically, the driving circuit layer 1 is a Si-CMOS driving circuit layer, meaning a CMOS integrated circuit is fabricated on a silicon wafer to serve as the driving circuit layer 1; the first semiconductor layer 2 of the epitaxial structure is located on the side of the active layer 3 relatively far from the driving circuit layer 1. The first semiconductor layer 2 is a doped N-type gallium nitride (n-GaN) semiconductor layer, providing majority carrier electrons; the active layer 3 is an indium gallium nitride / gallium nitride (InGaN / GaN) quantum well structure. The active layer 3 is the main photon generation region in Micro-LEDs, generating photons and emitting light through the recombination of electrons and holes in the active layer 3; the second semiconductor layer 4 is a doped P-type gallium nitride (p-GaN) semiconductor layer, providing majority carrier holes, and forming a pn junction with the first semiconductor layer 2; the first transparent conductive layer 6 is disposed on the side of the epitaxial structure close to the second semiconductor layer 4 of the driving circuit layer 1, and is made of indium tin oxide (InTi). Oxide (hereinafter referred to as ITO) material provides good transparency and excellent conductivity, enabling Micro-LEDs to function properly. A certain ohmic contact is formed between the first transparent conductive layer 6 and the second semiconductor layer 4, creating conditions for electrical connection and preventing current congestion, thus improving current uniformity. A passivation layer 7 is provided on the sidewalls of the stacked epitaxial structure and the first transparent conductive layer 6, extending to cover the exposed surface of the driving circuit layer 1 near the epitaxial structure. This serves to isolate the electrically connected epitaxial structure, the first transparent conductive layer 6, and the driving circuit layer 1 from the external environment. In this embodiment, the passivation layer 7 is one or more of silicon nitride, aluminum oxide, and silicon oxide. The thickness of the passivation layer 7 is typically several hundred nanometers; in this embodiment, it is set to 260 nm. This protects the device structure and surface, improves optical and electrical characteristics, and provides a foundation and operating conditions for subsequent process steps. The second transparent conductive layer 7 is integrally covered on the outer side of the passivation layer 7 and the upper surface of the epitaxial structure. An electrical layer 8 forms an ohmic contact with the epitaxial structure. An electrode structure 9 is set on the second transparent conductive layer 8 to realize the electrical path through the second transparent conductive layer 8, the epitaxial structure, the first transparent conductive layer 6, and finally the driving circuit layer 1, so that N-type electrons and P-type holes in the epitaxial structure recombine to generate photons. A dielectric material layer 10 is set on the epitaxial structure. In this embodiment, silicon oxide (SiO2) with a positive dielectric constant is used, and the thickness is usually several hundred nanometers. In this embodiment, it is set to about 800 nm to form a surface plasmon resonance effect with the metal collimation structure 11 with a negative dielectric constant. The metal collimation structure 11 is made of silver (Ag) or gold (Au). A through hole 111 is formed at the center of the surface of the metal collimation structure 11 perpendicular to the light emission direction. A concentric annular groove 112 is formed around the through hole 111. The cross-section of the through hole 111 and the annular groove 112 is circular. The metal collimation structure 11 and the dielectric material layer 10 are combined to form a bullseye structure for collimation.

[0088] In this embodiment, the light-emitting unit of the micro LED emits a surface beam perpendicular to the surface of the driving circuit layer 1, emitted upwards from one side of the metal collimation structure 11. A voltage is applied to the electrode structure 9 to establish an electrical connection with the driving circuit layer 1, thereby causing carrier recombination in the epitaxial structure to generate photons. When the photons reach the dielectric material layer 10, compared to emitting directly from the semiconductor layer of the epitaxial structure, this embodiment passes through the dielectric material layer 10, significantly increasing the critical angle of the emitted light. This allows photons with a larger incident angle to escape. The electrode structure 9 does not block the light-emitting side, enabling more light to be emitted and improving the extraction of forward light from the light-emitting side. Efficiency; when photons reach the interface between the dielectric material layer 10 and the metal collimation structure 11, some photons are emitted directly from the through hole 111, which is equivalent to the light emitted by a point light source, and the resulting beam is concentrated and emitted. The other part of the photons propagates along the interface to the through hole 111 at the center under the action of the surface plasmon resonance effect, and then is emitted from the through hole 111. The multiple concentrically spaced annular grooves 112 are equivalent to forming a grating structure. When the photons that reach the annular grooves 112 escape from the annular grooves 112, the light divergence angle will also decrease, ultimately achieving the effect of reducing lateral optical crosstalk and converging collimation, thereby improving the light output quality.

[0089] The aforementioned surface plasmon resonance effect refers to an electromagnetic mode formed by the interaction of free electrons and photons at the metal-dielectric interface. When light waves from the SiO2 dielectric layer are incident on the interface between the metal and SiO2, they undergo collective oscillations with the free electrons on the metal surface, thus coupling to form a near-field electromagnetic wave propagating along the metal surface. If the oscillation frequency of the free electrons matches the frequency of the incident light wave, resonance occurs. In the resonant state, the energy of the electromagnetic field is effectively converted into the collective vibrational energy of the free electrons on the metal surface, thereby forming a special electromagnetic mode. In this mode, the electromagnetic field is confined to a very small area on the metal surface and is enhanced, propagating along the metal surface. This causes photons to propagate along the metal surface to the central through-hole 111 and exit. Furthermore, when photons propagating to the annular groove 112 escape, the divergence angle is also constrained, ultimately reducing the overall divergence angle of the beam and lowering lateral optical crosstalk.

[0090] In one alternative implementation, such as Figure 1 As shown, a plurality of concentric annular grooves 112 surrounding the through hole 111 are formed on the side of the metal collimation structure 11 facing away from the drive circuit layer 1.

[0091] That is, etching is performed on the side of the metal collimation structure 11 facing outward and away from the epitaxial structure to form a through hole 111 in the center and multiple concentric annular grooves 112 surrounding the through hole 111. Figure 1The contact surface between the metal collimation structure 11 and the dielectric material layer 10 is a plane, which facilitates the forming of the metal collimation structure 11, and the planar interface helps to enhance the stability of surface plasmon resonance.

[0092] In another alternative implementation, such as Figure 2 As shown, a plurality of concentric annular grooves 112 surrounding the through hole 111 are formed on the side of the metal collimation structure 11 near the drive circuit layer 1, and on the side of the dielectric material layer 10 away from the drive circuit layer 1, a cylindrical protrusion 101 and a plurality of concentric annular protrusions 102 surrounding the cylindrical protrusion 101 are formed. The cylindrical protrusion 101 is located in the through hole 111, and the annular protrusions 102 are fitted into the annular grooves 112.

[0093] Figure 2 The metal collimation structure 11 shown can be regarded as Figure 1 The metal collimation structure 11 shown is inverted. The through hole 111 of the metal collimation structure 11 and a plurality of concentric annular grooves 112 surrounding the through hole 111 are formed on the side facing inward and close to the epitaxial structure. Correspondingly, in order to ensure the stability of the metal collimation structure 11, a columnar protrusion 101 is formed at the middle position of the side surface of the dielectric material layer 10 used to set the metal collimation structure 11. A plurality of concentric annular protrusions 102 are formed around the columnar protrusion 101. The bottom of the groove of the annular groove 112 is connected to the top surface of the annular protrusion 102. The through hole 111 and the columnar protrusion 101 are set with the same radial dimension to fix the metal collimation structure 11 on the dielectric material layer 10. Under this setting, the side surface of the metal collimation structure 11 facing away from the driving circuit layer 1 is flat and not easily damaged. Moreover, the contact surface where the surface plasmon resonance occurs is a plurality of small contact surfaces with bent contact. The overall contact area is increased, the surface plasmon resonance effect is enhanced, the divergence angle is further constrained, and the beam quality is improved.

[0094] In one embodiment, the depth of the annular groove 112 is 30% to 80% of the depth of the through hole 111; the spacing between adjacent annular grooves 112 is 0.4 μm to 0.7 μm, and the ratio of the width of the annular groove 112 to the spacing between adjacent annular grooves 112 is 0.3 to 0.8.

[0095] Furthermore, in this embodiment, the diameter of the through hole 111 is approximately 0.4 μm. The ratio of the width of the annular groove 112 to the distance between adjacent annular grooves 112 is defined as the duty cycle, which is between 0.3 and 0.8 in this embodiment. Preferably, the depth of the annular groove 112 is 40% to 70% of the depth of the through hole 111. The thickness of the metal collimation structure 11 is set between 25 nm and 40 nm, such as 25 nm, 30 nm, 35 nm, 40 nm, etc. The thickness of the metal collimation structure 11 in the figure is for illustrative purposes only; the specific thickness should refer to the above-mentioned limitations.

[0096] The ratio of the depth of the annular groove 112 to the depth of the through hole 111, which is the etching depth ratio of the annular groove 112 in the metal collimation structure 11, limits the depth and diameter of the through hole 111, the depth and diameter of the annular groove 112, and the duty cycle to the above range, so as to ensure that the surface plasmon resonance effect is enhanced, further constrain the divergence angle of the emitted beam, avoid optical crosstalk, and improve the beam quality.

[0097] In this embodiment, the epitaxial structure is formed into a stepped structure, including a bottom region and a ridge region 5. The bottom region includes a second semiconductor layer 4 of a certain thickness, and the ridge region 5 includes a second semiconductor layer 4 of another thickness, an active layer 3 and a first semiconductor layer 2. The projected area of ​​the ridge region 5 on the driving circuit layer 1 is smaller than the projected area of ​​the bottom region on the driving circuit layer 1.

[0098] The epitaxial structure is etched from the edge of the first semiconductor layer 2, and gradually etched from top to bottom, including the first semiconductor layer 2, the active layer 3 and the second semiconductor layer 4, while retaining a certain thickness of the second semiconductor layer 4 to ensure that the second semiconductor layer 4 is a complete plane to uniformly carry charge carriers.

[0099] In one embodiment, the micro LED light-emitting unit further includes a reflective layer 12 and a bonding layer 13, wherein the reflective layer 12 is disposed between the first transparent conductive layer 6 and the driving circuit layer 1, and the bonding layer 13 is disposed between the reflective layer 12 and the driving circuit layer 1.

[0100] The reflective layer 12 is made of silver (Ag), and the bonding layer 13 is made of titanium (Ti) or gold (Au). The total thickness of the reflective layer 12 and the metal layer is approximately 0.7 μm, with the thickness of the reflective layer 12 being negligible. The reflective layer 12 can reflect emitted photons from the reverse side, increasing the number of photons emitted from the forward side. The bonding layer 13 is used to achieve a reliable electrical connection between the Micro-LED chip and the driving circuit layer 1, i.e., the Si-CMOS driving circuit layer. The Micro-LED chip includes an epitaxial structure and a first transparent conductive layer 6, which are the main structures for carrier flow and collection, realizing electro-optical conversion.

[0101] like Figure 1 As shown, the cross-sectional dimensions of the aforementioned reflective layer 12 and bonding layer 13 are equal, and the cross-sectional dimensions of the first transparent conductive layer 6 and the bottom layer region of the epitaxial structure are equal. In the direction from the driving circuit layer 1 to the metal collimation structure 11, among the driving circuit layer 1, reflective layer 12 and bonding layer 13, first transparent conductive layer 6 and bottom layer region, and ridge region 5, the cross-sectional dimension of the structure relatively closer to the metal collimation structure 11 is smaller than the cross-sectional dimension of the structure relatively farther away from the metal collimation structure 11.

[0102] In this embodiment, the sidewall of each micro LED light-emitting unit is formed in a stepped shape according to the structure and fabrication process. Figure 1 The cross-sectional dimensions decrease from bottom to top. The driving circuit layer 1 has the largest cross-sectional dimension, followed by the bonding layer 13 and the reflective layer 12. The area smaller than the driving circuit layer 1 is used to set the electrode structure 9, ensuring that the electrode structure 9 does not block forward light emission. At the same time, the cross-sectional dimensions of the bonding layer 13 and the reflective layer 12 are larger than the cross-sectional dimensions of the first transparent conductive layer 6 and the bottom layer region, so that the reflective layer 12 can reflect all photons emitted in the reverse direction, effectively increasing the number of photons emitted in the forward direction. In the reverse direction, it can also ensure that there is sufficient carrier flow between the first transparent conductive layer 6 and the driving circuit layer 1, so that electrons and holes in the epitaxial structure can fully recombine in the active layer 3 to generate photons. The cross-sectional dimension of the ridge region 5 is further smaller than the cross-sectional dimension of the first transparent conductive layer 6, ensuring concentrated light emission on the light-emitting side of the upper surface. The same cross-sectional dimensions can be formed simultaneously using the same process, ensuring forming accuracy.

[0103] This embodiment also provides a miniature light-emitting diode device, including: a plurality of miniature light-emitting diode light-emitting units as described above, the plurality of miniature light-emitting diode light-emitting units being arranged in an array and having a common driving circuit layer 1.

[0104] Multiple micro LED light-emitting units arranged in an array are set on the same driving circuit layer 1, which serves as the driving circuit, thereby forming a high pixel density two-dimensional micro LED device. Each pixel can be addressed, controlled, and driven to emit light independently. Each light-emitting unit has high light intensity and a small divergence angle. The optical crosstalk between different light-emitting units is reduced, making the overall light emission of the device concentrated and the beam quality good. It can be used in small-sized display devices and has a wide range of applications.

[0105] like Figures 3 to 17 As shown, this embodiment also provides a method for fabricating a miniature light-emitting diode device, used to fabricate the aforementioned miniature light-emitting diode device. Figure 3 This is a schematic diagram of a process for fabricating a miniature light-emitting diode (LED) device. The fabrication process includes:

[0106] S301, forming an epitaxial structure, the epitaxial structure including a first semiconductor layer 2, an active layer 3 and a second semiconductor layer 4 disposed sequentially.

[0107] refer to Figure 4 For example, the epitaxial structure is formed on the substrate layer 14 via a buffer layer 15, ensuring lattice matching. The substrate layer 14 and the buffer layer 15 will be described below. The first semiconductor layer 2 is an N-type gallium nitride (n-GaN) semiconductor layer formed by doping Si, with a doping concentration of approximately 10. 19 cm -3The active layer 3 has a thickness of approximately 1 μm to provide majority carrier electrons. It employs an indium gallium nitride / gallium nitride (InGaN / GaN) quantum well structure, with InGaN as the quantum well layer material (3 nm thick) and GaN as the barrier layer material (10 nm or 12 nm thick). One quantum well layer and one barrier layer constitute a quantum well structure, with 3-10 quantum wells sandwiched between two barrier layers, forming a barrier-quantum well-barrier structure. The indium (In) content in the active layer 3 is 0.18%, resulting in a peak emission wavelength of approximately 460 nm. The second semiconductor layer 4 is a p-type gallium nitride (p-GaN) semiconductor layer formed by doping with Mg, with a doping concentration of approximately 10%. 19 cm -3 The thickness is approximately 0.15 μm to provide majority carrier holes and to form a pn junction with n-GaN.

[0108] S302, a first transparent conductive layer 6 is formed on one side of the second semiconductor layer 4 of the epitaxial structure.

[0109] refer to Figure 5 The first transparent conductive layer 6 is disposed on one side of the second semiconductor layer 4 of the epitaxial structure. It is made of indium tin oxide (ITO), providing good transparency and excellent conductivity. Furthermore, after forming the first transparent conductive layer 6, this embodiment also performs an annealing treatment to create an ohmic contact between the first transparent conductive layer 6 and the second semiconductor layer 4. This creates conditions for electrical connection and avoids current congestion, improving current uniformity.

[0110] S303, the epitaxial structure and the first transparent conductive layer 6 are disposed on the driving circuit layer 1, with the first transparent conductive layer 6 facing the driving circuit layer 1.

[0111] refer to Figure 6 and Figure 7 The driving circuit layer 1 is a Si-CMOS driving circuit layer, meaning that a CMOS integrated circuit is fabricated on a silicon wafer to serve as the driving circuit layer 1. The epitaxial structure and the first transparent conductive layer 6 are transferred to the driving circuit layer 1 to achieve electrical connection between the epitaxial structure and the driving circuit layer 1. It is understood that the first transparent conductive layer 6 is formed on the upper surface of the epitaxial structure. When the epitaxial structure and the first transparent conductive layer 6 are placed on the driving circuit layer 1, the first transparent conductive layer 6 faces the driving circuit layer 1. At this time, the first transparent conductive layer 6 is on the lower surface of the epitaxial structure; that is, this step involves flip-chip bonding the epitaxial structure and placing it on the driving circuit layer 1.

[0112] S304, a passivation layer 7 is provided on the sidewalls of the epitaxial structure and the first transparent conductive layer 6 and on the surface of the driving circuit layer 1.

[0113] like Figure 12 As shown, a passivation layer 7 is provided on the sidewalls of the stacked epitaxial structure and the first transparent conductive layer 6, and extends to cover the surface of the driving circuit layer 1. That is, it is used to isolate the electrically connected epitaxial structure, the first transparent conductive layer 6 and the driving circuit layer 1 from the external environment. In this embodiment, the passivation layer 7 is one or more of silicon nitride, aluminum oxide and silicon oxide. The thickness of the passivation layer 7 is usually several hundred nanometers, and in this embodiment it is set to 260 nm. It protects the device structure and surface, improves optical and electrical characteristics, and provides a foundation and operating conditions for subsequent process steps.

[0114] S305, a second transparent conductive layer 8 is formed on the outer surface of the epitaxial structure and the passivation layer 7.

[0115] like Figure 13 As shown, the second transparent conductive layer 8 is integrally covered on the outer side of the passivation layer 7 and the upper surface of the epitaxial structure, forming an ohmic contact with the epitaxial structure, thereby realizing an electrical path through the second transparent conductive layer 8, the epitaxial structure, the first transparent conductive layer 6, and up to the driving circuit layer 1.

[0116] S306, an electrode structure 9 is formed on the second transparent conductive layer 8.

[0117] like Figure 13 As shown, an electrode structure 9 is disposed on the second transparent conductive layer 8. In this embodiment, it is disposed on the second transparent conductive layer 8 above the driving circuit layer 1 at the edge. The Si-CMOS driving circuit layer serves as the positive electrode of the power supply and is used to connect to the second semiconductor layer 4 of P-GaN. The electrode structure 9 serves as the negative electrode and reaches the first semiconductor layer 2 of N-GaN through the second transparent conductive layer 8 connected to the sidewall, thus realizing an electrical path. Carrier recombination is achieved by the P-GaN second semiconductor layer 4 with external positive electrode providing holes and the N-GaN first semiconductor layer 2 with external negative electrode providing electrons. Electron-hole pairs undergo radiative recombination in the active layer 3 to generate photons.

[0118] S307, a dielectric material layer 10 is formed on the second transparent conductive layer 8 on the side of the epitaxial structure away from the driving circuit layer 1.

[0119] like Figure 14As shown, a dielectric material layer 10 is disposed on the epitaxial structure. In this embodiment, silicon oxide (SiO2) with a positive dielectric constant is used. The thickness of the dielectric material layer 10 is several hundred nanometers, and in this embodiment, it is set to about 800 nm. On the one hand, the dielectric material layer 10 can increase the critical angle. The critical angle of 23.8° when the first semiconductor layer 2 of the conventional direct epitaxial structure is emitted into the air layer becomes the critical angle of 36.2° when the first semiconductor layer 2 of GaN is emitted into the SiO2 dielectric material layer 10 in this embodiment. That is, the dielectric material layer 10 in this embodiment can allow photons with a larger incident angle to escape. The dielectric material layer 10 also serves as a substrate when the metal collimation structure 11 is subsequently fabricated on the light-emitting side.

[0120] S308, a metal collimation structure 11 is formed on the side of the dielectric material layer 10 away from the driving circuit layer 1, forming multiple light-emitting units; the metal collimation structure 11 has a through hole 111 penetrating the metal collimation structure 11, and multiple concentric annular grooves 112 surrounding the through hole 111.

[0121] The metal collimation structure 11 is made of silver (Ag) or gold (Au). A through hole 111 is formed at the center of the surface of the metal collimation structure 11 perpendicular to the light emission direction. A concentric annular groove 112 is formed around the through hole 111. The cross-section of the through hole 111 and the annular groove 112 is circular. The metal collimation structure 11 and the dielectric material layer 10 are combined to form a bullseye structure for collimation.

[0122] In the fabrication method of the micro-LED device in this embodiment, the light beam is a surface beam emitted upward from one side of the metal collimation structure 11 perpendicular to the surface of the driving circuit layer 1. After the Micro-LED chip is fabricated by epitaxy, it is flip-chip fixed on the driving circuit layer 1. A voltage is applied to the electrode structure 9 to achieve electrical connection with the driving circuit layer 1, thereby causing carrier recombination in the epitaxial structure to generate photons. When the photons reach the dielectric material layer 10, compared to directly emitting from the semiconductor layer of the epitaxial structure to the outside, this embodiment further increases the critical angle of the emitted light by setting the dielectric material layer 10 on the light-emitting side, which allows photons with a larger incident angle to escape. The electrode structure 9 does not block the light-emitting side, making it more... More light can be emitted, improving the forward light extraction efficiency on the light-emitting side. When the photons reach the interface between the dielectric material layer 10 and the metal collimation structure 11, some photons are emitted directly from the through hole 111, which is equivalent to the light emitted by the point source, resulting in a concentrated beam emission. The other part of the photons propagates along the interface to the through hole 111 at the center under the action of the surface plasmon resonance effect, and then is emitted from the through hole 111. The multiple concentrically spaced annular grooves 112 are equivalent to forming a grating structure. When the photons that reach the annular groove 112 escape from the annular groove 112, the light emission divergence angle will also decrease, ultimately achieving the effect of reducing lateral optical crosstalk and converging collimation, thus improving the light emission quality.

[0123] In an optional embodiment, forming a metal collimation structure 11 on the side of the dielectric material layer 10 opposite to the driving circuit layer 1 includes:

[0124] S3081a, a metal layer is formed on the side of the dielectric material layer 10 away from the driving circuit layer 1.

[0125] A metal layer is formed by electroplating, with a thickness between 25nm and 40nm, and 35nm is possible. The material is silver or gold.

[0126] S3082a, such as Figure 15 As shown, etching is performed on the side of the metal layer away from the driving circuit layer 1 to form a through hole 111 penetrating the metal layer and a plurality of concentric annular grooves 112 surrounding the through hole 111. The plurality of annular grooves 112 are arranged sequentially along the radial direction of the through hole 111 to form a metal collimation structure 11.

[0127] For example, the through-hole 111 and the annular groove 112 can be formed by photolithography after setting a mask layer on the metal layer. The method of forming by photolithography with a mask layer is a conventional method and will not be described in detail here. The mask layer can be SiO2 or photoresist, and the mask layer is removed by wet removal after etching.

[0128] By etching the metal layer on the outer side, away from the epitaxial structure, as described above, a through-hole 111 penetrating through the center and multiple concentric annular grooves 112 surrounding the through-hole 111 are formed to create... Figure 15 The metal collimation structure 11 shown has a contact surface with the dielectric material layer 10 that is a plane, which facilitates the adhesion and molding of the metal layer. The planar interface also helps to enhance the stability of surface plasmon resonance, thereby improving the light output quality.

[0129] In one optional embodiment, after forming a dielectric material layer 10 on the second transparent conductive layer 8 on the side of the epitaxial structure opposite to the driving circuit layer 1, and before forming a metal collimation structure 11 on the side of the dielectric material layer 10 opposite to the driving circuit layer 1, the method further includes: Figure 16 As shown, the dielectric material layer 10 is etched on the side opposite to the driving circuit layer 1 to form a cylindrical protrusion 101 and a plurality of concentric annular protrusions 102 surrounding the cylindrical protrusion 101.

[0130] Specifically, similarly, photoresist can be spin-coated or SiO2 can be deposited as a mask layer on the surface of the dielectric material layer 10. The dielectric material layer 10 can be partially removed by photolithography to form a columnar protrusion 101 and multiple concentric annular protrusions 102 surrounding the columnar protrusion 101. Finally, the remaining mask layer can be removed by wet removal.

[0131] Based on the above, forming a metal collimation structure 11 on the side of the dielectric material layer 10 away from the driving circuit layer 1 includes: S3081b, such as Figure 17 As shown, a metal layer is grown on the side of the dielectric material layer 10 away from the driving circuit layer 1. The side of the metal layer near the driving circuit layer 1 fills the gap between the cylindrical protrusions 101 and the annular protrusions 102 and between adjacent annular protrusions 102, forming a through hole 111 penetrating the metal layer and a plurality of concentric annular grooves 112 surrounding the through hole 111 to form a metal collimation structure 11. The cylindrical protrusions 101 are located in the through hole 111, and the annular protrusions 102 are fitted into the annular grooves 112.

[0132] That is, a metal layer is grown on the surface of the dielectric material layer 10 after etching. The metal layer fills the gap between adjacent annular protrusions 102, and finally forms an annular groove 112 facing the epitaxial structure. The metal collimation structure 11 is formed by filling with metal material, which has good forming quality. Finally, the surface on the side away from the driving circuit layer 1 is formed into a plane, which reduces the possibility of damage to the metal collimation structure 11. Moreover, the contact surface where the surface plasmon resonance occurs is multiple small contact surfaces with bent contact, which increases the overall contact area, enhances the surface plasmon resonance effect, further constrains the divergence angle, and improves the beam quality.

[0133] In one embodiment, forming an epitaxial structure includes:

[0134] S3011 provides a substrate layer 14.

[0135] For example, substrate 14 may be selected as a sapphire substrate for the fabrication of high-quality gallium nitride epitaxial layers.

[0136] S3012, a buffer layer 15 is formed on one side surface of the substrate layer 14.

[0137] An unintentionally doped gallium nitride buffer layer 15 (u-GaN) is epitaxially grown on substrate layer 14 using metal-organic chemical vapor deposition (MOCVD). The thickness of buffer layer 15 is approximately 2 μm-3 μm. Buffer layer 15 effectively improves lattice matching, enhances surface flatness, relieves stress, improves electrical performance, provides a high-quality template, and reduces optical performance degradation. It provides necessary support and assurance for the growth of high-quality epitaxial structures, significantly improving the overall performance and production yield of Micro-LED devices.

[0138] S3013, a first semiconductor layer 2 is formed on the side surface of the buffer layer 15 facing away from the substrate layer 14.

[0139] S3014, an active layer 3 is formed on the surface of the first semiconductor layer 2 away from the substrate layer 14.

[0140] S3015, a second semiconductor layer 4 is formed on the surface of the active layer 3 facing away from the substrate layer 14.

[0141] Epitaxial structures formed on the substrate layer and buffer layer, such as Figure 4 As shown, the specific configuration of the first semiconductor layer 2, the active layer 3, and the second semiconductor layer 4 is as described above, and will not be repeated here.

[0142] In one embodiment, after the epitaxial structure and the first transparent conductive layer 6 are disposed on the driving circuit layer 1, and before the passivation layer 7 is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer 6 and on the exposed surface of the driving circuit layer 1 near the epitaxial structure, the method further includes:

[0143] Etching is performed on the side of the epitaxial structure away from the driving circuit layer 1 to form multiple stepped structures. The stepped structures include a bottom region and a ridge region 5. The bottom region includes a portion of the second semiconductor layer 4, and the ridge region 5 includes another portion of the second semiconductor layer 4, the active layer 3, and the first semiconductor layer 2. The projected area of ​​the ridge region 5 on the driving circuit layer 1 is smaller than the projected area of ​​the bottom region on the driving circuit layer 1.

[0144] refer to Figure 9 The epitaxial structure is etched from the edge of the first semiconductor side. From top to bottom, the first semiconductor layer 2, the active layer 3 and the second semiconductor layer 4 are gradually etched using inductively coupled plasma (ICP) technology. A certain thickness of the second semiconductor layer 4 is retained to ensure that the second semiconductor layer 4 is completely planar to uniformly carry charge carriers.

[0145] For ease of illustration, the fabrication method will be explained using a single light-emitting unit as an example after etching the ridge region.

[0146] In one embodiment, after forming a first transparent conductive layer 6 on one side of the second semiconductor layer 4 of the epitaxial structure, and before disposing the epitaxial structure and the first transparent conductive layer 6 on the driving circuit layer 1, the method further includes:

[0147] A reflective layer 12 is formed on the surface of the first transparent conductive layer 6 that is opposite to the second semiconductor layer 4.

[0148] like Figure 6 As shown, the material of the reflective layer 12 is silver (Ag). The reflective layer 12 can reflect the emitted photons on the opposite side of the light-emitting side, thereby increasing the number of photons emitted in the forward direction on the light-emitting side.

[0149] A bonding layer 13 is formed on the surface of the reflective layer 12 that is away from the second semiconductor layer 4.

[0150] like Figure 6 As shown, the bonding layer 13 is made of titanium (Ti) or gold (Au), and the total thickness of the reflective layer 12 and the metal layer is about 0.7 μm. The thickness of the reflective layer 12 is very small and can be ignored. The bonding layer 13 is used to realize the electrical connection between the Micro-LED chip and the driving circuit layer 1, i.e., the Si-CMOS driving circuit layer.

[0151] refer to Figure 7 The flip-chip epitaxial structure consists of a first transparent conductive layer 6, a reflective layer 12, and a bonding layer 13, with the bonding layer 13 facing the driving circuit layer 1.

[0152] After flipping the above structure, the bonding layer 13 with excellent conductivity can directly contact the driving circuit layer 1, which facilitates efficient conduction with the driving circuit layer 1.

[0153] Based on the above scheme, after the epitaxial structure and the first transparent conductive layer 6 are disposed on the driving circuit layer 1, and before the etching process is performed on the side of the epitaxial structure facing away from the driving circuit layer 1, the following method is further included:

[0154] Remove the substrate layer 14 and buffer layer 15 of the epitaxial structure to expose the first semiconductor layer 2.

[0155] like Figure 8 As shown, the substrate layer 14 is removed by laser lift-off (LLO) technology, and the buffer layer 15 is completely removed by etching, which facilitates subsequent processing on the epitaxial structure.

[0156] In one embodiment, the provision of a passivation layer 7 on the sidewalls of the epitaxial structure and the first transparent conductive layer 6, as well as on the surface of the driving circuit layer 1, includes:

[0157] S3041, such as Figure 10 As shown, a first passivation sublayer covers one side of the ridge region 5.

[0158] The first passivation sublayer is made of one or more of silicon nitride, aluminum oxide, and silicon oxide. The first passivation sublayer is formed to be several hundred nanometers thick. In this embodiment, the thickness is 260 nm. It covers the upper surface, sidewalls, and exposed surface of the second semiconductor layer 4 of the ridge region 5, with a focus on protecting the sidewalls of the ridge region 5 to ensure that the ridge region 5 is not damaged.

[0159] S3042, such as Figure 11 As shown, etching is performed at the edge of the first passivation sublayer to remove a portion of the first passivation sublayer, the second semiconductor layer 4, and the first transparent conductive layer 6, so as to expose the reflective layer 12.

[0160] For example, inductively coupled plasma technology is used to etch the first passivation sublayer, the remaining second semiconductor layer 4, and the first transparent conductive layer 6, so that the reflective layer 12 at the edge is exposed.

[0161] S3043, etching is performed at the edge of the reflective layer 12 to remove part of the reflective layer 12 and the bonding layer 13 to expose the driving circuit layer 1.

[0162] Ion beam etching is used to etch the edge of the exposed reflective layer 12 until the driving circuit layer 1 is etched. A portion of the surface of the reflective layer 12 is retained to form a step, providing space for the subsequent deposition of the second passivation sublayer and improving the reliability of the sidewall second passivation sublayer. The physical structure of each light-emitting unit is isolated from the others through the above three etching processes. At the same time, the electrode structure 9 can be placed above the exposed driving circuit layer 1 to avoid blocking the forward light emission.

[0163] S3044, such as Figure 12 As shown, the second passivation sublayer covers the sidewalls of the first passivation sublayer, the sidewalls of the second semiconductor layer 4, the sidewalls of the first transparent conductive layer 6, the exposed surface and sidewalls of the reflective layer 12, the sidewalls of the bonding layer 13, and the exposed surface of the driving circuit layer 1. The first passivation sublayer and the second passivation sublayer constitute the passivation layer 7.

[0164] The second passivation sublayer isolates the bonding layer 13, ensuring electrical insulation between the bonding layer 13 and the outside. The second passivation sublayer has the same thickness and material as the first passivation sublayer, forming a consistent passivation layer 7.

[0165] The passivation layer 7 is formed by step-by-step etching of the stepped main structure and step-by-step deposition. Step-by-step etching can use different etching methods for different materials, which can improve the etching accuracy and ensure the performance of the structural layer. The passivation layer 7 formed by step-by-step deposition can use different materials to achieve the purpose, which helps to save costs. Moreover, the passivation layer 7 has high reliability.

[0166] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0167] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A miniature light-emitting diode (LED) light-emitting unit, characterized in that, include: Drive circuit layer; An epitaxial structure is disposed on the driving circuit layer, comprising a first semiconductor layer, an active layer, and a second semiconductor layer disposed sequentially. A first transparent conductive layer is disposed between the driving circuit layer and the epitaxial structure; A passivation layer is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer, and covers the exposed surface of the driving circuit layer near the epitaxial structure. A second transparent conductive layer covers the outer surface of the epitaxial structure and the passivation layer; An electrode structure is disposed on the second transparent conductive layer; A dielectric material layer is disposed on a second transparent conductive layer on the side of the epitaxial structure opposite to the driving circuit layer; A metal collimation structure is disposed on the side of the dielectric material layer opposite to the driving circuit layer; the metal collimation structure has a through hole penetrating the metal collimation structure and a plurality of concentric annular grooves surrounding the through hole; the metal collimation structure and the dielectric material layer are adapted to form an electromagnetic mode in the interface region to improve light extraction efficiency and reduce optical crosstalk between adjacent sub-pixels.

2. The micro light-emitting diode (LED) unit according to claim 1, characterized in that, Multiple concentric annular grooves surrounding the through hole are formed on the side of the metal collimation structure opposite to the drive circuit layer.

3. The micro light-emitting diode (LED) unit according to claim 1, characterized in that, Multiple concentric annular grooves are formed around the through hole on the side of the metal collimation structure near the driving circuit layer, and the dielectric material layer on the side away from the driving circuit layer has a cylindrical protrusion and multiple concentric annular protrusions surrounding the cylindrical protrusion. The cylindrical protrusion is located in the through hole, and the annular protrusions are engaged with the annular grooves.

4. The micro light-emitting diode (LED) unit according to claim 2 or 3, characterized in that, The depth of the annular groove is 30% to 80% of the depth of the through hole; the spacing between adjacent annular grooves is 0.4 μm to 0.7 μm; and the ratio of the width of the annular groove to the spacing between adjacent annular grooves is 0.3 to 0.

8.

5. The micro light-emitting diode light-emitting unit according to claim 4, characterized in that, The epitaxial structure is formed into a stepped structure, including a bottom region and a ridge region. The bottom region includes a portion of the second semiconductor layer, and the ridge region includes another portion of the second semiconductor layer, the active layer, and the first semiconductor layer. The projected area of ​​the ridge region on the driving circuit layer is smaller than the projected area of ​​the bottom region on the driving circuit layer.

6. The micro light-emitting diode (LED) unit according to claim 5, characterized in that, Also includes: A reflective layer is disposed between the first transparent conductive layer and the driving circuit layer; A bonding layer is disposed between the reflective layer and the driving circuit layer.

7. The micro light-emitting diode (LED) unit according to claim 6, characterized in that, The cross-sectional dimensions of the reflective layer and the bonding layer are equal, and the cross-sectional dimensions of the first transparent conductive layer and the bottom layer of the epitaxial structure are equal; In the direction from the driving circuit layer to the metal collimation structure, among the driving circuit layer, the reflective layer and the bonding layer, the first transparent conductive layer and the bottom layer region, and the ridge region, the cross-sectional dimension of the structure relatively closer to the metal collimation structure is smaller than the cross-sectional dimension of the structure relatively farther away from the metal collimation structure.

8. A miniature light-emitting diode device, characterized in that, include: The micro light-emitting diode (LED) light-emitting unit according to any one of claims 1-7, wherein the plurality of the micro LED light-emitting units are arranged in an array, and the plurality of the micro LED light-emitting units are disposed on the same driving circuit layer.

9. A method for fabricating a miniature light-emitting diode device, used to fabricate the miniature light-emitting diode device of claim 8, characterized in that, The preparation method includes: An epitaxial structure is formed, the epitaxial structure comprising a first semiconductor layer, an active layer, and a second semiconductor layer disposed sequentially; A first transparent conductive layer is formed on one side of the second semiconductor layer of the epitaxial structure; The epitaxial structure and the first transparent conductive layer are disposed on the driving circuit layer, with the first transparent conductive layer facing the driving circuit layer. A passivation layer is provided on the sidewalls of the epitaxial structure and the first transparent conductive layer, as well as on the exposed surface of the driving circuit layer near the epitaxial structure. A second transparent conductive layer is formed on the outer surface of the epitaxial structure and the passivation layer; An electrode structure is formed on the second transparent conductive layer; A dielectric material layer is formed on the second transparent conductive layer on the side of the epitaxial structure opposite to the driving circuit layer; A metal collimation structure is formed on the side of the dielectric material layer away from the driving circuit layer, forming multiple light-emitting units; the metal collimation structure has a through hole penetrating the metal collimation structure, and multiple concentric annular grooves surrounding the through hole.

10. The method for fabricating a micro light-emitting diode device according to claim 9, characterized in that, The step of forming a metal collimation structure on the side of the dielectric material layer opposite to the driving circuit layer includes: A metal layer is formed on the side of the dielectric material layer opposite to the driving circuit layer; Etching is performed on the side of the metal layer away from the driving circuit layer to form a through hole penetrating the metal layer and a plurality of concentric annular grooves surrounding the through hole, thereby forming a metal collimation structure.

11. The method for fabricating a micro light-emitting diode device according to claim 9, characterized in that, After forming a dielectric material layer on the second transparent conductive layer on the side of the epitaxial structure away from the driving circuit layer, and before forming a metal collimation structure on the side of the dielectric material layer away from the driving circuit layer, the method further includes: etching the side of the dielectric material layer away from the driving circuit layer to form a columnar protrusion and a plurality of concentric annular protrusions surrounding the columnar protrusion. The step of forming a metal collimation structure on the side of the dielectric material layer away from the driving circuit layer includes: growing a metal layer on the side of the dielectric material layer away from the driving circuit layer; filling the gaps between the cylindrical protrusions and the annular protrusions and between adjacent annular protrusions on the side of the metal layer near the driving circuit layer to form a through hole penetrating the metal layer and a plurality of concentric annular grooves surrounding the through hole to form a metal collimation structure; the cylindrical protrusions are located in the through hole, and the annular protrusions are engaged with the annular grooves.

12. The method for fabricating a micro light-emitting diode device according to claim 9, characterized in that, The formation of the epitaxial structure includes: Provide a substrate layer; A buffer layer is formed on one side surface of the substrate layer; A first semiconductor layer is formed on the side of the buffer layer opposite to the substrate layer; An active layer is formed on the surface of the first semiconductor layer that is away from the substrate layer; A second semiconductor layer is formed on the surface of the active layer that is away from the substrate layer.

13. The method for fabricating a micro light-emitting diode device according to claim 12, characterized in that, After the epitaxial structure and the first transparent conductive layer are disposed on the driving circuit layer, and before a passivation layer is disposed on the sidewalls of the epitaxial structure and the first transparent conductive layer and on the exposed surface of the driving circuit layer near the epitaxial structure, the method further includes: An etching process is performed on the side of the epitaxial structure away from the driving circuit layer to form a plurality of stepped structures. The stepped structures include a bottom region and a ridge region. The bottom region includes a portion of the second semiconductor layer. The ridge region includes another portion of the second semiconductor layer, the active layer, and the first semiconductor layer. The projected area of ​​the ridge region on the driving circuit layer is smaller than the projected area of ​​the bottom region on the driving circuit layer.

14. The method for fabricating a micro light-emitting diode device according to claim 13, characterized in that, After forming a first transparent conductive layer on one side of the second semiconductor layer of the epitaxial structure, and before disposing the epitaxial structure and the first transparent conductive layer on the driving circuit layer, the method further includes: A reflective layer is formed on the surface of the first transparent conductive layer that is opposite to the second semiconductor layer; A bonding layer is formed on the surface of the reflective layer opposite to the second semiconductor layer; The epitaxial structure, the first transparent conductive layer, the reflective layer, and the bonding layer are flipped so that the bonding layer faces the driving circuit layer.

15. The method for fabricating a micro light-emitting diode device according to claim 14, characterized in that, After the epitaxial structure and the first transparent conductive layer are disposed on the driving circuit layer, and before the side of the epitaxial structure facing away from the driving circuit layer is etched, the method further includes: Remove the substrate layer and the buffer layer of the epitaxial structure to expose the first semiconductor layer.

16. The method for fabricating a micro light-emitting diode device according to claim 15, characterized in that, The provision of a passivation layer on the sidewalls of the epitaxial structure and the first transparent conductive layer, and on the exposed surface of the driving circuit layer near the epitaxial structure, includes: A first passivation sublayer is applied to one side of the ridge region; Etching is performed at the edge of the first passivation sub-layer to remove a portion of the first passivation sub-layer, the second semiconductor layer, and the first transparent conductive layer to expose the reflective layer; Etching is performed at the edge of the reflective layer to remove a portion of the reflective layer and the bonding layer, thereby exposing the driving circuit layer; A second passivation sublayer is covered on the sidewalls of the first passivation sublayer, the sidewalls of the second semiconductor layer, the sidewalls of the first transparent conductive layer, the exposed surface and sidewalls of the reflective layer, the sidewalls of the bonding layer, and the exposed surface of the driving circuit layer. The first passivation sublayer and the second passivation sublayer constitute a passivation layer.

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