Signal adjusting circuit, signal adjusting method, signal processing circuit and transmitting equipment

Abstract

The embodiment of the invention provides a signal adjusting circuit, a signal adjusting method, a signal processing circuit and transmitting equipment, and is applied to the technical field of wireless communication transmission. The signal adjustment circuit is provided with a predistorter having a non-linear characteristic that is inverse to the non-linear characteristic of the power amplifier. The power amplifier is divided into a plurality of signal power intervals, and the current working signal power interval of the power amplifier and the distortion degree of nonlinear distortion of the power amplifier are detected in real time, so that the nonlinear characteristic of the predistorter is correspondingly adjusted. The nonlinear characteristic of the power amplifier is compensated through the adjusted nonlinear characteristic of the predistorter, so that the signal power of the transmitting signal and the signal power of the first signal are in a linear relation. According to the embodiment of the invention, through the mode, the difficulty of adjusting the non-linear characteristic of the predistorter is reduced, and the compensation of the non-linear characteristic of the power amplifier is quicker and more accurate.

Description

Signal adjustment circuit, signal adjustment method, signal processing circuit and transmitting equipment Technical Field

[0001] The present application relates to the technical field of wireless signal transmission, and in particular to a signal adjustment circuit, a signal adjustment method, a signal processing circuit and a transmitting device. Background Art

[0002] In the field of wireless signal transmission, data is exchanged between transmitters and receivers. The transmitter modulates the data onto a transmit signal and then sends the data-carrying transmit signal to the receiver, enabling data transmission and communication. To ensure signal quality and distance, a power amplifier is often used to increase the transmit signal's power before transmission. However, increasing modulation complexity leads to an increase in the peak-to-average power ratio (PAPR) of the transmitted signal. A higher PAPR makes it more likely that the power amplifier enters its nonlinear operating range, resulting in nonlinear distortion in the generated transmit signal due to the nonlinear characteristics of the power amplifier.

[0003] One improved approach is to install a pre-distortion (PD) in the front stage of the power amplifier. The pre-distorter has nonlinear characteristics that are opposite to those of the power amplifier. The pre-distorter pre-distorts the signal to be power amplified to obtain a transmission signal with the nonlinear characteristics of the pre-distorter. The pre-distorted transmission signal is then input into the power amplifier for power amplification, and the nonlinear characteristics of the power amplifier are compensated by the nonlinear characteristics of the pre-distorter. However, this approach requires real-time detection of the nonlinear characteristics of the transmission signal output by the power amplifier and corresponding adjustments to the nonlinear characteristics of the pre-distorter. This can easily reduce processing accuracy due to untimely adjustments, thereby reducing the signal quality of the transmission signal. At the same time, when the nonlinear characteristics of the power amplifier and pre-distorter used vary more complexly, the signal quality of the transmission signal may also be reduced.

[0004] Summary of the Invention

[0005] The embodiments of the present application provide a signal adjustment circuit, a signal adjustment method, a signal processing circuit, and a transmitting device, which improve the signal quality of a transmitted signal after power amplification by a power amplifier.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, an embodiment of the present application provides a signal adjustment circuit, which is coupled to a power amplifier; the signal adjustment circuit includes a controller, an error detector and a pre-distorter; wherein the pre-distorter is used to input a first signal and generate a second signal with a first distortion coefficient; the power amplifier is used to amplify the second signal to obtain a transmission signal; the error detector is used to generate an error feedback signal based on the transmission signal and the first signal; the error feedback signal corresponds to a signal power interval among multiple signal power intervals, and the error feedback signal is used to instruct the power amplifier to generate nonlinear distortion in the signal power interval; the controller is used to: adjust the first distortion coefficient according to the error feedback signal; the first distortion coefficient is used to indicate the ratio of the signal power of the second signal to the signal power of the first signal, and the first distortion coefficient is in a nonlinear relationship with the signal power of the first signal, so that the ratio of the signal power of the transmission signal to the signal power of the first signal is in a linear relationship.

[0008] In an embodiment of the present application, by dividing the signal power into multiple intervals, an error feedback signal is obtained based on the transmitted signal and the first signal, and the error feedback signal is used to indicate the signal power interval in which the power amplifier is currently operating and the degree of nonlinear distortion generated by the power amplifier. The controller can adjust the predistorter based on the error feedback signal, and through the adjustment, the signal power of the transmitted signal and the signal power of the first signal are linearly related within the currently operating signal power interval. The signal adjustment circuit proposed in the embodiment of the present application can quickly adjust the distortion coefficient of the predistorter, and the adjusted accuracy is higher. In particular, in scenarios where the nonlinear characteristics of the power amplifier and the predistorter vary more complexly, the distortion coefficient can be adjusted quickly, easily, and accurately.

[0009] In one possible embodiment, the error detector includes an encoding circuit and a voltage processing circuit. The voltage processing circuit includes a plurality of first switches and a plurality of feedback output terminals; the plurality of first switches correspond one-to-one to the plurality of feedback output terminals; the plurality of feedback output terminals of the voltage processing circuit are coupled to a controller; wherein the encoding circuit is configured to output an interval control signal to the voltage processing circuit, the value of the interval control signal being configured to indicate a signal power interval in which the signal power of the first signal is located or a signal power interval in which the signal power of the transmitted signal is located, and the interval control signal is configured to turn on one of the plurality of first switches according to the value of the interval control signal; the voltage processing circuit is configured to generate an error feedback signal based on the transmitted signal and the first signal, and output the error feedback signal to the controller through a feedback output terminal among the plurality of feedback output terminals that corresponds to the turned-on first switch.

[0010] In an embodiment of the present application, the coding circuit determines the signal power interval in which the power amplifier is currently working, and the specific determination method is: detecting the signal power interval in which the signal power of the first signal is located, and determining the signal power interval in which the power amplifier is currently working based on the signal power interval of the first signal; or detecting the signal power interval in which the signal power of the transmitted signal is located, and determining the signal power interval in which the power amplifier is currently working based on the signal power interval of the transmitted signal. The signal power of the input first signal is determined, and the transmitted signal is a signal amplified by the power amplifier, and its signal power will be affected by the nonlinear characteristics of the power amplifier. In actual applications, the signal power interval is divided by the signal power of the first signal, and the obtained signal power interval is a determined signal power interval. However, the signal power interval obtained by dividing the signal power interval using the signal power of the transmitted signal is more related to the nonlinear characteristics of the power amplifier. Therefore, according to different actual application requirements, the first signal or the transmitted signal is selected to divide the signal power interval, and the corresponding signal power is obtained to determine the signal power interval of the current operation.

[0011] In one possible embodiment, the encoding circuit includes a peak detector and an analog-to-digital conversion amplitude encoder; wherein the peak detector is used to input a first signal or a transmitted signal to obtain a first power signal; the analog-to-digital conversion amplitude encoder is used to generate an interval control signal based on the signal amplitude value of the first power signal; the signal amplitude value of the first power signal is used to indicate the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmitted signal is located.

[0012] In an embodiment of the present application, a peak detector inputs a first signal or a transmission signal to obtain a first power signal; the information indicated by the first power signal is the signal power of the first signal, or the signal power of the transmission signal. The first power signal is then input into an analog-to-digital conversion amplitude encoder, which converts the first power signal in the form of an analog signal into an interval control signal in the form of a digital signal, wherein the value of the interval control signal is used to control the conduction of one of the multiple first switches. The value of the interval control signal corresponds to different signal power intervals, thereby controlling the conduction of the first switches corresponding to different signal power intervals.

[0013] In one possible embodiment, the voltage processing circuit also includes a differential voltage circuit and multiple integration circuits; the output end of the differential voltage circuit is coupled to the multiple integration circuits in a one-to-one correspondence through multiple first switches; the output end of an integration circuit serves as a feedback output end of the voltage processing circuit; wherein the differential voltage circuit is used to obtain a first voltage signal based on the transmission signal and the first signal, and output the first voltage signal to the corresponding integration circuit through the conductive first switch; the first voltage signal is used to indicate the voltage difference between the transmission signal and the first signal; the integration circuit is used to generate an error feedback signal based on the first voltage signal, and output the error feedback signal to the controller.

[0014] In an embodiment of the present application, a differential voltage circuit generates a first voltage signal indicating the voltage difference between a first signal and a transmitted signal. A first switch is then used to correspond to different signal power intervals, and an encoding circuit generates an interval control signal. The interval control signal controls the conduction of the first switch corresponding to the currently operating signal power interval, thereby outputting the first voltage signal to a corresponding integration circuit. The integration circuit performs a time integration process on the first voltage signal to generate an error feedback signal, which is then output to a controller. The controller determines the currently operating signal power interval based on the specific integration circuit that outputs the error feedback signal and adjusts the first distortion coefficient of the analog predistorter based on the feedback value of the error feedback signal.

[0015] In one possible implementation, the differential voltage circuit includes a differential operational amplifier and an envelope detector; the first input terminal of the differential operational amplifier serves as the first input terminal of the differential voltage circuit, and the first input terminal of the differential operational amplifier is used to input a transmission signal; the second input terminal of the differential operational amplifier serves as the second input terminal of the differential voltage circuit, and the second input terminal of the differential operational amplifier is used to input a first signal; the output terminal of the differential operational amplifier is coupled to the input terminal of the envelope detector; the output terminal of the envelope detector serves as the output terminal of the differential voltage circuit, and the output terminal of the envelope detector is used to output the first voltage signal.

[0016] In the embodiment of the present application, a differential operational amplifier receives a first signal and a transmit signal as inputs, performs a differential operation on the first signal and the transmit signal, obtains a voltage difference between the first signal and the transmit signal, and outputs the obtained voltage signal to an envelope detector. The envelope detector processes the voltage signal to obtain a first voltage signal. The output terminal of the envelope detector then outputs the first voltage signal to a corresponding integrator circuit via a conductive first switch.

[0017] In one possible embodiment, an integration circuit includes an integrator, a zeroing circuit and a voltage holding circuit; the integrator is coupled to the zeroing circuit and the voltage holding circuit respectively; wherein the integrator is used to perform time integration on an input first voltage signal to generate an error feedback signal; the voltage holding circuit is used to input a first control signal and an error feedback signal; the first control signal is used to control the voltage holding circuit to output the error feedback signal to a controller; the zeroing circuit is used to input a second control signal; and the second control signal is used to control the zeroing circuit to clear the error feedback signal generated by the integrator.

[0018] In an embodiment of the present application, the first voltage signal is an analog signal that persists for a period of time. An integrator in an integration circuit performs a time-integrated process on the input first voltage signal to generate an error feedback signal. The voltage value of the error feedback signal can be used to indicate the voltage difference between the transmitted signal and the first signal. The signal processing circuit employs a timing control method to periodically receive the first voltage signal and generate the error feedback signal. Under this periodic control, a zeroing circuit is provided that periodically controls the zeroing circuit to clear the error feedback signal generated by the integrator via a second control signal. After the error feedback signal is cleared, the integrator receives the first voltage signal and generates a new error feedback signal. The voltage holding circuit then holds the voltage value of the generated new error feedback signal. After a predetermined time has elapsed, the voltage holding circuit is controlled by the input first control signal to output the generated new error feedback signal to the controller, thereby completing the generation of the error feedback signal within one cycle. In the next cycle, the zeroing circuit clears the error feedback signal generated in the previous cycle and generates a new error feedback signal.

[0019] In a possible implementation, the controller generates the first control signal and the second control signal, or generates the first control signal and the second control signal periodically according to a fixed timing sequence through a device such as a counter or a clock control circuit.

[0020] In an embodiment of the present application, a controller can determine the duration of each cycle and output the first and second control signals to the error detector. Alternatively, a device such as a counter can provide the first and second control signals. The implementation method in which the first and second control signals are generated by the controller can be more flexible and can be adapted to the application scenario, but this increases the difficulty and complexity of the implementation. The implementation method in which the first and second control signals are generated by a device such as a counter is simple to implement and has a more stable control cycle.

[0021] In one possible embodiment, an integrator includes a first resistor and a first capacitor. The voltage holding circuit includes a first switching tube. The zeroing circuit includes a second switching tube. The first end of the first resistor is coupled to the corresponding first switch for inputting a first voltage signal, and the second end of the first resistor is coupled to the first end of the first switching tube. The second end of the first switching tube is coupled to a controller. The first end of the first capacitor is coupled to the coupling point between the second end of the first resistor and the first end of the first switching tube, and the second end of the second capacitor is coupled to the first end of the second switching tube. The second end of the second switching tube is grounded. The controlled end of the first switching tube is used to input a first control signal, and the first and second ends of the first switching tube are connected under the control of the first control signal. The controlled end of the second switching tube is used to input a second control signal, and the first and second ends of the second switch are connected under the control of the second control signal.

[0022] In an embodiment of the present application, a first resistor and a first capacitor constitute a resistor-capacitor (RC) integration circuit. When the first resistor inputs a first voltage signal, the first voltage signal charges the first capacitor. By charging the first capacitor, the voltage value between the second end of the first resistor and the first end of the first switch tube continuously increases. The voltage value is used to indicate the time constant of the RC integration circuit, that is, the result value of the first voltage signal after the integrator performs time integration processing. The specific control method is: within one cycle, first, the first control signal controls the first switch tube to turn off, and the second control signal controls the second open tube to turn on, so as to control the second switch tube in the zeroing circuit to release the charge stored on the first capacitor by grounding, so as to achieve zeroing of the generated error feedback signal. Then, the first control signal controls the first switch tube to turn off, and the second control signal controls the second switch tube to turn off. At this time, the first voltage signal is input by the first resistor, and the first capacitor is charged by the first voltage signal to achieve time integration processing of the first voltage signal. Finally, the first control signal controls the first switch tube to turn on, and the second control signal controls the second switch tube to turn off, and the voltage value at the first end of the first switch tube is output to the controller as the error feedback signal. The controller can determine the current working signal power range according to the first switch tube that outputs the error feedback signal, and can also obtain the amplitude of the nonlinear clock of the power amplifier according to the value of the error feedback signal, and adaptively adjust the first clock coefficient.

[0023] In a possible implementation, the integrator further includes a second resistor. The second end of the first capacitor is coupled to the second switch tube via the second resistor.

[0024] In the embodiment of the present application, the second resistor is provided to dissipate a certain amount of the first voltage signal through the load of the second resistor. This prevents the first capacitor from reaching saturation and becoming unable to charge when the first voltage signal is excessively high, thereby causing the voltage value at the first end of the first switching transistor to not accurately serve as the value of the error feedback signal. Furthermore, due to the load dissipation provided by the second resistor, the zeroing circuit can clear the generated error feedback signal more quickly, thus preventing the error feedback signal from being not cleared in time in the previous cycle and affecting the generation of a new error feedback signal in the subsequent cycle.

[0025] In a possible implementation, the voltage holding circuit further includes a second capacitor. The second end of the first switch tube is coupled to the controller via the second capacitor.

[0026] In the embodiment of the present application, a second capacitor is provided to store the error feedback signal output to the controller. When the first control signal changes from a high level to a low level, the error feedback signal continues to be output to the controller via the second capacitor, thereby extending the time the controller receives the error feedback signal.

[0027] In one possible implementation, the signal adjustment circuit further includes a synchronization circuit; the synchronization circuit is configured to perform delay synchronization processing and amplitude alignment processing on the transmission signal and the first signal, and then output the processed transmission signal and the processed first signal to the voltage processing circuit.

[0028] In an embodiment of the present application, a time-delay synchronization process is performed on the first signal and the transmitted signal, so that the first signal input to the voltage processing circuit and the transmitted signal are synchronized in time. Amplitude alignment is performed to ensure that the first signal and the transmitted signal have the same amplitude. The voltage processing circuit then generates a first voltage signal based on the processed first signal and the transmitted signal. This first voltage signal more accurately reflects the voltage difference between the first signal and the transmitted signal.

[0029] In a possible implementation, the signal adjustment circuit further includes a gain controller, wherein the gain controller is configured to input a transmission signal, perform gain attenuation on the input transmission signal, and output the signal to the error detector.

[0030] In the embodiment of the present application, the transmit signal is a signal amplified by a power amplifier, and its signal power is greater than the signal power of the first signal. The gain controller performs gain attenuation on the signal power of the transmit signal so that the signal power of the transmit signal input to the error detector is close to or equal to the signal power of the first signal input to the error detector, thereby enabling the first voltage signal obtained by the voltage processing circuit to accurately reflect the voltage difference between the first signal and the transmit signal.

[0031] In one possible implementation, the signal conditioning circuit further includes a channel linearizer; the channel linearizer is configured to input the first signal and output the first signal to the analog predistorter; the channel linearizer includes a high-pass filter and a low-pass filter connected in series. A controller is also coupled to the channel linearizer. The controller is further configured to adjust the bandwidth of the high-pass filter and the low-pass filter.

[0032] In this embodiment of the present application, the power amplifier may also generate in-band distortion due to inconsistent in-band gain of the power amplifier. A channel linearizer is provided before the analog predistorter. The high-pass filter and low-pass filter connected in series in the channel linearizer limit the first signal input to the analog predistorter, thereby avoiding the problem of in-band distortion in the generated transmit signal caused by inconsistent in-band gain of the power amplifier.

[0033] In one possible implementation, the signal adjustment circuit further includes a nonlinear detector configured to obtain a cross-modulation component of the transmitted signal. The controller is further configured to: within a cycle, if the cross-modulation component of the current cycle is greater than the first component value, determine an adjustment amplitude and / or modulation direction of the first distortion coefficient in the next cycle based on a difference between the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle; and if the cross-modulation component of the current cycle is less than or equal to the first component value, control the first distortion coefficient in the next cycle to be equal to the first distortion coefficient in the current cycle.

[0034] In an embodiment of the present application, when the power amplifier amplifies the second signal to generate a transmission signal, when the power amplifier is in a nonlinear operating range, the generated transmission signal includes many interference signals, such as harmonic components, intermodulation components, and cross-modulation components. Harmonic components, intermodulation components, etc. can be removed from the transmission signal in a certain way. The size of the cross-modulation component is linearly related to the degree of nonlinear distortion of the power amplifier, and the cross-modulation component is difficult to remove from the transmission signal. At the same time, because the cross-modulation component is relatively close to the fundamental signal of the transmission signal, it will have a very large impact on the transmission and demodulation of the signal. Therefore, the size of the cross-modulation component can be used as an indicator to judge the linearity of the power amplifier. Only when the size of the cross-modulation component is less than or equal to the first component value, it can be considered that by adjusting the first distortion coefficient, the signal power of the transmission signal is linearly related to the signal power of the first signal. Therefore, a nonlinear detector detects the cross-modulation component in the transmitted signal. When the cross-modulation component is less than or equal to the first component value, the controller can determine that the signal power of the transmitted signal and the signal power of the first signal have now been linearly adjusted by adjusting the first distortion coefficient. The first distortion coefficient can then be deferred until the cross-modulation component is subsequently detected to be greater than the first component value. This avoids frequent adjustment of the first distortion coefficient, which can lead to unstable operation of the signal conditioning circuit. When the cross-modulation component is greater than the first component value, the controller determines that nonlinear distortion still exists in the power amplifier and continues to adjust the first distortion coefficient. Furthermore, the cross-modulation component can serve as a verification method. When the first distortion coefficient is continuously adjusted over multiple cycles, the magnitude of the cross-modulation component obtained in each cycle will be different. Furthermore, in practical applications, the direction and magnitude of adjustment of the first distortion coefficient can be determined based on the value of the error feedback signal. However, when adjusting the first distortion coefficient using this modulation direction and adjustment amplitude, the adjustment amplitude may be smaller than the ideal adjustment amplitude, resulting in nonlinear distortion still existing in the power amplifier after adjustment, or the adjustment amplitude may be larger than the ideal adjustment amplitude, resulting in nonlinear distortion still existing in the power amplifier after adjustment. Therefore, by comparing the magnitudes of the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle over multiple cycles, it can be determined whether the adjustment amplitude of the current cycle is smaller or larger than the ideal adjustment amplitude. If it is determined that the adjustment amplitude of the current cycle is smaller than the ideal adjustment amplitude, then in the next cycle, the first distortion coefficient is adjusted to a certain extent using the adjustment direction of the current cycle. If it is determined that the adjustment amplitude of the current cycle is larger than the ideal adjustment amplitude, then in the next cycle, the first distortion coefficient is adjusted to a certain extent using the adjustment direction opposite to that of the current cycle.

[0035] In a possible implementation, the power amplifier may be a solid state power amplifier (SSPA) or a traveling wave tube power amplifier (TWPA).

[0036] In the embodiments of this application, solid-state power amplifiers are smaller, higher quality, and more linear than traveling wave tube power amplifiers. Traveling wave tube power amplifiers, on the other hand, offer higher output power, higher efficiency, and a wider operating bandwidth than solid-state power amplifiers. The appropriate power amplifier can be selected based on actual application requirements.

[0037] In one possible implementation, the analog predistorter is a Schottky diode-based analog predistorter. Alternatively, the Schottky diode-based analog predistorter can be a two-way analog predistorter, a reflection bridge analog predistorter, a transmission analog predistorter, a series analog predistorter, a parallel analog predistorter, etc.

[0038] In an embodiment of the present application, a Schottky diode-based analog predistorter primarily utilizes the nonlinear characteristics generated by the Schottky diode operating in the saturation range to compensate for the nonlinear characteristics of the power amplifier. The radio frequency impedance of the Schottky diode-based analog predistorter varies with the signal power of the input signal. By adjusting the bias voltage of the Schottky diode, this variation in the Schottky diode's characteristics is inversely proportional to the nonlinear characteristics of the power amplifier. Therefore, by adjusting the bias voltage of the Schottky diode, the controller can adjust the first distortion coefficient of the Schottky diode-based analog predistorter.

[0039] In one possible embodiment, the analog predistorter is an analog predistorter based on a field-effect transistor. Optionally, the analog predistorter is an analog predistorter based on a field-effect transistor with a common-gate structure. Optionally, the analog predistorter based on a field-effect transistor with a common-gate structure may be a transmission-type analog predistorter or a two-way analog predistorter. Exemplarily, the analog predistorter is an analog predistorter based on a field-effect transistor with a common-source structure. Optionally, the analog predistorter based on a field-effect transistor with a common-source structure may be a transmission-type analog predistorter, a cascaded analog predistorter, a reflective analog predistorter, a two-way analog predistorter, or the like.

[0040] In an embodiment of the present application, a field-effect transistor-based analog predistorter controls the change in the field-effect transistor's source-drain resistance by adjusting the field-effect transistor's gate voltage, thereby simulating a variation in characteristics that is inverse to the nonlinear characteristics of the power amplifier. Compared to field-effect transistor-based analog predistorters, Schottky diode-based analog predistorters can be applied to higher-frequency signal processing and have lower insertion loss. Field-effect-based analog predistorters also have higher integration levels than Schottky diode-based analog predistorters. The appropriate type of analog predistorter can be selected based on actual application requirements.

[0041] In a possible implementation, a shunt device is provided at the output end of the power amplifier, and the output end of the power amplifier is coupled to the error detector and / or the nonlinear detector via the shunt device.

[0042] In an embodiment of the present application, the transmit signal generated by the power amplifier is used as the signal output by the transmitting device and transmitted to the receiving device. By providing a branching device, a small amount of the transmit signal is separated from the transmit signal to be transmitted and output to the error detector and / or nonlinear detector. This allows the first distortion coefficient of the analog predistorter to be adjusted based on the transmit signal without affecting the normal transmission of the transmit signal.

[0043] In a possible implementation, the signal adjustment circuit includes a plurality of analog pre-distorters, and the plurality of analog pre-distorters are connected in parallel.

[0044] In embodiments of the present application, multiple analog predistorters can be used for power amplifiers with complex nonlinear characteristics. The power amplifier is divided into multiple signal power segments based on signal power, and different analog predistorters are used to adjust the nonlinear characteristics of each signal power segment. Each signal power segment can then be further divided into multiple signal power intervals, and a single analog predistorter is adjusted to ensure that, within the corresponding signal power interval, the power amplifier maintains a linear relationship between the signal power of the transmitted signal and the signal power of the first signal.

[0045] In a possible implementation, the first signal may be a baseband signal, an intermediate frequency signal, or a radio frequency signal.

[0046] In the embodiment of the present application, the predistorter is mainly divided into a baseband predistorter, an intermediate frequency predistorter and an RF predistorter. When the first signal is an RF signal, it is easier for the current working signal power interval of the power amplifier to be close to the saturation interval, thereby causing nonlinear distortion in the power amplifier. However, when the first signal is a baseband signal or an intermediate frequency signal, there may also be a situation where the power amplifier has nonlinear distortion. The solution proposed in the embodiment of the present application can also solve the problem of nonlinear distortion in the power amplifier when the first signal is a baseband signal or an intermediate frequency signal. When the first signal is a baseband signal and an intermediate frequency signal, it is possible to consider using a digital predistorter to obtain higher accuracy, and when the first signal is an RF signal, it is possible to consider using an analog predistorter to reduce cost and power consumption, and reduce the complexity of the solution implementation.

[0047] In one possible implementation, the transmitting device further includes a frequency conversion unit, a phased array unit, and a transmitting antenna. The frequency conversion unit is configured to receive a data signal modulated with data information and up-convert the data signal into a first signal, which is a radio frequency signal. The frequency conversion unit includes a modulator, a digital-to-analog converter, a mixer, and the like. Optionally, the transmitting device utilizes a hybrid beamforming (HBF) architecture.

[0048] In an embodiment of the present application, when wireless communication is achieved through a signal in a high-frequency band, as the frequency band of the transmitted signal continues to increase, the distance that the transmitted signal can be transmitted also decreases. In order to increase the distance that the transmitted signal in the high-frequency band can be transmitted, it is necessary to transmit multiple transmitted signals with different phases through a phased array unit. Because the phases between the multiple transmitted signals are different, beamforming of the multiple transmitted signals is achieved to increase the transmission distance of the transmitted signal and make the transmission direction of the transmitted signal more certain. However, in the case of transmitting multiple transmitted signals, it is necessary to adaptively increase the number of power amplifiers and predistorters. Because the structure of the digital predistorter is more complex, the adjustment of the first distortion coefficient is also more complex. Therefore, compared with the implementation scheme using a digital predistorter, in this case, the use of an analog predistorter can reduce costs, reduce system complexity, reduce the difficulty of adjusting the first distortion coefficient, and make the implementation of the scheme easier.

[0049] In the second aspect, an embodiment of the present application also provides a signal adjustment method based on a signal adjustment circuit and a power amplifier; the signal adjustment circuit includes a predistorter; wherein the predistorter is used to input a first signal and generate a second signal with a first distortion coefficient; the power amplifier is used to amplify the second signal to obtain a transmission signal; the method includes: within one cycle: generating an error feedback signal based on the first signal and the transmission signal; the error feedback signal corresponds to a signal power interval in multiple signal power intervals; the error feedback signal is used to indicate that the power amplifier generates nonlinear distortion in the signal power interval; adjusting the first distortion coefficient according to the error feedback signal; the first distortion coefficient is used to indicate the ratio of the signal power of the second signal to the signal power of the first signal, and the first distortion coefficient is nonlinearly related to the signal power of the first signal.

[0050] In a possible implementation, the method further includes, before generating the error feedback signal, performing gain attenuation on the signal power of the transmission signal.

[0051] In the embodiment of the present application, the transmit signal is a signal amplified by a power amplifier, and its signal power is greater than the signal power of the first signal. The gain controller performs gain attenuation on the signal power of the transmit signal so that the signal power of the transmit signal input to the error detector is close to or equal to the signal power of the first signal input to the error detector, thereby enabling the first voltage signal obtained by the voltage processing circuit in subsequent processing to accurately reflect the voltage difference between the first signal and the transmit signal.

[0052] In one possible embodiment, the process of generating an error feedback signal based on the first signal and the transmitted signal specifically includes: generating an interval control signal based on the signal power of the first signal or the signal power of the transmitted signal; the interval control signal is used to indicate the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmitted signal is located; and determining a signal power interval corresponding to the error feedback signal based on the interval control signal.

[0053] In one possible embodiment, the process of generating an error feedback signal based on the first signal and the transmitted signal specifically includes: generating an interval control signal based on the signal power of the first signal or the signal power of the transmitted signal; the interval control signal is used to indicate the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmitted signal is located; and determining a signal power interval corresponding to the error feedback signal based on the interval control signal.

[0054] In one possible embodiment, the process of generating an error feedback signal based on the first signal and the transmission signal specifically includes: obtaining a first voltage signal based on the first signal and the transmission signal; the first voltage signal is used to indicate the voltage difference between the transmission signal and the first signal; and time-integrating the first voltage signal to generate an error feedback signal.

[0055] In a possible implementation, the process of obtaining the first voltage signal based on the first signal and the transmission signal specifically includes: performing differential amplification processing on the first signal and the transmission signal, and performing envelope detection processing on the differentially amplified signal to obtain the first voltage signal.

[0056] In a possible implementation, the method further includes: within one cycle: before generating the error feedback signal according to the first signal and the transmitted signal, performing delay synchronization processing and amplitude alignment processing on the transmitted signal and the first signal.

[0057] In a possible embodiment, the method further includes: within one cycle: after adjusting the first distortion coefficient according to the error feedback signal, obtaining the cross-modulation component of the transmitted signal; if the cross-modulation component of the current cycle is greater than the first component value, determining the adjustment amplitude and / or modulation direction of the first distortion coefficient in the next cycle based on the difference between the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle.

[0058] In a possible implementation, the method further includes: within a cycle: if the cross-modulation component of the current cycle is less than or equal to the first component value, controlling the first distortion coefficient in the next cycle to be equal to the first distortion coefficient in the current cycle.

[0059] In a third aspect, an embodiment of the present application further provides a signal processing circuit, which includes a power amplifier and a signal adjustment circuit as described in the first aspect above; the signal adjustment circuit is used to input a first signal and generate a second signal with a first distortion coefficient; the power amplifier is used to amplify the second signal to obtain a transmission signal; the signal power of the first signal is linearly related to the signal power of the transmission signal.

[0060] In a fourth aspect, an embodiment of the present application further provides a transmitting device, which includes a phased array unit and a signal processing circuit as described in the third aspect above.

[0061] In a fifth aspect, an embodiment of the present application further provides a chip system. The chip system includes at least one controller and at least one interface circuit. The at least one controller and at least one interface circuit can be interconnected via lines. The controller is used to support the chip system to implement the various functions or steps described in the second aspect above. The at least one interface circuit can be used to receive signals from other devices (such as a memory) or send signals to other devices (such as a communication interface). The chip system may include a chip and may also include other discrete devices.

[0062] In the sixth aspect, an embodiment of the present application also provides a computer program product comprising instructions, which, when the instructions are run on the electronic device described in the fourth aspect or the chip system described in the fifth aspect, enables the chip system or electronic device to perform the various functions or steps described in the second aspect.

[0063] In the seventh aspect, an embodiment of the present application also provides a computer-readable storage medium, which includes instructions. When the instructions are run on the transmitting device recorded in the fourth aspect or the chip system recorded in the fifth aspect, the chip system or the transmitting device performs the various functions or steps recorded in the second aspect.

[0064] Regarding the technical effects of the second, third, fourth, fifth, sixth and seventh aspects, please refer to the relevant description of the first aspect above, so they will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] FIG1 is a schematic structural diagram of a transmitting device provided in an embodiment of the present application;

[0066] FIG2 is a schematic structural diagram of a signal processing circuit provided in an embodiment of the present application;

[0067] FIG3 is a schematic diagram of a gain curve of a power amplifier provided in an embodiment of the present application;

[0068] FIG4 is a schematic diagram of a gain curve of a predistorter provided in an embodiment of the present application;

[0069] FIG5 is a schematic diagram of a gain curve of another power amplifier provided in an embodiment of the present application;

[0070] FIG6 is a schematic diagram of a gain curve of another predistorter provided in an embodiment of the present application;

[0071] FIG7 is a schematic diagram of the structure of an error detector provided in an embodiment of the present application;

[0072] FIG8 is a schematic structural diagram of another error detector provided in an embodiment of the present application;

[0073] FIG9 is a schematic diagram of the structure of a voltage processing circuit provided in an embodiment of the present application;

[0074] FIG10 is a schematic structural diagram of an integration circuit provided in an embodiment of the present application;

[0075] FIG11 is a schematic structural diagram of another signal adjustment circuit provided in an embodiment of the present application;

[0076] FIG12 is a schematic structural diagram of another signal adjustment circuit provided in an embodiment of the present application;

[0077] FIG13 is a schematic structural diagram of another signal adjustment circuit provided in an embodiment of the present application;

[0078] FIG14 is a schematic structural diagram of another signal adjustment circuit provided in an embodiment of the present application;

[0079] FIG15 is a schematic structural diagram of another transmitting device provided in an embodiment of the present application;

[0080] FIG16 is a schematic structural diagram of an analog pre-distorter based on a Schottky diode according to an embodiment of the present application;

[0081] FIG17 is a flow chart of a signal adjustment method according to an embodiment of the present application;

[0082] FIG18 is a flow chart of another signal adjustment method provided in an embodiment of the present application;

[0083] FIG19 is a timing diagram of a control signal provided in an embodiment of the present application;

[0084] FIG20 is a schematic diagram of a gain curve of another predistorter provided in an embodiment of the present application;

[0085] FIG21 is a schematic diagram of a gain curve of another predistorter provided in an embodiment of the present application;

[0086] FIG22 is a schematic diagram of a gain curve of another predistorter provided in an embodiment of the present application;

[0087] FIG23 is a schematic diagram of a flow chart of determining an adjustment direction and / or adjustment range according to an embodiment of the present application;

[0088] FIG24 is a timing diagram of a control signal within multiple cycles provided by an embodiment of the present application;

[0089] Figure 25 is a structural diagram of a chip system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0090] It should be noted that the terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0091] The terms "exemplary" or "for example" in the embodiments of this application are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0092] The terms "coupling" and "connection" involved in the embodiments of this application should be understood in a broad sense. For example, they may refer to a physical direct connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0093] First, some basic concepts involved in the embodiments of this application are explained:

[0094] In the field of wireless signal transmission, data is exchanged between transmitters and receivers. The transmitter modulates data onto a transmit signal and then sends the data-carrying transmit signal to the receiver, enabling data transmission and communication. To ensure signal transmission quality and distance, a power amplifier is often installed in the transmitter to linearly amplify the transmit signal to increase its power. This linear amplification is then performed before transmission, allowing the receiver to accurately demodulate the modulated transmit signal. If any amplitude or phase distortion in the transmit signal, caused by nonlinear distortion in the power amplifier during this linear amplification process, occurs, the demodulation bit error rate (BER) increases. As modulation technologies become increasingly complex, the peak-to-average power ratio (PAPR) of the transmit signal increases. A higher PAPR makes the power amplifier more likely to enter its nonlinear operating region, resulting in nonlinear distortion in the transmit signal due to the nonlinear characteristics of the power amplifier.

[0095] To address the problem of nonlinear distortion in power amplifiers, pre-distortion (PD) technology is used to adjust the nonlinear characteristics of the power amplifier. The main idea of ​​pre-distortion technology is to place a pre-distorter in the front stage of the power amplifier. This pre-distorter has nonlinear characteristics opposite to those of the power amplifier. The pre-distorter pre-distorts the data signal to be power amplified, obtaining a data signal with the nonlinear characteristics of the pre-distorter. The pre-distorted data signal is then input into the power amplifier for power amplification. The nonlinear characteristics of the pre-distorter compensate for the nonlinear characteristics of the power amplifier, resulting in a linear relationship between the signal power of the transmit signal output by the power amplifier and the signal power of the data signal. Pre-distorters mainly include digital pre-distortion (DPD) and analog pre-distortion (APD).

[0096] An embodiment of the present application provides a transmitting device. As shown in FIG1 , the transmitting device 1 includes a signal processing circuit 2. As shown in FIG2 , the signal processing circuit 2 includes a power amplifier 3 and a signal adjustment circuit 4. The signal adjustment circuit 4 includes a controller 41, an error detector 42, and a predistorter 43. The predistorter 43 is configured to generate a second signal using a distortion coefficient from an input first signal; the second signal has the nonlinear characteristics of the predistorter 43. The power amplifier 3 is configured to amplify the second signal to obtain a transmitting signal. The error detector 42 is configured to detect the error voltage between the first signal and the transmitting signal. The controller 41 is configured to adjust the distortion coefficient of the predistorter 43 based on the error voltage.

[0097] For example, the error detector 42 obtains an error voltage between the first signal and the transmitted signal. Based on the magnitude of the error voltage, the magnitude of the nonlinear distortion between the signal power of the transmitted signal and the signal power of the first signal can be calculated. The distortion coefficient is adjusted based on the calculated magnitude of the nonlinear distortion to ensure a linear relationship between the signal powers of the first signal and the transmitted signal.

[0098] For example, FIG3 shows the gain curve of the power amplifier 3 nearing the saturation operating range (i.e., entering the nonlinear operating range) when the predistorter 43 is not configured. The horizontal axis in the figure represents the signal power of the first signal input to the power amplifier 3, and the vertical axis represents the signal power of the transmit signal output by the power amplifier 3. The dotted line represents the gain curve of the power amplifier 3 under ideal conditions. This curve is a straight line, indicating that the signal power of the output transmit signal is linearly related to the signal power of the input first signal (amplified at a fixed ratio). The solid line represents the gain curve of the power amplifier 3 under actual conditions. This curve is an arc with a certain curvature, indicating that the power amplifier 3 generates a certain amount of nonlinear distortion. It can be seen that as the signal power of the first signal increases, the ratio between the signal power of the transmit signal and the signal power of the first signal gradually decreases. This ratio can represent the gain amplification factor of the power amplifier 3 for the first signal. As this ratio decreases, the nonlinear distortion between the first signal and the transmit signal increases. However, the trend of the nonlinear distortion of the power amplifier 3 represented in FIG3 is relatively uniform and gentle. In the scenario shown in Figure 3, a predistorter 43 with a relatively uniform and gentle nonlinear characteristic can be selected to provide a nonlinear characteristic opposite to that of the power amplifier 3. For example, a predistorter 43 with a gain curve as shown in Figure 4 can be used. In the figure, the solid line represents the gain curve of the predistorter 43, which is an arc with a certain curvature. The dashed line represents the actual gain curve between the transmitted signal and the first signal after the predistorter 43 is installed, which is a straight line. As can be seen, after the predistorter 43 applies its nonlinear characteristic to the first signal, a second signal is obtained. The second signal is then input into the power amplifier 3 for amplification to obtain the transmitted signal. At this point, the signal power of the transmitted signal is linearly related to the signal power of the first signal.

[0099] For example, as shown in FIG5 , a gain curve of a power amplifier 3 with a relatively complex nonlinear characteristic change after entering a nonlinear operating range when a predistorter 43 is not provided. Based on the signal power of the input first signal, the range can be divided into a low-power range, a medium-power range, and a high-power range. It can be seen that when the signal power of the input first signal is in the low-power range, as the signal power of the first signal increases, the ratio of the signal power of the transmitted signal to the signal power of the first signal decreases, but the degree of decrease in the ratio is not significant. When the signal power of the input first signal is in the medium-power range, as the signal power of the first signal increases, the increase in the signal power of the transmitted signal slows down, and at this time, the ratio of the signal power of the transmitted signal to the signal power of the first signal decreases significantly. When the signal power of the input first signal is in the high-power range, as the signal power of the first signal increases, the signal power of the transmitted signal does not increase significantly, and the ratio of the signal power of the transmitted signal to the signal power of the first signal decreases more significantly. For the gain curve shown in FIG5 , a predistorter 43 with a more complex nonlinear variation needs to be provided. By adjusting the value of the distortion coefficient of the predistorter 43 with a more complex nonlinear variation, the nonlinear characteristics of the predistorter 43 can be adjusted to sufficiently compensate for the nonlinear distortion of the power amplifier 3. For example, for the power amplifier 3 shown in FIG5 , the gain curve of the predistorter 43 can be adjusted to that shown in FIG6 .

[0100] In the embodiment of the present application, a predistorter 43 having nonlinear characteristics as shown in FIG6 is used to generate a second signal using a distortion coefficient for an input first signal, and then a power amplifier 3 amplifies the second signal to obtain a transmission signal, so that the signal power of the transmission signal is linearly related to the signal power of the input first signal. However, for a power amplifier 3 having a more complex nonlinear characteristic variation as described above (for example, a power amplifier 3 having a gain curve similar to FIG5 ), a predistorter 43 corresponding to the nonlinear characteristic variation is required. At the same time, because the nonlinear characteristic variation of the predistorter 43 is more complex, the error detector 42 is required to detect the error between a longer section of the first signal and the transmission signal before an accurate error voltage can be statistically obtained. The controller 41 then adjusts the distortion coefficient of the predistorter 43 in real time based on the error voltage. In this case, because the nonlinear characteristic variation of the power amplifier 3 is more complex, the time required to obtain the error voltage is longer, resulting in the problem of untimely adjustment of the distortion coefficient. Moreover, because the adjustment of the distortion coefficient is also more complex, there is also the problem of difficulty in adjustment.

[0101] In order to solve the problem of untimely adjustment of the distortion coefficient and complex adjustment of the distortion coefficient caused by the complex changes in the nonlinear characteristics of the power amplifier, the embodiment of the present application proposes a signal processing circuit. As shown in Figure 2, the signal processing circuit 2 includes a power amplifier 3 and a signal adjustment circuit 4. The signal adjustment circuit 4 includes a controller 41, an error detector 42, and a predistorter 43. The predistorter 43 is coupled to the power amplifier 3; the power amplifier 3 is coupled to the error detector 42; the error detector 42 is coupled to the controller 41; and the controller 41 is coupled to the predistorter 43. Among them:

[0102] The predistorter 43 is configured to input a first signal and generate a second signal using a first distortion coefficient. The power amplifier 3 is configured to amplify the second signal to obtain a transmission signal. The error detector 42 is configured to obtain the signal power of the first signal or the transmission signal and generate an error feedback signal based on the signal power of the first signal or the transmission signal, as well as the transmission signal and the first signal. The error feedback signal corresponds to one of multiple signal power intervals and instructs the power amplifier to generate nonlinear distortion in the corresponding signal power interval. The controller 41 is configured to adjust the first distortion coefficient of the predistorter 43 based on the error feedback signal. The first distortion coefficient indicates the ratio of the signal power of the second signal to the signal power of the first signal, and the first distortion coefficient has a nonlinear relationship with the signal power of the first signal. The controller 41 adjusts the first distortion coefficient so that the ratio of the signal power of the transmission signal to the signal power of the first signal is linear.

[0103] Exemplarily, the error detector 43 obtains the signal power of the first signal or the transmitted signal and generates an error feedback signal based on the first signal and the transmitted signal. For example, when the gain curve of the power amplifier 3 in the operating range near saturation is shown in FIG5 , the error feedback signal corresponds to a signal power interval among multiple signal power intervals (e.g., corresponding to a power interval among the low power interval, the medium power interval, and the high power interval), and the error feedback signal is used to indicate that the power amplifier 3 has generated nonlinear distortion in this signal power interval. The first distortion coefficient is then adjusted based on the error feedback signal so that the signal power of the transmitted signal is linearly related to the signal power of the first signal.

[0104] In some possible implementations, as shown in FIG7 , the error detector 42 includes an encoding circuit 421 and a voltage processing circuit 422. The voltage processing circuit 422 includes a plurality of first switches 4221 and a plurality of feedback output terminals 4222. The plurality of first switches 4221 correspond one-to-one to the plurality of feedback output terminals 4222. The voltage processing circuit 422 is coupled to the controller 41 via the plurality of feedback output terminals 4222. The encoding circuit 421 is configured to output an interval control signal to the voltage processing circuit 422. The value of the interval control signal indicates the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmitted signal is located. The interval control signal is configured to turn on one of the plurality of first switches 4221 according to the value of the interval control signal. The voltage processing circuit 422 is configured to generate an error feedback signal based on the transmitted signal and the first signal, and output the error feedback signal to the controller 41 via a feedback output terminal 4222 of the plurality of feedback output terminals 4222 corresponding to the turned-on first switch 4221.

[0105] In an embodiment of the present application, the signal power interval in which the power amplifier 3 is currently operating is determined by the encoding circuit 421. The specific determination method is: detecting the signal power interval in which the signal power of the first signal is located, and determining the signal power interval in which the power amplifier 3 is currently operating based on the signal power interval of the first signal; or detecting the signal power interval in which the signal power of the transmitted signal is located, and determining the signal power interval in which the power amplifier 3 is currently operating based on the signal power interval of the transmitted signal. The signal power of the input first signal is fixed, while the transmitted signal is a signal amplified by the power amplifier 3, and its signal power will be affected by the nonlinear characteristics of the power amplifier 3. In actual applications, the signal power interval is divided by the signal power of the first signal, and the obtained signal power interval is a fixed signal power interval. However, the signal power interval obtained by dividing the signal power interval by the signal power of the transmitted signal is more closely related to the nonlinear characteristics of the power amplifier 3. Therefore, according to different actual application requirements, the first signal or the transmitted signal is selected to divide the signal power interval, and the corresponding signal power is obtained to determine the signal power interval in which the current operation is performed.

[0106] In some possible embodiments, as shown in Figure 8, the encoding circuit 421 includes a peak detector 4211 and an analog-to-digital conversion amplitude encoder 4212; wherein, the peak detector 4211 is used to input a first signal or a transmission signal to obtain a first power signal; the analog-to-digital conversion amplitude encoder 4212 is used to generate an interval control signal according to the signal amplitude value of the first power signal; the signal amplitude value of the first power signal is used to indicate the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmission signal is located.

[0107] Exemplarily, the peak detector 4211 obtains a first power signal as an analog signal and inputs the first power signal into the analog-to-digital conversion amplitude encoder 4212 for analog-to-digital conversion, thereby obtaining an interval control signal. For example, the operating range of the power amplifier 3 is divided into three signal power ranges: a low power range, a medium power range, and a high power range. This corresponds to three first switches 4221. The generated interval control signal can have three bits, for example, XXX, where bit 0 corresponds to the low power range, bit 1 corresponds to the medium power range, and bit 2 corresponds to the high power range. When the interval control signal takes the value 001, the interval control signal turns on the first switch 4221 corresponding to the low power range, while the other two first switches 4221 are turned off. Similarly, when the interval control signal takes the value 010, the interval control signal turns on the first switch 4221 corresponding to the medium power range, and when the interval control signal takes the value 100, the interval control signal turns on the first switch 4221 corresponding to the high power range.

[0108] In an embodiment of the present application, the peak detector 4211 inputs a first signal or a transmission signal to obtain a first power signal; the information indicated by the first power signal is the signal power of the first signal, or the signal power of the transmission signal. Then, the first power signal is input to the analog-to-digital conversion amplitude encoder 4212, and the analog-to-digital conversion amplitude encoder 4212 converts the first power signal in the form of an analog signal into an interval control signal in the form of a digital signal, wherein the value of the interval control signal is used to control the conduction of one of the multiple first switches 4221. The value of the interval control signal corresponds to different signal power intervals, thereby controlling the conduction of the first switch 4221 corresponding to the different signal power intervals.

[0109] In some possible embodiments, as shown in Figure 8, the voltage processing circuit 422 also includes a differential voltage circuit 4223 and multiple integration circuits 4224; the output end of the differential voltage circuit 4223 is coupled to the multiple integration circuits 4224 one-to-one through multiple first switches 4221; the output end of an integration circuit 4224 serves as a feedback output end 4222 of the voltage processing circuit 422; wherein, the differential voltage circuit 4223 is used to obtain a first voltage signal based on the transmission signal and the first signal, and output the first voltage signal to the corresponding integration circuit 4224 through the conductive first switch 4221; the first voltage signal is used to indicate the voltage difference between the transmission signal and the first signal; the integration circuit 4224 is used to generate an error feedback signal based on the first voltage signal, and output the error feedback signal to the controller 41.

[0110] In the embodiment of the present application, the differential voltage circuit 4223 obtains a first voltage signal indicating the voltage difference between the first signal and the transmitted signal. The encoding circuit 421 then generates an interval control signal corresponding to different signal power intervals via the first switch 4221. The interval control signal controls the conduction of the first switch 4221 corresponding to the currently operating signal power interval to output the first voltage signal to a corresponding integration circuit 4224. The integration circuit 4224 performs time integration processing on the first voltage signal to obtain an error feedback signal, which is then output to the controller 41. The controller 41 determines the currently operating signal power interval based on the integration circuit 4224 outputting the error feedback signal, and adjusts the first distortion coefficient of the predistorter 43 based on the feedback value of the error feedback signal.

[0111] Illustratively, as shown in FIG9 , the differential voltage circuit 4223 includes a differential operational amplifier 42231 and an envelope detector 42232; the first input terminal of the differential operational amplifier 42231 serves as the first input terminal of the differential voltage circuit 4223, and the first input terminal of the differential operational amplifier 42231 is used to input a transmission signal; the second input terminal of the differential operational amplifier 42231 serves as the second input terminal of the differential voltage circuit 4223, and the second input terminal of the differential operational amplifier 42231 is used to input a first signal; the output terminal of the differential operational amplifier 42231 is coupled to the input terminal of the envelope detector 42232; the output terminal of the envelope detector 42232 serves as the output terminal of the differential voltage circuit 4223, and the output terminal of the envelope detector 42232 is used to output a first voltage signal.

[0112] In the embodiment of the present application, differential operational amplifier 42231 receives the first signal and the transmit signal as inputs, performs a differential operation on the first signal and the transmit signal, obtains a voltage difference between the first signal and the transmit signal, and outputs the obtained voltage signal to envelope detector 42232. Envelope detector 42232 processes the voltage signal to obtain a first voltage signal. The output end of envelope detector 42232 then outputs the first voltage signal to the corresponding integrator circuit 4224 via the turned-on first switch 4221.

[0113] Exemplarily, as shown in Figure 9, an integration circuit 4224 includes an integrator 42241, a zeroing circuit 42242 and a voltage holding circuit 42243; the integrator 42241 is coupled to the zeroing circuit 42242 and the voltage holding circuit 42243 respectively; wherein, the integrator 42241 is used to perform time integration on the input first voltage signal to generate an error feedback signal; the voltage holding circuit 42243 is used to input a first control signal and an error feedback signal; the first control signal is used to control the voltage holding circuit 42243 to output an error feedback signal to the controller 41; the zeroing circuit 42242 is used to input a second control signal; the second control signal is used to control the zeroing circuit 42242 to clear the error feedback signal generated by the integrator 42241.

[0114] In this embodiment of the present application, the first voltage signal is an analog signal that persists for a period of time. The integrator 42241 in the integration circuit 4224 performs a time-integrated process on the input first voltage signal to generate an error feedback signal. The voltage value of the error feedback signal can be used to indicate the voltage difference between the transmitted signal and the first signal. The signal adjustment circuit 4 uses a timing control method to periodically receive the first voltage signal and generate the error feedback signal. Under this periodic control, the second control signal periodically controls the zeroing circuit 42242 to clear the error feedback signal generated by the integrator 42241. After the error feedback signal is cleared, the integrator 42241 receives the first voltage signal and generates a new error feedback signal. The voltage holding circuit 42243 then holds the voltage value of the generated new error feedback signal. After a certain time has elapsed, the input first control signal controls the voltage holding circuit 42243 to output the generated new error feedback signal to the controller 41, completing the generation of the error feedback signal within one cycle. In the next cycle, the zeroing circuit 42242 clears the error feedback signal generated in the previous cycle and generates a new error feedback signal.

[0115] Exemplarily, the first control signal and the second control signal may be generated by the controller 41 .

[0116] For example, a device such as a counter or a clock control circuit may be provided in the signal adjustment circuit 4 , and the device such as the counter or the clock control circuit may periodically generate the first control signal and the second control signal according to a fixed timing sequence.

[0117] For example, as shown in FIG10 , an integrator 42241 includes a first resistor 422411 and a first capacitor 422412. A voltage hold circuit 42243 includes a first switch 422431. A zeroing circuit 42242 includes a second switch 422421. A first end of the first resistor 422411 is coupled to the corresponding first switch 4221 for inputting a first voltage signal. A second end of the first resistor 422411 is coupled to the first end of the first switch 422431. A second end of the first switch 422431 is coupled to the controller 41. A first end of the first capacitor 422412 is coupled to the coupling point between the second end of the first resistor 422411 and the first end of the first switch 422431. A second end of the second capacitor 422412 is coupled to the first end of the second switch 422421. A second end of the second switch 422421 is grounded. The controlled terminal of the first switch 422431 is used to input a first control signal, and the first terminal and the second terminal of the first switch 422431 are connected under the control of the first control signal. The controlled terminal of the second switch 422421 is used to input a second control signal, and the first terminal and the second terminal of the second switch 422421 are connected under the control of the second control signal.

[0118] Optionally, the first switch tube 422431 and the second switch tube 422421 can be an N-type metal-oxide-semiconductor (NMOS) transistor, a P-type metal-oxide-semiconductor (NMOS) transistor, a triode, etc.

[0119] In the embodiment of the present application, a first resistor 422411 and a first capacitor 422412 form a resistor-capacitor (RC) integration circuit. When a first voltage signal is input to the first resistor 422411, the first voltage signal charges the first capacitor 422412, causing the voltage between the second end of the first resistor 422411 and the first end of the first switch 422431 to continuously increase. This voltage value is used to indicate the time constant of the RC integration circuit, that is, the result of time integration of the first voltage signal by the integrator 42241. As shown in Figure 19, a timing diagram of an implementation of the first control signal and the second control signal is shown. Here, taking the example of first switch 422431 and second switch 422421 both using NMOS transistors, when the first control signal is high, the first switch 422431 is turned on, and when the second control signal is high, the second switch 422421 is turned on. As shown in Figure 19, within a cycle, first during time period t1, the second control signal is at a high level. At this time, the second switch 422421 in the zeroing circuit 42242 is turned on, releasing the charge stored on the first capacitor 422412 through grounding, thereby clearing the generated error feedback signal. Then, during time period t2, both the first and second control signals remain at a low level. The first resistor 422411 inputs the first voltage signal, which charges the first capacitor 422412 via the first voltage signal, thereby achieving time integration of the first voltage signal. Then, during time period t3, the first control signal is at a high level, turning on the first switch 422431. The voltage value at the first terminal of the first switch 422431 is output to the controller 41 as the error feedback signal. Based on the error feedback signal output by the first switch 422431, the controller 41 determines the current operating signal power range. Simultaneously, based on the value of the error feedback signal, the controller 41 determines the amplitude of the nonlinear clock of the power amplifier 3 and adaptively adjusts the first clock coefficient.

[0120] 10 , the integrator 42241 further includes a second resistor 422413 . The second end of the first capacitor 422412 is coupled to the second switch 422421 through the second resistor 422413 .

[0121] In the embodiment of the present application, a second resistor 422413 is provided. The load of the second resistor 422413 consumes a certain amount of the first voltage signal. This prevents the excessively large first voltage signal from charging the first capacitor 422412, causing the first capacitor 422412 to reach saturation and become unable to charge. This would result in the voltage value at the first end of the first switch 422431 not being accurately used as the value of the error feedback signal. Furthermore, the load consumption provided by the second resistor 422413 allows the zeroing circuit 42242 to clear the generated error feedback signal more quickly, thus preventing the error feedback signal from being not cleared in time in the previous cycle from affecting the generation of a new error feedback signal in the subsequent cycle.

[0122] 10 , the voltage holding circuit 42243 further includes a second capacitor 422432 . The second end of the first switch tube 422431 is coupled to the controller 41 through the second capacitor 422432 .

[0123] In the embodiment of the present application, second capacitors 422432 are provided to store the error feedback signal output to the controller 41. When the first control signal changes from a high level to a low level, the second capacitors 422432 continue to output the error feedback signal to the controller 41, thereby extending the time that the controller 41 receives the error feedback signal.

[0124] Exemplarily, the device parameters of different integration circuits 4224 may be set to be the same, or the device parameters of the corresponding integration circuits 4224 may be adaptively adjusted according to the corresponding signal power intervals.

[0125] In some possible implementations, as shown in FIG11 , the signal adjustment circuit 4 further includes a synchronization circuit 44 ; the synchronization circuit 44 is configured to perform delay synchronization processing and amplitude alignment processing on the transmission signal and the first signal, and then output the processed transmission signal and the processed first signal to the voltage processing circuit 422 .

[0126] In this embodiment of the present application, a time-delay synchronization process is performed on the first signal and the transmitted signal, so that the first signal input to the voltage processing circuit 422 and the transmitted signal are synchronized in time. Amplitude alignment is performed to ensure that the first signal and the transmitted signal have the same amplitude. The voltage processing circuit 422 then generates a first voltage signal based on the processed first signal and the transmitted signal. This first voltage signal more accurately reflects the voltage difference between the first signal and the transmitted signal.

[0127] In some possible implementations, as shown in FIG11 , the signal adjustment circuit 4 further includes a gain controller 45 , wherein the gain controller 45 is configured to input a transmission signal, perform gain attenuation on the input transmission signal, and output the signal to the error detector 42 .

[0128] In the embodiment of the present application, the transmit signal is a signal amplified by the power amplifier 3, and its signal power is greater than the signal power of the first signal. The gain controller 45 performs gain attenuation on the signal power of the transmit signal so that the signal power of the transmit signal input to the error detector 42 is close to or equal to the signal power of the first signal input to the error detector 42, thereby enabling the first voltage signal obtained by the voltage processing circuit 422 to accurately reflect the voltage difference between the first signal and the transmit signal.

[0129] In some possible implementations, as shown in FIG12 , the signal conditioning circuit 4 further includes a channel linearizer 46 . The channel linearizer 46 is configured to input the first signal and output the first signal to the predistorter 43 . The channel linearizer 46 includes a high-pass filter 461 and a low-pass filter 462 connected in series. The controller 41 is also coupled to the channel linearizer 46 . The controller 41 is further configured to adjust the bandwidth of the high-pass filter 461 and the low-pass filter 462 .

[0130] In this embodiment of the present application, the power amplifier 3 may also generate in-band distortion due to inconsistent in-band gain of the power amplifier 3. A channel linearizer 46 is provided in the upstream stage of the predistorter 43. A high-pass filter 461 and a low-pass filter 462 connected in series in the channel linearizer 46 limit the first signal input to the predistorter 43, thereby avoiding the problem of in-band distortion in the generated transmission signal caused by inconsistent in-band gain of the power amplifier 3.

[0131] In some possible implementations, as shown in FIG13 , the signal adjustment circuit 4 further includes a nonlinear detector 47 ; wherein the nonlinear detector 47 is configured to obtain a cross-modulation component of the transmitted signal; and the controller 41 is further configured to: within a cycle, if the cross-modulation component of the current cycle is greater than the first component value, determine an adjustment amplitude and / or modulation direction of the first distortion coefficient in the next cycle based on the difference between the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle; and if the cross-modulation component of the current cycle is less than or equal to the first component value, control the first distortion coefficient in the next cycle to be equal to the first distortion coefficient in the current cycle.

[0132] In an embodiment of the present application, when the power amplifier 3 amplifies the second signal to generate a transmission signal, when the power amplifier 3 is in a nonlinear operating range, the generated transmission signal includes many interference signals, such as harmonic components, intermodulation components, and cross-modulation components. Harmonic components, intermodulation components, etc. can be removed from the transmission signal in a certain manner. The size of the cross-modulation component is linearly related to the degree of nonlinear distortion of the power amplifier 3, and the cross-modulation component is difficult to remove from the transmission signal. At the same time, because the cross-modulation component is relatively close to the fundamental signal of the transmission signal, it will have a very large impact on the transmission and demodulation of the signal. Therefore, the size of the cross-modulation component can be used as an indicator to judge the linearity of the power amplifier 3. Only when the size of the cross-modulation component is less than or equal to the first component value, it can be considered that by adjusting the first distortion coefficient, the signal power of the transmission signal is linearly related to the signal power of the first signal. Therefore, the nonlinear detector 47 detects the cross-modulation component in the transmitted signal. When the cross-modulation component is less than or equal to the first component value, the controller 41 can determine that the signal power of the transmitted signal and the signal power of the first signal are now linearly related due to the first distortion coefficient. Therefore, the first distortion coefficient does not need to be readjusted until the cross-modulation component is subsequently detected to be greater than the first component value. This avoids frequent adjustment of the first distortion coefficient, which could lead to unstable operation of the signal adjustment circuit 4. When the cross-modulation component is greater than the first component value, the controller 41 determines that nonlinear distortion still exists in the power amplifier 3 and continues to adjust the first distortion coefficient. Furthermore, the cross-modulation component can also serve as a verification method. When the first distortion coefficient is continuously adjusted over multiple cycles, the magnitude of the cross-modulation component obtained in each cycle will be different. Furthermore, in practical applications, the direction and magnitude of adjustment of the first distortion coefficient can be determined based on the value of the error feedback signal. However, when adjusting the first distortion coefficient using this modulation direction and adjustment amplitude, the adjustment amplitude may be smaller than the ideal adjustment amplitude, resulting in nonlinear distortion still existing in the power amplifier 3 after adjustment. Alternatively, the adjustment amplitude may be larger than the ideal adjustment amplitude, resulting in nonlinear distortion still existing in the power amplifier 3 after adjustment. Therefore, by comparing the magnitudes of the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle over multiple cycles, it can be determined whether the adjustment amplitude of the current cycle is smaller or larger than the ideal adjustment amplitude. If it is determined that the adjustment amplitude of the current cycle is smaller than the ideal adjustment amplitude, then in the next cycle, the first distortion coefficient is adjusted to a certain extent using the adjustment direction of the current cycle. If it is determined that the adjustment amplitude of the current cycle is larger than the ideal adjustment amplitude, then in the next cycle, the first distortion coefficient is adjusted to a certain extent using the adjustment direction opposite to that of the current cycle.

[0133] In some possible implementations, the power amplifier 3 may be a solid state power amplifier (SSPA).

[0134] In some possible implementations, the power amplifier 3 may be a traveling wave parametric amplifier (TWPA).

[0135] In the embodiments of the present application, solid-state power amplifiers are smaller, higher quality, and more linear than traveling wave tube power amplifiers. Traveling wave tube power amplifiers, on the other hand, offer higher output power, higher operating efficiency, and a wider operating bandwidth than solid-state power amplifiers. The appropriate power amplifier 3 can be selected based on actual application requirements.

[0136] In some possible implementations, the predistorter 43 is an analog predistorter.

[0137] In some possible implementations, the predistorter 43 is a digital predistorter.

[0138] In the embodiments of the present application, a digital predistorter (DPD) offers higher precision than an analog predistorter (APD) and can dynamically calibrate the nonlinear characteristics of a power amplifier in real time. However, the bandwidth of the data signal that a DPD can process is limited, typically ranging from tens to hundreds of MHz. When the data signal is a radio frequency signal, particularly in the millimeter wave band, the bandwidth can reach hundreds of MHz to hundreds of GHz. Excessive signal bandwidth places extremely high demands on the operating speeds of the digital-to-analog converter (DAC) and analog-to-digital converter (ADC) in the DPD. Furthermore, the large number of data signals causes the DPD to process a significant increase in processing power, significantly increasing its power consumption. Furthermore, as the bandwidth of data signals increases, transmission distances shorten, and more data signals need to be transmitted to improve signal transmission quality, necessitating an adaptive increase in the number of DPDs. Excessive DPDs not only significantly increase the cost and power consumption of the transmitting equipment, but also reduce its overall efficiency. Compared to digital predistorters, predistorters have lower power consumption and cost, while also processing a wider signal bandwidth. Therefore, when transmitting higher-frequency data signals, predistorters are often used to adjust the nonlinear characteristics of power amplifiers. In practical applications, the appropriate predistorter 43 can be selected based on the specific requirements of the application scenario.

[0139] In some possible implementations, when the predistorter 43 is an analog predistorter, it may be a Schottky diode-based predistorter. Alternatively, the Schottky diode-based predistorter 43 may be a two-way predistorter, a reflection bridge predistorter, a transmission predistorter, a series predistorter, a parallel predistorter, etc.

[0140] In the embodiment of the present application, the Schottky diode-based analog predistorter 43 primarily utilizes the nonlinear characteristics generated by the Schottky diode operating in the saturation range to compensate for the nonlinear characteristics of the power amplifier. The RF impedance of the Schottky diode-based predistorter 43 changes with the signal power of the input signal. The controller 41 adjusts the bias voltage of the Schottky diode so that this variation of the Schottky diode satisfies the variation characteristics that are inversely proportional to the nonlinear characteristics of the power amplifier 3. Therefore, by adjusting the bias voltage of the Schottky diode, the controller 41 can adjust the first distortion coefficient of the Schottky diode-based predistorter 43.

[0141] In some possible implementations, when the pre-distorter 43 is an analog pre-distorter, it may be a pre-distorter based on a field effect transistor.

[0142] Exemplarily, the predistorter 43 is a predistorter based on a field effect transistor with a common gate structure. Optionally, the predistorter based on a field effect transistor with a common gate structure may be a transmission predistorter or a two-way predistorter.

[0143] Exemplarily, the predistorter 43 is a predistorter based on a common-source field-effect transistor. Alternatively, the predistorter based on a common-source field-effect transistor can be a transmission predistorter, a cascade predistorter, a reflection predistorter, a two-way predistorter, etc.

[0144] In the embodiment of the present application, based on the field effect transistor predistorter 43, the controller 41 adjusts the gate voltage of the field effect transistor to control the change of the source-drain resistance of the field effect transistor, thereby simulating a change characteristic that is opposite to the nonlinear characteristic of the power amplifier 3.

[0145] In the embodiment of the present application, the Schottky diode-based predistorter 43 can be applied to higher-frequency signal processing and has lower insertion loss, compared to a field-effect transistor-based predistorter 43. Furthermore, the field-effect transistor-based predistorter 43 has a higher level of integration than a Schottky diode-based predistorter 43. The appropriate type of predistorter 43 can be selected based on actual application requirements.

[0146] In some possible implementations, a shunt device is provided at the output end of the power amplifier 3 , and the output end of the power amplifier 3 is coupled to the error detector 42 and / or the nonlinear detector 47 via the shunt device.

[0147] Exemplarily, the branching device may be a coupler, a splitter, etc.

[0148] In the embodiment of the present application, the transmission signal generated by the power amplifier 3 is used as the signal output by the transmitting device 1 and transmitted to the receiving device. A branching device is provided to separate a small amount of the transmission signal from the transmission signal to be transmitted and output it to the error detector 42 and / or the nonlinear detector 47, thereby adjusting the first distortion coefficient of the predistorter 43 according to the transmission signal without affecting the normal transmission of the transmission signal.

[0149] In some possible implementations, as shown in FIG14 , the signal adjustment circuit 4 includes a plurality of pre-distorters 43 , and the plurality of pre-distorters 43 are connected in parallel.

[0150] In the embodiment of the present application, multiple predistorters 43 can be provided for a power amplifier 3 with complex nonlinear characteristics. The power amplifier 3 is divided into multiple signal power segments based on signal power, and different predistorters 43 are used to adjust the nonlinear characteristics of different signal power segments. Each signal power segment can then be further divided into multiple signal power intervals, and a single predistorter 43 is adjusted so that within the corresponding signal power interval, the power amplifier 3 maintains a linear relationship between the signal power of the transmitted signal and the signal power of the first signal.

[0151] In some possible implementations, the first signal is a baseband signal, an intermediate frequency signal, or a radio frequency signal.

[0152] In the embodiment of the present application, the predistorter 43 is mainly divided into a baseband predistorter, an intermediate frequency predistorter and an RF predistorter. When the first signal is an RF signal, it is easier for the current working signal power interval of the power amplifier 3 to be close to the saturation interval, thereby causing nonlinear distortion in the power amplifier 3. However, when the first signal is a baseband signal or an intermediate frequency signal, there may also be a situation where the power amplifier 3 has nonlinear distortion. The solution proposed in the embodiment of the present application can also solve the problem of nonlinear distortion in the power amplifier 3 when the first signal is a baseband signal or an intermediate frequency signal. When the first signal is a baseband signal and an intermediate frequency signal, it is possible to consider using a digital predistorter to obtain higher accuracy, and when the first signal is an RF signal, it is possible to consider using an analog predistorter to reduce cost and power consumption, and reduce the complexity of the solution implementation.

[0153] For example, as shown in Figure 15, when the first signal is a radio frequency signal, the transmitting device 1 further includes a transmitting antenna 5, a frequency conversion unit 6, and a phased array unit 7. The frequency conversion unit 6 is configured to receive a data signal modulated with data information and up-convert the data signal into a first signal, which is a radio frequency signal. The frequency conversion unit 6 includes a modulator, a digital-to-analog converter, a mixer, and the like. Optionally, the transmitting device 1 is a transmitting device employing a hybrid beamforming (HBF) architecture.

[0154] In an embodiment of the present application, when wireless communication is achieved through a high-frequency signal, as the frequency band of the transmitted signal continues to increase, the distance that the transmitted signal can be transmitted also decreases. In order to increase the distance that the high-frequency transmitted signal can be transmitted, the phased array unit 7 is required to transmit multiple transmit signals with different phases. Because the phases between the multiple transmit signals are different, beamforming of the multiple transmit signals is achieved to increase the transmission distance of the transmit signal and make the transmission direction of the transmit signal more certain. However, in the case of transmitting multiple transmit signals, it is necessary to adaptively increase the number of power amplifiers 3 and predistorters 43. Because the structure of the digital predistorter is more complex, the adjustment of the first distortion coefficient is also more complex. Therefore, compared with the implementation scheme using a digital predistorter, in this case, the use of an analog predistorter can reduce costs, reduce system complexity, reduce the difficulty of adjusting the first distortion coefficient, and make the scheme implementation easier.

[0155] The signal processing circuit 2 including the structures shown in FIG. 2 , FIG. 7 , FIG. 8 , FIG. 9 , FIG. 10 , FIG. 11 , FIG. 12 , FIG. 13 , FIG. 14 , and FIG. 15 may be used to perform the following signal adjustment method including steps S110 to S120 as shown in FIG. 17 :

[0156] In step S110 , the error detector 42 generates an error feedback signal according to the first signal and the transmission signal.

[0157] Exemplarily, as shown in Figure 2, the error detector 42 inputs the first signal and the transmit signal, and generates an error feedback signal based on the first signal and the transmit signal, where the error feedback signal corresponds to a signal power interval among multiple signal power intervals; and the error feedback signal is used to indicate that the power amplifier generates nonlinear distortion in the signal power interval.

[0158] The above step S110 may specifically include the following signal adjustment method of steps S111 to S113 as shown in FIG18 :

[0159] Step S111 : The signal adjustment circuit 4 preprocesses the first signal and the transmission signal.

[0160] In some possible implementations, the gain controller 45 performs gain attenuation on the transmit signal before inputting the transmit signal into the error detector 42 .

[0161] Exemplarily, as shown in FIG11 , the signal adjustment circuit 4 further includes a gain controller 45 .

[0162] In the embodiment of the present application, the transmit signal is a signal amplified by the power amplifier 3, and its signal power is greater than the signal power of the first signal. The gain controller 45 performs gain attenuation on the signal power of the transmit signal so that the signal power of the transmit signal input to the error detector 42 is close to or equal to the signal power of the first signal input to the error detector 42. This allows the first voltage signal obtained by the voltage processing circuit 422 in subsequent processing to accurately reflect the voltage difference between the first signal and the transmit signal.

[0163] In some possible implementations, the channel linearizer 46 performs a limiting process on the first signal before inputting the first signal into the error detector 42 .

[0164] For example, as shown in FIG12 , the signal conditioning circuit 4 further includes a channel linearizer 46 . The channel linearizer 46 is configured to input the first signal and output the first signal to the predistorter 43 . The channel linearizer 46 includes a high-pass filter 461 and a low-pass filter 462 connected in series. The high-pass filter 461 filters out signals above a certain amplitude in the first signal, while the low-pass filter 462 filters out signals below a certain amplitude in the first signal, thereby limiting the first signal. This embodiment of the present application avoids the problem of in-band distortion in the generated transmit signal caused by inconsistent in-band gain of the power amplifier 3 .

[0165] Exemplarily, the controller 41 adjusts the bandwidths of the high-pass filter 461 and the low-pass filter 462 to adjust the degree of amplitude limiting of the first signal.

[0166] In some possible implementations, the synchronization circuit 44 performs delay synchronization processing and amplitude alignment processing on the first signal and the transmission signal.

[0167] Exemplarily, as shown in FIG11 , the signal adjustment circuit 4 further includes a synchronization circuit 44 ; the synchronization circuit 44 is configured to perform delay synchronization processing and amplitude alignment processing on the transmission signal and the first signal, and then output the processed transmission signal and the processed first signal to the voltage processing circuit 422 .

[0168] In this embodiment of the present application, the synchronization circuit 44 performs time-delay synchronization processing on the first signal and the transmitted signal, so that the first signal input to the voltage processing circuit 422 and the transmitted signal are synchronized in time. Amplitude alignment is performed to ensure that the first signal and the transmitted signal have the same amplitude. The voltage processing circuit 422 then generates a first voltage signal based on the processed first signal and the transmitted signal. This first voltage signal more accurately reflects the voltage difference between the first signal and the transmitted signal.

[0169] Step S112: Generate an interval control signal and a first voltage signal according to the first signal and the transmission signal.

[0170] In some possible implementations, a first power signal is obtained, where the first power signal indicates the signal power of the first signal or the signal power of the transmitted signal. An interval control signal is generated based on the first power signal, where the interval control signal indicates a signal power interval within which the signal power of the first signal falls, or indicates a signal power interval within which the signal power of the transmitted signal falls.

[0171] Exemplarily, as shown in FIG7 , the error detector 42 includes a coding circuit 421. The coding circuit 421 obtains a first power signal. Specifically, the coding circuit 421 receives the first signal and obtains the first power signal based on the signal power of the first signal. The first power signal is used to indicate the signal power interval within which the signal power of the first signal lies. Alternatively, the coding circuit 421 receives a transmitted signal and obtains the first power signal based on the signal power of the transmitted signal. The first power signal is used to indicate the signal power interval within which the signal power of the transmitted signal lies. An interval control signal is generated based on the signal amplitude value of the first power signal. The value of the interval control signal is used to indicate the signal power interval within which the signal power of the first signal lies, or to indicate the signal power interval within which the signal power of the transmitted signal lies.

[0172] In the embodiment of the present application, the encoding circuit 421 can obtain an interval control signal based on the signal power of the first signal or the signal power of the transmitted signal. Based on the interval control signal, the signal power interval in which the power amplifier 3 is currently operating can be determined in a subsequent process, and the operating interval of the power amplifier 3 can be segmented into multiple signal power intervals. In actual operation, the first distortion coefficient is adjusted based on the signal power interval in which the power amplifier 3 is currently operating. Compared to a solution that receives a long first signal or transmitted signal, then calculates the nonlinear distortion within multiple signal power intervals of the power amplifier 3, and then adjusts the first distortion coefficient to adjust the nonlinear distortion within the multiple signal power intervals of the power amplifier 3, the adjustment in the embodiment of the present application is faster and more accurate, and the control is simpler and more convenient, and the adjustment is more timely.

[0173] For example, as shown in FIG8 , the encoding circuit 421 includes a peak detector 4211 and an analog-to-digital amplitude encoder 4212. The specific process of generating the first power signal may be as follows: the peak detector 4211 in the encoding circuit 421 inputs the first signal or the transmission signal to obtain the first power signal, which is an analog signal. The first power signal is then input into the analog-to-digital amplitude encoder 4212, which converts the analog first power signal into a digital interval control signal.

[0174] For example, in an embodiment of the present application, the error detector 42 may not adopt the encoding circuit 421 shown in Figure 8. In the error detector 42 shown in Figure 8, the role of the encoding circuit 421 is to obtain the first power signal, and then convert the first power signal into an interval control signal in the form of a digital signal to indicate the corresponding signal power interval. In this way, the analog-to-digital conversion amplitude encoder 4212 obtains the interval control signal in the form of hardware. The interval control signal in the form of a digital signal is only a signal indicating the signal power interval. In actual applications, a device for detecting signal power can also be used to obtain the first power signal in the form of an analog signal, and the first power signal in the form of an analog signal is used to feedback the signal power interval, or the first power signal is converted into a signal in the form of other analog signals to indicate the signal power interval. In the subsequent process, an error feedback signal is generated based on the signal in the form of other analog signals and the first voltage signal.

[0175] 7 , the error detector 42 further includes a voltage processing circuit 422. The voltage processing circuit 422 includes a plurality of first switches 4221 and a plurality of feedback output terminals 4222. The plurality of first switches 4221 correspond one-to-one to the plurality of feedback output terminals 4222. The voltage processing circuit 422 is coupled to the controller 41 via the plurality of feedback output terminals 4222.

[0176] In an embodiment of the present application, the voltage processing circuit 422 inputs a first signal and a transmission signal, and generates a first voltage signal based on the first signal and the transmission signal. The first voltage signal is used to indicate the voltage difference between the transmission signal and the first signal. The encoding circuit 421 then generates an interval control signal, the values ​​of which correspond to different signal power intervals. Depending on the different values ​​of the interval control signal, the corresponding first switch 4221 is turned on. In the subsequent process, the voltage processing circuit 422 generates an error feedback signal based on the first voltage signal, and outputs the error feedback signal from the corresponding feedback output terminal 4222 to the controller 41 through the turned-on first switch 4221.

[0177] Exemplarily, as shown in FIG8 , the voltage processing circuit 422 further includes a differential voltage circuit 4223 .

[0178] In the embodiment of the present application, based on the voltage processing circuit 422 shown in FIG8 , the differential voltage circuit 4223 receives the first signal and the transmit signal as input. The differential voltage circuit 4223 performs a differential operation on the input first signal and the transmit signal to obtain a first voltage signal. The first voltage signal is used to indicate the voltage difference between the first signal and the transmit signal.

[0179] Step S113: Generate an error feedback signal according to the interval control signal and the first voltage signal.

[0180] In one possible implementation, as shown in Figures 7, 8, 9, and 10, the voltage processing circuit 422 also includes multiple integration circuits 4224; the output end of the differential voltage circuit 4223 is coupled to multiple first switches 4221 and multiple integration circuits 4224 in a one-to-one correspondence; and the output end of an integration circuit 4224 serves as a feedback output end 4222 of the voltage processing circuit 422.

[0181] In an embodiment of the present application, the encoding circuit 421 generates an interval control signal, turns on the corresponding first switch 4221 according to the value of the interval control signal, and then outputs the first voltage signal generated by the differential voltage circuit 4223 to the corresponding integration circuit 4224. The integration circuit 4224 performs time integration on the first voltage signal to generate an error feedback signal.

[0182] In one possible embodiment, the interval control signal is an analog signal, and the interval control signal is used to indicate the signal power interval in which the power amplifier 3 is currently operating. The interval control signal, which is an analog signal, can be a first power signal obtained from the first signal or the transmitted signal, or can be another analog signal obtained by processing the first power signal. The corresponding error detector 42 obtains an error feedback signal through signal processing based on the first voltage signal indicating the voltage difference between the first signal and the transmitted signal, and the interval control signal indicating the signal power interval in which the power amplifier 3 is currently operating. The processed error feedback signal is used to indicate the presence of nonlinear distortion in the power amplifier 3 within a certain signal power interval.

[0183] In the embodiments of the present application, the error feedback signal is generated by detecting the signal power of the first signal or the transmitted signal to obtain a first power signal to determine the current operating signal power range of the power amplifier 3, and then calculating the degree of nonlinear distortion based on the first voltage signal. However, in the structures shown in Figures 7, 8, 9, and 10, an encoding circuit 421 is used to convert the first power signal in the form of an analog signal into an interval control signal in the form of a digital signal. The interval control signal is used to control the conduction of the first switch 4221, thereby providing feedback on the current operating signal power range of the power amplifier 3 in the form of a hardware structure. Another approach is to obtain the first power signal in the form of an analog signal to determine the current operating signal power range, and then perform signal processing on the first power signal or other analog signal processed from the first power signal with the first voltage signal to obtain the error feedback signal. Both approaches are optional applications of the embodiments of the present application, but the former approach, which uses the encoding circuit 421 to indicate the specific signal power range in hardware, is faster and more convenient to implement, and is also less difficult to implement. The latter approach involves processing the first power signal, or another analog signal derived from the first power signal, with the first voltage signal. This makes generating the error feedback signal more complex and increases the difficulty of implementation, but the resulting error feedback signal may be more accurate. Therefore, in actual applications, the appropriate implementation approach should be selected based on actual application requirements.

[0184] Step S120 : Adjust the first distortion coefficient of the predistorter 43 according to the error feedback signal.

[0185] In some possible implementations, the operating range of the power amplifier 3 is divided into multiple signal power ranges based on different signal powers, and corresponding predistorters 43 are provided for different types of power amplifiers 3. The controller 41 adjusts the predistorter 43 accordingly based on the degree of nonlinear distortion indicated by the error feedback signal and the signal power range in which the nonlinear distortion is generated, so as to adjust the nonlinear characteristics of the predistorter 43 in the corresponding signal power range so that the ratio of the signal power of the transmitted signal to the signal power of the first signal is linearly related.

[0186] For example, as shown in Figures 20, 21, and 22, the gain curves corresponding to different types of predistorters 43 represent different nonlinear variation characteristics. As shown in Figure 20, within a certain signal power range, the rate of change of the curve slope is small, while as the signal power reaches a certain level (for example, at signal power point A), the rate of change of the curve slope is large for the predistorter 43. The predistorter 43 of the type shown in Figure 20 can be regarded as a single-inflection point predistorter with signal power point A as the inflection point. As shown in Figure 21, when the signal power is less than signal power point B, the rate of change of the curve slope is small. When the signal power is between signal power point B and signal power point C, the rate of change of the curve slope increases. When the signal power is greater than signal power point C, the rate of change of the curve slope is even larger. The predistorter 43 of the type shown in Figure 21 can be regarded as a double-inflection point predistorter 43 with signal power point B and signal power point C as the inflection points. As shown in FIG22 , when the signal power is between signal power point B and signal power point C, the rate of change of the curve slope is relatively large, but when the signal power is greater than signal power point D, the rate of change of the curve slope decreases relatively. The predistorter 43 of the type shown in FIG22 , which includes three or more inflection points, can be regarded as a multi-inflection point predistorter 43. In addition, there may be a predistorter 43 whose curve slope maintains a small change (for example, the gain curve change of the predistorter 43 shown in FIG4 ) or a predistorter 43 whose gain curve maintains a large change. This type of predistorter 43 can be regarded as a predistorter without inflection point. In actual applications, the corresponding type of predistorter 43 is selected according to the different types of power amplifiers 3. The above-mentioned inflection point is defined as follows: for a signal power point, if the slope of the gain curve before the signal power point differs from the slope of the gain curve after the signal power point to a certain extent, then the signal power point can be regarded as an inflection point.

[0187] Optionally, the power amplifier 3 may be a solid-state power amplifier, a traveling wave tube power amplifier, or the like.

[0188] Optionally, the predistorter 43 may be a digital predistorter or an analog predistorter.

[0189] Optionally, when the predistorter 43 is an analog predistorter, it may be a Schottky diode-based predistorter, a field-effect transistor-based predistorter, or the like. Furthermore, depending on the structure, the Schottky diode-based predistorter 43 may be a two-way predistorter, a reflection bridge predistorter, a transmission predistorter, a series predistorter, a parallel predistorter, or the like. The field-effect transistor-based predistorter 43 may be a transmission predistorter, a two-way predistorter, a cascade predistorter, a reflection predistorter, or the like.

[0190] In the embodiment of the present application, when a Schottky diode-based predistorter 43 is used, the controller 41 can adjust the nonlinear characteristics of the Schottky diode-based predistorter 43 by adjusting the bias voltage of the Schottky diode, thereby adjusting the first distortion coefficient. When a field-effect transistor-based predistorter 43 is used, the controller 41 can adjust the nonlinear characteristics of the field-effect transistor-based predistorter 43 by adjusting the gate of the field-effect transistor, thereby adjusting the first distortion coefficient.

[0191] In some possible implementations, when selecting a predistorter 43, a predistorter 43 having a gain curve that is inverse to the nonlinear characteristics of the power amplifier 3 is selected. For example, if the gain curve corresponding to the nonlinear characteristics of the power amplifier 3 is a gain curve with a single inflection point, a predistorter 43 having a gain curve with a single inflection point may be selected. As shown in FIG14 , when the gain curve of the power amplifier 3 has multiple inflection points, the operating range of the power amplifier 3 may be divided into multiple signal power segments based on the signal power, with multiple predistorters 43 connected in parallel corresponding to different signal power segments.

[0192] Exemplarily, the signal power segment is divided into multiple signal power intervals with different inflection points. Taking the case where the gain curve of the power amplifier 3 has three inflection points as an example, two predistorters 43 connected in parallel can be set, namely the first predistorter and the second predistorter. Take the case where the first predistorter is a double-inflection-point predistorter and the second predistorter is a single-inflection-point predistorter as an example. As shown in Figure 22, before the signal power point D, it is the gain curve of the first predistorter. After the signal power point D, it is the gain curve of the second predistorter. The working interval before the signal power point D can be divided into the first signal power segment, and the working interval after the signal power point D can be divided into the second signal power segment. When the signal power of the first signal is in the first signal power segment, the first predistorter generates the second signal according to the first distortion coefficient and the first signal and outputs it to the power amplifier 3. At this time, the first signal power range can be divided into three signal power intervals based on the inflection points within the first signal power range, corresponding to the first signal power interval before signal power point B, the second signal power interval between signal power point B and signal power point C, and the third signal power interval between signal power point C and signal power point D. Adaptively, three first switches 4221 and three integrator circuits 4224 are used to correspond to the first signal power interval, the second signal power interval, and the third signal power interval, respectively. When the signal power is greater than signal power point D, a second predistorter is used to generate a second signal based on the first distortion coefficient and the first signal, and output the second signal to the power amplifier 3.

[0193] For example, the signal power segment is divided into multiple signal power intervals within a certain power range. For example, the first signal power segment can be divided into three equal parts, corresponding to the first signal power interval, the second signal power interval, and the third signal power interval. The second signal power segment can also be divided into different signal power intervals in equal parts.

[0194] The signal adjustment method proposed in the embodiment of the present application is an adaptive learning predistortion adjustment method, which can be applied to the adjustment of an analog predistorter as well as the adjustment of a digital predistorter.

[0195] For example, in the application scenario of radio frequency signals, gallium nitride (GaN) power amplifiers are often used. When a gallium nitride power amplifier operates in a range close to saturation, nonlinear distortion will occur. The nonlinear power range in which nonlinear distortion occurs can be divided into a low power range, a medium power range, and a high power range. In the low power range, the slope of the gain curve of the power amplifier 3 decreases relatively gently. In the medium power range, the rate of change of the slope of the gain curve of the power amplifier 3 decreases to a certain extent. In the high power range, the slope of the gain curve of the power amplifier 3 decreases more significantly. The gallium nitride power amplifier can be regarded as a power amplifier 3 with a double inflection point. As shown in FIG16 , a parallel predistorter 43 based on a Schottky diode 431 is shown. FIG21 is a gain curve of the predistorter 43, and it can be seen that the parallel predistorter 43 is a double inflection point predistorter. By dividing the signal power into three intervals and adjusting the bias voltage of the Schottky diode 431 , the nonlinear characteristics of the predistorter 43 are opposite to the nonlinear characteristics of the power amplifier 3 in the current working signal power interval.

[0196] In an embodiment of the present application, the signal power segment can be divided into multiple signal power intervals, which can be set according to different division criteria. For the predistorter 43 and the power amplifier 3 with an inflection point, the working interval can be divided into signal power intervals, and for the predistorter 43 and the power amplifier 3 without an inflection point, the working interval can also be divided into signal power intervals. For example, for the power amplifier 3 and the predistorter 43 with an inflection point, the inflection point can be used as the division of different signal power intervals based on the nonlinear characteristics of the power amplifier 3 and the predistorter 43, or other forms (such as a fixed interval range, or a fixed change range) can be used for division. For the predistorter 43 without an inflection point, the interval range can be fixed, or the interval range with a fixed change range, etc. can be divided. Regardless of the division adopted, the embodiment of the present application can be implemented.

[0197] In some possible implementations, as shown in FIG13 , the signal conditioning circuit 4 further includes a nonlinear detector 47, which is coupled to the power amplifier 3 and the controller 41. The nonlinear detector is used to obtain cross-modulation components of the transmission signal.

[0198] In some possible implementations, within a cycle: after adjusting the first distortion coefficient according to the error feedback signal, a cross-modulation component of the transmitted signal is obtained; if the cross-modulation component of the current cycle is greater than the first component value, an adjustment amplitude and / or modulation direction of the first distortion coefficient in the next cycle is determined based on a difference between the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle. If the cross-modulation component of the current cycle is less than or equal to the first component value, the first distortion coefficient in the next cycle is controlled to be equal to the first distortion coefficient in the current cycle.

[0199] For example, for multiple consecutive cycles, the magnitudes of the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle can be compared. If the cross-modulation component of the current cycle is smaller than that of the previous cycle, the adjustment direction and / or adjustment amplitude of the current cycle are used in the next cycle. If the cross-modulation component of the current cycle is larger than that of the previous cycle, the magnitudes of the cross-modulation components within three consecutive cycles can be compared to determine the adjustment direction and / or adjustment amplitude for the next cycle.

[0200] For example, taking three consecutive cycles as an example, if the cross-modulation components within the three cycles are not less than or equal to the first component value, it is considered that after adjusting the first distortion coefficient within the three cycles, the power amplifier 3 still has nonlinear distortion. In the first cycle, the first distortion coefficient is adjusted, and the cross-modulation component X of the first cycle is detected. In the second cycle, the first distortion coefficient is adjusted, and the cross-modulation component Y of the second cycle is detected. In the third cycle, the first distortion coefficient is adjusted, and the cross-modulation component Z of the third cycle is detected. As shown in Figure 23, if the third cycle is the current cycle, the following judgment process can be performed:

[0201] Determine whether Y is less than both X and Z. If so, assume the second cycle's adjustment direction and magnitude are superior to those of the first and third cycles, and make adjustments in the next cycle using the second cycle's direction and magnitude. If Y is neither less than X nor less than Z, determine the magnitudes of Y and Z.

[0202] If Y is less than or equal to Z, then in the next cycle, an adjustment is made in the opposite direction of the third cycle. If Y is greater than Z, then in the next cycle, an adjustment is made in the same direction as the third cycle.

[0203] For example, in a plurality of consecutive cycles, the adjustment amplitude of each cycle may be a fixed amplitude, or may be an amplitude that is adjustable according to a comparison of cross-modulation components in the plurality of cycles.

[0204] For example, when a predistorter 43 based on a field-effect transistor (FET) is used, the parameter to be adjusted is the FET's gate voltage. In this case, the adjustment direction represents increasing or decreasing the gate voltage, and the adjustment amplitude represents the value of the gate voltage increase or decrease. When a predistorter 43 based on a Schottky diode 431 is used, as shown in FIG21 , the parameter to be adjusted is the bias voltage of the Schottky diode 431. Furthermore, the attenuation of the signal input to the predistorter 43 can also be adjusted. As shown in FIG21 , adjusting the bias voltage can adjust the expansion of the gain curve, while adjusting the attenuation can adjust the position at which the gain curve begins to expand. In this case, the parameters to be adjusted are the bias voltage and / or the attenuation. For the bias voltage, the adjustment direction is increasing or decreasing the bias voltage, and the adjustment amplitude represents the magnitude of the increase or decrease in the bias voltage. For the attenuation, the adjustment direction is increasing or decreasing the attenuation, and the adjustment amplitude represents the magnitude of the increase or decrease in the attenuation. When the bias voltage and attenuation level need to be adjusted simultaneously, the two parameters can be adjusted within one cycle according to the process shown in FIG. 23 , and there is no limitation on the adjustment order of the two parameters.

[0205] For example, when the error detector 42 including the structures shown in FIG7, FIG8, FIG9, and FIG10 is used, the encoding circuit 421 is used to generate the interval control signal in the form of a digital signal. The specific control timing is shown in FIG24. It can be seen that:

[0206] During the second cycle, the controller 41 adjusts the first distortion coefficient based on the value of the error feedback signal during the first cycle, and determines the adjustment direction and / or adjustment amplitude for the second cycle based on the comparison of the cross-modulation components. During the t1 period, the error detector 42 uses a second control signal to control the zeroing circuit 42242 to clear the error feedback signal generated during the first cycle. During the t2 period, the error detector 42 receives the first voltage signal during the second cycle and generates an error feedback signal during the second cycle. During the t3 period, the error detector 42 uses a first control signal to control the voltage holding circuit 42243 to output the error feedback signal generated during the second cycle to the controller 41.

[0207] During the third period, the controller 41 adjusts the first distortion coefficient based on the value of the error feedback signal during the second period, and determines the adjustment direction and / or adjustment amplitude for the second period based on the comparison results of the cross-modulation components during the first, second, and third periods. During the t1 period, the error detector 42 uses a second control signal to control the zeroing circuit 42242 to clear the error feedback signal generated during the second period. During the t2 period, the error detector 42 receives the first voltage signal during the third period and generates an error feedback signal during the third period. During the t3 period, the error detector 42 uses a first control signal to control the voltage holding circuit 42243 to output the error feedback signal generated during the third period to the controller 41.

[0208] In the embodiment of the present application, the duration of each cycle can reach the microsecond (μs) level. The adjustment of the first distortion coefficient of the predistorter 43 is very fast. By adjusting the first distortion coefficient of the predistorter 43 in real time over a continuous cycle, accurate and timely compensation of the nonlinear distortion of the power amplifier 3 is achieved.

[0209] In some possible implementations, if the cross-modulation component of the current cycle is less than or equal to the first component value, the first distortion coefficient in the next cycle is controlled to be equal to the first distortion coefficient in the current cycle.

[0210] In this embodiment of the present application, when the cross-modulation negative energy is less than or equal to the first component value, it can be determined that power amplifier 3 does not have nonlinear distortion. In this case, the first distortion coefficient of predistorter 43 can be controlled not to be adjusted in the next cycle. This embodiment of the present application can reduce the number of adjustments to predistorter 43, thereby improving system stability. Furthermore, reducing the number of adjustments can also reduce system power consumption and control complexity.

[0211] Embodiments of the present application provide a signal conditioning circuit, a signal conditioning method, a signal processing circuit, and a transmitting device. The signal conditioning circuit includes a predistorter coupled to a front stage of a power amplifier. The predistorter has nonlinear characteristics that are inverse to the nonlinear characteristics of the power amplifier. The signal conditioning circuit divides the operating range of the power amplifier into multiple signal power ranges according to the signal power and detects the current operating signal power range of the power amplifier. The signal conditioning circuit also detects the degree of nonlinear distortion of the power amplifier and adjusts the nonlinear characteristics of the predistorter based on the degree of nonlinear distortion of the power amplifier. A first signal is processed by the predistorter and the power amplifier to obtain a transmit signal. The nonlinear characteristics of the power amplifier are compensated for using the adjusted nonlinear characteristics of the predistorter, such that the signal power of the transmit signal is linearly related to the signal power of the first signal. By dividing the operating range of the power amplifier into multiple signal power ranges, the embodiments of the present application can more quickly adjust the nonlinear characteristics of the predistorter and reduce the difficulty of adjusting the nonlinear characteristics of the predistorter. This allows for faster and more accurate compensation of the nonlinear characteristics of the power amplifier.

[0212] As shown in Figure 25, an embodiment of the present application also provides a chip system 8. The chip system 8 includes at least one controller 81 and at least one interface circuit 82. At least one controller 81 and at least one interface circuit 82 can be interconnected through lines. The controller 81 is used to support the chip system 8 to implement the various functions or steps in the above-mentioned method embodiments, such as executing the above-mentioned methods shown in Figures 17 and 18. At least one interface circuit 82 can be used to receive signals from other devices (such as memories) or send signals to other devices (such as communication interfaces). The chip system 8 may include chips and may also include other discrete devices.

[0213] An embodiment of the present application also provides a computer-readable storage medium, which includes instructions. When the instructions are executed on the above-mentioned chip system or receiving device, the chip system or receiving device executes each function or step in the above-mentioned method embodiment, such as executing the method shown in Figures 17 and 18.

[0214] An embodiment of the present application also provides a computer program product including instructions. When the instructions are executed on the above-mentioned chip system or electronic device, the chip system or electronic device executes each function or step in the above-mentioned method embodiment, for example, executes the method shown in Figures 17 and 18.

[0215] Regarding the technical effects of the chip system, computer-readable storage medium, and computer program product, refer to the technical effects of the previous method embodiments.

[0216] The controller involved in the embodiments of the present application may be a chip. For example, it may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processor unit (CPU), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), or other integrated chips.

[0217] The memory involved in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0218] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0219] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0220] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, devices and modules can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0221] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0222] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located on a single device or distributed across multiple devices. Some or all of the modules may be selected to achieve the purpose of this embodiment based on actual needs.

[0223] In addition, the functional modules in the various embodiments of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0224] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loading and executing computer program instructions on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode to another website, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more media that can be integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state disk (SSD)).

[0225] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A signal conditioning circuit, characterized in that: coupled to a power amplifier; the signal adjustment circuit includes a controller, an error detector and a predistorter; wherein, The predistorter is configured to input a first signal and generate a second signal using a first distortion coefficient; The power amplifier is configured to amplify the second signal to obtain a transmission signal; The error detector is configured to generate an error feedback signal based on the transmit signal and the first signal; the error feedback signal corresponds to one of a plurality of signal power intervals, and the error feedback signal is configured to instruct the power amplifier to generate nonlinear distortion in the signal power interval; The controller is used to: The first distortion coefficient is adjusted according to the error feedback signal; the first distortion coefficient is used to indicate the ratio of the signal power of the second signal to the signal power of the first signal, and the first distortion coefficient is in a nonlinear relationship with the signal power of the first signal.

2. The circuit according to claim 1, wherein: The error detector includes an encoding circuit and a voltage processing circuit; the voltage processing circuit includes a plurality of first switches and a plurality of feedback output terminals; the plurality of first switches correspond to the plurality of feedback output terminals one by one; the voltage processing circuit is coupled to the controller via the plurality of feedback output terminals; wherein, the encoding circuit being configured to output an interval control signal to the voltage processing circuit, wherein a value of the interval control signal is configured to indicate a signal power interval in which the signal power of the first signal is located or a signal power interval in which the signal power of the transmit signal is located, and the interval control signal is configured to turn on one of the plurality of first switches according to the value of the interval control signal; The voltage processing circuit is configured to generate the error feedback signal according to the transmission signal and the first signal, and output the error feedback signal to the controller through a feedback output terminal among the multiple feedback output terminals corresponding to the first switched-on switch.

3. The circuit according to claim 2, characterized in that The voltage processing circuit further includes a differential voltage circuit and a plurality of integration circuits; the output end of the differential voltage circuit is coupled to the plurality of integration circuits in a one-to-one correspondence through the plurality of first switches; the output end of one of the integration circuits serves as one of the feedback output ends of the voltage processing circuit; wherein, The differential voltage circuit is configured to obtain a first voltage signal based on the transmit signal and the first signal, and output the first voltage signal to the corresponding integration circuit via the turned-on first switch; the first voltage signal is configured to indicate a voltage difference between the transmit signal and the first signal; The integration circuit is configured to generate the error feedback signal according to the first voltage signal and output the error feedback signal to the controller.

4. The circuit according to claim 3, characterized in that One of the integration circuits includes an integrator, a zeroing circuit, and a voltage holding circuit; the integrator is coupled to the zeroing circuit and the voltage holding circuit respectively; wherein, The integrator is used to perform time integration on the input first voltage signal to generate an error feedback signal; the voltage holding circuit is used to input a first control signal and the error feedback signal; the first control signal is used to control the voltage holding circuit to output the error feedback signal to the controller; The zeroing circuit is used to input a second control signal; the second control signal is used to control the zeroing circuit to clear the error feedback signal generated by the integrator.

5. The circuit according to claim 3 or 4, characterized in that The differential voltage circuit includes a differential operational amplifier and an envelope detector; The first input terminal of the differential operational amplifier serves as the first input terminal of the differential voltage circuit, and the first input terminal of the differential operational amplifier is used to input the transmission signal; the second input terminal of the differential operational amplifier serves as the second input terminal of the differential voltage circuit, and the second input terminal of the differential operational amplifier is used to input the first signal; the output terminal of the differential operational amplifier is coupled to the input terminal of the envelope detector; The output end of the envelope detector serves as the output end of the differential voltage circuit, and the output end of the envelope detector is used to output the first voltage signal.

6. The circuit according to any one of claims 2 to 5, characterized in that: The encoding circuit includes a peak detector and an analog-to-digital conversion amplitude encoder; wherein, The peak detector is configured to input the first signal or the transmit signal to obtain a first power signal; The analog-to-digital conversion amplitude encoder is used to generate the interval control signal according to the signal amplitude value of the first power signal; the signal amplitude value of the first power signal is used to indicate the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmitted signal is located.

7. The circuit according to any one of claims 2 to 6, characterized in that: The signal adjustment circuit further includes a synchronization circuit; The synchronization circuit is used to perform time delay synchronization processing and amplitude alignment processing on the transmission signal and the first signal, and then output the processed transmission signal and the processed first signal to the voltage processing circuit.

8. The circuit according to any one of claims 1 to 7, characterized in that: The signal adjustment circuit further includes a channel linearizer; the channel linearizer is used to input the first signal and output the first signal to the predistorter; the channel linearizer includes a high-pass filter and a low-pass filter connected in series.

9. The circuit according to any one of claims 1 to 8, characterized in that: The signal adjustment circuit further includes a gain controller; wherein, The gain controller is used to input the transmission signal, perform gain attenuation on the input transmission signal, and then output the signal to the error detector.

10. The circuit according to any one of claims 1 to 9, characterized in that: The signal conditioning circuit further includes a nonlinear detector; wherein, The nonlinear detector is used to obtain the cross-modulation component of the transmission signal; The controller is also used for: Within a cycle, if the cross-modulation component of the current cycle is greater than the first component value, the adjustment amplitude and / or modulation direction of the first distortion coefficient in the next cycle is determined based on the difference between the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle.

11. The circuit according to claim 10, characterized in that The controller is also used for: In a cycle, if the cross-modulation component of the current cycle is less than or equal to the first component value, the first distortion coefficient in the next cycle is controlled to be equal to the first distortion coefficient in the current cycle.

12. A signal adjustment method, characterized in that: Based on a signal conditioning circuit and a power amplifier; the signal conditioning circuit includes a predistorter; wherein the predistorter is configured to input a first signal and generate a second signal with a first distortion coefficient; the power amplifier is configured to amplify the second signal to obtain a transmission signal; the method includes: In one cycle: generating an error feedback signal according to the first signal and the transmit signal; the error feedback signal corresponding to one of a plurality of signal power intervals; the error feedback signal being used to instruct the power amplifier to generate nonlinear distortion in the signal power interval; The first distortion coefficient is adjusted according to the error feedback signal; the first distortion coefficient is used to indicate the ratio of the signal power of the second signal to the signal power of the first signal, and the first distortion coefficient is in a nonlinear relationship with the signal power of the first signal.

13. The method according to claim 12, characterized in that The process of generating an error feedback signal according to the first signal and the transmit signal specifically includes: generating an interval control signal according to the signal power of the first signal or the signal power of the transmitted signal; the interval control signal is used to indicate the signal power interval in which the signal power of the first signal is located or the signal power interval in which the signal power of the transmitted signal is located; The signal power interval corresponding to the error feedback signal is determined according to the interval control signal.

14. The method according to claim 13, characterized in that The process of generating an error feedback signal according to the first signal and the transmit signal specifically includes: obtaining a first voltage signal according to the first signal and the transmission signal; wherein the first voltage signal is used to indicate a voltage difference between the transmission signal and the first signal; Performing time integration on the first voltage signal to generate the error feedback signal.

15. The method according to claim 14, characterized in that The process of obtaining the first voltage signal according to the first signal and the transmission signal specifically includes: The first signal and the transmission signal are differentially amplified, and the differentially amplified signals are envelope detected to obtain the first voltage signal.

16. The method according to any one of claims 12 to 15, characterized in that: The method further comprises: In one cycle: Before generating the error feedback signal according to the first signal and the transmit signal, delay synchronization processing and amplitude alignment processing are performed on the transmit signal and the first signal.

17. The method according to any one of claims 12 to 16, characterized in that: The method further comprises: In one cycle: After adjusting the first distortion coefficient according to the error feedback signal, obtaining a cross-modulation component of the transmit signal; If the cross-modulation component of the current cycle is greater than the first component value, the adjustment amplitude and / or modulation direction of the first distortion coefficient in the next cycle is determined according to the difference between the cross-modulation component of the current cycle and the cross-modulation component of the previous cycle.

18. The method according to claim 17, characterized in that The method further comprises: In one cycle: If the cross-modulation component of the current cycle is less than or equal to the first component value, the first distortion coefficient in the next cycle is controlled to be equal to the first distortion coefficient in the current cycle.

19. A signal processing circuit, characterized in that: It includes a power amplifier and a signal adjustment circuit as described in any one of claims 1 to 11; the signal adjustment circuit is used to input a first signal and generate a second signal with a first distortion coefficient; the power amplifier is used to amplify the second signal to obtain a transmission signal; the signal power of the first signal is linearly related to the signal power of the transmission signal.

20. A transmitting device, characterized in that: The transmitting device includes a phased array unit and the signal processing circuit according to claim 19.

21. A computer-readable storage medium, characterized in that The computer-readable storage medium includes instructions; when the instructions are executed on the signal processing circuit according to claim 19 or the transmitting device according to claim 20, the signal processing circuit or the transmitting device executes the method according to any one of claims 12-18.

22. A computer program product comprising instructions, characterized in that When the instruction is executed on the signal processing circuit according to claim 19 or the transmitting device according to claim 20, the signal processing circuit or the transmitting device is caused to perform the method according to any one of claims 12 to 18.

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