Chip testing method, device, apparatus and storage medium

Abstract

The application is suitable for the chip technical field, and provides a chip testing method, device, equipment and storage medium, the method is applied to a temperature transmitter chip, comprising: obtaining a direct current parameter of a chip to be tested, the direct current parameter comprising at least one of the following: a current parameter and a voltage parameter; performing direct current parameter testing according to the direct current parameter of the chip to be tested to obtain a first test result; obtaining a temperature parameter of the chip to be tested; performing temperature parameter testing according to the temperature parameter of the chip to be tested to obtain a second test result; when the first test result or the second test result does not satisfy a preset condition, the chip to be tested is determined as an unqualified chip. The scheme combines direct current parameter detection and temperature parameter detection, can effectively identify and screen out unqualified chips, and guarantees the quality and performance of the final product.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip technical field, and particularly to a chip testing method, device, equipment and storage medium. BACKGROUND

[0002] Chip testing refers to the process of evaluating and verifying semiconductor devices during production to ensure their performance and functionality meet design specifications. Chip testing can be divided into several stages, including design verification, functional testing, parameter testing, reliability testing, etc.

[0003] Temperature transmitter chips are electronic components used to measure temperature and convert it into a standard signal, usually voltage or current. These chips are commonly used in industrial automation, environmental monitoring, HVAC systems, automobiles, home appliances, and other applications requiring temperature monitoring and control. Temperature transmitter chips can process temperature data collected by temperature sensors such as thermocouples or thermistors and output standardized instrument signals.

[0004] Traditional temperature transmitter chip testing methods only test at specific temperature points, which cannot fully reflect the performance of the device in actual application, especially in the case of frequent temperature changes, it is difficult to obtain accurate chip test results. SUMMARY

[0005] The embodiments of the present application provide a chip testing method, device, equipment and storage medium, which can solve the technical problem of how to accurately test whether the temperature transmitter chip is qualified.

[0006] In a first aspect, the embodiments of the present application provide a chip testing method applied to a temperature transmitter chip, comprising:

[0007] Obtaining the direct current parameters of the chip to be tested, the direct current parameters including at least one of the following: current parameters and voltage parameters.

[0008] Performing direct current parameter testing according to the direct current parameters of the chip to be tested to obtain a first test result.

[0009] Obtaining the temperature parameters of the chip to be tested.

[0010] Performing temperature parameter testing according to the temperature parameters of the chip to be tested to obtain a second test result.

[0011] When the first test result or the second test result does not meet the preset condition, the chip to be tested is determined as an unqualified chip.

[0012] In one implementation, performing direct current parameter testing according to the direct current parameters of the chip to be tested to obtain a first test result, comprising:

[0013] set the voltage of all pins of the chip to be tested to 0 volt;

[0014] apply a preset current to the preset pin by the power management device, detect the voltage of the preset pin, and obtain a first test result.

[0015] In an implementation manner, the voltage of the preset pin is detected to obtain the first test result, and the detection includes:

[0016] when the negative current flows through the diode connected to the ground, the first voltage is detected;

[0017] if the first voltage is lower than a first preset threshold, the preset pin is determined as an open circuit;

[0018] if the first voltage is higher than a second preset threshold, the preset pin is determined as a short circuit.

[0019] In an implementation manner, the voltage of the preset pin is detected to obtain the first test result, and the detection includes:

[0020] when the positive current flows through the diode connected to the power supply, the second voltage is detected;

[0021] if the second voltage is higher than a third preset threshold, the preset pin is determined as an open circuit;

[0022] if the second voltage is lower than a fourth preset threshold, the preset pin is determined as a short circuit.

[0023] In an implementation manner, a temperature parameter test is performed according to a temperature parameter of the chip to be tested to obtain a second test result, and the test includes:

[0024] obtain a first temperature value and a second temperature value of the chip to be tested;

[0025] calculate a temperature difference between the first temperature value and the second temperature value;

[0026] when the temperature difference meets a preset temperature difference, the temperature is dynamically written into the chip to be tested to obtain the second test result.

[0027] In an implementation manner, the temperature value of the chip to be tested is calculated according to a level width of a temperature signal collected by the temperature sensor, and a relationship between the level width and the temperature value of the chip to be tested is:

[0028]

[0029] wherein, Temp represents the temperature value of the chip to be tested, T represents the level width of the temperature signal, and T1 represents the level width of the temperature signal.

[0030] In an implementation manner, the first temperature value and / or the second temperature value is converted into a binary code to be written into the chip to be tested, to obtain binary data.

[0031] The binary data is read for checking, and when the read checking fails, the chip to be tested is determined as a defective chip.

[0032] In a second aspect, an embodiment of the present application provides a chip testing device, which has the function of implementing the method in the first aspect or any possible implementation manner thereof. Specifically, the device includes units for implementing the method in the first aspect or any possible implementation manner thereof.

[0033] In one embodiment, the device includes:

[0034] The obtaining unit is configured to obtain a direct current parameter of the chip to be tested, the direct current parameter including at least one of a current parameter and a voltage parameter.

[0035] The processing unit is configured to perform a direct current parameter test according to the direct current parameter of the chip to be tested, to obtain a first test result.

[0036] The obtaining unit is further configured to obtain a temperature parameter of the chip to be tested.

[0037] The processing unit is further configured to perform a temperature parameter test according to the temperature parameter of the chip to be tested, to obtain a second test result.

[0038] The processing unit is further configured to determine the chip to be tested as a defective chip when the first test result or the second test result does not satisfy a preset condition.

[0039] In a third aspect, an embodiment of the present application provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the computer device implements the method in any one of the implementation manners of the first aspect.

[0040] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, which stores a computer program. When the computer program is executed by a computer device, the computer device implements the method in any one of the implementation manners of the first aspect.

[0041] In a fifth aspect, an embodiment of the present application provides a computer program product, which, when executed on a computer device, causes the computer device to execute the method in any one of the implementation manners of the first aspect.

[0042] Compared with the prior art, the embodiment of the present application has the beneficial effects that: by acquiring the direct current parameters (current parameters and voltage parameters) of the chip to be tested and performing direct current parameter testing, the electrical characteristics of the chip in actual operation can be tested, and it is ensured that the chip operates within the specified voltage and current range; by acquiring different temperature parameters of the chip and performing temperature parameter testing, the working range and tolerance of the chip under different temperature conditions can be understood, and it is ensured that the chip can still maintain stable performance under environmental temperature changes, avoiding failure caused by temperature fluctuations; by combining the two detection processes, unqualified chips can be effectively identified and screened out, the quality and performance of the final product are ensured, and the cost of later maintenance and replacement is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 is a chip test system framework diagram provided by the embodiment of the present application.

[0044] Figure 2 is a flowchart of a chip test method provided by the embodiment of the present application.

[0045] Figure 3 is a pin structure diagram of a chip provided by the embodiment of the present application.

[0046] Figure 4 is a test schematic diagram of a diode to ground provided by the embodiment of the present application.

[0047] Figure 5 is a test schematic diagram of a power diode provided by the embodiment of the present application.

[0048] Figure 6 is a schematic diagram of a level width provided by the embodiment of the present application.

[0049] Figure 7 is a flowchart of a chip test method provided by the embodiment of the present application.

[0050] Figure 8 is a structural schematic diagram of a chip test device provided by the embodiment of the present application.

[0051] Figure 9 is a structural schematic diagram of a computer device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0052] A temperature transmitter chip is usually an integrated circuit (IC) that is specifically used for temperature measurement and signal conversion. Its functions include receiving data from a temperature sensor, performing signal processing (such as amplification, filtering, and linearization), and then outputting a standardized voltage or current signal for transmission and further processing.

[0053] The following will be explained in detail Figure 1 the test scene of the temperature transmitter chip.

[0054] Figure 1 is a chip test system framework provided by the embodiment of the present application.

[0055] As Figure 1 shown, Figure 1 the probe (Prober) and the external temperature sensing module in the temperature transmitter chip are used to feed back the real-time temperature signal of the chip to the tester by using the temperature sensor during IC testing. The tester collects the temperature signal and then performs subsequent testing.

[0056] TR6836 tester is a 384-pin digital logic tester, which takes FPGA components as the design core, and designs SEQ, timing generator and format in different FPGAs. SEQ controls 8-pin waveform FPGA, and the highest test frequency can reach 33MHz. The system has the functions of pin level setting, 16 groups of timing setting, pin timing generator, 4 groups of drive / compare markers and 4-8M mode storage. Based on the concept of distributed control system, the independently used pin electrical board (PEB) is developed, and each 8 pins can be used for one test site. The system supports simultaneous parallel testing of 8 test sites. The system is connected to the DUT Board or the probe card through a cable, the host uses Windows XP operating system, and the programming uses graphical user interface (GUI) and C++ language in parallel. The PC and the tester are connected through PCI INF interface, which is a 32-bit parallel port with 50MHz / 100MHz system clock.

[0057] The present application mainly uses TRI tester TR6836 to realize the direct current (DC) parameter test and temperature parameter test of IC.

[0058] In order to further illustrate the technical solutions of the present application, the following will be explained by specific embodiments.

[0059] Figure 2 is a flowchart of a chip test method provided by the embodiment of the present application.

[0060] As Figure 2 shown, the above method is applied to the temperature transmitter chip, and includes the following steps S201-S205.

[0061] S201, obtaining the direct current parameter of the chip to be tested, the direct current parameter including at least one of the following: current parameter and voltage parameter.

[0062] It can be understood that the corresponding pins of the chip to be tested are connected to measure the direct current and voltage. For example, for the specific function of the chip, consult the data manual to determine the direct current parameters to be measured (such as the power supply voltage, input current or output current of the chip, etc.), measure and record the measured current and voltage values.

[0063] Through accurate current and voltage readings, the basic working condition of the chip can be ensured to meet the expected conditions.

[0064] S202, direct current parameter testing is performed according to the direct current parameters of the chip to be tested, and a first test result is obtained.

[0065] It can be understood that the obtained direct current parameters are verified according to the pre-set corresponding qualified threshold, and it is judged whether the measured direct current parameters are within the allowable range, and the first test result is recorded.

[0066] Through automatic testing, human intervention is reduced, test efficiency and accuracy are improved, measurement error is reduced, and unqualified chips can be quickly identified.

[0067] S203, obtaining the temperature parameter of the chip to be tested.

[0068] It can be understood that the temperature sensor or dedicated temperature monitoring equipment (such as thermocouple or infrared thermometer) is used to measure on or near the chip to obtain the working temperature of the chip to be tested. The temperature parameter can also be obtained according to the environmental conditions (such as the temperature of the test room), or the temperature information can be directly read through the specific monitoring pin of the chip (if the chip provides this function). The specific method of obtaining the temperature parameter can be selected according to the actual situation, which is not limited here.

[0069] By testing the working temperature of the chip, the performance of the chip under actual working conditions can be evaluated to ensure the quality of the chip.

[0070] S204, temperature parameter testing is performed according to the temperature parameter of the chip to be tested, and a second test result is obtained.

[0071] The obtained temperature parameter is compared with the pre-set temperature standard to confirm the performance of the chip at a specific temperature (for example, whether there is a problem of overheating or loss of low-temperature characteristics), and the second test result is recorded. Similar to the direct current parameter test, the eligibility judgment and specific temperature value are given.

[0072] The results of the temperature test can help detect the impact of the environment on the performance of the chip, thereby ensuring the reliability and stability of the chip under extreme conditions.

[0073] S205, when the first test result or the second test result does not meet the pre-set conditions, the chip to be tested is determined as an unqualified chip.

[0074] Compare the first test result and the second test result with the preset qualified condition, if any one of the test results does not meet the condition, mark the chip as unqualified, and record the reason for subsequent analysis. Generate a detailed record in the test report, including all test parameters and results.

[0075] Through this test method, it can be quickly judged which chips do not meet the quality control standard. This systematic evaluation method enhances the reliability of mass production and reduces the risk of unqualified chips flowing into the market.

[0076] In an implementation manner, a direct current parameter test is performed according to a direct current parameter of the chip to be tested, and a first test result is obtained, including: setting the voltage of all pins of the chip to be tested to 0 volts; applying a preset current to a preset pin by using a power management device, and detecting the voltage of the preset pin to obtain the first test result.

[0077] It can also be understood that this step is mainly to perform an open / short (OS) test, and the measurement is performed by using a TR6836 test machine DC module.

[0078] The PMU-based open / short test is a serial static DC test. First, all pins of the device including the power supply and the ground are pulled down to 0V, then the PMU is connected to a single DUT pin, and a current is driven to flow along the bias direction through the protection diode of the pin. A negative current will flow through the diode connected to the ground, and a positive current will flow through the diode connected to the power supply. The size of the current is generally between 100uA and 500uA. When the current flows through the diode, a voltage drop of about 0.65V will be caused at the P-N junction of the diode, and the voltage at the connection point is detected to obtain the test result.

[0079] The following will be specifically introduced in combination with Figure 3 .

[0080] Figure 3 is a pin structure diagram of a chip provided by an embodiment of the present application.

[0081] As shown in Figure 3 , the chip includes 31 pins available for testing.

[0082] First, a chip test platform is built, including a chip to be tested, a connecting lead, a power management device (such as a programmable power supply), and a measuring instrument (such as a digital multimeter or an oscilloscope). Ensure that the power supply of the test equipment has been stabilized, all connections have been verified, and the voltage of all pins is set to 0 volts.

[0083] In one example, all pins of the chip to be tested are programmed to be in a so-called "safe mode" to ensure that all pins output 0 volts.

[0084] It can be understood that setting all pin voltages to 0 volts at the beginning of the test can ensure that there is no other signal interference, providing a clean environment for subsequent current application and voltage measurement, ensuring that the test results are accurate and not affected by other signals or voltage fluctuations.

[0085] If the chip has internal register control pin states, it can be controlled by sending instructions (such as through I2C or SPI protocols) to ensure that no pin outputs a signal.

[0086] The preset pins and the required current values are input to the power management device to ensure that the power management device can provide accurately controlled voltage and current output, and to select the appropriate voltage value for the pins to be tested.

[0087] The power management device is started to apply a preset current to the specified test pins. At this time, the voltage of this pin will change due to the flow of current.

[0088] For example, after applying a preset current, the voltage of a pin may rise to a certain specific value, which is related to the resistance value and current connected to the pin.

[0089] The voltage of each pin after the current is applied is monitored in real time using a measuring instrument (such as a digital multimeter), and the voltage results of each pin are recorded.

[0090] Particular attention is paid to determining which pins work normally when a current is applied and which pins have abnormal voltages (such as being too high or unstable).

[0091] The measured voltage values are compared with the preset standards to analyze whether they are within the required range. If the voltage of some pins fails to meet expectations or exceeds the safe range, it may indicate that the pin has a fault or that the chip has other health problems.

[0092] By applying a preset current and measuring the reaction voltage, the integrity of the internal circuits and pin connections of the chip can be effectively verified to ensure that they do not have short circuits, overvoltages, or other faults, thereby improving the production quality of the chip.

[0093] In one implementation, detecting the voltage of the preset pin to obtain a first test result includes: detecting a first voltage when a negative current flows through a diode connected to ground; if the first voltage is lower than a first preset threshold, determining that the preset pin is an open circuit; and if the first voltage is higher than a second preset threshold, determining that the preset pin is a short circuit.

[0094] The following will be described in conjunction with Figure 4To be specific.

[0095] Figure 4 is a test schematic diagram of a ground diode provided by an embodiment of the present application.

[0096] As Figure 4 shown, a diode connected to ground below is tested, a reverse current of about -100uA is extracted by a PMU, a lower voltage limit of -1.5V (i.e., a first preset threshold) is set, and below -1.5V (such as -3V) is an open circuit; a voltage upper limit of -0.2V (i.e., a second preset threshold) is set, and above -0.2V (such as -0.1V) is a short circuit.

[0097] It can be understood that the specific voltage values can be set differently by the user according to different chips, and here is only an example, which is not limited.

[0098] In an implementation mode, the voltage of the preset pin is detected to obtain a first test result, including: detecting a second voltage when a forward current flows through a diode connected to a power supply; if the second voltage is higher than a third preset threshold, the preset pin is determined to be an open circuit; and if the second voltage is lower than a fourth preset threshold, the preset pin is determined to be a short circuit.

[0099] To be specific, the following Figure 5 will be described.

[0100] Figure 5 is a test schematic diagram of a power diode provided by an embodiment of the present application.

[0101] A diode connected to a power supply above is tested, a forward current of about 100uA is driven by a PMU; a voltage upper limit of 1.5V (i.e., a third preset threshold) is set, and above 1.5V (such as 3V) is an open circuit; a voltage lower limit of 0.2V (i.e., a fourth preset threshold) is set, and below 0.2V (such as 0.1V) is a short circuit.

[0102] It can be understood that the specific voltage values can be set differently by the user according to different chips, and here is only an example, which is not limited.

[0103] The above OS test process can be represented by code as follows:

[0104] void OS(void)

[0105] {

[0106] ur.SetUR("Pullup_UR",false);

[0107] ur.SetUR("Func_UR",false);

[0108] ur.SetUR("UR1", false);

[0109] dps.FI("VDD", -300e-6, 2, CDPS::V_RNG_4V, CDPS::I_RNG_2MA, true, 15);

[0110] dps.MV("VDD", 2);

[0111] double vdd_os[8];

[0112] util.GetMeasValue("VDD", vdd_os);

[0113] util.TestLog("VDD", vdd_os);

[0114] / / <---POWER ON

[0115] dps.FV("VDD", 0.0, 19e-3, dps.V_RNG_4V, dps.I_RNG_20MA, true, 0);

[0116] util.dlyms(5);

[0117] / / <--PPMU FI=100uA

[0118] peb.ppmu.FISetting("OS_P_PINS", 100e-6, CPmu::I_RNG_400UA, 2, -2, 2);

[0119] peb.ppmu.MVSetting("OS_P_PINS", 1);

[0120] peb.ppmu.Trig();

[0121] PG_VALUE os_p_pins_val;

[0122] util.GetMeasValue("OS_P_PINS", os_p_pins_val);

[0123] util.TestLog("OS_P_PINS", os_p_pins_val);

[0124] / / <--PPMU FI=-100uA

[0125] peb.ppmu.FISetting("OS_N_PINS",-100e-6,CPmu::I_RNG_400UA,2,-2,2);

[0126] peb.ppmu.MVSetting("OS_N_PINS",1);

[0127] peb.ppmu.Trig();

[0128] PG_VALUE os_n_pins_val;

[0129] util.GetMeasValue("OS_N_PINS",os_n_pins_val);

[0130] util.TestLog("OS_N_PINS",os_n_pins_val);

[0131] / / <---POWER OFF

[0132] dps.FV("VDD",0.0,19e-3,dps.V_RNG_4V,dps.I_RNG_20MA,false,0);

[0133] peb.SetPMURelay("ALL_PINS",false);

[0134] peb.SetDCLRelay("ALL_PINS",false);

[0135] util.dlyms(1);

[0136] }

[0137] In an implementation mode, the temperature parameter test is performed according to the temperature parameter of the chip to be tested, and a second test result is obtained, including: obtaining temperature values of the chip to be tested twice to obtain a first temperature value and a second temperature value; calculating a temperature difference value of the first temperature value and the second temperature value; when the temperature difference value meets a preset temperature difference value, dynamically writing the temperature into the chip to be tested to obtain the second test result.

[0138] In combination with Figure 1 , the temperature sensor is connected to the IC through the Probe card, the real-time temperature of the IC is tested, and a voltage signal varying with the temperature is output. After being converted by the ADC into a digital signal and being modulated and converted by the PWM, the voltage signal is finally output in the form of a PWM pulse.

[0139] The pulse width program collected by the tester can be expressed as:

[0140] peb.TMU_MeasT("TempOut",peb.TF_MEASURE_PERIOD,peb.TF_SEL_PEL,peb.TF_MT_CLOCK_320NS);

[0141] peb.TMU_GetMeasValueT("TempOut",Tout_s);

[0142] util.dlyms(5);

[0143] peb.TMU_MeasT("TempOut",peb.TF_MEASURE_HIGH_PULSE,peb.TF_SEL_PEL,peb.TF_MT_CLOCK_320NS);

[0144] peb.TMU_GetMeasValueT("TempOut",HTout_s);

[0145] After the testing machine acquires the waveform fed back by the temperature sensor, it takes the amplitude of the temperature signal.

[0146] Figure 6 This is a schematic diagram of a voltage level width provided in an embodiment of this application.

[0147] like Figure 6 As shown, Figure 6 The signal level includes the temperature signal widths T and T1, and the real-time temperature of the chip can be calculated based on T and T1.

[0148] It is understandable that after obtaining two temperature readings, the temperature change can be calculated to detect whether the chip can remain stable during transient temperature changes.

[0149] In one implementation, the temperature value of the chip under test is calculated based on the voltage level width of the temperature signal acquired by the temperature sensor. The relationship between the voltage level width and the temperature value of the chip under test is as follows:

[0150]

[0151] Where Temp represents the temperature value of the chip under test, T represents the voltage level of the temperature signal, and T1 represents the voltage level of the temperature signal.

[0152] The procedure for converting voltage level width to temperature can be expressed as: temp1_gongyong=235-80*((Tout_s[site_flag]+0.000000001) / (HTout_s[site_flag]+0.000000001)).

[0153] After the test machine collects T and T1 using the TMU function of the PEB board card, the test machine calculates the real-time temperature of the chip according to the above-mentioned corresponding relationship between the level width and the temperature. The temperature of the IC is acquired again according to the temperature acquisition mode, and the difference between the two temperatures is calculated. If the difference is within the range of (-1℃, 1℃), the next test is performed.

[0154] In an implementation manner, the first temperature value and / or the second temperature value are converted into binary codes to be written into the chip to be tested, so as to obtain binary data; the binary data is read and verified, and when the read and verification fails, the chip to be tested is determined as an unqualified chip.

[0155] The read and verification of the written data is an important step to ensure the normal function of the chip. If the read and verification fails, it indicates that the chip has a fault, which may affect the normal work of the chip, and thus the chip needs to be rejected or further tested.

[0156] In an example, the test machine converts the temperature data into binary codes to be written into the chip, and performs read and verification after the writing, and the corresponding relationship is shown in Table 1.

[0157] Table 1

[0158] Temperature (°C) Binary data Hexadecimal data -25 1110 0111 0000 0000 E700H -0.0625 1111 1111 1111 0000 FFF0H 0 0000 0000 0000 0000 0000H 0.0625 0000 0000 0001 0000 0010H 25 0001 1001 0000 0000 1900H 75 0100 1011 0000 0000 4B00H

[0159] After the verification passes, it is detected whether the corresponding state of the chip reaches the expectation, and if the state of the chip reaches the expectation, the test passes.

[0160] The program of dynamically writing the temperature can be expressed as:

[0161] Temperature data: temp_site[0], temp_site[1], temp_site[2], temp_site[3]

[0162] void CHANGE_MEMORE_WRITE_DATA(void)

[0163] {

[0164] line_x = WRITE_TEMP_ST + 220;

[0165] for (j = 7; j >= 0; j--) / / low 8bites

[0166] {

[0167] sum_h = sum_h + temp_site[j];

[0168] if (temp_site[j] == 0)

[0169] {

[0170] / / P28, T175, T191, T207, T223, T239, T255, T15, T31, peb.GetPtnMemData(line_x+(7-j)*2,szPtn);

[0171] szPtn

[254] ='0'; / / site1

[0172] szPtn

[238] ='0'; / / site2

[0173] szPtn

[222] ='0'; / / site3

[0174] szPtn

[206] ='0'; / / site4

[0175] peb.SetPtnMemData(line_x+(7-j)*2,szPtn);

[0176] peb.GetPtnMemData(line_x+(7-j)*2+1,szPtn) szPtn

[254] ='0'; / / site1

[0177] szPtn

[238] ='0'; / / site2

[0178] szPtn

[222] ='0'; / / site3

[0179] szPtn

[206] ='0'; / / site4

[0180] peb.SetPtnMemData(line_x+(7-j)*2+1,szPtn);

[0181] }

[0182] else

[0183] {

[0184] peb.GetPtnMemData(line_x+(7-j)*2,szPtn);

[0185] szPtn

[254] ='1'; / / site1

[0186] szPtn

[238] ='1'; / / site2

[0187] szPtn

[222] ='1'; / / site3

[0188] szPtn

[206] = '1'; / / site4

[0189] peb.GetPtnMemData(line_x+(7-j)*2+1,szPtn) ; szPtn

[254] = '1'; / / site1

[0190] szPtn

[238] = '1'; / / site2

[0191] szPtn

[222] = '1'; / / site3

[0192] szPtn

[206] = '1'; / / site4

[0193] peb.GetPtnMemData(line_x+(7-j)*2+1,szPtn) ; szPtn

[254] = '1'; / / site1

[0194] }

[0195] }

[0196] }

[0197] }

[0198] peb.SetPinLevel("WT_PINS", "3.3V");

[0199] peb.SetPinLevel("P10", "6.75V");

[0200] peb.SetPinMode("WT_PINS", "NF");

[0201] peb.SetPinMode("P29", "RZ");

[0202] peb.SetPinMode("P31", "NRZ");

[0203] peb.SetTimingSetPeriod("4", 500);

[0204] peb.SetTimingSetPinEdge("4", "WT_PINS", "TS4_NF");

[0205] peb.SetTimingSetPinEdge("4", "P29", "TS4_RZ");

[0206] peb.SetTimingSetPinEdge ("4", "P31", "TS4_NRZ");

[0207] CHANGE_MEMORE_WRITE_DATA();

[0208] peb.SetPMURelay ("WT_PINS", false);

[0209] peb.SetDCLRelay ("WT_PINS", true);

[0210] dps.FV ("VDD", 3.3, 150e-3, dps.V_RNG_4V, dps.I_RNG_200MA, true, 0); util.dlyms (5);

[0211] peb.SetTestPatternOption (WRITE_TEMP_ST, WRITE_TEMP_ST, 1, false); peb.TestPattern (WRITE_TEMP_ST, WRITE_TEMP_SP, bPass);

[0212] util.FuncLog (true, bPass);

[0213] dps.FV ("VDD", 0.0, 150e-3, dps.V_RNG_4V, dps.I_RNG_200MA, true, 0); util.dlyms (5);

[0214] dps.FV ("VDD", 0.0, 150e-3, dps.V_RNG_4V, dps.I_RNG_200MA, false, 0); peb.SetDCLRelay ("WT_PINS", false).

[0215] The procedure of dynamic check can be expressed as:

[0216] void CHANGE_MEMORE_READ_DATA(void)

[0217] {

[0218] line_x = READ_TEMP_ST + 222;

[0219] for (int j = 7; j >= 0; j--) / / LOW 8BIT

[0220] {

[0221] sum_h = sum_h + temp_site[j];

[0222] if(temp_site[j] == 0)

[0223] {

[0224] peb.GetPtnMemData(line_x + (7 - j) * 2, szPtn);

[0225] / / P26, T173, T189, T205, T221, T237, T253, T13, T29,

[0226] szPtn

[252] = 'L'; / / site1

[0227] szPtn

[236] = 'L'; / / site2

[0228] szPtn

[220] = 'L'; / / site3

[0229] szPtn

[204] = 'L'; / / site4

[0230] peb.SetPtnMemData(line_x + (7 - j) * 2, szPtn);

[0231] }

[0232] else

[0233] {

[0234] peb.GetPtnMemData(line_x + (7 - j) * 2, szPtn);

[0235] szPtn

[252] = 'H'; / / site1

[0236] szPtn

[236] = 'H'; / / site2

[0237] szPtn

[220] = 'H'; / / site3

[0238] szPtn

[204] = 'H'; / / site4

[0239] peb.SetPtnMemData(line_x + (7 - j) * 2, szPtn);

[0240] }

[0241] }

[0242] }

[0243] peb.SetPinLevel("WT_PINS","3.3V");

[0244] peb.SetPinLevel("P10","6.75V");

[0245] peb.SetPinMode("WT_PINS","NF");

[0246] peb.SetPinMode("P29","RZ");

[0247] peb.SetPinMode("P31","NRZ");

[0248] peb.SetTimingSetPeriod("4",500);

[0249] peb.SetTimingSetPinEdge("4","WT_PINS","TS4_NF");

[0250] peb.SetTimingSetPinEdge("4","P29","TS4_RZ");

[0251] peb.SetTimingSetPinEdge("4","P31","TS4_NRZ");

[0252] CHANGE_MEMORE_READ_DATA();

[0253] peb.SetDCLRelay("WT_PINS",true);

[0254] util.dlyms(2);

[0255] dps.FV("VDD",3.3,150e-3,dps.V_RNG_4V,dps.I_RNG_200MA,true,0);

[0256] util.dlyms(5);

[0257] peb.SetTestLogOption(false);

[0258] peb.SetTestPatternOption(READ_TEMP_ST,READ_TEMP_ST,1,false);

[0259] peb.TestPattern(READ_TEMP_ST, READ_TEMP_SP, bPass);

[0260] util.FuncLog(true, bPass);

[0261] dps.FV("VDD", 0.0, 150e-3, dps.V_RNG_4V, dps.I_RNG_200MA, true, 0);

[0262] util.dlyms(5);

[0263] dps.FV("VDD", 0.0, 150e-3, dps.V_RNG_4V, dps.I_RNG_200MA, false, 0);

[0264] peb.SetDCLRelay("WT_PINS", false).

[0265] The chip testing method mentioned above will be introduced in the following Figure 7 in an entirety.

[0266] Figure 7 is a flowchart of a chip testing method provided by an embodiment of the present application.

[0267] As Figure 7 shown, Figure 7 the chip testing method comprises the following steps S701-S705.

[0268] S701, program initialization.

[0269] For example, loading necessary configurations and parameter settings; clearing any residual data or state of previous tests.

[0270] Preparing the test environment, including setting up the communication interface, memory and hardware components, so as to smoothly proceed with the subsequent DC parameter and temperature parameter tests.

[0271] S702, whether the DC parameter test is passed.

[0272] The DC (direct current) parameter test is an evaluation of the performance of the chip under direct current conditions, including key performance indicators such as voltage, current, power consumption, etc. The performance of the chip under different direct current conditions is tested and determined whether it meets the design specifications. Basic data of the electrical performance of the chip is provided to ensure that it can work stably in the conventional working environment. If the test is not passed, further troubleshooting or redesign may be needed to improve performance.

[0273] S703, whether the temperature parameter test is passed.

[0274] Temperature parameter test evaluates the function and stability of the chip under different temperature conditions, ensuring that it can work normally within the specified temperature range.

[0275] Measure the performance of the chip at high temperature, low temperature and its temperature change. If the test is passed, it can confirm the adaptability of the chip to temperature change in actual application. Avoid chip failure caused by temperature limit, ensure the reliability and durability of the product.

[0276] S704, end the test.

[0277] If the DC parameter test and the temperature parameter test are passed, the test can be ended, that is, the chip is qualified.

[0278] S705, failure binning.

[0279] Failure binning is a step of classifying and managing the performance of the chip after testing. According to the performance standard, the chip is divided into different groups. Compare the test results with the preset standard, and distinguish the qualified and unqualified chips. Establish more detailed classification information to help determine the chips that need further evaluation or repair.

[0280] For qualified chips, it is convenient for subsequent production, delivery and use; for unqualified chips, it provides failure analysis and improvement direction.

[0281] It should be noted in combination with the above that the capacitor connected between the power supply pin of the temperature sensor and the ground of the probe card should be as close to the temperature sensor as possible to ensure that the temperature signal output by the temperature sensor is smoother.

[0282] In addition, the wire used in the test process should use shielded wire as much as possible to reduce the interference between signals.

[0283] The methods of the embodiments of this application have been described above with reference to the accompanying drawings. It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially, these steps are not necessarily executed in the order shown in the figures. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the steps or stages of other steps. The apparatus of one embodiment of this application will now be described with reference to the accompanying drawings. For brevity, appropriate omissions will be made in the following description of the apparatus; relevant content can be referred to in the relevant descriptions of the methods above, and will not be repeated.

[0284] Figure 8 This is a schematic diagram of the structure of a chip testing device provided in an embodiment of this application.

[0285] like Figure 8 As shown, the device 1000 includes the following units.

[0286] The acquisition unit 1001 is used to acquire the DC parameters of the chip under test. The DC parameters include at least one of the following: current parameters and voltage parameters.

[0287] The processing unit 1002 is used to perform DC parameter testing based on the DC parameters of the chip under test and obtain the first test result.

[0288] The acquisition unit 1001 is also used to acquire the temperature parameters of the chip under test.

[0289] The processing unit 1002 is also used to perform temperature parameter testing based on the temperature parameters of the chip under test, and obtain a second test result.

[0290] The processing unit 1002 is also used to determine that the chip under test is a defective chip when the first test result or the second test result does not meet the preset conditions.

[0291] In one implementation, the device 1000 further includes a storage unit 1003, which can be used to store instructions and / or data, thereby implementing the method in the above embodiments.

[0292] It should be noted that the information interaction and execution process between the above-mentioned units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, which will not be repeated here.

[0293] Figure 9 is a structural schematic diagram of a computer device provided by an embodiment of the present application. As shown in the figure, the computer device 3000 of the embodiment includes at least one processor 3100 (only one processor is shown), a memory 3200, and a computer program 3210 stored in the memory 3200 and executable on the at least one processor 3100, and the processor 3100 executes the computer program 3210 to enable the computer device to implement the steps in the above embodiments. Figure 9 Figure 9 The processor 3100 can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0294] The memory 3200 can be an internal storage unit of the computer device 3000 in some embodiments, for example, a hard disk or a memory of the computer device 3000. The memory 3200 can also be an external storage device of the computer device 3000 in other embodiments, for example, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. Further, the memory 3200 can include both an internal storage unit and an external storage device of the computer device 3000. The memory 3200 is used to store an operating system, application programs, boot loader data, and other programs, for example, program codes of the computer program, etc. The memory 3200 can also be used to temporarily store data that has been output or will be output.

[0295] The memory 3200 can be an internal storage unit of the computer device 3000 in some embodiments, for example, a hard disk or a memory of the computer device 3000. The memory 3200 can also be an external storage device of the computer device 3000 in other embodiments, for example, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. Further, the memory 3200 can include both an internal storage unit and an external storage device of the computer device 3000. The memory 3200 is used to store an operating system, application programs, boot loader data, and other programs, for example, program codes of the computer program, etc. The memory 3200 can also be used to temporarily store data that has been output or will be output.

[0296] ​Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of each functional unit is exemplified, and in actual application, the above-mentioned functions can be completed by different functional units, modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit in the embodiment can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or software. In addition, the specific name of each functional unit is only for easy distinction, and does not limit the protection scope of the present application. The specific working process of the unit in the above system can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

[0297] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program. When the computer program is executed by a computer device, the computer device can realize the steps in the above-mentioned various method embodiments.

[0298] The embodiment of the present application provides a computer program product, which enables the computer device to realize the above-mentioned various methods when the computer program product is running on the computer device.

[0299] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the embodiment of the present application realizes all or part of the processes in the above-mentioned method embodiments, which can be completed by a computer program instructing related hardware. The computer program can be stored in a computer readable storage medium. When the computer program is executed by a processor, the computer device can realize the steps in the above-mentioned various method embodiments. The computer program includes computer program code, which can be in the form of source code, object code, executable file or some intermediate form. The computer readable medium at least includes any entity or device capable of carrying the computer program code to the photographing device / terminal device, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium. For example, U disk, mobile hard disk, magnetic disk or optical disk, etc. In some jurisdictions, according to legislation and patent practice, the computer readable medium cannot be an electrical carrier signal and a telecommunication signal.

[0300] It should be understood that the size of the serial number of each step in the above-mentioned embodiments does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. In the description, specific details such as specific system structures, technologies, etc. are proposed for the purpose of illustration, not for the purpose of limitation, so as to thoroughly understand the embodiments of the present application. However, those skilled in the art should clearly understand that the present application can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits and methods are omitted to avoid unnecessary details that hinder the description of the present application.

[0301] It should be understood that when used in the specification and the appended claims of the present application, the term "comprising" indicates the presence of the described features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or sets thereof.

[0302] It should also be understood that the term "and / or" used in the specification and the appended claims of the present application means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0303] In addition, in the description of the present application and the appended claims, the terms "include", "contain", "have" and their variants all mean "include but not limited to", unless otherwise specifically emphasized.

[0304] In the above-mentioned embodiments, the description of each embodiment is focused on, and the parts not described or recorded in a certain embodiment can be referred to the relevant description of other embodiments.

[0305] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware or a combination of computer software and electronic hardware. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0306] In the embodiments of the present application, it should be understood that the disclosed apparatus, computer device and method can be implemented in other ways. For example, the apparatus, computer device embodiments described above are merely schematic. The division of the units is only a logical function division. There can be another division during actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual coupling, direct coupling or communication connection can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or in other forms.

[0307] The above-described embodiments are merely used to illustrate the technical solutions of the present application, but not limit the present application; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalent; and the modification or replacement does not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A chip testing method, characterized in that, Applications in temperature transmitter chips include: Obtain the DC parameters of the chip under test, wherein the DC parameters include at least one of the following: current parameters and voltage parameters; A DC parameter test is performed on the chip under test to obtain a first test result. The DC parameter test includes: setting the voltage of all pins of the chip under test to 0 volts; applying a preset current to a preset pin using a power management device, detecting the voltage of the preset pin, and performing an open / short circuit test on the chip under test based on the voltage of the preset pin. Obtain the temperature parameters of the chip under test; Temperature parameter testing is performed on the chip under test to obtain a second test result. The temperature parameter testing includes acquiring two temperature values ​​of the chip under test, obtaining a first temperature value and a second temperature value; calculating the temperature difference between the first and second temperature values; when the temperature difference meets a preset temperature difference value, dynamically writing the temperature to the chip under test to obtain the second test result; and calculating the temperature value of the chip under test based on the voltage level of the temperature signal acquired by the temperature sensor. The relationship between the voltage level and the temperature value of the chip under test is: Temp = 235 - Where Temp represents the temperature value of the chip under test, T represents the voltage level of the temperature signal, and T1 represents the voltage level of the temperature signal. If the first test result or the second test result does not meet the preset conditions, the chip to be tested is determined to be a defective chip. The method further includes: The first temperature value and / or the second temperature value are converted into binary code and written into the chip under test to obtain binary data. The binary data is read and verified. If the read verification fails, the chip under test is determined to be a defective chip.

2. The method according to claim 1, characterized in that, The open / short circuit test of the chip under test based on the voltage of a preset pin includes: When a negative current flows through a diode connected to ground, the first voltage is detected; If the first voltage is lower than the first preset threshold, the preset pin is considered to be open circuit; If the first voltage is higher than the second preset threshold, the preset pin is considered to be short-circuited.

3. The method according to claim 1, characterized in that, The open / short circuit test is performed on the chip under test based on the voltage of the preset pin, including: When a forward current flows through a diode connected to a power source, a second voltage is detected; If the second voltage is higher than the third preset threshold, then the preset pin is considered to be open circuit; If the second voltage is lower than the fourth preset threshold, the preset pin is considered to be short-circuited.

4. A chip testing device, characterized in that, include: An acquisition unit is used to acquire the DC parameters of the chip under test, wherein the DC parameters include at least one of the following: current parameters and voltage parameters; The processing unit is configured to perform DC parameter testing based on the DC parameters of the chip under test, and obtain a first test result. The DC parameter testing includes: setting the voltage of all pins of the chip under test to 0 volts; applying a preset current to a preset pin using a power management device, detecting the voltage of the preset pin, and performing an open / short circuit test on the chip under test based on the voltage of the preset pin. The acquisition unit is also used to acquire the temperature parameters of the chip under test; The processing unit is further configured to: perform temperature parameter testing based on the temperature parameters of the chip under test to obtain a second test result; the temperature parameter testing includes acquiring two temperature values ​​of the chip under test to obtain a first temperature value and a second temperature value; calculating the temperature difference between the first temperature value and the second temperature value; dynamically writing the temperature to the chip under test when the temperature difference meets a preset temperature difference value to obtain the second test result; and calculating the temperature value of the chip under test based on the level width of the temperature signal acquired by the temperature sensor, wherein the relationship between the level width and the temperature value of the chip under test is: Temp = 235 - Where Temp represents the temperature value of the chip under test, T represents the voltage level of the temperature signal, and T1 represents the voltage level of the temperature signal. The processing unit is further configured to determine that the chip under test is a defective chip when the first test result or the second test result does not meet the preset conditions. The first temperature value and / or the second temperature value are converted into binary code and written into the chip under test to obtain binary data. The binary data is read and verified. If the read verification fails, the chip under test is determined to be a defective chip.

5. A computer device, characterized in that, The device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the computer device performs the method as described in any one of claims 1 to 3.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a computer device, implements the method as described in any one of claims 1 to 3.

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