Method, device, medium and equipment for detecting bus access state in integrated circuit

By using counters in integrated circuits to detect bus commands and timeout durations and determine the bus access status, the crash problem caused by bus hang-up in the chip system is solved and the system transmission performance is improved.

CN119440950APending Publication Date: 2025-02-14XG TECHNOLOGIES PTE LTD
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Patent Information

Application Number
CN202411524550.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-29
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

In chip systems, serious problems such as bus hangs and crashes, and problems are not discovered in time in the existing technology, which affects system performance.

Method used

By setting the first counter and the second counter in the integrated circuit, the number of commands transmitted by the first channel in the bus and the timeout duration are detected, and the accumulated value is compared with the preset threshold value to determine the bus access status.

Benefits of technology

Timely detection of the situation where the first channel of the bus is occupied is achieved, avoiding the crash problem caused by bus occupation timeout, and greatly improving the transmission performance of the chip system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention discloses a method and device for detecting a bus access state in an integrated circuit, a medium and equipment, and the method comprises the steps: detecting a first command transmitted by a first channel in a bus of the integrated circuit; accumulating the number of the first commands through a first counter to obtain a first accumulated value; based on the first accumulated value, counting the first command accumulated in the first counter through a second counter, which represents the timeout duration, so as to obtain a second accumulated value; and determining the access state of the bus based on the relationship between the second accumulated value and a preset threshold value. According to the embodiment of the invention, the detection of the occupation condition of the first channel of the bus is realized, the problem of overtime occupation of the bus can be found in time, the serious problems of crash and the like of a chip system are reduced, and the transmission performance of the chip system is greatly improved.
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Description

Technical Field

[0001] The present disclosure relates to the field of data interaction technology, and in particular to a method, device, medium and equipment for detecting bus access status in an integrated circuit. Background Art

[0002] In chip systems (e.g., System on Chip (SoC) and Application Specific Integrated Circuit (ASIC), etc.), there are many SoC bus transmission protocols, and these transmission protocols have a common feature that the master and slave devices use handshake signals to correctly transmit data. Most bus transmissions can be divided into two parts, the command transmission handshake phase and the data transmission handshake phase.

[0003] Once the handshake signal of the slave device is not sent correctly, the bus will be hung. When the bus is hung, the chip system will have serious problems such as freezing. Summary of the invention

[0004] In order to solve the above technical problems, the present disclosure is proposed. Embodiments of the present disclosure provide a method, apparatus, medium and device for detecting bus access status in an integrated circuit.

[0005] According to one aspect of an embodiment of the present disclosure, a method for detecting a bus access state in an integrated circuit is provided, comprising:

[0006] detecting a first command transmitted by a first channel in a bus of the integrated circuit;

[0007] Accumulating the number of the first commands by a first counter to obtain a first accumulated value;

[0008] Based on the first accumulated value, counting the timeout duration of the first command accumulated in the first counter by a second counter to obtain a second accumulated value;

[0009] Based on the relationship between the second accumulated value and a preset threshold, the access status of the bus is determined.

[0010] According to another aspect of an embodiment of the present disclosure, a device for detecting a bus access state in an integrated circuit is provided, comprising:

[0011] A command detection module, used for detecting a first command transmitted through a first channel in a bus of the integrated circuit;

[0012] A first counter, used for accumulating the number of first commands detected by the command detection module to obtain a first accumulated value;

[0013] a second counter, configured to count the timeout duration of the first command accumulated in the first counter based on the first accumulated value obtained by the first counter, to obtain a second accumulated value;

[0014] The state determination module is used to determine the access state of the bus based on the relationship between the second accumulated value determined by the second counter and a preset threshold.

[0015] According to another aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, wherein the storage medium stores a computer program, and the computer program is used to execute the method for detecting a bus access status in an integrated circuit described in any one of the above embodiments.

[0016] According to another aspect of the embodiments of the present disclosure, an electronic device is provided, the electronic device comprising:

[0017] processor;

[0018] a memory for storing instructions executable by the processor;

[0019] The processor is used to read the executable instructions from the memory and execute the instructions to implement the method for detecting bus access status in an integrated circuit described in any one of the above embodiments.

[0020] Based on the method, device, medium and equipment for detecting bus access status in an integrated circuit provided by the above-mentioned embodiments of the present disclosure, the number of first commands transmitted in the first channel in the bus is accumulated by a first counter, and the number of unfinished first commands transmitted in the first channel can be determined; when the first accumulated value is not zero, it indicates that there are unfinished first commands in the first channel. At this time, the unfinished first command is counted by a second counter to represent the timeout length, and the second accumulated value obtained by counting represents the time length of transmission of the first command in the first channel; by comparing the relationship between the second accumulated value and the preset threshold, it can be determined whether the time length that the bus is occupied by the first command exceeds the preset threshold, so as to determine the access status of the bus, thereby realizing the detection of the situation where the first channel of the bus is occupied, and the problem of bus occupancy timeout can be discovered in time, thereby reducing serious problems such as freezing of the chip system and greatly improving the transmission performance of the chip system.

[0021] The technical solution of the present disclosure is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other purposes, features and advantages of the present disclosure will become more apparent by describing the embodiments of the present disclosure in more detail in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. In the drawings, the same reference numerals generally represent the same components or steps.

[0023] Figure 1 is a flowchart of a method for detecting a bus access state in an integrated circuit provided by an exemplary embodiment of the present disclosure;

[0024] Figure 2 is a flowchart of timeout counting in a method for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0025] Figure 3 It is a flowchart of command accumulation in a method for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0026] Figure 4 is a flowchart of timeout counting in a method for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0027] Figure 5 is a flowchart of timeout counting in a method for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0028] Figure 6 is a structural diagram of a device for detecting a bus access state in an integrated circuit provided by an exemplary embodiment of the present disclosure;

[0029] Figure 7 is a structural schematic diagram of a device for detecting a bus access state in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0030] Figure 8 is a structural schematic diagram of a device for detecting a bus access state in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0031] Fig. 9 is a structural schematic diagram of a device for detecting a bus access state in an integrated circuit provided by another exemplary embodiment of the present disclosure;

[0032] Fig.10 is a structural schematic diagram of a device for detecting a bus access state in an integrated circuit provided by yet another exemplary embodiment of the present disclosure;

[0033] Fig.11 is a structural diagram of an electronic device provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] In order to explain the present disclosure, example embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure. It should be understood that the present disclosure is not limited to the example embodiments described herein.

[0035] It should be noted that the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

[0036] Application Overview

[0037] In the process of implementing the present disclosure, the inventors found that bus deadlock means that the command on the bus cannot release the bus normally due to some reason during the communication process, resulting in the bus being in a locked state and unable to perform normal data transmission. This situation usually causes the entire chip system to be unable to communicate with other devices on the bus, affecting the normal operation of the chip system. In the prior art, the problem of bus deadlock is not discovered in a timely manner, which will cause the bus to be unavailable for a long time, causing serious problems such as a significant performance degradation or even crash of the chip system.

[0038] Exemplary Methods

[0039] Figure 1 FIG. 1 is a flow chart of a method for detecting bus access status in an integrated circuit provided by an exemplary embodiment of the present disclosure. This embodiment can be applied to electronic devices, such as Figure 1 As shown, the following steps are included:

[0040] Step 102: Detect a first command transmitted by a first channel in a bus of an integrated circuit.

[0041] Optionally, the first channel can be any channel in the bus, for example, the first channel is a read address channel (ReadAddress Channel, referred to as AR channel, used to transmit the address and control information of a read request), a write address channel (WriteAddress Channel, referred to as AW channel, used to transmit the address and control information of a write request) or a snoop address channel (Snoop Address Channel, referred to as AC channel, used to transmit snooping transactions between caches in the system, allowing a cache master device to snoop other cache master devices on the read and write operations of a specific memory address). The first command corresponds to the first channel, for example, the first channel is the AR channel, and the corresponding first command is a read command (AR command); the first channel is the AW channel, and the corresponding first command is a write command (AW command); the first channel is the AC channel, and the corresponding first command is a snoop command (AC command).

[0042] Step 104: accumulating the number of first commands by using a first counter to obtain a first accumulated value.

[0043] In one embodiment, the first accumulated value indicates the number of first commands transmitted and not completed in the first channel; the first accumulated value can be used to indicate whether the first channel is occupied.

[0044] Step 106: Based on the first accumulated value, the first command accumulated in the first counter is counted by the second counter to indicate the timeout duration, so as to obtain a second accumulated value.

[0045] In the embodiment of the present disclosure, when the first cumulative value is not zero, a timeout duration is counted for at least one first command accumulated in the first counter; if the first cumulative value is zero, it means that there is no first command that requires timeout duration accumulation, and the second cumulative value is zero.

[0046] In an optional embodiment, at least one first command in the first counter is not distinguished, and the timeout duration of at least one first command in the first counter is counted by the second cumulative value. When any feedback identifier corresponding to the first command is received, the second cumulative value is cleared, and the first cumulative value is decremented, and when the first cumulative value is not zero, the timeout duration is restarted. In another optional embodiment, each first command in the first counter is distinguished, and the timeout duration of the first first command received in the time sequence in the first counter is counted by the second cumulative value. When the feedback identifier corresponding to the first first command is received, the second cumulative value is cleared, and the first cumulative value is decremented, and when the first cumulative value is not zero, the timeout duration is restarted; in this embodiment, if the feedback identifier corresponding to other first commands in the first counter is received, the second cumulative value is not cleared, but the first cumulative value is decremented.

[0047] Step 108: Determine the access status of the bus based on the relationship between the second accumulated value and the preset threshold.

[0048] In this embodiment, the preset threshold value can be configured according to a specific application scenario, and the configured preset threshold value can be stored in a register for easy reading.

[0049] Optionally, if the second accumulated value is greater than or equal to a preset threshold, it is determined that the access state of the bus is a hung state, and access hung information is sent.

[0050] In this embodiment, the hung state refers to a state in which the first channel in the bus cannot work normally because it is occupied by at least one first command, resulting in other data, commands, etc. being unable to be transmitted through the first channel, so that all devices communicating through the first channel cannot communicate. Optionally, if the second accumulated value is less than a preset threshold, it indicates that the access state of the bus is normal, that is, the devices communicating through the first channel can communicate normally.

[0051] Optionally, this embodiment sends access hang information through an interrupt mode, and optionally, the access hang information can be sent to an interrupt collection module (such as a CPU, etc.). The interrupt mode reporting referred to in this embodiment refers to the process in which the computer temporarily suspends the execution of the current program when an abnormal situation that needs to be processed urgently (bus hang) or an external device sends a request during the execution of the program, and then processes these requests, and returns to the breakpoint of the original program to continue execution after the processing is completed. The interrupt mode is implemented through hardware, allowing the computer to respond to external requests during the execution of the program, thereby improving the parallel working degree of the system and the working efficiency of the CPU.

[0052] The above-mentioned embodiment of the present disclosure provides a method for detecting the bus access status in an integrated circuit. By accumulating the number of first commands transmitted in the first channel of the bus through a first counter, the number of incomplete first commands transmitted in the first channel can be determined; when the first accumulated value is not zero, it indicates that there are incomplete first commands in the first channel. At this time, the incomplete first command is counted by a second counter to represent the timeout length, and the second accumulated value obtained by counting represents the time length of the first command transmitted in the first channel; by comparing the relationship between the second accumulated value and the preset threshold, it can be determined whether the time length of the bus occupied by the first command exceeds the preset threshold, so as to determine the access status of the bus, thereby realizing the detection of the situation where the first channel of the bus is occupied, and the problem of bus occupancy timeout can be discovered in time, thereby reducing serious problems such as freezing of the chip system and greatly improving the transmission performance of the chip system.

[0053] In some optional embodiments, step 104 may include:

[0054] Based on the feedback identifier corresponding to the received first command, the first accumulated value is decremented.

[0055] In this embodiment, different types of first commands correspond to different feedback identifiers. In an optional example, if the first command is a read address channel, in this embodiment, the corresponding feedback identifier is the rlast (last) signal of the last read data (read data indicates data returned according to the first command, and each first command may correspond to multiple read data) corresponding to any first command (read command), and after receiving the feedback identifier, the first cumulative value is decremented, that is, after receiving the feedback identifier corresponding to any first command in at least one first command, it indicates that a first command has been completed, and the first cumulative value indicating the accumulated number of first commands is reduced by one.

[0056] In another optional example, if the first command is a write address channel, in this embodiment, the corresponding feedback identifier is a signal for receiving all data corresponding to any first command (write command) (for example, a bvalid signal, indicating that the write response is valid), and the first accumulated value is decremented after receiving the feedback identifier.

[0057] In another optional example, if the first command is a snoop address channel, in this embodiment, the corresponding feedback identifier is a response signal returned by the snoop response channel (Snoop Response Channel, CR channel for short) (for example, crvalid signal, indicating that the snoop response is valid), and the first accumulated value is decremented after receiving the feedback identifier.

[0058] like Figure 2 As shown in the above Figure 1 Based on the illustrated embodiment, step 106 may include the following steps:

[0059] Step 1061: Determine, based on the first accumulated value, whether there is a first command for which no feedback identifier is received.

[0060] In this embodiment, if the first cumulative value is zero, it means that there is no unfinished first command in the first channel, that is, there is no first command occupying the first channel, and there is no need to perform a timeout count, which can be understood as no second cumulative value or the second cumulative value is zero. If the first cumulative value is not zero, it means that there is at least one first command occupying the first channel, that is, there is at least one first command that has not received a feedback mark.

[0061] Step 1062: clear the second accumulated value according to the feedback identifier of the received first command.

[0062] In this embodiment, any of the at least one first command corresponding to the first cumulative value receives a feedback mark. Since the first channel can receive the feedback mark, it means that the first channel is unblocked (information transmission can be executed), that is, the second cumulative value is cleared. After the second cumulative value is cleared, it is re-determined whether the first cumulative value is zero. When the first cumulative value is not zero, the timing is restarted based on the second counter, and the second cumulative value accumulated by the timing represents the duration of time that the first channel is occupied by the at least one first command corresponding to the first cumulative value.

[0063] This embodiment clears the second accumulated value based on the feedback identifier, thereby improving the accuracy of the timeout duration represented by the second accumulated value.

[0064] like Figure 3 As shown in the above Figure 1 Based on the illustrated embodiment, step 104 may include the following steps:

[0065] Step 1041: Save at least one related information corresponding to at least one first command in a first linked list in the order of time when the first commands are received.

[0066] Optionally, at least one relevant information includes address information. Different first commands may correspond to different relevant information. For example, the relevant information corresponding to the read command and the write command includes but is not limited to command identification information (used to distinguish different commands), command address information (used to store the address of the first command), etc.; the relevant information corresponding to the listening command includes but is not limited to command address information (used to store the address of the first command) and access type information (indicating the access type corresponding to the listening command), etc. Optionally, each first command corresponds to a piece of data in the first linked list. For example, a piece of data corresponding to a first command includes: command identification: a1, command address information: 01011001, etc.; a piece of data corresponding to another first command includes: command identification: a2, command address information: 01011011, etc.; this embodiment is only used as an illustrative representation and is not used to limit the implementation of the embodiments of the present disclosure.

[0067] Optionally, in some optional examples, when the first command is a read command or a write command, step 1041 may include:

[0068] The detected first command is assigned a corresponding first identifier to obtain at least one first identifier, wherein the relevant information includes the first identifiers, and each first identifier corresponds to at least one first command.

[0069] Optionally, when a first identifier (ID) corresponds to multiple first commands, the multiple first commands corresponding to the same first identifier are sorted by time, and the received feedback identifiers are also allocated by time to the multiple first commands corresponding to the first identifier, so as to achieve order preservation with the same identifier (ID). By adding the first identifier and the order preservation with the same identifier, the timeout count is executed separately for each first command, thereby improving the accuracy of the counting.

[0070] At least one first identifier is stored in the first linked list.

[0071] This embodiment solves the problem of feedback identifier disorder by assigning a corresponding first identifier to the first command. When the feedback identifier is received, the first identifier is matched with the feedback identifier to determine which first command is completed, thereby ensuring that the second cumulative value can execute the timeout count for the same command, thereby improving the accuracy of the second cumulative value.

[0072] Step 1042: The first command corresponding to the relevant information stored in the first linked list is accumulated by a first counter to obtain a first accumulated value.

[0073] In this embodiment, the received first commands are sorted in chronological order by adding a first linked list, and relevant information corresponding to each first command is stored in the first linked list to distinguish each first command; the second cumulative value can execute timeout counting for each first command separately, rather than taking all first commands as a whole, thereby improving the accuracy of the timeout duration represented by the second cumulative value; and this embodiment stores relevant information through the first linked list, and can quickly locate the problem address based on the relevant information.

[0074] like Figure 4 As shown in the above Figure 1 Based on the illustrated embodiment, step 106 may include the following steps:

[0075] Step 1063: Determine, based on the first accumulated value, whether there is a first command for which no feedback identifier is received.

[0076] Optionally, determine whether the first cumulative value is zero. If the first cumulative value is zero, it indicates that all first commands have received feedback identifiers. If the first cumulative value is not zero, it indicates that there are first commands that have not received feedback identifiers. That is, this embodiment determines whether there is a first command that requires a timeout count based on the relationship between the first cumulative value and zero.

[0077] Step 1064: Use the second counter to use the first command that is at the front of the first linked list as the second command.

[0078] Optionally, in some examples, a timeout count may be performed for each first command in the first linked list based on a second cumulative value; in this example, a corresponding second counter needs to be assigned to each first command to perform timeout counting, which improves the accuracy of timeout counting and increases resource consumption; in other examples, by performing timeout counting only for the first second command in the sorting sequence, the accuracy of timeout counting is improved due to a separate timeout count for the second command, and resource consumption is reduced due to timeout counting only for one second command.

[0079] Step 1065: Count the timeout duration of the second command to obtain a second cumulative value.

[0080] In this embodiment, by using only one second counter to count the timeout duration of the second command in the first linked list, accurate channel occupancy statistics are achieved while reducing resource consumption; in addition, when the second command at the top of the list receives a feedback identifier, the data record corresponding to the second command is deleted in the first linked list and the second counter is cleared; at this time, the first command at the top of the list in the first linked list automatically becomes the new second command, and the second counter starts counting the timeout duration of the new second command, and so on, until the first command no longer exists in the first linked list.

[0081] like Figure 5 As shown in the above Figure 4 Based on the illustrated embodiment, step 1065 may include the following steps:

[0082] Step 501: Detect a feedback identifier transmitted via a first channel.

[0083] In this embodiment, different first channels correspond to different feedback identifiers. For example, the first identifier corresponding to the AR channel is represented by ARID, and the corresponding feedback identifier is represented by RID. When ARID and RID match, the first command (or second command) corresponding to the first identifier is deleted from the first linked list; the first identifier corresponding to the AW channel is represented by AWID, and the corresponding feedback identifier is represented by BID. When AWID and BID match, the first command (or second command) corresponding to the first identifier is deleted from the first linked list; the AC channel is not assigned a corresponding first identifier, and only matches the feedback identifier according to the order in the first linked list to determine whether to delete the first command (or second command) corresponding to the feedback identifier from the first linked list.

[0084] Step 502: Perform corresponding processing on the second accumulated value according to the first identifier corresponding to the feedback identifier.

[0085] In this embodiment, for the read address channel and the write address channel, each feedback identifier can search for the corresponding first identifier, and determine whether to clear or continue to accumulate the second accumulated value based on the first identifier. By matching the first identifier, it can be determined whether the feedback identifier corresponds to the second command; for the listening address channel, since there is no first identifier, but the first command is sorted in chronological order in the first linked list, this embodiment matches the feedback identifier with the second command that is sorted first in the first linked list for the AC channel, and performs corresponding processing (clearing) on ​​the second accumulated value.

[0086] Optionally, a relationship between a first identifier corresponding to the feedback identifier and a first identifier corresponding to the second command is determined.

[0087] Optionally, the above relationship may include consistency or inconsistency, and different relationships correspond to different processing. For example, the relationship between the first identifier corresponding to the feedback identifier and the first identifier corresponding to the second command is consistent, indicating that the second command receives the feedback identifier, which can end the accumulation of this timeout period.

[0088] Based on the above relationship, the second accumulated value is cleared or continued to be accumulated.

[0089] In this embodiment, the second cumulative value only accumulates the timeout duration of the second command. Therefore, it is only necessary to compare the feedback first identifier with the first identifier corresponding to the second command to determine whether to clear the second cumulative value, which simplifies the identifier comparison process and improves the identifier recognition efficiency.

[0090] This embodiment improves the efficiency of matching the first command with the feedback identifier by assigning a corresponding identifier to the command, and because the identifier can be used to identify the corresponding first command among multiple first commands, there is no need to store each first command separately. Only one first linked list is needed to save all the first commands, which improves storage efficiency while saving storage space and reducing resource usage.

[0091] In some optional embodiments, clearing or continuing to accumulate the second accumulated value based on the above relationship includes:

[0092] If the above relationship indicates that the first identifier corresponding to the feedback identifier is consistent with the first identifier corresponding to the second command, the second accumulated value is cleared; and the next first command in the sort of the first linked list is updated to the second command, and the counting of the new second command is restarted.

[0093] If the above relationship indicates that the first identifier corresponding to the feedback identifier is inconsistent with the first identifier corresponding to the second command, the first command ranked first in the first commands corresponding to the first identifier in the first linked list is determined as the third command, and the third command is deleted from the first linked list.

[0094] In this embodiment, when the above relationship indicates inconsistency, it means that the feedback identifier does not correspond to the second command. At this time, the second cumulative value is not cleared, and the second counter continues to timeout counting. Moreover, since a feedback identifier is received, the third command corresponding to the feedback identifier is deleted from the first linked list. When determining the third command, based on the same identifier order preservation, when the first identifier corresponding to the feedback identifier corresponds to multiple first commands in the first linked list, the first command with the highest sorting among the multiple first commands is used as the third command, thereby ensuring that the first command with the highest sorting in the first linked list is the first command received earlier, and correctly deleting the third command that receives the feedback identifier from the first linked list, so that the first commands stored in the second linked list are all first commands that have not received the feedback identifier, thereby improving the accuracy of the second cumulative value.

[0095] In some optional embodiments, step 108 may include:

[0096] If the second accumulated value is greater than or equal to the preset threshold, it is determined that the access state of the bus is a hung state, access hung information is issued, and at least one related information is sent.

[0097] In this embodiment, at least one related information is sent out at the same time as the access hang information is sent out to facilitate the acquisition of the hang information, and the channel where the hang occurs and the address corresponding to the first command causing the hang are determined based on the related information, so that the hang problem is handled accordingly based on the interrupt reporting situation.

[0098] Any method for detecting bus access status in an integrated circuit provided by the embodiments of the present disclosure may be executed by any appropriate device with data processing capabilities, including but not limited to: a terminal device and a server, etc. Alternatively, any method for detecting bus access status in an integrated circuit provided by the embodiments of the present disclosure may be executed by a processor, such as the processor executing any method for detecting bus access status in an integrated circuit mentioned in the embodiments of the present disclosure by calling corresponding instructions stored in a memory. This will not be described in detail below.

[0099] Exemplary Devices

[0100] Figure 6 1 is a schematic diagram of a structure of a device for detecting bus access status in an integrated circuit provided by an exemplary embodiment of the present disclosure. The device provided by this embodiment can be integrated into a module (or chip), and the module is designed in a chip system. Figure 6 As shown, the device provided in this embodiment may include:

[0101] The command detection module 61 is used to detect a first command transmitted by a first channel in a bus of the integrated circuit.

[0102] The first counter 62 is used to accumulate the number of first commands detected by the command detection module 61 to obtain a first accumulated value.

[0103] The second counter 63 is used for obtaining a second accumulated value based on the first accumulated value obtained by the first counter 62 by counting the timeout duration of the first command accumulated in the first counter 62 .

[0104] The state determination module 64 is used to determine the access state of the bus based on the relationship between the second accumulated value determined by the second counter 63 and a preset threshold.

[0105] In the device for detecting bus access status in an integrated circuit provided by the above-mentioned embodiment of the present disclosure, the number of first commands transmitted in the first channel in the bus is accumulated by a first counter, so as to determine the number of unfinished first commands transmitted in the first channel; when the first accumulated value is not zero, it indicates that there are unfinished first commands in the first channel, and at this time, the unfinished first command is counted by a second counter to indicate the timeout duration, and the second accumulated value obtained by counting indicates the time duration of the first command transmitted in the first channel; by comparing the relationship between the second accumulated value and the preset threshold, it can be determined whether the parallax of the bus occupied by the first command exceeds the preset threshold, so as to determine the access status of the bus, thereby realizing the detection of the situation that the first channel of the bus is occupied, and the problem of bus occupancy timeout can be discovered in time, thereby reducing serious problems such as freezing of the chip system and greatly improving the transmission performance of the chip system.

[0106] Optionally, the state determination module 64 is specifically configured to determine that the access state of the bus is a hung state if the second accumulated value is greater than or equal to a preset threshold, and to send access hung information.

[0107] When the device provided in this embodiment is integrated into an independent chip in a chip system, the state determination module may be an external communication module, through which the access hang information is sent to the interruption collection module.

[0108] Optionally, the first counter 62 is specifically configured to perform a decrement process on the first accumulated value based on a feedback identifier corresponding to the received first command.

[0109] Figure 7 is a schematic diagram of a structure of a device for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure. In this embodiment, the second counter 63 includes:

[0110] The first command determining unit 631 is configured to determine, according to the first accumulated value, whether there is a first command for which no feedback identifier is received.

[0111] The accumulated value clearing unit 632 is used to clear the second accumulated value according to the feedback identifier of the received first command.

[0112] Figure 8 FIG. 1 is a schematic diagram of a structure of a device for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure. Figure 8 As shown, the first counter 62 in this embodiment includes:

[0113] The first linked list 621 is used to store at least one related information corresponding to at least one first command in the order of time when the first commands are received.

[0114] The command accumulation unit 622 is used to accumulate the first commands corresponding to the relevant information stored in the first linked list to obtain a first accumulated value.

[0115] Optionally, the first linked list 621 is specifically used to assign a corresponding first identifier to the detected first command to obtain at least one first identifier; the relevant information includes the first identifiers, each first identifier corresponds to at least one first command; and at least one first identifier is saved.

[0116] Optionally, the at least one relevant information includes address information.

[0117] For example, when the first linked list 621 corresponds to the read address channel, as shown in Table 1, the first column is the first identifier (ARID), and the second column is the address information (ARADDR). Table 1 only schematically expresses the information storage format, in which the specific ID and address information are hidden, and the number of rows included in the first linked list in this embodiment is not limited.

[0118] ARID ARADDR XXX XXXXXX XXX XXXXXX XXX XXXXXX

[0119] Table 1

[0120] For example, when the first linked list 621 corresponds to the write address channel, as shown in Table 2, the first column is the first identifier (AWID), and the second column is the address information (AWADDR). Table 2 only schematically expresses the information storage format, in which the specific ID and address information are hidden, and the number of rows included in the first linked list in this embodiment is not limited.

[0121] AWID AWADDR XXX XXXXXX XXX XXXXXX XXX XXXXXX

[0122] Table 2

[0123] For example, when the first linked list 621 corresponds to the monitoring address channel, as shown in Table 3, the first column is the address information (ACADDR), and the second column is the access type information (ACSNOOP). Table 3 only schematically expresses the information storage format, in which the specific address information and access type information are hidden, and the number of rows included in the first linked list of this embodiment is not limited.

[0124] ACADDR ACSNOOP XXX XXXXXX XXX XXXXXX XXX XXXXXX

[0125] Table 3

[0126] Fig. 9 FIG. 1 is a schematic diagram of a structure of a device for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure. Fig. 9 As shown, in this embodiment, the second counter 63 may include:

[0127] The identification recognition unit 633 is used to determine, based on the first accumulated value, whether there is a first command for which no feedback identification is received.

[0128] The linked list sorting unit 634 is used to use the first command that is sorted first in the first linked list as the second command.

[0129] The timeout counting unit 635 is used to count the timeout duration of the second command to obtain a second cumulative value.

[0130] Fig.10 FIG. 1 is a schematic diagram of a structure of a device for detecting bus access status in an integrated circuit provided by another exemplary embodiment of the present disclosure. Fig.10 As shown, the timeout counting unit 635 in the second counter 63 of this embodiment may include:

[0131] The identifier detection unit 6351 is used to detect the feedback identifier transmitted by the first channel.

[0132] The accumulated value processing unit 6352 is used to perform corresponding processing on the second accumulated value according to the first identifier corresponding to the feedback identifier.

[0133] Optionally, the accumulated value processing unit 6352 is specifically used to determine the relationship between the first identifier corresponding to the feedback identifier and the first identifier corresponding to the second command; and clear the second accumulated value or continue to accumulate based on the relationship.

[0134] Optionally, when the cumulative value processing unit 6352 clears or continues to accumulate the second cumulative value based on the relationship, it is also used to clear the second cumulative value if the relationship indicates that the first identifier corresponding to the feedback identifier is consistent with the first identifier corresponding to the second command; if the relationship indicates that the first identifier corresponding to the feedback identifier is inconsistent with the first identifier corresponding to the second command, determine the first command in the first linked list that corresponds to the first identifier as the third command, and delete the third command from the first linked list.

[0135] Optionally, the state determination module 64 is specifically configured to determine that the access state of the bus is a hung state if the second accumulated value is greater than or equal to a preset threshold, issue access hung information, and send at least one related information.

[0136] The beneficial technical effects corresponding to the exemplary embodiment of the present device can be found in the corresponding beneficial technical effects of the above exemplary method section, which will not be repeated here.

[0137] Exemplary Electronic Devices

[0138] Fig.11 A structural diagram of an electronic device provided in an embodiment of the present disclosure includes at least one processor 111 and a memory 112.

[0139] The processor 111 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 11 to perform desired functions.

[0140] The memory 112 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory (cache), etc. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 11 may execute one or more computer program instructions to implement the method for detecting bus access status in the integrated circuit of each embodiment of the present disclosure and / or other desired functions.

[0141] In one example, the electronic device 11 may further include: an input device 113 and an output device 114 , and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0142] The input device 113 may also include, for example, a keyboard, a mouse, etc.

[0143] The output device 114 can output various information to the outside, and may include, for example, a display, a speaker, a printer, a communication network and its connected remote output devices, etc.

[0144] Of course, to simplify, Fig.11 Only some of the components related to the present disclosure in the electronic device 11 are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device 11 may also include any other appropriate components.

[0145] Exemplary computer program products and computer-readable storage media

[0146] In addition to the above-mentioned methods and devices, embodiments of the present disclosure may also provide a computer program product, including computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the method for detecting bus access status in an integrated circuit of various embodiments of the present disclosure described in the above-mentioned "Exemplary Method" section.

[0147] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the disclosed embodiments, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0148] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium having computer program instructions stored thereon. When the computer program instructions are executed by a processor, the processor executes the steps of the method for detecting bus access status in an integrated circuit of various embodiments of the present disclosure described in the above “Exemplary Method” section.

[0149] Computer readable storage media can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium is, for example, but not limited to, a system, device or device including electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0150] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and cannot be considered as necessary for each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, rather than limitation, and the above details do not limit the present disclosure to being implemented by adopting the above specific details.

[0151] Those skilled in the art may make various changes and modifications to the present disclosure without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the present disclosure claims and their equivalents, the present disclosure is also intended to include these modifications and variations.

Claims

1. A method for detecting a bus access status in an integrated circuit, comprising: detecting a first command transmitted by a first channel in a bus of the integrated circuit; Accumulating the number of the first commands by a first counter to obtain a first accumulated value; Based on the first accumulated value, counting the timeout duration of the first command accumulated in the first counter by a second counter to obtain a second accumulated value; Based on the relationship between the second accumulated value and a preset threshold, the access status of the bus is determined.

2. The method according to claim 1, wherein determining the access state of the bus based on the relationship between the second accumulated value and a preset threshold value comprises: If the second accumulated value is greater than or equal to the preset threshold, it is determined that the access state of the bus is a hung state, and access hung information is issued.

3. The method according to claim 1 or 2, wherein accumulating the number of the first commands by a first counter to obtain a first accumulated value comprises: Based on the feedback identifier corresponding to the received first command, the first accumulated value is decremented.

4. The method according to any one of claims 1 to 3, wherein based on the first accumulated value, the first command accumulated in the first counter is counted by a second counter to obtain a second accumulated value, comprising: Determining, according to the first accumulated value, that there is the first command for which no feedback identifier is received; The second accumulated value is cleared according to the received feedback identifier of the first command.

5. The method according to claim 1, wherein accumulating the number of the first commands by a first counter to obtain a first accumulated value comprises: storing at least one related information corresponding to at least one of the first commands in a time sequence of receiving the first commands through a first linked list; The first counter accumulates the first commands corresponding to the relevant information stored in the first linked list to obtain the first accumulated value.

6. The method according to claim 5, wherein the storing, by a first linked list, at least one related information corresponding to at least one first command in the order of time when the first command is received comprises: Assigning a corresponding first identifier to the detected first command to obtain at least one first identifier; The relevant information includes the first identifiers, and each of the first identifiers corresponds to at least one of the first commands; At least one of the first identifiers is stored in the first linked list.

7. The method according to claim 6, wherein based on the first accumulated value, the second counter is used to count the first command accumulated in the first counter to indicate the timeout duration to obtain the second accumulated value, comprising: Determining, according to the first accumulated value, that there is the first command for which no feedback identifier is received; Using the second counter to sort the first command that is at the front of the first linked list as the second command; The second command is counted to represent a timeout duration to obtain the second cumulative value.

8. The method according to claim 7, wherein the step of counting the timeout duration of the second command to obtain the second cumulative value comprises: detecting the feedback identifier transmitted by the first channel; According to the first identifier corresponding to the feedback identifier, corresponding processing is performed on the second accumulated value.

9. The method according to claim 8, wherein the step of performing corresponding processing on the second accumulated value according to the first identifier corresponding to the feedback identifier comprises: Determine a relationship between a first identifier corresponding to the feedback identifier and a first identifier corresponding to the second command; The second accumulated value is cleared or continues to be accumulated based on the relationship.

10. The method according to claim 9, wherein clearing or continuing to accumulate the second accumulated value based on the relationship comprises: If the relationship indicates that the first identifier corresponding to the feedback identifier is consistent with the first identifier corresponding to the second command, clearing the second accumulated value; If the relationship indicates that the first identifier corresponding to the feedback identifier is inconsistent with the first identifier corresponding to the second command, determine the first command in the first linked list that corresponds to the first identifier as the third command, and delete the third command from the first linked list.

11. The method according to any one of claims 5-10, wherein the at least one relevant information comprises address information.

12. The method according to any one of claims 5 to 11, wherein determining the access state of the bus based on the relationship between the second accumulated value and a preset threshold value comprises: If the second accumulated value is greater than or equal to the preset threshold, it is determined that the access state of the bus is a hung state, access hung information is issued, and the at least one related information is sent.

13. A device for detecting bus access status in an integrated circuit, comprising: A command detection module, used for detecting a first command transmitted through a first channel in a bus of the integrated circuit; A first counter, used for accumulating the number of first commands detected by the command detection module to obtain a first accumulated value; a second counter, configured to count the timeout duration of the first command accumulated in the first counter based on the first accumulated value obtained by the first counter, to obtain a second accumulated value; The state determination module is used to determine the access state of the bus based on the relationship between the second accumulated value determined by the second counter and a preset threshold.

14. A computer-readable storage medium storing a computer program, wherein the computer program is used to execute the method for detecting a bus access status in an integrated circuit according to any one of claims 1 to 12.

15. An electronic device, comprising: processor; a memory for storing instructions executable by the processor; The processor is used to read the executable instructions from the memory and execute the instructions to implement the method for detecting bus access status in an integrated circuit as described in any one of claims 1-12.