Cache management method and device, equipment and storage medium

Abstract

The invention provides a cache management method and device, equipment and a storage medium, and belongs to the technical field of storage. The method is applied to the cache system, the cache system comprises n cache layers, the IO speed of the (i + 1) th layer in the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and smaller than n, each layer in the n cache layers comprises a cold area and a hot area, and the method comprises the steps that when data are added into the cache system, the data are stored in the cold area of the first layer in a cache block mode, and the data are stored in the hot area of the second layer in a cache block mode; and under the condition that the residual cache space in the cold area of the ith layer is insufficient, moving the cache block in the cold area of the ith layer to the cold area of the (i + 1) th layer by adopting a first-in first-out mechanism. And when an exchange condition is satisfied, executing exchange processing on the hit cache block in the hot area of the (i + 1) th layer and the cache block which is not hit in the hot area of the ith layer. By adopting the scheme provided by the invention, changed working conditions of the cache system can be coped with as much as possible.

Description

[0001] The present disclosure claims priority to Chinese patent application numbered 202310973215.0, filed on August 3, 2023, and entitled “Method, apparatus and cluster for adaptive local multi-device cache system management”, the entire contents of which are incorporated by reference in the present disclosure. Technical Field

[0002] The present disclosure relates to the technical field of data storage, and in particular to a cache management method, apparatus, device and storage medium. Background Art

[0003] In the current scenario of storage and computing separation architecture, when the computing device faces a large analytical request, the data needs to be transferred to the computing device through the network for subsequent processing. The network overhead of large-scale data transmission is relatively large, and the network input and output (IO) has become a bottleneck for computing performance. Although there is a cache in the memory of the computing device for caching data, the cache space is usually limited, and the acceleration effect for scenarios with large amounts of data is not obvious. With the widespread use of large-capacity storage devices, large-capacity storage devices such as solid state disks (SSDs) in computing devices are used to expand cache capacity and improve cache hit rates, thereby reducing network IO times. However, a cache system with multiple devices will inevitably bring management complexity. Therefore, it is necessary to provide a cache management method for multiple devices. Summary of the invention

[0004] The present disclosure provides a cache management method, apparatus, device and storage medium, which can manage a cache system. The technical solution is as follows.

[0005] In a first aspect, the present disclosure provides a cache management method, which is applied to a cache system, wherein the cache system includes n cache layers, the input output (IO) speed of the i+1th layer of the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, each of the n cache layers includes a cold zone and a hot zone, and n is greater than or equal to 2, and the method includes: when data is added to the cache system, the data is stored in the cold zone of the first layer in the form of a cache block; when there is insufficient remaining cache space in the cold zone of the i-th layer, a first-in-first-out mechanism is adopted to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1th layer; for the cold zone of each layer from the second layer to the nth layer, when the first cache block in the cold zone is hot data, the first cache block is moved to the hot zone of the same layer as the cold zone; whenever an exchange condition is met, an exchange process is performed on the hit cache block in the hot zone of the i+1th layer and the unhit cache block in the hot zone of the i-th layer.

[0006] In the solution shown in the present disclosure, the cache system includes n cache layers, the IO speeds of the n cache layers are different, each cache layer includes a cold zone and a hot zone, and the cache blocks in the n cache layers can be adaptively moved between the cache layers and within the cold zone and the hot zone of the same layer based on the current working conditions, so that a good cache hit effect can be achieved even in changing working conditions.

[0007] In an optional manner, the method also includes: for the hot zone of each layer in the n cache layers, if the second cache block in the hot zone is hit, the logical information of the second cache block is moved to before the cursor of the hot zone, wherein, at the start time, the cursor is located at the head of the hot zone, and the logical information includes the storage address information of the second cache block; the pair of cache blocks hit in the hot zone of the i+1th layer and cache blocks not hit in the hot zone of the i-th layer are exchanged, including: the third cache block and the fourth cache block are exchanged, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

[0008] The solution shown in the present disclosure can manage cache blocks more conveniently by setting a cursor to distinguish hotter cache blocks in a hot zone.

[0009] In an optional manner, an exchange process is performed on the third cache block and the fourth cache block, including: if the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area in the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area in the i+1 layer where the third cache blocks are stored; if the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to an area in the hot zone of the i-th layer where the fourth cache blocks are stored, and the fourth cache blocks are moved to an area in the i+1 layer where the third cache blocks are stored; if the number of the third cache blocks is greater than the number of the fourth cache blocks, a portion of the cache blocks in the third cache blocks are moved to an area in the hot zone of the i-th layer where the fourth cache blocks are stored, and the fourth cache blocks are moved to an area in the i+1 layer where the portion of the cache blocks are stored.

[0010] In an optional manner, for the cold zone of each layer from the 2nd to the nth layer, if the first cache block in the cold zone is hot data, the first cache block is added to the hot zone of the same layer as the cold zone, including: for the cold zone of each layer from the 2nd to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone of the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

[0011] In the solution shown in the present disclosure, when there is a cursor in the hot zone, when the cache block in the cold zone is hot data, the cache block is moved to behind the cursor in the hot zone to distinguish it from the hotter cache block in the hot zone.

[0012] In an optional manner, the method further includes: if a cache block in a cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded toward the hot zone; if a cache block in a hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded toward the cold zone.

[0013] In the scheme disclosed in the present invention, if the cache block in the cold zone of the i+1th layer is hit, it means that the space of the cold zone in the 1st to the ith layer may not be large enough, so the cache space of the cold zone of each layer in the 1st to the ith layer is expanded to the hot zone so that the upper layer has enough space. If the cache block in the hot zone of the i+1th layer is hit, it means that the space of the hot zone in the 1st to the ith layer may not be large enough, so the cache space of the hot zone of each layer in the 1st to the ith layer is expanded to the hot zone so that the upper layer has enough space. In this way, the cache blocks with a high probability of being hit can be stored in the layer with high IO speed as much as possible.

[0014] In an optional manner, a first-in-first-out mechanism is adopted to obtain the logic information at the tail of the logic information sequence of the cold zone of the i-th layer when the cache block in the cold zone of the i-th layer is moved to the cold zone of the i+1-th layer, wherein the logic information sequence records the logic information of the cache block in the cold zone of the i-th layer and is arranged from front to back in the order in which the cache blocks are added to the cold zone of the i-th layer; the fifth cache block to which the logic information at the tail belongs is asynchronously moved to the cold zone of the i+1-th layer through a transport thread; the logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the i+1-th layer.

[0015] In the solution disclosed in the present invention, cache blocks between levels are asynchronously moved, which can effectively alleviate the situation where high-speed IO devices wait for low-speed IO devices when the IO speeds between levels are different.

[0016] In an optional manner, a transfer thread is used to asynchronously perform an exchange process on the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the ith layer.

[0017] In the solution disclosed in the present invention, cache blocks between levels are asynchronously moved, which can effectively alleviate the situation where high-speed IO devices wait for low-speed IO devices when the IO speeds between levels are different.

[0018] In an optional manner, the method further includes: when the exchange time point is reached, determining that the exchange condition is satisfied; or, among the n cache layers, there are M layers and N layers, and the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, determining that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or, among the n cache layers, there is a K layer whose hot zone has a cache block hit count greater than a count threshold, and whose hot zone has a cache block hit count less than the count threshold, determining that the exchange condition is satisfied, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

[0019] In an optional manner, the method further includes: when the first cache block is hit, determining that the first cache block is hot data.

[0020] In the scheme disclosed in the present invention, since the cold zone adopts a first-in-first-out mechanism, and the newly added cache blocks are first cached to the first layer, as new cache blocks are continuously added, the cache blocks that were added to the cache system earlier will continue to move backward in the cold zone of the same layer until the first added cache blocks are moved to the next layer. The cache blocks are gradually moving backward, which is equivalent to the continuous passage of time. When a new cache block is just added to the first layer and moves to the cold zone of the second layer, it has moved the length of the entire cold zone on the first layer. If the cache block is hit again in the second layer, the cache block has met the condition of being accessed again after a period of time and is identified as hot data. In this way, hot data is data that has been accessed within a period of time and will be accessed again after a period of time, which can prevent data that is frequently accessed within a short period of time and then no longer accessed from entering the hot zone.

[0021] In an optional manner, the transmission bandwidth of the nth layer is not lower than the network bandwidth.

[0022] In the solution shown in the present disclosure, the transmission bandwidth of the layer with the worst IO speed is not lower than the network bandwidth, so reading data from the cache system as a whole is faster than reading data from a remote device.

[0023] In a second aspect, the present disclosure provides a cache management device, which has the function of implementing the first aspect or any optional method of the first aspect, and the device includes at least one module, and the at least one module is used to implement the cache management method provided by the first aspect or any optional method of the first aspect.

[0024] In some embodiments, the modules in the cache management device are implemented by software, and the modules in the cache management device are program modules. In other embodiments, the modules in the cache management device are implemented by hardware or firmware.

[0025] In a third aspect, the present disclosure provides a computing device comprising a processor and a memory, wherein the processor is used to execute instructions stored in the memory so that the computing device implements the cache management method provided in the first aspect and any optional manner of the first aspect.

[0026] In a fourth aspect, the present disclosure provides a computer-readable storage medium, including computer program instructions. When the computer program instructions are executed by a computing device, the computing device implements the cache management method provided by the first aspect and any optional manner of the first aspect.

[0027] In a fifth aspect, the present disclosure provides a computer program product, the computer program product comprising computer program instructions, the computer instructions being stored in a computer-readable storage medium. A processor of a computing device reads the computer program instructions from the computer-readable storage medium, and the processor executes the computer program instructions, so that the computing device implements the cache management method provided in the first aspect and any optional manner of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a schematic diagram of a system architecture provided by an exemplary embodiment of the present disclosure;

[0029] Figure 2 is a schematic diagram of a cache system provided by an exemplary embodiment of the present disclosure;

[0030] Figure 3 is a schematic diagram of partitions of a cache system provided by an exemplary embodiment of the present disclosure;

[0031] Figure 4 is a schematic diagram of a method flow of cache management provided by an exemplary embodiment of the present disclosure;

[0032] Figure 5 is a schematic diagram of cold zone data moving between layers provided by an exemplary embodiment of the present disclosure;

[0033] Figure 6 is a schematic diagram of the movement of hot zone data within a hot zone provided by an exemplary embodiment of the present disclosure;

[0034] Figure 7 is a schematic diagram of inter-layer exchange of hot zone data provided by an exemplary embodiment of the present disclosure;

[0035] Figure 8 is a schematic diagram of hot zone data after inter-layer exchange provided by an exemplary embodiment of the present disclosure;

[0036] Fig. 9 It is a schematic diagram of cold zone data being hit and moving provided by an exemplary embodiment of the present disclosure;

[0037] Fig.10 is a schematic diagram of the expansion of a cold zone to a hot zone provided by an exemplary embodiment of the present disclosure;

[0038] Fig.11 is a schematic diagram of the expansion of a hot zone into a cold zone provided by an exemplary embodiment of the present disclosure;

[0039] Fig.12 is an application schematic diagram of a cache system provided by an exemplary embodiment of the present disclosure;

[0040] Fig.13 is a structural diagram of a cache management device provided by an exemplary embodiment of the present disclosure;

[0041] Fig.14 It is a schematic diagram of the structure of a computing device provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0042] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0043] Some terminology concepts involved in the embodiments of the present disclosure are explained below.

[0044] 1. Exclusive mode: In a cache system that includes multiple cache layers, the cache content of each layer is stored in a mutually exclusive manner. In other words, in exclusive mode, the same cache content will not appear in multiple cache layers.

[0045] 2. Inclusive mode: In a cache system that includes multiple cache layers, cache content is organized in multiple cache layers in an upward inclusive manner. That is, in inclusive mode, the content stored in the higher cache layer is stored in the lower cache layer.

[0046] The following describes the background of the embodiments of the present disclosure.

[0047] In cloud scenarios with a storage and computing separation architecture, when computing devices face large analytical requests, they need to transfer data from remote devices to computing devices through the network for subsequent processing. The network overhead of large amounts of data flow is large, and network IO becomes a bottleneck for computing performance. Although there are buffers in the memory of computing devices for caching data, the cache space is usually limited, and the acceleration effect is not obvious for scenarios with large amounts of data. Therefore, as the amount of business data continues to grow, the cache inevitably needs to expand the cache capacity and improve the hit rate of data in the cache, thereby reducing the number of times it passes through network IO to meet business needs. However, the cost of high-speed storage devices is relatively high. How to use the different storage characteristics of different devices (such as device capacity and device read and write speed, etc.) to build a cache system with larger capacity and lower unit cache cost is a problem to be solved. In addition, a multi-device cache system will inevitably bring about complexity and scalability problems. If the design is unreasonable, problems such as untimely caching may occur. Moreover, in actual application scenarios, workloads are diverse and repeatedly changing, and the parameters of most cache algorithms are fixed parameters set by humans, which cannot adapt to repeatedly changing workloads. Therefore, in a cache system with multiple devices, it is necessary to provide a cache management method suitable for repeatedly changing workloads.

[0048] Based on this, an embodiment of the present disclosure provides a cache management method, in which the cache system is a multi-level cache system, and the data cached in the cache system can adaptively change between cache layers according to specific working conditions, so that a good cache hit effect can be achieved even in changing working conditions.

[0049] The solution provided by the embodiment of the present disclosure is described below in the order of execution subject, system architecture, cache system, method flow and device.

[0050] 1. Execution entity.

[0051] The execution subject of the cache management method is a cache management device, which is a hardware device, such as a computing device such as a server or a terminal, or a software device, such as a set of software programs running on a computing device.

[0052] 2. System architecture.

[0053] Figure 1 Provides a schematic diagram of the system architecture for cache management. Figure 1The system architecture of cache management includes computing devices and remote devices. The computing devices are servers or terminals, etc. The remote devices are servers or server clusters, etc. The remote devices provide persistent storage object storage services (OBS). The computing devices and remote devices are connected through wired or wireless networks. A cache system is deployed on the computing devices, and the remote devices are used to persistently store data. When the upper-layer application writes data to the computing device, the computing device sends the data to the remote device, so that the remote device persistently stores the data. When the data to be accessed by the upper-layer application does not exist in the cache system of the computing device, the data is obtained from the remote device and returned to the upper-layer application.

[0054] 3. Cache system.

[0055] The cache system is deployed on the computing device. Figure 2 Provides a schematic diagram of the cache system. Figure 2 , the cache system includes n cache layers, n is greater than or equal to 2, and the n cache layers represent n types of storage resources, and each layer represents a type of storage resource. From top to bottom, the n cache layers include the 1st layer to the nth layer, and the IO speed of the 1st layer to the nth layer decreases layer by layer. The access popularity of data also gradually decreases as the IO speed decreases, that is, the IO speed of the i+1th layer is lower than the IO speed of the ith layer, i is a positive integer and less than n. The top cache layer has the best storage characteristics, but may have a small cache space. For example, n is 3, the 1st layer is the memory, the 2nd layer is one or more SSDs plugged into the computing device, and the 3rd layer is one or more mechanical hard disk drives (HDDs) plugged into the computing device. For another example, n is 2, the 1st layer is one or more SSDs plugged into the computing device, and the 2nd layer is one or more HDDs plugged into the computing device.

[0056] In the cache system, for the i-th layer, all the layers below it (i+1 to n-th layers) are equivalent to the logical cache area of ​​the layer, which is used to indicate that the i-th layer cache space capacity is insufficient and cache elimination is required. The eliminated data is cached in the i+1 to n-th layers. The logical cache area here can also be considered as an abstract ghost cache. For an abstract ghost cache, all the layers above it are called abstract caches. For example, Figure 2 In the example, n is 3. Figure 2 (a) indicates that the second and third layers are abstract ghost caches of the first layer. Figure 2 (b) in the figure indicates that the third layer is the abstract ghost cache of the second layer. Figure 2 (c) in the figure indicates that the first and second layers are abstract caches of the third layer. Figure 2 (d) in the figure indicates that the first layer is an abstract cache of the second layer.

[0057] When the cache system is online, you can configure the devices of each cache layer through the configuration file. You can add and delete devices of each cache layer by modifying the configuration file. In addition, you can change the cache size of each cache layer by modifying the capacity in the configuration file. In addition, after modifying the configuration file, restart the cache system to load the configuration file and update the local cache.

[0058] By using the above cache system, multiple cache layers with different IO speeds can coordinate with each other to manage multi-layer cache.

[0059] See also Figure 3 In the cache system shown in the figure, each of the n cache layers includes a cold zone and a hot zone. The cold zone is used to store cold data, which refers to data that is accessed only once or frequently within a period of time and is no longer accessed. The hot zone is used to store hot data, which refers to data that is accessed at least once and will continue to be accessed after a period of time. When storing data in the hot and cold zones, they are stored in the form of cache blocks. Figure 3 In the diagram, the capacity spaces of the cold zone and the hot zone in each layer are shown as the same. In reality, they are adjusted dynamically and may or may not be the same.

[0060] In an optional manner, the transmission bandwidth of the nth layer is not lower than the network bandwidth, so that the transmission bandwidth of the layer with the worst IO speed is not lower than the network bandwidth, and reading data from the cache system as a whole is faster than reading data from a remote device.

[0061] In an optional approach, the cache system should cache as much data as possible, and use an exclusive mode for cache management between each level.

[0062] In an optional manner, in the cache system, the cache space increases layer by layer from the 1st layer to the nth layer from top to bottom.

[0063] 4. Method flow. For this method flow, see Figure 4 Steps 401 to 404 are shown.

[0064] Step 401, when data is added to the cache system, the data is stored in the cold area of ​​the first layer in the form of cache blocks.

[0065] In this embodiment, the computing device receives a data read request, which is used to read data A, confirms that data A does not exist in the cache system, reads data A from the remote device through the network, and adds the data A to the cache system. Alternatively, the computing device receives a data write request, which is used to write data A, and the computing device adds data A to the cache system and writes data A to the remote device. If the remote write fails, the local cache content needs to be invalidated.

[0066] When the computing device adds data A to the cache system, the data A is stored in the cold zone of the first layer of multiple cache layers in the form of a cache block. If the data volume of data A is greater than the size of a cache block, data A is split into multiple parts, each of which is stored as a cache block. If the data volume of data A is less than or equal to the size of a cache block, data A is stored in a cache block, wherein the cache block is the basic storage unit of the cache system, which can also be understood as the minimum storage unit. The size of the cache block is set according to actual needs, for example, the size of the cache block is 4M, 8M or 16M, etc. The computing device also records the logical information of the cache block of data A, and places the logical information in the header of the logical information of the cold zone of the first layer to indicate that the cache block of data A is data added to the cache system later. The logical information includes information such as the storage address information of the cache block of data A in the first layer, which is used to manage the cache block.

[0067] In addition, the computing device also records metadata information of data A, which includes information such as the storage address information of data A in the first layer, so as to be able to find data A when subsequently reading data A from the cache system.

[0068] It should be noted that in the embodiments of the present disclosure, by setting a larger cache block, the effect of data pre-reading can be achieved, thereby improving the hit rate of the cache system. For example, the amount of data requested by the upper-layer application each time is 8k, and the cache block is larger than 8k. The computing device loads the cache block to which the data requested this time belongs into the cache system. The next time the upper-layer application requests other contents of the cache block, it can be read directly from the cache system without obtaining it from the remote device. This can not only reduce the number of interactions with the remote device, but also improve the hit rate of the cache system. In addition, setting a larger cache block can also reduce the number of cache blocks managed by the cache system, thereby reducing the amount of metadata information.

[0069] Step 402: When there is insufficient remaining cache space in the cold zone of the i-th layer, a first-in-first-out mechanism is used to move cache blocks in the cold zone of the i-th layer to the cold zone of the (i+1)th layer.

[0070] In this embodiment, when the remaining cache space in the cold zone of the i-th layer is less than the capacity threshold, it is determined that the remaining cache space is insufficient, and a first-in-first-out mechanism is adopted to determine one or more cache blocks first added to the cold zone of the i-th layer, and the one or more cache blocks are moved to the cold zone of the i+1-th layer. For example, when data is added to the cold zone of the first layer in step 401, the remaining cache space of the cold zone of the first layer is insufficient, and the one or more cache blocks first added to the cold zone of the first layer are moved to the cold zone of the second layer, so that the newly added data can be cached in the cold zone of the first layer. In this way, the adjustment of cold zone data between different levels can be achieved.

[0071] In addition, when the remaining cache space in the cold zone of the nth layer is less than the capacity threshold, a first-in-first-out mechanism is adopted to delete one or more cache blocks that are first added to the cold zone of the nth layer.

[0072] Step 403 : for the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to the hot zone of the same layer as the cold zone.

[0073] In this embodiment, for the cold zone of the jth layer among the 2nd to the nth layers, when the first cache block in the cold zone of the jth layer is hot data, the first cache block is added to the hot zone of the jth layer, where j is greater than or equal to 2 and less than or equal to n. In this way, the hot data in the cold zone can be moved to the hot zone.

[0074] Among them, the first cache block in the cold zone of the jth layer is hit, and it has been hit at least once before the jth layer, and the first cache block is identified as hot data. The reason is: when the cache area stored on a certain layer is hit in the cold zone, it is at least the second time to access the cache block (the first access is when it joins the cache system). If the layer is not the first layer, it means that the cache block is a cache block eliminated from the upper layer. The cache space size of the cold zone is used to indirectly represent the concept of time. At this time, if it is accessed again, it means that the condition of being still accessed after a period of time is met. The cache block is identified as hot data and is moved to the hot zone of the same layer. The reason why the cache space size of the cold zone described here indirectly represents the concept of time is that the cold zone adopts a first-in-first-out mechanism, and the newly added cache blocks are first cached in the first layer. As new cache blocks are continuously added, the cache blocks that were added earlier to the cache system will continue to move backward in the cold zone of the same layer until the first cache blocks are moved to the next layer. The cache blocks are gradually moving backward, which is equivalent to the continuous passage of time. When a new cache block is just added to the first layer and moves to the cold zone of the second layer, it has moved the length of the entire cold zone on the first layer. If the cache block is hit again in the second layer, the cache block has met the condition of being accessed again after a period of time and is identified as hot data.

[0075] It should be noted that step 403 is for the cold areas from the 2nd layer to the nth layer. This is because the IO speed of the 1st layer is the highest, and both the cold area of ​​the 1st layer and the hot area of ​​the 1st layer can be read quickly, so the hot data in the cold area of ​​the 1st layer will not be directly moved to the hot area of ​​the 1st layer.

[0076] Step 404: Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the ith layer.

[0077] In this embodiment, the computing device determines a hit cache block in the hot zone of the i+1th layer whenever an exchange condition is met, where the hit cache block refers to an accessed cache block, and determines a miss cache block in the hot zone of the i-th layer, where the miss cache block refers to an unaccessed cache block, and performs an exchange process on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the i-th layer, so that the cache blocks that are frequently hit in the lower layer are moved to the cache layer with a higher IO speed as much as possible.

[0078] use Figure 4 The process shown in the figure manages the cold zone and the hot zone separately, so that the cold data identified in the cache system will only stay in the cold zone, and the cache blocks in the cold zone newly added to the cache system will only be replaced in the cold zone when replacing the cache blocks in the original space. As time goes on, they are continuously eliminated from top to bottom until they are finally deleted from the cache system, which will not affect the hot data in the hot zone, and can reduce the large-scale cache pollution caused by sequential scanning of large tables. In this way, the cold zone mainly plays a filtering role, screening out hot data and moving it to the hot zone for management. The hot zone stores the cache blocks that are really frequently accessed for as long as possible, bringing a higher hit rate to the cache system and reducing the number of times to obtain from remote devices. In addition, in the hot zone, the cache blocks are interactive between adjacent cache layers, so that hotter data is moved to the cache layer with a higher IO speed, so that the cache block heat also presents a layer-by-layer structure that decreases, and the characteristics of different IO speeds of multiple cache layers are maximized to maximize storage benefits.

[0079] Below Figure 4 The process shown is described in detail.

[0080] In an optional manner, when the cache block in the cold zone of the i-th layer is moved to the cold zone of the i+1-th layer in step 402, the cache block is moved according to the logical information sequence, and the processing process is as follows:

[0081] Each layer of cold zone corresponds to a logical information sequence, which records the logical information of the cache blocks stored in the corresponding cold zone. Whenever a cache block enters the cold zone of a certain layer, the logical information of the cache block is added to the head of the logical information sequence. In this way, the logical information in the logical information sequence is arranged from front to back according to the order in which the cache blocks are added. The order of the logical information in the logical information sequence can reflect the order in which the cache blocks are added to the cache system.

[0082] When the cache block in the cold zone of the i-th layer moves to the cold zone of the i+1th layer, the computing device obtains the logical information sequence of the cold zone of the i-th layer, determines the logical information at the tail in the logical information sequence, determines the cache block to which the logical information belongs, and for the purpose of distinction, calls the cache block 1, calls the background transfer thread, asynchronously moves the cache block 1 to the cold zone of the i+1th layer for storage, and updates the logical information, placing the updated logical information at the head of the logical information sequence of the cold zone of the i+1th layer. In this way, since the transfer process is performed asynchronously, when faced with the IO speed difference between adjacent layers, it can effectively alleviate the situation where the high-speed IO device waits for the low-speed IO device.

[0083] In addition, in order to avoid insufficient space when adding a new cache block, while waiting for the cache block in the cold zone of the i-th layer to move to the cold zone of the i+1-th layer, if the carrying speed of the carrying thread is slower than the current addition of the new cache block, the cache block at the tail of the logical information sequence of the cold zone of the i-th layer is directly deleted to allow the new cache block to be added quickly.

[0084] Alternatively, see Figure 5 A fixed-length buffer is set at the end of the cold zone of each layer. The buffer sizes set by multiple cache layers are the same, or the buffers set by multiple cache layers are completely different, or the buffers set by multiple cache layers are partially the same. Here, "fixed-length buffer" means that for the same layer, the space of the cold zone and the hot zone may change continuously with the access, but the size of the buffer will not change. For example, a layer changes from 40% cold zone + 60% hot zone to 50% cold zone + 50% hot zone, and the buffer is 50M.

[0085] In the cold zone of each layer, as cache blocks are added, the first cache block added logically enters the tail buffer, and the physical storage address of the first cache block added does not change, but the logical information of the first cache block added is moved to the tail of the logical information sequence. For a buffer of a certain layer, when it is determined from the logical information sequence that a cache block begins to enter the buffer, the background transfer thread is called to asynchronously move the cache block entering the buffer to the cold zone of the next layer for storage, and update the logical information of the cache block after the move, and place the updated logical information at the head of the logical information sequence of the cold zone of the next layer. In this way, it is equivalent to reserving a small amount of space (i.e., buffer) in each layer as a buffer. If this part of the buffer is not empty, start to move the content in this part of the buffer to the lower layer, so as to ensure that when a new cache block is added, there is always enough space to store it directly, without waiting for the current layer to vacate space before inserting it, which can avoid the thread inserting new data from being blocked due to waiting for the current layer data to move.

[0086] In addition, in some cases, the speed of adding new cache blocks is too fast, and the asynchronous transfer thread may not have time to clear the cache blocks in the buffer. If you want to add new cache blocks at this time, you need to wait for free space to be cleared. Therefore, directly deleting the cache blocks in the buffer and clearing free space for new cache blocks to be added can save the time of adding new cache blocks.

[0087] Here, moving the cache block in the cold zone of the i-th layer to the cold zone of the i+1-th layer may be referred to as a demote process.

[0088] In an optional manner, the exchange condition refers to a trigger condition that may improve the cache hit rate at the cache layer after the exchange is performed. There are multiple exchange conditions, and three feasible methods are provided as follows:

[0089] Method 1: exchange is performed regularly, and whenever a preset exchange time point is reached, it is determined that the exchange condition is met. For example, the exchange is performed periodically, and an exchange time point is reached every other period.

[0090] Method 2: Among the n cache layers, there are M layer and N layer. The number of hit cache blocks in the hot zone of M layer is greater than the number of missed cache blocks in the hot zone of N layer. M layer is adjacent to N layer. The IO speed of M layer is lower than that of N layer, indicating that there are more hit cache blocks in the lower layer. In order to increase the probability of being hit at the layer with high IO speed, the hit cache blocks in the lower layer are exchanged with the missed cache blocks in the upper layer.

[0091] Method 3: Among the n cache layers, there are K layer and Q layer. The number of cache blocks hit in the hot zone of K layer is greater than the number threshold, and the number of cache blocks hit in the hot zone of Q layer is less than the number threshold. K layer is adjacent to Q layer, and the IO speed of K layer is lower than that of Q layer, indicating that the lower layer is frequently hit. In order to increase the probability of being hit in the layer with high IO speed, the cache blocks hit in the lower layer are exchanged with the cache blocks not hit in the upper layer. The number threshold can be set according to actual needs, for example, the number threshold is 20 times.

[0092] In an optional manner, the process of cache block swapping in the hot zone in step 404 is as follows:

[0093] Each layer of hot zone also corresponds to a logical information sequence. For the logical information sequence of a hot zone in a certain layer, the logical information sequence records the logical information of the cache blocks stored in the hot zone of the layer. In addition, a cursor is set in the logical information sequence of the hot zone of each layer. The cursor can be considered as a mark. The cursor is used to divide the cache blocks that are hotter in the hot zone within a period of time. When the cache system starts working, the cursor of the hot zone of each layer is located at the head of the hot zone. When a cache block in the hot zone is accessed and hit, the computing device moves the logical information of the cache block to the front of the cursor, see Figure 6 . For example, the logical information of the cache block is moved to the front of the cursor and to the front. In this way, the cursor divides the hot zone into two parts. The part before the cursor is called the candidate area. The cache blocks in the candidate area are considered to be hotter cache blocks, which are used to exchange with the cache blocks after the cursor in the upper hot zone. The cache blocks after the cursor are considered to be less hot cache blocks, which are used to exchange with the cache blocks before the cursor in the lower hot zone, so that the hotter cache blocks in the lower layer are moved up to the level with higher IO speed, and the less hot cache blocks in the upper layer are moved down to the level with lower IO speed.

[0094] In step 404, the computing device determines the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, which is referred to as the third cache block for the convenience of description, and determines the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs, which is referred to as the fourth cache block for the convenience of description. If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache block is moved to a partial area in the hot zone of the i-th layer where the fourth cache block is stored, and the cache blocks stored in the partial area are moved to the area where the third cache block is stored in the i+1th layer. In this way, it is equivalent to exchanging all the third cache blocks with part of the cache blocks in the fourth cache block. If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache block is moved to an area in the hot zone of the i-th layer where the fourth cache block is stored, and the fourth cache block is moved to an area in the i+1th layer where the third cache block is stored. In this way, it is equivalent to exchanging all the third cache blocks with all the fourth cache blocks. If the number of the third cache blocks is greater than the number of the fourth cache blocks, then part of the cache blocks in the third cache block are moved to the storage area of ​​the fourth cache block in the hot zone of the i-th layer, the number of the part of the cache blocks is the same as the number of the fourth cache blocks, and the fourth cache block is moved to the area of ​​the i+1th layer where the part of the cache blocks is stored. Optionally, the part of the cache blocks is the cache block that is at the front before the cursor. In this way, it is equivalent to exchanging all the part of the cache blocks in the third cache block with the fourth cache block. For example, see Figure 7 In a cache system including three cache layers, cache block 1 after the cursor of the first layer is exchanged with cache block 2 before the cursor of the second layer, exchanging one cache block, and cache block 3 and cache block 4 after the cursor of the second layer are exchanged with cache block 5 and cache block 6 before the cursor of the third layer, exchanging two cache blocks. Figure 8 A schematic diagram after the exchange is provided.

[0095] After the exchange is completed, it is equivalent to the cache blocks being sorted by the background thread once, and the cursor is reinserted into the head of the logical information sequence of the hot zone, and a new round of cursor movement begins. For example, for the i+1th layer, the cache blocks before the current cursor are A and B, and the cache blocks after the cursor are C and D, which is equivalent to A and B being the hotter cache blocks in the hot zone during this period, and C and D blocks are the less hot cache blocks during this period. In order to obtain better benefits, A and B are moved to the i-th layer, and the less hot cache blocks E and F in the i-th layer are moved to the i+1th layer. At this time, the order is cursor-EFCD. At this time, a new round of cursor movement begins. Assuming that E is hit again, it becomes E-cursor-FCD.

[0096] Here, moving the cache block in the hot zone of the i+1th layer to the hot zone of the ith layer can be called a promote process, and moving the cache block in the hot zone of the ith layer to the hot zone of the i+1th layer can be called a demote process.

[0097] Optionally, when cache blocks are moved in hot zones of upper and lower layers, cache blocks are asynchronously exchanged between adjacent layers through a transfer thread, thereby reducing the waiting time for cache block movement.

[0098] In an optional manner, when a cursor exists in the hot zone, the process of moving the cache block in the cold zone to the hot zone in step 403 is as follows:

[0099] In the second to nth layers, if the first cache block in the cold zone of a certain layer is hot data, the logical information of the first cache block is determined, and the hot zone in the same layer as the cold zone of the layer is determined, and the logical information of the first cache block is moved to after the cursor of the hot zone. For example, see Fig. 9 In a cache system with three cache layers, a cache block in the cold zone of the third layer is hit and is moved to the hot zone of the third layer, to the end after the cursor. If the first cache block is hit again, it will be moved to the front of the cursor.

[0100] In an optional way, in the cache system, when a cache block is hit in a certain layer, it is equivalent to hitting the abstract ghost cache of the abstract cache corresponding to the current hit layer, which implies that the cache space of the abstract cache above the abstract ghost cache is not large enough. If the upper layer space is large enough, then the cache block is more likely to exist in the upper layer, and will hit at a higher level, obtaining a higher hit benefit, and correspondingly, it is less likely to hit the abstract ghost cache at the current lower layer. Therefore, in order to increase the probability of hitting at the layer with high IO speed, the cache space of the upper layer is adaptively adjusted in the horizontal direction, and the processing process is as follows:

[0101] If the cache block in the cold zone of the i+1th layer is hit, it means that the space of the cold zone in the 1st to the ith layer may not be large enough, so the cache space of the cold zone of each layer from the 1st to the ith layer is expanded to the hot zone so that the upper layer has enough space. For example, see Fig.10 In a cache system including three cache layers, when a cache block in the cold zone of the third layer is hit, its logical information will be moved to the hot zone of the third layer, and the cold zones of the first and second layers will be expanded toward the hot zone. When expanding toward the hot zone, the expansion amount of each layer from the first layer to the i-th layer is the same, or the expansion amount of each layer from the first layer to the i-th layer is not exactly the same. For example, the cold zone of each layer from the first layer to the i-th layer expands by the size of one or more cache blocks, and the corresponding hot zone reduces the size of one or more cache blocks.

[0102] If the cache block in the hot zone of the i+1th layer is hit, it means that the space of the hot zone in the 1st to the ith layer may not be large enough, so the cache space of the hot zone of each layer from the 1st to the ith layer is expanded to the cold zone so that the upper layer has enough space. For example, see Fig.11 In a cache system including three cache layers, a data block in the hot zone of the third layer is hit, and the hot zones of the first and second layers are expanded to the cold zone. When expanding to the cold zone, the expansion amount of each layer from the first layer to the i-th layer is the same, or the expansion amount of each layer from the first layer to the i-th layer is not exactly the same. For example, the hot zone of each layer from the first layer to the i-th layer is expanded by the size of one or more cache blocks, and the corresponding cold zone is reduced by the size of one or more cache blocks.

[0103] Optionally, after a cache block in the hot zone of the i+1th layer is hit, the logical information of the cache block is moved to the head of the logical information sequence of the hot zone so that it will not be eliminated when the cache block at the tail is eliminated, thereby allowing the hotter cache content in the hot zone to have a longer life cycle.

[0104] In this way, adaptive adjustment of the cache space in the horizontal direction can be achieved.

[0105] It should be noted that for each cache block, when it moves from the cold area to the hot area of ​​the same layer, or moves in the hot area of ​​the same layer, or moves in the cold area of ​​the same layer, only the position of the logical information in the logical information sequence changes, and the storage address (i.e., the physical address) of the cache block is not changed.

[0106] The following example illustrates the application of the cache system to the Gauss database.

[0107] See also Fig.12 The multi-level cache system includes a multi-level device module (not shown in the figure), a cache management interface module, an IO processing module, a cache monitoring module and a cache data sorting module.

[0108] Multi-level device module: mainly composed of user-defined devices of various levels, such as zero level (Layer 0), Layer 1 (such as SSD), Layer 2 (such as HDD) or more devices. The device level, except for Layer 0 (memory), Layer 1 to Layer n constitute multiple cache layers in the cache system in this disclosed embodiment. Layer 0 memory cache needs to be compatible with the existing system, and Layer 1 to Layer n are determined by the device speed and adopt a pluggable management strategy. The memory here is random access memory (RAM).

[0109] Users can configure the cache system according to actual needs. The cache system provides configuration files. By modifying the content of the configuration file, you can add or delete cache layers. By modifying the allocated capacity in the configuration file, you can change the cache space size of each layer. After modifying the configuration file, restart the cache system to load the configuration file and readjust the local cache.

[0110] Among them, Layer0 is used as the buffer pool of Gauss database. Data first enters the buffer pool and is managed. Data between Layer 1-Layer N is maintained in exclusive mode, and data in Layer 0 is maintained in inclusive mode for the lower layer.

[0111] Cache management interface module: mainly responsible for providing corresponding interfaces for various operations to the upper layer. For example, it provides a usage interface for upper layer applications to write, read and modify data, as well as a maintenance interface for cache metadata information and logic information.

[0112] IO processing module: It consists of an IO scheduler and a writer thread. The IO scheduler implements internal IO requests in an asynchronous direct IO manner, completes the collection and processing of upper-layer IO requests and data movement IO requests, and the data movement IO requests are issued by the cache data overall module.

[0113] In addition, if there is column-stored data, it needs to be written back to the remote device in time for persistent storage. Therefore, the write-back request for column-stored data is not completed through the asynchronous direct IO of the IO queues (queues) 1-n corresponding to each cache layer. The IO processing module adds the request to the remote queue (remote queue) for operation. At the same time, in order to keep the data in the cache system correct, the content modification of the column storage also needs to be completed through local IO to write the new version of the data back to the local cache system. Among them, column-stored data refers to data stored in columns. Here, each layer of storage device corresponds to an IO queue, and each IO queue corresponds to one or more work units for executing tasks in the IO queue. In addition, the IO processing module also includes a management unit for managing IO queues.

[0114] The Writer thread is the flush thread for row-stored data in memory. It is used to check the dirty page content in Layer 0, collect and organize it, submit it through the IO processing part, and write it back to the local cache system. The local row-stored data reading and writing and the local column-stored data reading are completed through queue 1-n of the IO processing module. The row-stored data in the local cache system is flushed back to the remote device by the remote writer thread regularly.

[0115] Cache monitoring module: responsible for monitoring data collection and triggering cache data movement between upper and lower layers. The cache monitoring module can provide some basis for multi-level data movement by collecting and counting key indicators during the use of the cache system. In the future, it can also adjust the cache replacement strategy of the upper and lower layers based on the key indicators monitored.

[0116] In addition, according to the specific situation of cache data, maintenance personnel can intuitively understand the use effect of cache system objectives. The cache monitoring module can also determine the movement of cache data according to the data distribution in multiple cache layers, and by triggering the work of the cache data sorting module, the cached data in the cache system can be placed in a reasonable level to maximize the benefits.

[0117] Cache data sorting module: mainly responsible for moving and sorting cache data in multiple cache layers. For example, during use, cache blocks that are frequently hit in the cache data of the lower layer are moved to the faster cache device of the upper layer for backup. When the cache data overall module performs movement and sorting, it initiates cache data movement IO, and the IO processing module performs the movement.

[0118] exist Fig.12 The column memory is used as an example to illustrate this. The row memory can also use this cache system. The process is similar to that of the column memory, so it will not be repeated here.

[0119] Step 1201: A user thread in a computing device calls a cache management interface module to request data A.

[0120] Step 1202, the user thread searches for data A in the global metadata information, wherein the global metadata information includes metadata information of the data and cache management control information, the metadata information of the data is used to search for the data, the cache management control information is used to manage the cache block, and the cache management control information includes the logical information of the cache block. In addition, the user thread can also lock the data A in the global metadata information to make the data A consistent.

[0121] Step 1203, apply for space A from the memory to store data A in the memory.

[0122] Step 1204: If data A exists in the local cache system, data A is requested through the IO processing module, and data A is written to memory space A. If data A does not exist in the cache system, the request is added to the remote queue, data A is obtained from the remote device, data A is written to memory space A, and data A is written to the cold area of ​​the first layer of the cache system.

[0123] Step 1205, return the result of data A from space A to the user thread.

[0124] In addition, Fig.12In the process, the user thread can also modify data A. When modifying the data, the modified data is written back to the remote device from the cache system, and the data in the local cache system is set to invalid. When writing back to the remote device, a new task is added to the remote queue to flush the modified data back to the remote device.

[0125] In the disclosed embodiment, the size of the cold zone and hot zone of each layer in the cache system is dynamically adjusted, and there is no need to configure the ratio parameters of the cold zone and the hot zone. For example, after the cache system is online, the first layer is all used by the cold zone. As the cache blocks in the cold zone of the first layer move to the lower layer, and the cache blocks in the cold zone of the second layer are hit, the hit cache blocks in the second layer are added to the hot zone of the second layer. Then, in the vertical adjustment process, cache blocks will be added to the hot zone of the first layer. In this way, the size of the cold zone and hot zone of each layer changes dynamically, maintains a dynamic balance, and can adaptively change according to the working conditions in the horizontal and vertical directions. Therefore, there can be a better cache hit effect in changing working conditions. Moreover, asynchronous transfer of cache blocks can be applicable to the movement of cache blocks between cache layers with different IO speeds. Moreover, the new cold data and hot data identification strategy can better distinguish the truly effective hot data in the cache system and improve the cache hit rate.

[0126] In addition, the disclosed embodiments provide a forensic perspective.

[0127] Forensic perspective 1: Forensics from an adaptive perspective.

[0128] a. Parameter quantity evidence collection: In the disclosed embodiment, relatively few parameters need to be configured, and there is no need to configure the ratio parameters of the cold zone and the hot zone, so evidence can be collected from the perspective of parameter quantity.

[0129] b. Adaptive adjustment of cold and hot zones forensics: A specific workflow can be used to obtain evidence of the adaptive adjustment of cold and hot partitions. For example, the default initial cold and hot zone ratio is 1:1. First, use a random workload to fill all cold and hot zones in the cache, and then enter a workflow of sequential scanning of a large table. At this time, only the hot zone data will not be polluted. The adaptive adjustment of the cold and hot zone ratio can be observed from the comparison of the cache content before and after the large table scan.

[0130] Forensic perspective 2: Forensics from the perspective of asynchronous data movement.

[0131] a. Demonete strategy evidence collection: First, we can collect evidence from the perspective of demote. The demote strategy will fill data from the upper layer to the lower layer. We can determine which layer the cache starts to fill by observing the movement of cache blocks.

[0132] b. Specific parameter configuration forensics of asynchronous data transfer mechanism: Asynchronous data transfer leads to the configuration of unique parameters (such as the buffer of each cold zone).

[0133] c. Workload forensics of asynchronous data transfer mechanisms: Specific workloads can be used to forensically test asynchronous data transfer. For example, only the cache content of the cache capacity of the first layer is input. If the input cache content appears in the second layer, and the first layer lacks the content that appears in the second layer, it means that there is an asynchronous transfer mechanism that transfers the first layer data in advance. Of course, this method can also be used to measure the size of the buffer in each cold zone.

[0134] 5. Cache management device.

[0135] Fig.13 It is a structural diagram of the cache management device provided by the embodiment of the present disclosure. The device is applied to a cache system, which includes n cache layers, the input and output IO speed of the i+1th layer of the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, each of the n cache layers includes a cold zone and a hot zone, n is greater than or equal to 2, and the device can be implemented as part or all of the device through software, hardware, or a combination of both. The device provided by the embodiment of the present disclosure can implement the embodiment of the present disclosure Figure 4 The process shown in the figure, the device includes a writing module 1310 and a transport module 1320, wherein:

[0136] A writing module 1310, for storing the data in a cold zone of the first layer in the form of a cache block when the data is added to the cache system;

[0137] The transport module 1320 is used to: when there is insufficient remaining cache space in the cold zone of the i-th layer, use a first-in-first-out mechanism to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer;

[0138] For a cold zone of each layer from the second layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone belonging to the same layer as the cold zone;

[0139] Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the ith layer.

[0140] In an optional manner, the transport module 1320 is further used for:

[0141] For a hot zone in each of the n cache layers, if a second cache block in the hot zone is hit, logical information of the second cache block is moved before a cursor of the hot zone, wherein at a start time, the cursor is located at a head of the hot zone, and the logical information includes storage address information of the second cache block;

[0142] The transport module 1320 is used to:

[0143] An exchange process is performed on the third cache block and the fourth cache block, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

[0144] In an optional manner, the transport module 1320 is used to:

[0145] If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area of ​​the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area of ​​the i+1-th layer where the third cache blocks are stored;

[0146] If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to the area where the fourth cache blocks are stored in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area where the third cache blocks are stored in the i+1-th layer;

[0147] If the number of the third cache blocks is greater than the number of the fourth cache blocks, some of the third cache blocks are moved to the storage area of ​​the fourth cache blocks in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area of ​​the i+1-th layer where the some cache blocks are stored.

[0148] In an optional manner, the transport module 1320 is used to:

[0149] For the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone located at the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

[0150] In an optional manner, the transport module 1320 is further used for:

[0151] If the cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone;

[0152] If the cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded to the cold zone.

[0153] In an optional manner, the transport module 1320 is used to:

[0154] Acquire the logic information at the tail of the logic information sequence of the cold zone of the i-th layer, wherein the logic information sequence records the logic information of the cache blocks in the cold zone of the i-th layer and is arranged from front to back according to the order in which the cache blocks are stored in the cold zone of the i-th layer;

[0155] Asynchronously moving the fifth cache block to which the tail logical information belongs to the cold zone of the i+1th layer through a transfer thread;

[0156] The logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the (i+1)th layer.

[0157] In an optional manner, the transport module 1320 is used to:

[0158] By using the transfer thread, the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the ith layer are asynchronously exchanged.

[0159] In an optional manner, the transport module 1320 is further used for:

[0160] When the exchange time point is reached, determining that the exchange condition is satisfied; or,

[0161] Among the n cache layers, there are an M layer and an N layer, the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, and it is determined that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or,

[0162] Among the n cache layers, if the number of cache block hits in the hot zone of the K layer is greater than the number threshold, and the number of cache block hits in the hot zone of the Q layer is less than the number threshold, it is determined that the exchange condition is met, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

[0163] In an optional manner, the transport module 1320 is further used for:

[0164] When the first cache block is hit, it is determined that the first cache block is hot data.

[0165] In an optional manner, the transmission bandwidth of the nth layer is not lower than the network bandwidth.

[0166] The above division of the cache management device is schematic. The write module 1310 and the transport module 1320 can be implemented by software or by hardware. Exemplarily, the implementation of the write module 1310 is introduced below by taking the write module 1310 as an example. Similarly, the implementation of the transport module 1320 can refer to the implementation of the write module 1310.

[0167] As an example of a software functional unit, the write module 1310 may include code running on a computing instance. The computing instance may include at least one of a physical host (computing device), a virtual machine, and a container. Further, the computing instance may be one. For example, the write module 1310 may include code running on a host / virtual machine / container.

[0168] The cache management device may be a computing device, such as a server, etc. Alternatively, the cache management device may also be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD), etc. The PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0169] The present disclosure also provides a computing device 100. Fig.14 As shown, the computing device 100 includes: a bus 102, a processor 104, a memory 106, and a communication interface 108. The processor 104, the memory 106, and the communication interface 108 communicate with each other through the bus 102. The computing device 100 can be a server or a terminal device. It should be understood that the present disclosure does not limit the number of processors and memories in the computing device 100.

[0170] The bus 102 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.14The bus 102 is represented by only one line, but it does not mean that there is only one bus or one type of bus. The bus 102 may include a path for transmitting information between various components of the computing device 100 (eg, the memory 106, the processor 104, and the communication interface 108).

[0171] The processor 104 may include any one or more of a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).

[0172] The memory 106 may include a volatile memory, such as a RAM, or a non-volatile memory, such as a read-only memory (ROM), a flash memory, a HDD, or a SSD.

[0173] The memory 106 stores executable program codes, and the processor 104 executes the executable program codes to respectively implement the functions of the aforementioned writing module 1310 and the transporting module 1320, thereby implementing the cache management method. That is, the memory 106 stores instructions for executing the cache management method.

[0174] The communication interface 108 uses a transceiver module such as, but not limited to, a network interface card or a transceiver to implement communication between the computing device 100 and other devices or a communication network.

[0175] The present disclosure also provides a computer program product including instructions. The computer program product may be software or a program product including computer program instructions that can be run on a computing device or stored in any available medium. When the computer program product is run on a computing device, the computing device is enabled to perform a cache management method.

[0176] The embodiment of the present disclosure also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium that can be stored by a computing device or a data storage device such as a data center containing one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a digital versatile disc (DVD)), or a semiconductor medium (e.g., a solid-state hard disk). The computer-readable storage medium includes instructions that instruct the computing device to perform a cache management method.

[0177] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the protection scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A cache management method, characterized in that: The method is applied to a cache system, the cache system includes n cache layers, the input and output IO speed of the i+1th layer of the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, each layer of the n cache layers includes a cold area and a hot area, n is greater than or equal to 2, and the method includes: When data is added to the cache system, the data is stored in the cold area of ​​the first layer in the form of cache blocks; When there is insufficient remaining cache space in the cold zone of the i-th layer, a first-in-first-out mechanism is adopted to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer; For a cold zone of each layer from the second layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone belonging to the same layer as the cold zone; Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the ith layer.

2. The method according to claim 1, characterized in that The method further comprises: For a hot zone in each of the n cache layers, if a second cache block in the hot zone is hit, logical information of the second cache block is moved before a cursor of the hot zone, wherein at a start time, the cursor is located at a head of the hot zone, and the logical information includes storage address information of the second cache block; The performing of the exchange process on the hit cache block in the hot zone of the i+1th layer and the unhit cache block in the hot zone of the ith layer comprises: An exchange process is performed on the third cache block and the fourth cache block, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

3. The method according to claim 2, characterized in that The performing the exchange process on the third cache block and the fourth cache block includes: If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area of ​​the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area of ​​the i+1-th layer where the third cache blocks are stored; If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to the area where the fourth cache blocks are stored in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area where the third cache blocks are stored in the i+1-th layer; If the number of the third cache blocks is greater than the number of the fourth cache blocks, some of the third cache blocks are moved to the storage area of ​​the fourth cache blocks in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area of ​​the i+1-th layer where the some cache blocks are stored.

4. The method according to claim 2 or 3, characterized in that: For the cold zone of each layer from the second layer to the nth layer, when the first cache block in the cold zone is hot data, moving the first cache block to a hot zone belonging to the same layer as the cold zone comprises: For the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone located at the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

5. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: If the cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone; If the cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded to the cold zone.

6. The method according to any one of claims 1 to 5, characterized in that: The adopting a first-in-first-out mechanism to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer includes: Acquire the logic information at the tail of the logic information sequence of the cold zone of the i-th layer, wherein the logic information sequence records the logic information of the cache blocks in the cold zone of the i-th layer and is arranged from front to back according to the order in which the cache blocks are stored in the cold zone of the i-th layer; Asynchronously moving the fifth cache block to which the tail logical information belongs to the cold zone of the i+1th layer through a transfer thread; The logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the (i+1)th layer.

7. The method according to any one of claims 1 to 6, characterized in that: The performing of the exchange process on the hit cache block in the hot zone of the i+1th layer and the unhit cache block in the hot zone of the ith layer comprises: By using the transfer thread, the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the ith layer are asynchronously exchanged.

8. The method according to any one of claims 1 to 7, characterized in that: The method further comprises: When the exchange time point is reached, determining that the exchange condition is satisfied; or, Among the n cache layers, if the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, it is determined that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or, Among the n cache layers, if the number of cache block hits in the hot zone of the K layer is greater than the number threshold, and the number of cache block hits in the hot zone of the Q layer is less than the number threshold, it is determined that the exchange condition is met, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

9. The method according to any one of claims 1 to 8, characterized in that: The method further comprises: When the first cache block is hit, it is determined that the first cache block is hot data.

10. The method according to any one of claims 1 to 9, characterized in that: The transmission bandwidth of the nth layer is not lower than the network bandwidth.

11. A cache management device, characterized in that: The device is applied to a cache system, the cache system includes n cache layers, the input and output IO speed of the i+1th layer of the n cache layers is lower than the IO speed of the ith layer, i is a positive integer and is less than n, each layer of the n cache layers includes a cold area and a hot area, n is greater than or equal to 2, and the device includes: A writing module, used for storing the data in the cold area of ​​the first layer in the form of cache blocks when the data is added to the cache system; A transport module is used to: when there is insufficient remaining cache space in the cold zone of the i-th layer, use a first-in-first-out mechanism to move the cache blocks in the cold zone of the i-th layer to the cold zone of the i+1-th layer; For a cold zone of each layer from the second layer to the nth layer, if the first cache block in the cold zone is hot data, move the first cache block to a hot zone belonging to the same layer as the cold zone; Whenever a swap condition is met, a swap process is performed on the hit cache block in the hot zone of the i+1th layer and the miss cache block in the hot zone of the ith layer.

12. The device according to claim 11, characterized in that The transport module is also used for: For a hot zone in each of the n cache layers, if a second cache block in the hot zone is hit, logical information of the second cache block is moved before a cursor of the hot zone, wherein at a start time, the cursor is located at a head of the hot zone, and the logical information includes storage address information of the second cache block; The transport module is used for: An exchange process is performed on the third cache block and the fourth cache block, wherein the third cache block includes the cache block to which the logical information before the cursor in the hot zone of the i+1th layer belongs, and the fourth cache block includes the cache block to which the logical information after the cursor in the hot zone of the i-th layer belongs.

13. The device according to claim 12, characterized in that The transport module is used for: If the number of the third cache blocks is less than the number of the fourth cache blocks, the third cache blocks are moved to a partial area of ​​the hot zone of the i-th layer where the fourth cache blocks are stored, and the cache blocks stored in the partial area are moved to an area of ​​the i+1-th layer where the third cache blocks are stored; If the number of the third cache blocks is equal to the number of the fourth cache blocks, the third cache blocks are moved to the area where the fourth cache blocks are stored in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area where the third cache blocks are stored in the i+1-th layer; If the number of the third cache blocks is greater than the number of the fourth cache blocks, some of the third cache blocks are moved to the storage area of ​​the fourth cache blocks in the hot zone of the i-th layer, and the fourth cache blocks are moved to the area of ​​the i+1-th layer where the some cache blocks are stored.

14. The device according to claim 12 or 13, characterized in that The transport module is used for: For the cold zone of each layer from the 2nd layer to the nth layer, if the first cache block in the cold zone is hot data, the logical information of the first cache block is moved after the cursor of the hot zone located at the same layer as the cold zone, wherein the logical information of the first cache block includes the storage address information of the first cache block.

15. The device according to any one of claims 11 to 14, characterized in that The transport module is also used for: If the cache block in the cold zone of the i+1th layer is hit, the cache space of the cold zone of each layer from the 1st layer to the i-th layer is expanded to the hot zone; If the cache block in the hot zone of the i+1th layer is hit, the cache space of the hot zone of each layer from the 1st layer to the i-th layer is expanded to the cold zone.

16. The device according to any one of claims 11 to 15, characterized in that The transport module is used for: Acquire the logic information at the tail of the logic information sequence of the cold zone of the i-th layer, wherein the logic information sequence records the logic information of the cache blocks in the cold zone of the i-th layer and is arranged from front to back according to the order in which the cache blocks are stored in the cold zone of the i-th layer; Asynchronously moving the fifth cache block to which the tail logical information belongs to the cold zone of the i+1th layer through a transfer thread; The logic information of the fifth cache block is updated, and the updated logic information is placed at the head of the logic information sequence of the cold zone of the (i+1)th layer.

17. The device according to any one of claims 11 to 16, characterized in that The transport module is used for: By using the transfer thread, the hit cache blocks in the hot zone of the i+1th layer and the miss cache blocks in the hot zone of the ith layer are asynchronously exchanged.

18. The device according to any one of claims 11 to 17, characterized in that The transport module is also used for: When the exchange time point is reached, determining that the exchange condition is satisfied; or, Among the n cache layers, if the number of cache blocks hit in the hot zone of the M layer is greater than the number of cache blocks not hit in the hot zone of the N layer, it is determined that the exchange condition is satisfied, wherein the M layer is adjacent to the N layer, and the IO speed of the M layer is lower than the IO speed of the N layer; or, Among the n cache layers, if the number of cache block hits in the hot zone of the K layer is greater than the number threshold, and the number of cache block hits in the hot zone of the Q layer is less than the number threshold, it is determined that the exchange condition is met, wherein the K layer is adjacent to the Q layer, and the IO speed of the K layer is lower than the IO speed of the Q layer.

19. The device according to any one of claims 11 to 18, characterized in that The transport module is also used for: When the first cache block is hit, it is determined that the first cache block is hot data.

20. The device according to any one of claims 11 to 19, characterized in that The transmission bandwidth of the nth layer is not lower than the network bandwidth.

21. A computing device, characterized in that The computing device includes a processor and a memory; The processor is configured to execute instructions stored in the memory, so that the computing device performs the method according to any one of claims 1 to 10.

22. A computer-readable storage medium, characterized in that: The method comprises computer program instructions, and when the computer program instructions are executed by a computing device, the computing device performs the method according to any one of claims 1 to 10.

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