Gain determination method, unit and FFT circuit
By using a gain determination method in the FFT circuit, the gain of each stage of butterfly operation is determined, which solves the problem of large overhead and low operation accuracy in the traditional butterfly operation scheme, and achieves higher calculation accuracy and signal-to-noise ratio.
Patent Information
- Application Number
- CN202510025957.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-08
- Publication Date
- 2025-04-11
- Estimated Expiration
- 2045-01-08
AI Technical Summary
Traditional butterfly operation solutions either require larger storage circuits to support or easily lead to low computational accuracy.
Through a gain determination method, the gain of each stage input data in the FFT calculation circuit is determined when the butterfly operation is performed, so as to reduce the butterfly operation result and avoid overflow. The method includes calculating the set of powers of each set of input data, determining the stage of power, and determining the gain according to a preset gain determination formula.
While ensuring that the butterfly operation has no risk of overflow, the number of signal attenuation is reduced, the calculation accuracy of FFT is improved, and the signal-to-noise ratio of the output spectrum is significantly improved.
Smart Images

Figure CN119441692B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of digital communication technology, and in particular to a gain determination method, unit and FFT circuit. Background Art
[0002] The FFT (Fast Fourier Transform) circuit reduces the computational complexity by decomposing a long sequence FFT into two short sequence FFTs. Repeating this decomposition action can convert any length of 2 into a short sequence FFT. N The FFT calculation of a sequence of length 2 is decomposed into several FFT calculations of sequences of length 2. The FFT calculation of a sequence of length 2 is the most basic calculation unit in FFT calculation, also known as butterfly operation. Butterfly operation can be regarded as adding and subtracting two input vectors to obtain two result vectors. In the circuit implemented by fixed-point numbers, addition will increase the data range, and the result of butterfly operation needs to be expanded by 1 bit. One solution is to consume extra bits for each level of operation to retain all information, but for FFT of sequences of longer lengths, it will be expanded by multiple bits, resulting in a huge storage circuit (such as RAM / register) overhead. Another solution is to use a fixed scaling factor, scale the result of each butterfly operation by 1 / 2, and truncate each butterfly operation by 1 bit. The truncation operation will cause rounding noise, and the rounding noise of multiple butterfly operations will continue to accumulate and eventually be superimposed on the FFT output result, resulting in a decrease in calculation accuracy.
[0003] It can be seen that the above butterfly operation schemes either require a larger storage circuit to support or easily lead to low operation accuracy. Summary of the invention
[0004] In view of this, the present application provides a gain determination method, unit and FFT circuit to solve the problem that traditional butterfly operation solutions either require large storage circuit support or easily lead to low operation accuracy.
[0005] The present application provides a gain determination method, which is used to determine the gain of each stage of input data in an FFT operation circuit when performing a butterfly operation, so as to reduce the butterfly operation result according to the gain; the gain determination method comprises the following steps:
[0006] According to the first-level input data, the group power of each group of input data in each level of butterfly operation is obtained, and the first j The maximum group power of the butterfly operation is determined as j The power of the stage;
[0007] According to the said j The power of the first stage and the preset gain determination formula determine the jThe gain determination formula is used to identify whether there is an overflow risk after the butterfly operation is performed on each group of input data in the j-th level input data.
[0008] Optionally, the process of determining the power of the jth level includes: sequentially calculating the data power corresponding to each input data participating in the butterfly operation in the first level, accumulating the data power, and whenever the index of the input data k Satisfaction relationship When the intermediate power is determined, the larger value of the intermediate power and the stored maximum group power is determined as the latest maximum group power, and the accumulated result is cleared, and the final accumulated result is determined as the first j Power level; , , k Indicates j The index in the input data. Indicates j The number of input data at the level, N Indicates the total number of levels of input data.
[0009] Optionally, k The calculation formulas for the data power corresponding to the butterfly operation of input data include: , where Indicates k The data power corresponding to the butterfly operation of input data is Indicates k The real part of the input data, Indicates k The imaginary part of the input data.
[0010] Optionally, the gain determination formula includes:
[0011] ,
[0012] ,
[0013] In the formula, Indicates j The gain of the stage, Indicates j The power of the level, N represents the total number of levels of input data, Indicates taking and The maximum value in Indicates that A mapping function that maps to a preset value interval, Indicates j The intermediate variable of level Indicates j-1 The intermediate variable of the level.
[0014] The present application also provides a gain determination unit, which is used to execute any of the above-mentioned gain determination methods to determine the gain of each stage of input data in the FFT operation circuit when performing butterfly operation, and reduce the butterfly operation result according to the gain; the gain determination unit includes a power calculator, an accumulator unit, a stage power register and a gain estimator;
[0015] The power calculator is used to sequentially calculate the power of each input data in the first stage;
[0016] The accumulating unit is used to accumulate the power of each group of input data in the corresponding stage to obtain the power of each group;
[0017] The level power register is used to obtain and store the maximum group power among the group powers to determine the j The power of the stage;
[0018] The gain estimator is used to read the j The power of the first stage is determined by using the preset gain determination formula. j The gain determination formula is used to identify whether there is an overflow risk after the butterfly operation is performed on each group of input data in the j-th level input data.
[0019] Optionally, the power calculator includes a first squarer, a second squarer and a first adder; the first squarer is used to calculate the k The real part of the input data The first square value of The second squarer is used to calculate the k The imaginary part of the input data The second square value of The first adder is used to add the first square value and the second square value Perform addition to obtain the k The data power corresponding to the input data participating in the butterfly operation.
[0020] The present application also provides an FFT circuit, the FFT circuit comprising a butterfly operation unit corresponding to each level of input data, a gain determination unit corresponding to each level of butterfly operation unit, and a memory;
[0021] The gain determination unit is used to determine the gain of each stage by using any of the above gain determination methods;
[0022] The butterfly operation unit is used to perform butterfly operation on each input data in the corresponding stage in sequence, and reduce the butterfly operation result according to the stage power of the corresponding stage;
[0023] The memory is used to store the butterfly operation result output by the butterfly operation unit.
[0024] Optionally, the memory is implemented in a manner of constructing a large-block memory by using small-block storage units.
[0025] Optionally, the memory is also used to store gains of various levels.
[0026] Optionally, the butterfly operation unit includes a multiplier, a second adder, a subtractor, a first attenuator, a second attenuator, a first channel selector and a second channel selector; the multiplier is used to and Perform the multiplication operation and get , Represents an input data participating in butterfly operation, express The corresponding rotation factor; the second adder is used to and Perform addition operation and get the addition result , represents another input data participating in the butterfly operation; the subtractor is used to and Perform subtraction operation and get the subtraction result The first attenuator is used to adjust the addition result Reduce to original data , and obtain a first attenuation result; the second attenuator is used to subtract the result Reduce to original data , and obtain a second attenuation result; the first input end of the first channel selector is used to access the first attenuation result, and the second input end is used to access the addition result , the control end is connected to the gain of the corresponding stage. When the corresponding gain is 1, the first attenuation result is output, and when the corresponding gain is 0, the addition result is output The first input terminal of the second channel selector is used to access the second attenuation result, and the second input terminal is used to access the subtraction result. , the control end is connected to the gain of the corresponding stage. When the corresponding gain is 1, the second attenuation result is output. When the corresponding gain is 0, the subtraction result is output. .
[0027] Optionally, the FFT circuit also includes a timing control circuit; the timing control circuit is respectively connected to the timing control end of each stage of the butterfly operation unit to input a timing control signal to each stage of the butterfly operation unit, so that each stage of the butterfly operation unit starts to perform butterfly operation when determining the input data.
[0028] The gain determination method, unit and FFT circuit of the present application can obtain the group power of each group of input data in each level of butterfly operation according to the first level input data, determine the maximum group power of the jth level as the level power of the jth level, and j The power of the first stage and the preset gain determination formula determine the j The gain of the first j The gain of the stage can be characterized as j The gain of the stage represents the j Is there an overflow risk after the butterfly operation of the first-level input data? j When there is an overflow risk after butterfly operation on each set of input data in the first stage, the butterfly operation result is reduced or attenuated to avoid subsequent overflow. j When there is no overflow risk after butterfly operation for each group of input data in the stage, the initial butterfly operation result is output to control noise as much as possible and improve the operation accuracy. It can be seen that the present application can reduce the number of signal attenuation in the calculation process as much as possible while ensuring that there is no overflow risk in the butterfly operation, improve the calculation accuracy of FFT, and thus significantly improve the signal-to-noise ratio of the output spectrum. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0030] Figure 1 is a schematic diagram of the FFT operation process of an embodiment of the present application;
[0031] Figure 2 is a schematic flow chart of a gain determination method according to an embodiment of the present application;
[0032] Figure 3a , Figure 3b and Figure 3c is a schematic diagram of a butterfly operation process according to an embodiment of the present application;
[0033] Figure 4 is a schematic diagram of the structure of a gain determination unit according to an embodiment of the present application;
[0034] Figure 5 is a schematic diagram of the structure of a power calculator according to an embodiment of the present application;
[0035] Figure 6a and Figure 6b is a schematic diagram of the FFT circuit structure of an embodiment of the present application;
[0036] Figure 7 Schematic diagram of the structure of a butterfly operation unit according to an embodiment of the present application. DETAILED DESCRIPTION
[0037] The technical solutions in the embodiments of the present application are clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.
[0038] The first aspect of the present application provides a gain determination method, which is used to determine the gain of each stage of input data in the FFT operation circuit when performing butterfly operation, so as to reduce or attenuate the butterfly operation result according to the gain to avoid the overflow risk caused by the butterfly operation. Optionally, the FFT operation process can refer to Figure 1 As shown, Figure 1 The first column of data x(0) to x(7) on the left side is the first-level input data. The first-level FFT operation on the first-level input data can obtain the second-level input data, such as x00[0], x00[1]. The second-level FFT operation on the second-level input data can obtain the third-level input data, such as x0[0], x0[1], and so on. The input data of each level can be determined by analogy. The FFT operation can adopt butterfly operation, that is, the first-level FFT operation is the first-level butterfly operation, the second-level FFT operation is the second-level butterfly operation, and so on.
[0039] refer to Figure 2 As shown, the gain determination method includes the following steps S110 to S120.
[0040] S110, obtaining the group power of each group of input data in each level of butterfly operation according to the first level input data, wherein the group power of a group of input data includes the sum of the power of each input data in the group (i.e., the data power). Since the sum of the power of each level of input data is constant, the first level input data can be used to determine the relevant power parameters of the input data at each level; optionally, the number of operation data of each level of butterfly operation can be determined here, and the data power corresponding to the first level input data and the first level input data can be used to determine the relevant power parameters of the input data at each level. j The number of data for each group of butterfly operations is calculated j The group power of each group in the stage. j The maximum group power of the first stage is determined as j In this way, we only need to group and count the power in the first-level input data, that is, the original input data of FFT, to obtain the power required for each level of butterfly operation.
[0041] Specifically, no.j Each set of input data for butterfly operation in the first level of input data includes 2 j data, such as reference Figure 3a As shown, each set of input data for butterfly operation in the first level input data includes 2 1 =2 data, reference Figure 3b As shown, each set of input data for butterfly operation in the second level input data includes 2 2 =4 data, reference Figure 3c As shown, each set of input data for butterfly operation in the third level input data includes 2 3 = 8 data. The power sum of the input data and output data participating in the same set of butterfly operations between different levels is equal; that is, Figure 3a to Figure 3c In the figure, the power sum of the data in each rectangular box of the same color is equal.
[0042] In some examples, the process of determining the power of the jth level includes: sequentially calculating the data power corresponding to each input data participating in the butterfly operation in the first level, and for the jth level j For each level, the power of each data is accumulated, and whenever the index of the input data k Satisfaction relationship When the intermediate power is determined, the larger value of the intermediate power and the stored maximum group power is determined as the latest maximum group power, and the accumulated result is cleared, so that the final maximum group power (that is, the final accumulated result) is the level power of the corresponding level, so the final accumulated result can be determined as the first level. j The power of each level. , , k Indicates j The index in the input data. Indicates j The number of input data at the level, N represents the total number of levels of input data, mod Represents the remainder function.
[0043] Specifically, no. k The calculation formulas for the data power corresponding to the butterfly operation of input data include: , where Indicates k The data power corresponding to the butterfly operation of input data is Indicates k The real part of the input data, Indicates k The imaginary part of the input data, , It is a fixed-point number ranging from -1 to 1.
[0044] S120, according to the j The power of the first stage and the preset gain determination formula determine the j The gain determination formula is used to identify whether there is an overflow risk after the butterfly operation of each group of input data in the jth stage input data, so that the first j The gain of the stage is used to characterize the j Whether there is an overflow risk after butterfly operation on each group of input data in the input data level.
[0045] Specifically, if there is an overflow risk after butterfly operation on each group of input data in a certain level of input data, the gain of this level is 1, and the butterfly operation result needs to be reduced or attenuated, such as reducing the butterfly operation result to 1 / 2 of the original butterfly operation result to avoid subsequent overflow. If there is no overflow risk after butterfly operation on each group of input data in a certain level of input data, the gain of this level is 0, and there is no need to reduce or attenuate the butterfly operation result, and the initial butterfly operation result is output to control noise as much as possible and improve calculation accuracy.
[0046] In some examples, the gain determination formula can be represented by a Boolean operation formula, that is, the gain is 1 when the corresponding condition is met, and the gain is 0 when the corresponding condition is not met.
[0047] Specifically, the gain determination formula includes:
[0048] ,
[0049] ,
[0050] This formula represents that for the first level input data, Time Gain Take 1, otherwise the gain Take 0, for the 2nd to Nth level input data, and Gain when established Take 1, otherwise the gain Take 0. The above gain determination formula can also be written as:
[0051] ,
[0052] In the formula, Indicates j The gain of the stage, Indicates j The power of the level, N represents the total number of levels of input data, Indicates taking and The maximum value in Indicates that A mapping function that maps to a preset value interval, Indicates j The intermediate variable of level Indicates j-1 The intermediate variable of level .
[0053] Specifically, the preset numerical interval may include a numerical interval [ , 1]. The mapping function includes Map to [ , 1]; for example, the mapping function can be , the function takes the level power as the independent variable and satisfies the relationship , that is, the power level is increased by 4 times Zoom to in the numerical range of .
[0054] Optionally, the calculation logic of the above gain determination formula includes: for each butterfly operation, there is and ;in Represents an input data participating in butterfly operation, Represents another input data participating in the butterfly operation, Represents the rotation factor. The above butterfly operation is essentially the addition and subtraction of two vectors. Only change the input sequence The direction does not change, so only the gain is considered in the gain estimation process. To ensure No overflow, that is, guaranteed and , that is, to ensure and . Note that the power ,if , then = , similarly ;in represents the real part of an input data, represents the imaginary part of the input data. In other words, if the power is guaranteed If the power is less than 1, it can be guaranteed that the butterfly operation does not need to be scaled. If it is greater than 1, it needs to be scaled to prevent overflow. Consider reducing it by 1 bit, that is, ), and its power relationship is , that is, every Reducing by 1 bit will reduce the power of the point to the original value. Combining the first two points, we can infer that if the actual power satisfy , then reducing the level by 1 can ensure that the calculation result does not overflow; if the actual power satisfy , then reduce t The level can ensure that the calculation result does not overflow. t is a positive integer. In addition, for n-level N-point FFT calculation, scaling up to n levels can avoid overflow problems. Combining the two, we can derive a conservative gain estimation formula: , Now we need to estimate Level Power , for the For the butterfly operation, it essentially calculates a Point FFT, using Parzival's theorem, we get ,Right now Can be used as The upper limit of the gain estimate is finally obtained as , . The relationship diagram of energy equality in Parzival's theorem can be referred to Figure 3a to Figure 3c shown.
[0055] The above gain determination formula calculates the upper limit of the scaling and can also reduce this upper limit to reduce the total gain. j Level J For point FFT, its energy upper limit , corresponding to , that is, the maximum scaling required In practical applications, however, only the j level can meet the needs of each level of scaling, so the above function can be modified as On the other hand, scaling is only required when the power is greater than 1, so the power detection condition is added to the function used to determine the gain. Finally, the following formula can be obtained: Satisfaction relationship , , .
[0056] The above gain determination method obtains the group power of each group of input data in each level of butterfly operation according to the first level input data, determines the maximum group power of the jth level as the level power of the jth level, and obtains the group power of each group of input data in each level of butterfly operation according to the first level input data. j The power of the first stage and the preset gain determination formula determine the j The gain of the first j The gain of the stage can be characterized as j The gain of the stage represents the j Is there an overflow risk after the butterfly operation of the first-level input data?j When there is an overflow risk after butterfly operation on each set of input data in the first stage, the butterfly operation result is reduced or attenuated to avoid subsequent overflow. j When there is no overflow risk after butterfly operation for each group of input data in the stage, the initial butterfly operation result is output to control noise as much as possible and improve the operation accuracy. It can be seen that the above gain determination method can reduce the number of signal attenuation in the calculation process as much as possible while ensuring that there is no overflow risk in the butterfly operation, improve the calculation accuracy of FFT, and thus significantly improve the signal-to-noise ratio of the output spectrum.
[0057] The second aspect of the present application provides a gain determination unit, which is used to execute the gain determination method described in any of the above embodiments to determine the gain of each stage of input data in the FFT operation circuit when performing butterfly operation, and reduce the butterfly operation result according to the gain to avoid the overflow risk caused by the butterfly operation. Optionally, the FFT operation process can refer to Figure 1 As shown, Figure 1 The first column of data x(0) to x(7) on the left side is the first-level input data. The first-level FFT operation on the first-level input data can obtain the second-level input data, such as x00[0], x00[1]. The second-level FFT operation on the second-level input data can obtain the third-level input data, such as x0[0], x0[1], and so on. The input data of each level can be determined by analogy. The FFT operation can adopt butterfly operation, that is, the first-level FFT operation is the first-level butterfly operation, the second-level FFT operation is the second-level butterfly operation, and so on.
[0058] refer to Figure 4 As shown, the gain determination unit includes a power calculator 310 , an accumulation unit 320 , a stage power register 330 and a gain estimator 340 .
[0059] The power calculator 310 is used to sequentially calculate the power of each input data in the first stage. Figure 5 As shown, the power calculator 310 includes a first squarer 311, a second squarer 312 and a first adder 313; the first squarer 311 is used to calculate the k The real part of the input data The first square value of The second squarer 312 is used to calculate the k The imaginary part of the input data The second square value of The first adder 313 is used to add the first square value and the second square value Perform addition to obtain the k The data power corresponding to the butterfly operation of the input data , .
[0060] The accumulating unit 320 is used to accumulate the power of each group of input data in the corresponding level to obtain the power of each group. Specifically, the accumulating unit 320 can accumulate the power of each data, and whenever the index of the input data k Satisfaction relationship When the intermediate power is determined, the larger value between the intermediate power and the stored maximum group power is determined as the latest maximum group power, the accumulated result is cleared, and the maximum group power is written into the level power register 330, so that the maximum group power finally written into the level power register 330 is the level power of the corresponding level.
[0061] The level power register 330 is used to obtain and store the j The maximum group power among the group powers in the stage is used to determine the j Level power.
[0062] The gain estimator 340 is used to read the j The power of the first stage is determined by using the preset gain determination formula. j The gain determination formula is used to identify whether there is an overflow risk after butterfly operation for each group of input data in the jth level input data. Specifically, the gain determination formula includes:
[0063] ,
[0064] ,
[0065] This formula represents that for the first level input data, Time Gain Take 1, otherwise the gain Take 0, for the 2nd to Nth level input data, and Gain when established Take 1, otherwise the gain Take 0. In the formula, Indicates j The gain of the stage, Indicates j The power of the level, N represents the total number of levels of input data, Indicates taking and The maximum value in Indicates that A mapping function that maps to a preset value interval, Indicates j The intermediate variable of level Indicates j-1The intermediate variable of level The preset value interval may include the value interval [ , 1].
[0066] The above gain determination unit is used to execute the gain determination method described in any of the above embodiments, and has all the beneficial effects of the gain determination method described in any of the above embodiments, which will not be repeated here.
[0067] The third aspect of the present application provides an FFT circuit, referring to Figure 6a and Figure 6b As shown, the FFT circuit includes a butterfly operation unit 400 corresponding to each level of input data, a gain determination unit 300 corresponding to each level of butterfly operation unit 400, and a memory 510. Specifically, refer to Figure 6b As shown, if a certain level of input data corresponds to a plurality of butterfly operation units 400, then these plurality of butterfly operation units 400 may each correspond to a gain determination unit 300, and the gain determination unit 300 may be used to determine the gain G corresponding to a level, and provide the determined gain G to each butterfly operation unit 400 corresponding to the level.
[0068] The gain determination unit 300 is used to determine the gain G of each stage by using the gain determination method described in any of the above embodiments;
[0069] The butterfly operation unit 400 is used to perform butterfly operation on each input data in the corresponding level in turn, and reduce the butterfly operation result according to the level power of the corresponding level. Specifically, the butterfly operation unit package 400 includes components such as a complex multiplier and an adder, which are used for butterfly operation. It can read two data participating in the butterfly operation from the memory, use the complex multiplier to multiply one of the data by the corresponding rotation factor, and add or subtract the obtained result from the other data. Then scale according to the gain calculated by the gain control unit. Specifically, if the gain G of a certain level is 1, the butterfly operation unit 400 continues to reduce or attenuate the butterfly operation result after obtaining the butterfly operation result, such as reducing the butterfly operation result to 1 / 2 of the original butterfly operation result, and then outputs the reduced butterfly operation result to the memory 510. If the gain G of a certain level is 0, the butterfly operation unit 400 directly outputs the butterfly operation result to the memory 510 after obtaining the butterfly operation result. Specifically, reducing the butterfly operation result to 1 / 2 of the original butterfly operation result may be rounding the butterfly operation result by 1 bit, and the rounding method may be round to even to avoid the influence of DC component noise caused by rounding on the spectrum.
[0070] The memory 510 is used to store the butterfly operation result output by the butterfly operation unit 400 .
[0071] In some embodiments, the memory includes SRAM and / or registers for storing input data, intermediate calculation data, and output data of the FFT. N For the FFT of a point sequence, the depth of the memory can be n to ensure that each data point has an exclusive address; at the same time, there can be up to N levels of butterfly operations in parallel, and the memory can ensure that data at N addresses can be read and written simultaneously.
[0072] In this embodiment, the memory 510 can be implemented by using small-block storage units to construct a large-block memory. For example, for a 1024-point sequence FFT (n = 1024, N = 10), the memory 510 is composed of small-block storage units with capacities of 512, 256, 128, 64, 32, 16, 8, 4, 2, and 2. This splicing method satisfies the total capacity of 1024 while supporting conditional parallel access to a maximum of 10 address data.
[0073] Optionally, the memory 510 is used to store the gains G of each level on the basis of storing the butterfly operation results output by the butterfly operation unit 400, so as to be used in subsequent related operations.
[0074] In some embodiments, reference Figure 7 As shown, the butterfly operation unit includes a multiplier 411 , a second adder 412 , a subtractor 413 , a first attenuator 414 , a second attenuator 415 , a first channel selector 416 and a second channel selector 417 .
[0075] The multiplier 411 is used for and Perform the multiplication operation and get , Represents an input data participating in butterfly operation, express The corresponding rotation factor.
[0076] The second adder 412 is used to and Perform addition operation and get the addition result , , Represents another input data participating in the butterfly operation.
[0077] The subtractor is used to and Perform subtraction operation and get the subtraction result , .
[0078] The first attenuator 414 is used to attenuate the addition result. Reduce to original data , and obtain the first attenuation result.
[0079] The second attenuator 415 is used to attenuate the subtraction result. Reduce to original data , and obtain the second attenuation result.
[0080] The first input terminal of the first channel selector 416 is used to access the first attenuation result, and the second input terminal is used to access the addition result. , the control end is connected to the gain G of the corresponding stage. When the corresponding gain G is 1, the first attenuation result is output. When the corresponding gain G is 0, the addition result is output. .
[0081] The first input terminal of the second channel selector 417 is used to access the second attenuation result, and the second input terminal is used to access the subtraction result. , the control end is connected to the gain G of the corresponding stage. When the corresponding gain G is 1, the second attenuation result is output. When the corresponding gain G is 0, the subtraction result is output. .
[0082] In some examples, the FFT circuit also includes a timing control circuit (not shown in the figure); the timing control circuit is respectively connected to the timing control end of each stage of the butterfly operation unit 400 to input a timing control signal to each stage of the butterfly operation unit 400, so that each stage of the butterfly operation unit 400 starts to perform the butterfly operation when the input data is determined. For example, the subsequent stage butterfly operation unit 400 (such as the second stage butterfly operation unit 400 to the Nth stage butterfly operation unit 400) starts to perform the butterfly operation immediately after the input data required for the first butterfly operation of the corresponding stage is determined. In this way, the subsequent stage butterfly operation unit 400 can perform the butterfly operation in parallel with the previous stage butterfly operation unit 400, which can improve the computing efficiency.
[0083] Specifically, the working process of the FFT circuit includes the following two stages: a data preparation stage and an operation stage. In the data preparation stage, the FFT input data sequence is input point by point in order, and the data is written into the memory 510 through the address mapping unit. At the same time, for each input data, its power value is calculated. The calculated power values are grouped and accumulated, and the maximum value of the power sum of all groups is continuously recorded. When all input data are written into the memory 510, the actual maximum power of each group, that is, the group power, is obtained. According to the power of each group, the gain of each level of FFT calculation is calculated. In the operation stage, two data participating in the butterfly operation are read from the memory 510, and rotation and addition and subtraction operations are performed. The result of the addition and subtraction calculation is scaled according to the gain G calculated in the data preparation stage, and the scaled result is stored back in the memory 510. The butterfly operations of the same level are performed in sequence. The latter butterfly operation does not need to wait for the previous butterfly operation to be fully calculated before starting the calculation, but can realize the parallel execution of butterfly operations of different levels in a pipeline manner. When all butterfly operations are completed and all calculation results are written back to the memory 510, the FFT calculation ends.
[0084] Optionally, the FFT circuit includes N levels of butterfly operation units 400, and each level of butterfly operation unit 400 is provided with a butterfly operation unit 400. The N butterfly operation units 400 can respectively perform N levels of FFT operations, and parallel processing is adopted between operations at different levels. Specifically, the first level operation is regarded as a 2-point FFT, and the input data depends on the input, so the calculation starts immediately after the operation is started. The second level operation is regarded as a 4-point FFT, and the data depends on the output of the first level operation. It is necessary to wait for 4 / 2 = 2 cycles before starting the calculation. The third level operation is regarded as an 8-point FFT, and the data depends on the output of the second level operation. It is necessary to wait for 8 / 2 = 4 cycles before starting the calculation. By analogy, the Nth level operation is regarded as Point FFT, data dependency is Level operation output, need to wait The calculation starts after the waiting period, so that the timing control signal can be set so that the timing control signal can accurately control the N butterfly operation units 400 to perform butterfly operations. The total waiting period is accumulated to obtain . No. N The calculation time of level is cycles, so the total computation time is For Point FFT is realized The time complexity of .
[0085] In the above FFT circuit, the gain determination unit 300 is used to determine the gain G of each stage by adopting the gain determination method described in any of the above embodiments, and has all the beneficial effects of the gain determination method and the gain determination unit 300 described in any of the above embodiments, which will not be repeated here.
[0086] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary implementation of the present specification shown herein.
[0087] That is, the above description is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the specification and drawings of the present application, such as the mutual combination of technical features between the embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.
[0088] In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, which are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, for structural elements with the same or similar characteristics, the present application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0089] In this application, the word "exemplary" is used to mean "used as an example, illustration or description". Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or more advantageous than other embodiments. In order to enable any technician in the field to implement and use the present application, the present application provides the above description. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the present application obscure. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in the present application.
Claims
1. A gain determination method, characterized in that: The gain determination method is used to determine the gain of each level of input data in the FFT operation circuit when performing butterfly operation, so as to reduce the butterfly operation result according to the gain; the gain determination method comprises the following steps: According to the first-level input data, the group power of each group of input data in each level of butterfly operation is obtained, and the first j The maximum group power of the first stage is determined as j The power of the stage; No. j The process of determining the power of each level includes: calculating the data power corresponding to each input data participating in the butterfly operation in the first level in turn, accumulating the power of each data, and whenever the index of the input data k Satisfaction relationship When the intermediate power is determined, the larger value of the intermediate power and the stored maximum group power is determined as the latest maximum group power, and the accumulated result is cleared, and the final accumulated result is determined as the first j Level power; , , k Indicates j The index in the input data, Indicates j The number of input data at the level, N Indicates the total number of levels of input data; According to the said j The power of the first stage and the preset gain determination formula determine the j The gain determination formula is used to identify whether there is an overflow risk after butterfly operation is performed on each group of input data in the j-th level input data; The gain determination formula includes: , , In the formula, Indicates j The gain of the stage, Indicates j The power of the level, N represents the total number of levels of input data, Indicates taking and The maximum value in Indicates that A mapping function that maps to a preset value interval, Indicates j The intermediate variable of level Indicates j-1 The intermediate variable of the level.
2. The gain determination method according to claim 1, characterized in that: No. k The calculation formula of the data power corresponding to the input data participating in the butterfly operation is include: , In the formula, Indicates k The data power corresponding to the butterfly operation of input data is Indicates k The real part of the input data, Indicates k The imaginary part of the input data.
3. A gain determination unit, characterized in that: The gain determination unit is used to execute the gain determination method according to any one of claims 1 to 2 to determine the gain of each stage of input data in the FFT operation circuit when performing butterfly operation, and reduce the butterfly operation result according to the gain; the gain determination unit includes a power calculator, an accumulator unit, a stage power register and a gain estimator; The power calculator is used to sequentially calculate the power of each input data in the first stage; The accumulating unit is used to accumulate the power of each group of input data in the corresponding stage to obtain the power of each group; The level power register is used to obtain and store the maximum group power among the group powers to determine the j The power of the stage; The gain estimator is used to read the j The power of the first stage is determined by using the preset gain determination formula. j The gain of the stage; The gain determination formula is used to identify whether there is an overflow risk after butterfly operation is performed on each group of input data in the j-th stage input data.
4. The gain determination unit according to claim 3, characterized in that: The power calculator includes a first squarer, a second squarer and a first adder; The first squarer is used to calculate the k The real part of the input data The first square value of ; The second squarer is used to calculate the k The imaginary part of the input data The second square value of ; The first adder is used to add the first square value and the second square value Perform addition to obtain the k The data power corresponding to the input data participating in the butterfly operation.
5. An FFT circuit, characterized in that: The FFT circuit includes a memory, a butterfly operation unit corresponding to each level of input data, and a gain determination unit corresponding to each level of butterfly operation unit; The gain determination unit is used to determine the gain of each stage by using the gain determination method according to any one of claims 1 to 2; The butterfly operation unit is used to perform butterfly operation on each input data in the corresponding stage in sequence, and reduce the butterfly operation result according to the stage power of the corresponding stage; The memory is used to store the butterfly operation result output by the butterfly operation unit.
6. The FFT circuit according to claim 5, characterized in that: The memory is implemented by using small-block storage units to construct large-block storage; And / or, the memory is further used to store gains of each level.
7. The FFT circuit according to claim 5, characterized in that: The butterfly operation unit includes a multiplier, a second adder, a subtractor, a first attenuator, a second attenuator, a first channel selector and a second channel selector; The multiplier is used to and Perform the multiplication operation and get , Represents an input data participating in butterfly operation, express The corresponding rotation factor; The second adder is used to and Perform addition operation and get the addition result , Indicates another input data participating in the butterfly operation; The subtractor is used to and Perform subtraction operation and get the subtraction result The first attenuator is used to adjust the addition result Reduce to original data , get the first attenuation result; The second attenuator is used to Reduce to original data , and obtain the second attenuation result; The first input end of the first channel selector is used to access the first attenuation result, and the second input end is used to access the addition result. , the control end is connected to the gain of the corresponding stage. When the corresponding gain is 1, the first attenuation result is output, and when the corresponding gain is 0, the addition result is output ; The first input terminal of the second channel selector is used to access the second attenuation result, and the second input terminal is used to access the subtraction result. , the control end is connected to the gain of the corresponding stage. When the corresponding gain is 1, the second attenuation result is output. When the corresponding gain is 0, the subtraction result is output. .
8. The FFT circuit according to claim 5, characterized in that: The FFT circuit also includes a timing control circuit; The timing control circuit is respectively connected to the timing control terminal of each stage of butterfly operation unit to input the timing control signal to each stage of butterfly operation unit, so that each stage of butterfly operation unit starts to perform butterfly operation when determining the input data.
Citation Information
Patent Citations
Operation method for FFT
CN104679720A
Method for executing FFT (Fast Fourier Transform), processor, electronic equipment and storage medium
CN119249049A