Charge pump rectifier

Abstract

A circuit (308) includes a charge pump stage (202) and a common mode filter (309). The charge pump stage (202) includes first and second transistors (212, 214) and first and second capacitors (216, 218). The second transistor (214) has a first terminal coupled to the control terminal of the first transistor (212), has a second terminal, and has a control terminal coupled to the first terminal of the first transistor (212). A first capacitor (216) is coupled between the second terminal of the first transistor (212) and the control terminal of the first transistor (212). A second capacitor (218) is coupled between a second terminal of the second transistor (214) and a control terminal of the second transistor (214). The common mode filter (309) includes third and fourth capacitors (332, 334). A third capacitor (332) is coupled between the second terminal of the first transistor (212) and the control terminal of the first transistor (212). A fourth capacitor (334) is coupled between the third capacitor (332) and a control terminal of the second transistor (214).

Description

Background Art

[0001] In electrical circuits, isolation that prevents the flow of direct current and undesirable alternating current between two parts of a system is useful. Although the flow of undesirable current between parts of the system is prevented, isolation can allow signal transmission between isolated parts of the system. Isolation can be achieved by an integrated circuit called an isolator. An electronic system can include an isolator to ensure safety or protect electronic components of a system (for example, a system in which one set of lines is operated at a much higher voltage than another set of lines). For example, when two systems need to communicate but the ground terminals of these systems may be at different potentials, communication can be achieved by an isolator connected to the ground terminals of the two systems, but current is not allowed to flow between these ground terminals. Various types of isolators can include optical coupling, capacitive coupling, inductive coupling (for example, transformer) or other types of coupling to allow communication between systems while isolating the system. Summary of the invention

[0002] In one example, a circuit includes a charge pump stage and a common mode filter. The charge pump stage includes a first transistor and a second transistor and a first capacitor and a second capacitor. The first transistor has a first terminal, a second terminal, and a control terminal. The second transistor has a first terminal coupled to the control terminal of the first transistor, has a second terminal, and has a control terminal coupled to the first terminal of the first transistor. The first capacitor has a first conductor coupled to the second terminal of the first transistor and has a second conductor coupled to the control terminal of the first transistor. The second capacitor has a first conductor coupled to the second terminal of the second transistor and has a second conductor coupled to the control terminal of the second transistor. The common mode filter includes a third capacitor and a fourth capacitor. The third capacitor has a first conductor coupled to the second terminal of the first transistor and has a second conductor coupled to the control terminal of the first transistor. The fourth capacitor has a first conductor coupled to the first conductor of the third capacitor and has a second conductor coupled to the control terminal of the second transistor.

[0003] In another example, a method includes: in a first half cycle of a differential signal, turning on a first transistor of a first charge pump stage to charge an upper plate of a first capacitor of the first charge pump stage and boosting a voltage on an upper plate of a second capacitor of the first charge pump stage. The method also includes: in the first half cycle, boosting a voltage on an upper plate of a third capacitor of a second charge pump stage based on a voltage at an upper plate of the first capacitor and turning on a second transistor of the second charge pump stage to charge an upper plate of a fourth capacitor of the second charge pump stage.

[0004] In another example, an isolator circuit includes a transformer, a charge pump stage, and a common mode filter. The transformer includes a primary winding and a secondary winding. The secondary winding has a first winding terminal, a second winding terminal, and a center tap terminal. The charge pump stage includes a first transistor and a second transistor and a first capacitor and a second capacitor. The first transistor has a first terminal coupled to the first winding terminal, has a second terminal, and has a control terminal coupled to the second winding terminal. The second transistor has a first terminal coupled to the second winding terminal, has a second terminal, and has a control terminal coupled to the first winding terminal. The first capacitor has a first conductor coupled to the second terminal of the first transistor, and has a second conductor coupled to the second winding terminal. The second capacitor has a first conductor coupled to the second terminal of the second transistor, and has a second conductor coupled to the first winding terminal. The common mode filter includes a third capacitor and a fourth capacitor. The third capacitor has a first conductor coupled to the second terminal of the first transistor, and has a second conductor coupled to the second winding terminal. The fourth capacitor has a first conductor coupled to the first conductor of the third capacitor, and has a second conductor coupled to the first winding terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 is a block diagram of an example digital isolator circuit.

[0006] Figure 2 is a schematic diagram of an example two-stage charge pump rectifier.

[0007] Figure 3 is a schematic diagram of an example two-stage charge pump rectifier including common-mode filtering.

[0008] Figure 4 is a flow chart of an example method of charge pump rectification.

[0009] Figure 5 Show Figure 3 The two-stage charge pump rectifier operates in the first half of the AC cycle.

[0010] Figure 6 Show Figure 3 The two-stage charge pump rectifier operates in the second half of the AC cycle.

[0011] Figure 7 is a schematic diagram of an example N-stage charge pump rectifier.

[0012] Figure 8 It has five charge pump stages. Figure 7 Graph of example voltages generated by an example of a charge pump rectifier. DETAILED DESCRIPTION

[0013] Figure 11 is a block diagram of an example digital isolator circuit 100. The digital isolator circuit 100 includes an encoder / driver circuit 102, a transformer 104, and a decoder / receiver circuit 106. The transformer 104 is coupled between the encoder / driver circuit 102 and the decoder / receiver circuit 106. The output of the encoder / driver circuit 102 is coupled to the primary coil of the transformer 104. The input of the decoder / receiver circuit 106 is coupled to the secondary coil of the transformer 104. The encoder / driver circuit 102 receives an input signal, encodes the input signal for transmission through the transformer 104, and drives the encoded signal to the transformer 104. In some examples, the encoder / driver circuit 102 may apply on / off encoding (OOK) to encode the input signal and drive the OOK encoded input signal to the primary coil of the transformer 104.

[0014] The decoder / receiver circuit 106 receives the encoded signal through the transformer 104 and decodes the received signal to generate a digital output signal. The decoder / receiver circuit 106 includes a charge pump rectifier circuit 108. The charge pump rectifier circuit 108 rectifies the signal received through the transformer 104 and boosts the rectified signal to generate a DC voltage of the output signal.

[0015] Figure 2 2 is a schematic diagram of an example charge pump rectifier circuit 208 . The charge pump rectifier circuit 208 is an example of the charge pump rectifier circuit 108 . Figure 2 The example charge pump rectifier circuit 208 shown in is a two-stage charge pump rectifier circuit. In the charge pump rectifier circuit 208, the received signal controls the switch that increases the voltage representing the received signal, and no additional clock signal is required. The charge pump rectifier circuit 208 includes a first charge pump stage 202, a second charge pump stage 204, an output stage 206, and a low pass filter 210 (also referred to as filter circuit 210). The first charge pump stage 202 is coupled between the transformer 104 and the second charge pump stage 204. The second charge pump stage 204 is coupled between the first charge pump stage 202 and the output stage 206. The low pass filter 210 is coupled to the output stage 206.

[0016] The first charge pump stage 202 includes transistors 212 and 214 and capacitors 216 and 218. Transistors 212 and 214 may be P-channel field effect transistors (PFETs). A first current terminal (e.g., source) of transistor 212 is coupled to a first signal input terminal 201. The first signal input terminal 201 may be coupled to a first winding terminal of a secondary coil of transformer 104. A second current terminal (e.g., drain) of transistor 212 is coupled to an upper plate of capacitor 216. A lower plate of capacitor 216 is coupled to a control terminal (e.g., gate) of transistor 212 and a second signal input terminal 203. The second signal input terminal 203 may be coupled to a second winding terminal of a secondary coil of transformer 104. Elements of a circuit may be coupled to the plates of a capacitor via terminals of a capacitor. Similarly, elements of a circuit may be coupled to a winding of a transformer via terminals of a transformer. In addition, the upper plate and the lower plate may be referred to as a first conductor and a second conductor.

[0017] A first current terminal (e.g., source) of transistor 214 is coupled to second signal input terminal 203. A second current terminal (e.g., drain) of transistor 214 is coupled to an upper plate of capacitor 218. A lower plate of capacitor 218 is coupled to a control terminal (e.g., gate) of transistor 214 and first signal input terminal 201.

[0018] The second charge pump stage 204 is similar in structure to the first charge pump stage 202 and includes transistors 220 and 222 and capacitors 224 and 226. Transistors 220 and 222 may be PFETs. A first current terminal (e.g., source) of transistor 220 is coupled to an upper plate of capacitor 216. A second current terminal (e.g., drain) of transistor 220 is coupled to an upper plate of capacitor 224. A control terminal (e.g., gate) of transistor 220 is coupled to an upper plate of capacitor 218. A lower plate of capacitor 224 is coupled to the first signal input terminal 201.

[0019] A first current terminal (e.g., source) of transistor 222 is coupled to an upper plate of capacitor 218. A second current terminal (e.g., drain) of transistor 214 is coupled to an upper plate of capacitor 226. A control terminal (e.g., gate) of transistor 222 is coupled to an upper plate of capacitor 216. A lower plate of capacitor 226 is coupled to second signal input terminal 203.

[0020] Output stage 206 includes transistors 228 and 230. A first current terminal (e.g., source) of transistor 228 is coupled to an upper plate of capacitor 224, and a control terminal (e.g., gate) of transistor 228 is coupled to an upper plate of capacitor 226. A first current terminal (e.g., source) of transistor 230 is coupled to an upper plate of capacitor 226, and a control terminal (e.g., gate) of transistor 230 is coupled to an upper plate of capacitor 224. A second current terminal (e.g., drain) of transistor 228 is coupled to a second current terminal (e.g., drain) of transistor 230.

[0021] Low pass filter 210 includes resistors 236 and 240 and capacitors 238 and 242. A first terminal of resistor 236 is coupled to the second current terminals of transistors 228 and 230. A second terminal of resistor 236 is coupled to an upper plate of capacitor 238. Resistor 236 and capacitor 238 form a first low pass filter stage. A lower plate of capacitor 238 is coupled to a reference terminal. The reference terminal may be coupled to a center tap terminal of transformer 104. A first terminal of resistor 240 is coupled to an upper plate of capacitor 238. A second terminal of resistor 240 is coupled to an upper plate of capacitor 242 and a circuit output of charge pump rectifier circuit 108. Resistor 240 and capacitor 242 form a second low pass filter stage. A lower plate of capacitor 242 is coupled to a reference terminal.

[0022] Figure 3 is a schematic diagram of another example two-stage charge pump rectifier circuit 308. Charge pump rectifier circuit 308 is similar to charge pump rectifier circuit 208 and includes a common mode filter 309 coupled between the second current terminals of transistors 228 and 230 and the first and second signal input terminals. Common mode filter 309 provides immunity to radiated electromagnetic fields by reducing the common mode voltage induced by the radiated electromagnetic signal at the output of 308. Common mode filter 309 includes capacitors 332 and 334. The upper plate of capacitor 332 is coupled to the upper plate of capacitor 334 and the second current terminals of transistors 228 and 230, to the control terminals of transistors 212 and 214, and to the plates of capacitors 216 and 226. The lower plate of capacitor 332 is coupled to the second signal input terminal 203, the control terminal of transistor 212, the lower plate of capacitor 216, and the lower plate of capacitor 226. The lower plate of capacitor 334 is coupled to the first signal input terminal 201 , the control terminal of transistor 214 , the lower plate of capacitor 218 , and the lower plate of capacitor 224 .

[0023] Figure 44 is a flow chart of an example method 400 of charge pump rectification in charge pump rectifier circuit 208 or charge pump rectifier circuit 308. Although depicted in sequence for convenience, at least some of the operations shown may be performed in a different order and / or in parallel. In addition, some embodiments may only perform a portion of the operations shown. Figure 5 and Figure 6 Operation of the method 400 in the charge pump rectifier circuit 208 or 308 is shown.

[0024] exist Figure 5 In FIG. 5 , a differential input signal 500 is provided at the first and second voltage input terminals of the charge pump rectifier circuit 308. Period 502 represents one period of the differential input signal 500. Figure 5 , a half cycle 504 (a first half cycle) is provided at the first and second voltage input terminals, wherein a signal 506 (e.g., a positive voltage) is provided at the first signal input terminal 201, and a signal 508 (e.g., a negative voltage) is provided at the second signal input terminal 203. The operations of the method 400 performed in the first half cycle are detailed in blocks 402-408 of the method 400.

[0025] In block 402 of method 400 , based on signal 506 , transistor 212 (the upper transistor of the first charge pump stage) is turned on to charge the upper plate of capacitor 216 (the upper capacitor of the first charge pump stage).

[0026] In block 404 , signal 506 charges the lower plates of capacitor 218 (the lower capacitor of the first charge pump stage) and capacitor 224 (the upper capacitor of the second charge pump stage) to boost the voltage at the upper plates of capacitor 218 and capacitor 224 .

[0027] In block 406 , based on the voltage on the upper plate of capacitor 218 , transistor 222 (the lower transistor of the second stage) is turned on to charge the upper plate of capacitor 226 .

[0028] In block 408, in output stage 206, transistor 228 (the upper transistor of the output stage) is turned on to provide the voltage at the upper plate of capacitor 224 to common mode filter 309 and low pass filter 210. Output stage 206 can operate like half of a charge pump stage and provide half of the voltage boost of the charge pump stage. In half cycle 504, transistors 214, 220, and 230 are turned off.

[0029] Common mode filter 309 is a capacitive voltage divider that is coupled to the first and second input voltage terminals to provide a common mode voltage present at the first and second input voltage terminals at the input of low pass filter 210. Thus, any common mode voltage present in differential input signal 500 is provided to the upper and lower plates of capacitor 238 and capacitor 242 of low pass filter 210, thereby effectively removing the common mode voltage from the output signal of charge pump rectifier circuit 108.

[0030] exist Figure 6 , a half cycle 604 (a second half cycle) following the half cycle 504 is provided at the first and second voltage input terminals, wherein a signal 608 (e.g., a negative voltage) is provided at the first signal input terminal 201, and a signal 606 (e.g., a positive voltage) is provided at the second signal input terminal 203. The operations of the method 400 performed in the second half cycle are detailed in blocks 410-414 of the method 400.

[0031] In block 410 of method 400 , based on signal 606 , transistor 214 (the lower transistor of the first charge pump stage) is turned on to charge the upper plate of capacitor 218 (the lower capacitor of the first charge pump stage).

[0032] In block 412 , signal 606 charges the lower plates of capacitor 216 (the upper capacitor of the first charge pump stage) and capacitor 226 (the lower capacitor of the second charge pump stage) to boost the voltage at the upper plates of capacitor 216 and capacitor 226 .

[0033] In block 414 , based on the voltage on the upper plate of capacitor 216 , transistor 220 (the upper transistor of the second charge pump stage) is turned on to charge the upper plate of capacitor 224 (the upper capacitor of the second charge pump stage).

[0034] In block 416, transistor 230 (the lower transistor of the output stage) is turned on to provide the voltage at the upper plate of capacitor 226 to common mode filter 309 and / or low pass filter 210. In half cycle 604, transistors 212, 222, and 228 are turned off.

[0035] Although Figure 2 , Figure 3 , Figure 5 and Figure 6A two-stage charge pump rectifier is shown for purposes of explanation, but examples of the charge pump rectifier circuit 108 are not limited to two charge pump stages. In other examples, the charge pump rectifier circuit 108 may include more or less than two charge pump stages. An example of the charge pump rectifier circuit 108 may include only one charge pump stage (e.g., the first charge pump stage 202), followed by the output stage 206. Another example of the charge pump rectifier circuit 108 may include the output stage 206 coupled between the transformer 104 and the common mode filter 309, and no charge pump stage before the output stage 206 (e.g., no charge pump stages 202 and 204).

[0036] Other examples of charge pump rectifier circuit 108 may include more than two charge pump stages. Figure 7 is a schematic diagram of an example N-stage charge pump rectifier circuit 708, where N is greater than 2. The N-stage charge pump rectifier circuit 708 is an example of the charge pump rectifier circuit 108. In the N-stage charge pump rectifier circuit 708, the charge pump stages 3-N are coupled between the second charge pump stage 204 and the output stage 206. For example, Figure 7 The example of an N-stage charge pump rectifier circuit 708 shown in can include five charge pump stages (three additional charge pump stages coupled between the second charge pump stage 204 and the output stage 206), where each of the charge pump stages 3-5 is similar to the first charge pump stage 202 and the second charge pump stage 204.

[0037] Each subsequent charge pump stage boosts the voltage output of the charge pump rectifier circuit 108. The transistors of the charge pump stages are referred to as upper transistors and lower transistors (e.g., transistor 212 is the upper transistor of the first charge pump stage 202, and transistor 214 is the lower transistor of the first charge pump stage 202), and in half-cycle 504, the upper transistor of each odd-numbered charge pump stage (e.g., charge pump stages 1, 3, 5, etc.) and the lower transistor of each even-numbered charge pump stage (stages 2, 4, etc.) are turned on, while the lower transistor of each odd-numbered charge pump stage and the upper transistor of each even-numbered charge pump stage are turned off. In half-cycle 604, the upper transistor of each even-numbered charge pump stage and the lower transistor of each odd-numbered charge pump stage are turned on, while the upper transistor of each odd-numbered charge pump stage and the lower transistor of each even-numbered charge pump stage are turned off.

[0038] Figure 8 is a graph of example voltages generated in an example of a charge pump rectifier circuit 108 having five charge pump stages. Figure 8In the embodiment of the present invention, the input signal 802 can be a differential sine wave with a peak-to-peak amplitude of about 766 millivolts (mV). In some examples, the frequency of the input signal 802 can be about 1 GHz to 1.6 GHz. In other examples, the frequency of the input signal 802 can be in different ranges. Curves 804, 806, 808, 810 and 812 respectively show the voltages provided by charge pump stages 1, 2, 3, 4 and 5. Curve 814 shows the voltage provided by the output stage. The voltages generated at the charge pump stages 1-5 and the output stage can be about 234mV, 480mV, 701mV, 948mV, 1169mV and 1306mV, respectively. Other examples can use different input signal amplitudes or waveforms. For example, if the input signal is a differential square wave instead of a differential sine wave, the boost provided in each stage may increase.

[0039] In this specification, the term "coupled" may encompass connections, communications, or signal paths that achieve a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then (a) in the first example, device A is coupled to device B through a direct connection; or (b) in the second example, if the intervening component C does not substantially change the functional relationship between device A and device B, then device A is coupled to device B through an intervening component C, so that device B is controlled by device A via the control signal generated by device A.

[0040] Furthermore, in this specification, the expression “based on” means “based at least in part on.” Thus, if X is based on Y, then X may be a function of Y and any number of other factors.

[0041] A device that is "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) by the manufacturer at the time of manufacture to perform that function, and / or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Configuration may be achieved through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnections, or a combination thereof.

[0042] As used herein, the terms "terminal", "node", "interconnection", "pin" and "lead" may be used interchangeably. Unless otherwise expressly stated, these terms are generally used to refer to an interconnection between device elements, circuit elements, integrated circuits, devices or other electronic or semiconductor components or their terminations.

[0043] Circuits or devices described herein as including certain components may instead be adapted to be coupled to these components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors and / or inductors), and / or one or more sources (such as voltage sources and / or current sources) may instead include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the structure during or after manufacturing (e.g., by an end user and / or a third party).

[0044] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may be used instead with little or no effect on the remaining circuitry. For example, field effect transistors (FETs) (such as n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs, such as NPN transistors or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) may be used in place of or in conjunction with the devices described herein. The transistors may be depletion mode devices, drain extension devices, enhancement mode devices, natural transistors, or other device structure types. In addition, these devices may be implemented in or on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0045] In the claims reference may be made to the control input of a transistor and its current terminals. In the context of a FET, the control input is the gate, and the current terminals are the drain and source. In the context of a BJT, the control input is the base, and the current terminals are the collector and emitter.

[0046] When a FET is "turned on" or "enabled" as mentioned in this article, it means that there is a conductive channel for the FET and drain current can flow through the FET. When a FET is "turned off" or "disabled" as mentioned in this article, it means that there is no conductive channel, so drain current cannot flow through the FET. However, an "off" FET may have current flowing through the body diode of the transistor.

[0047] The circuits described herein may be reconfigured to include additional or different components to provide functionality at least partially similar to functionality available prior to component replacement. Unless otherwise indicated, components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may instead be a plurality of resistors or capacitors coupled in parallel between the same nodes, respectively. For example, a resistor or capacitor shown and described herein as a single component may instead be a plurality of resistors or capacitors coupled in series between the same two nodes as a single resistor or capacitor, respectively.

[0048] Although certain elements of the described examples are included in the integrated circuit and other elements are external to the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. Furthermore, some or all of the features illustrated as external to the integrated circuit may be included in the integrated circuit, and / or some features illustrated as internal to the integrated circuit may be incorporated outside the integrated circuit. As used herein, the term "integrated circuit" refers to one or more circuits that: (i) are incorporated into / on a semiconductor substrate; (ii) are incorporated into a single semiconductor package; (iii) are incorporated into the same module; and / or (iv) are incorporated into / on the same printed circuit board.

[0049] The phrase "ground" used in the above description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. In this specification, unless otherwise specified, "about", "approximately" or "substantially" preceding a parameter means within + / -10% of the parameter, or if the parameter is zero, a reasonable numerical range around zero.

[0050] Modifications to the described embodiments are possible within the scope of the claims, and other embodiments are possible.

Claims

1. A circuit comprising: The charge pump stage includes: a first transistor having a first terminal, a second terminal and a control terminal; a second transistor having a first terminal coupled to the control terminal of the first transistor, having a second terminal, and having a control terminal coupled to the first terminal of the first transistor; a first capacitor having a first conductor coupled to the second terminal of the first transistor and having a second conductor coupled to the control terminal of the first transistor; and a second capacitor having a first conductor coupled to the second terminal of the second transistor and having a second conductor coupled to the control terminal of the second transistor; and Common mode filter, comprising: a third capacitor having a first conductor coupled to the second terminal of the first transistor and having a second conductor coupled to the control terminal of the first transistor; and A fourth capacitor has a first conductor coupled to the first conductor of the third capacitor and has a second conductor coupled to the control terminal of the second transistor.

2. The circuit according to claim 1, wherein: The charge pump stage is a first charge pump stage; The circuit also includes a second charge pump stage, the second charge pump stage including: a third transistor having a first terminal coupled to the first conductor of the first capacitor, having a second terminal, and having a control terminal coupled to the first conductor of the second capacitor; a fourth transistor having a first terminal coupled to the first conductor of the second capacitor, having a second terminal, and having a control terminal coupled to the first conductor of the first capacitor; a fifth capacitor having a first conductor coupled to the second terminal of the third transistor and having a second conductor coupled to the control terminal of the second transistor; and A sixth capacitor has a first conductor coupled to the second terminal of the fourth transistor and has a second conductor coupled to the control terminal of the first transistor.

3. The circuit according to claim 2, further comprising an output stage, the output stage comprising: a fifth transistor having a first terminal coupled to the first conductor of the fifth capacitor, having a second terminal coupled to the first conductor of the third capacitor, and having a control terminal coupled to the first conductor of the sixth capacitor; as well as a sixth transistor having a first terminal coupled to the first conductor of the sixth capacitor, having a second terminal coupled to the first conductor of the third capacitor, and having a control terminal coupled to the first conductor of the fifth capacitor.

4. The circuit of claim 3, further comprising one or more additional charge pump stages coupled between the second charge pump stage and the output stage.

5. The circuit of claim 3, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are p-channel field effect transistors.

6. The circuit according to claim 1, further comprising: a resistor having a first terminal coupled to the first conductor of the third capacitor and having a second terminal; as well as A seventh capacitor has a first conductor coupled to the second terminal of the resistor and has a second conductor coupled to a reference terminal.

7. The circuit of claim 6, wherein: The resistor is a first resistor; and The circuit further comprises: a second resistor having a first terminal coupled to the first conductor of the seventh capacitor and having a second terminal; as well as an eighth capacitor having a first conductor coupled to the second terminal of the second resistor and having a second conductor coupled to the second conductor of the seventh capacitor.

8. The circuit according to claim 7, further comprising a transformer, the transformer comprising: Primary winding; and The secondary winding comprises: a first winding terminal coupled to the control terminal of the first transistor; a second winding terminal coupled to the control terminal of the second transistor; and center tap, which is coupled to the reference terminal.

9. A method comprising: During the first half cycle of the differential signal: turning on a first transistor of a first charge pump stage to charge a first conductor of a first capacitor of the first charge pump stage; boosting a voltage on a first conductor of a second capacitor of said first charge pump stage; boosting a voltage on a first conductor of a third capacitor of a second charge pump stage; as well as Based on the voltage at the first conductor of the first capacitor, the second transistor of the second charge pump stage is turned on to charge the first conductor of the fourth capacitor of the second charge pump stage.

10. The method according to claim 9, further comprising: In the first half cycle of the differential signal, a third transistor of the output stage is turned on based on the voltage at the first conductor of the fourth capacitor to charge the filter circuit based on the voltage on the first conductor of the third capacitor.

11. The method according to claim 9, further comprising: In a second half cycle of the differential signal, the third transistor of the first charge pump stage is turned on to charge the first conductor of the second capacitor.

12. The method according to claim 11, further comprising: In the second half cycle of the differential signal: increasing the voltage on the first conductor of the first capacitor; as well as The voltage on the first conductor of the fourth capacitor is increased.

13. The method according to claim 11, further comprising: In the second half cycle of the differential signal, a fourth transistor of the second charge pump stage is turned on based on a voltage at the first conductor of the second capacitor to charge the first conductor of the third capacitor.

14. The method according to claim 13, further comprising: In the second half cycle of the differential signal, a fifth transistor of the output stage is turned on based on the voltage at the first conductor of the third capacitor to charge the filter circuit and the common mode filter based on the voltage on the first conductor of the fourth capacitor.

15. An isolator circuit comprising: A transformer comprising: a primary winding; and a secondary winding having a first winding terminal, a second winding terminal, and a center tap terminal; The charge pump stage includes: a first transistor having a first terminal coupled to the first winding terminal, having a second terminal, and having a control terminal coupled to the second winding terminal; a second transistor having a first terminal coupled to the second winding terminal, having a second terminal, and having a control terminal coupled to the first winding terminal; a first capacitor having a first conductor coupled to the second terminal of the first transistor and having a second conductor coupled to the second winding terminal; a second capacitor having a first conductor coupled to the second terminal of the second transistor and having a second conductor coupled to the first winding terminal; Common mode filter, comprising: a third capacitor having a first conductor coupled to the second terminal of the first transistor and having a second conductor coupled to the second winding terminal; and A fourth capacitor has a first conductor coupled to the first conductor of the third capacitor and has a second conductor coupled to the first winding terminal.

16. The isolator circuit of claim 15, wherein: The charge pump stage is a first charge pump stage; and The isolator circuit further includes: The second charge pump stage comprises: a third transistor having a first terminal coupled to the first conductor of the first capacitor, having a second terminal, and having a control terminal coupled to the first conductor of the second capacitor; a fourth transistor having a first terminal coupled to the first conductor of the second capacitor, having a second terminal, and having a control terminal coupled to the first conductor of the first capacitor; a fifth capacitor having a first conductor coupled to the second terminal of the third transistor and the first conductor of the third capacitor and having a second conductor coupled to the first winding terminal; and A sixth capacitor has a first conductor coupled to the second terminal of the fourth transistor and the first conductor of the third capacitor and has a second conductor coupled to the second winding terminal.

17. The isolator circuit of claim 16, further comprising an output stage, the output stage comprising: a fifth transistor having a first terminal coupled to the first conductor of the fifth capacitor, a second terminal coupled to the first conductor of the third capacitor, and a control terminal coupled to the first conductor of the sixth capacitor; as well as a sixth transistor having a first terminal coupled to the first conductor of the sixth capacitor, a second terminal coupled to the first conductor of the third capacitor, and a control terminal coupled to the first conductor of the fifth capacitor.

18. The isolator circuit of claim 17, further comprising one or more additional charge pump stages coupled between the second charge pump stage and the output stage.

19. The isolator circuit of claim 15, further comprising: a resistor having a first terminal coupled to the first conductor of the third capacitor and having a second terminal; as well as A seventh capacitor has a first conductor coupled to the second terminal of the resistor and has a second conductor coupled to the center tap terminal.

20. The isolator circuit of claim 19, wherein: The resistor is a first resistor; as well as The isolator circuit further includes: a second resistor having a first terminal coupled to the first conductor of the seventh capacitor and having a second terminal; as well as an eighth capacitor having a first conductor coupled to the second terminal of the second resistor and having a second conductor coupled to the second conductor of the seventh capacitor.

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