Logic enable switch and demonstrator

Abstract

The embodiment of the invention provides a logic enable switch and a demonstrator, and relates to the technical field of safety switches, the logic enable switch comprises a switch module and a logic operation module; the switch module is electrically connected with the logic operation module; the switch module is used for outputting different switch signals according to different switch states; the switch state comprises a first state, a second state and a third state; the logical operation module is used for performing logical operation according to the switching signal output by the switching module and outputting an enable signal or a stop signal according to a logical operation result; wherein when the switch module is switched from a first state to a second state, the logic operation module outputs an enable signal; when the switch module is switched from the second state to the third state, or switched from the third state to the second state, or switched from the second state to the first state, the logical operation module outputs a stop signal. The function of the safety switch is realized through the combination of the switch module and the logic operation module, so that the cost of the safety switch can be reduced.

Description

Technical Field

[0001] The invention relates to the field of safety switches, and in particular to a logic enabling switch and a teaching pendant. Background Art

[0002] In the field of modern industrial automation and mechanical operation, the application of safety switches is crucial. Safety switches are key components for protecting the safety of operators and equipment. They work in protection circuits and can quickly cut off power in an emergency to avoid accidents. However, although safety switches provide significant advantages in terms of safety, the cost of safety switches is relatively high. Summary of the invention

[0003] The object of the present invention is to provide a logic enabling switch and a teaching pendant to solve the problem of high cost of existing safety switches.

[0004] In a first aspect, the present invention provides a logic enabling switch, the logic enabling switch comprising a switch module and a logic operation module; the switch module is electrically connected to the logic operation module;

[0005] The switch module is used to output different switch signals according to different switch states; the switch states include a first state, a second state and a third state;

[0006] The logic operation module is used to perform a logic operation according to the switch signal output by the switch module, and output an enable signal or a stop signal according to the logic operation result; wherein, when the switch module switches from the first state to the second state, the logic operation module outputs the enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs the stop signal.

[0007] In an optional embodiment, the switch module includes a first switch and a second switch; the first switch and the second switch are both electrically connected to the logic operation module;

[0008] When the first switch is closed and the second switch is open, the switch state is the first state;

[0009] When the first switch and the second switch are both closed, the switch state is the second state;

[0010] When the first switch is open and the second switch is closed, the switch state is the third state.

[0011] In an optional implementation, the logic operation module includes a first operation unit and a second operation unit;

[0012] The first operation unit and the second operation unit are both electrically connected to the switch module, and the first operation unit is electrically connected to the second operation unit;

[0013] The first operation unit is used to perform a first logic operation according to the switch signal output by the switch module, and output an operation result signal according to the first logic operation result;

[0014] The second operation unit is used to perform a second logic operation according to the switch signal output by the switch module and the operation result signal output by the first operation unit, and output an enable signal or a stop signal according to the second logic operation result.

[0015] In an optional embodiment, the first operation unit includes a first NAND gate and a second NAND gate, and the second operation unit includes an AND gate;

[0016] The first input end of the first NAND gate is electrically connected to the first output pin of the switch module, the second input end of the first NAND gate is electrically connected to the output end of the second NAND gate, and the output end of the first NAND gate is electrically connected to the first input end of the second NAND gate; the power pin of the switch module is electrically connected to the power module;

[0017] The second input end of the second NAND gate is electrically connected to the second output pin of the switch module, and the output end of the second NAND gate is electrically connected to the first input end of the AND gate;

[0018] The second input terminal of the AND gate is electrically connected to the first output pin of the switch module, and the third input terminal of the AND gate is electrically connected to the second output pin of the switch module;

[0019] The switch signal output by the switch module includes a first switch signal output through the first output pin and a second switch signal output through the second output pin. When the switch state of the switch module is the first state, the first switch signal is a high-level signal, and the second switch signal is a low-level signal; when the switch state of the switch module is the second state, the first switch signal and the second switch signal are both high-level signals; when the switch state of the switch module is the third state, the first switch signal is a low-level signal, and the second switch signal is a high-level signal.

[0020] In an optional implementation, the first operation unit further includes a first resistor, a second resistor, a first capacitor and a second capacitor, and the second operation unit further includes a third resistor, a fourth resistor and a third capacitor;

[0021] One end of the first resistor is electrically connected to the output end of the first NAND gate, and the other end of the first resistor is electrically connected to the power module; one end of the first capacitor is electrically connected to the output end of the first NAND gate, and the other end of the first capacitor is grounded;

[0022] One end of the second resistor is electrically connected to the output end of the second NAND gate, and the other end of the second resistor is electrically connected to the power module; one end of the second capacitor is electrically connected to the output end of the second NAND gate, and the other end of the second capacitor is grounded;

[0023] One end of the third resistor is electrically connected to the output end of the AND gate, and the other end of the third resistor is electrically connected to the power module; the fourth resistor is electrically connected to the output end of the AND gate; one end of the third capacitor is electrically connected to the output end of the AND gate, and the other end of the third capacitor is grounded.

[0024] In an optional implementation, the logic enable switch further includes a switch debounce module, and the switch debounce module is electrically connected to the switch module and the logic operation module respectively;

[0025] The switch debouncing module is used to debouncing the switch signal output by the switch module.

[0026] In an optional implementation, the switch debounce module includes a fourth capacitor and a fifth capacitor;

[0027] One end of the fourth capacitor is grounded, and the other end of the fourth capacitor is electrically connected to the first output pin of the switch module;

[0028] One end of the fifth capacitor is grounded, and the other end of the fifth capacitor is electrically connected to the second output pin of the switch module.

[0029] In an optional implementation, the switch debouncing module further includes a fifth resistor, a sixth resistor, a sixth capacitor and a seventh capacitor;

[0030] One end of the fifth resistor is electrically connected to the first output pin of the switch module, and the other end of the fifth resistor is electrically connected to the logic operation module; one end of the sixth capacitor is electrically connected between the fifth resistor and the logic operation module, and the other end of the sixth capacitor is grounded;

[0031] One end of the sixth resistor is electrically connected to the second output pin of the switch module, and the other end of the sixth resistor is electrically connected to the logic operation module; one end of the seventh capacitor is electrically connected between the sixth resistor and the logic operation module, and the other end of the seventh capacitor is grounded.

[0032] In an optional implementation, the switch debouncing module further includes a seventh resistor and an eighth resistor;

[0033] One end of the seventh resistor is electrically connected between the first output pin of the switch module and the logic operation module, and the other end of the seventh resistor is grounded;

[0034] One end of the eighth resistor is electrically connected between the second output pin of the switch module and the logic operation module, and the other end of the eighth resistor is grounded.

[0035] In a second aspect, the present invention provides a teach pendant, comprising the logic enable switch and a power supply module as described in any one of the aforementioned embodiments.

[0036] The logic enable switch and the teach pendant provided by the embodiment of the present invention include a switch module and a logic operation module; the switch module is electrically connected to the logic operation module; the switch module is used to output different switch signals according to different switch states; the switch state includes a first state, a second state and a third state; the logic operation module is used to perform a logic operation according to the switch signal output by the switch module, and output an enable signal or a stop signal according to the result of the logic operation; wherein, when the switch module switches from the first state to the second state, the logic operation module outputs an enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs a stop signal. The function of the safety switch is realized by the combination of the switch module and the logic operation module, thereby reducing the cost of the safety switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 A schematic diagram of a logic enable switch provided by an embodiment of the present invention is shown;

[0039] Figure 2 A schematic diagram of a switch module provided by an embodiment of the present invention is shown;

[0040] Figure 3 A schematic diagram of a logic operation module provided by an embodiment of the present invention is shown;

[0041] Figure 4 Another schematic diagram of a logic operation module provided by an embodiment of the present invention is shown;

[0042] Figure 5 shows a state diagram of a logic operation module provided by an embodiment of the present invention;

[0043] Figure 6 Another schematic diagram of a logic enable switch provided by an embodiment of the present invention is shown.

[0044] Icon: 10-logic enable switch; 100-switch module; 110-first switch; 120-second switch; 200-logic operation module; 210-first operation unit; 220-second operation unit; U1-first NAND gate; U2-second NAND gate; U3-AND gate; R1-first resistor; R2-second resistor; R3-third resistor; R4-fourth resistor; R5-fifth resistor; R6-sixth resistor; R7-seventh resistor; R8-eighth resistor; 300-switch debouncing module; C1-first capacitor; C2-second capacitor; C3-third capacitor; C4-fourth capacitor; C5-fifth capacitor; C6-sixth capacitor; C7-seventh capacitor; A1-first output pin; A2-second output pin. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0046] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0047] It should be noted that relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0048] See also Figure 1 , Figure 1 A schematic diagram of a logic enable switch provided by an embodiment of the present invention is shown. The logic enable switch 10 comprises a switch module 100 and a logic operation module 200, and the switch module 100 is electrically connected to the logic operation module 200.

[0049] The switch module 100 is used to output different switch signals according to different switch states. The switch states include a first state, a second state and a third state.

[0050] In some embodiments, the switch module 100 is in the first state when no external force is applied to the logic enable switch 10 ; the switch module 100 is in the second state when a slight external force is applied to the logic enable switch 10 ; and the switch module 100 is in the third state when a larger external force is applied to the logic enable switch 10 .

[0051] The logic operation module 200 is used to perform a logic operation according to the switch signal output by the switch module 100, and output an enable signal or a stop signal according to the logic operation result.

[0052] When the switch module 100 switches from the first state to the second state, the logic operation module 200 outputs an enable signal; when the switch module 100 switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module 200 outputs a stop signal.

[0053] It can be understood that the logic enable switch is only effective when the switch module 100 is switched from the first state to the second state.

[0054] In some embodiments, if the result of the logic operation is a high level, the logic operation module 200 outputs an enable signal to enable the device connected to the logic enable switch 10 to start working; if the result of the logic operation is a low level, the logic operation module 200 outputs a stop signal to enable the device connected to the logic enable switch 10 to stop working.

[0055] The logic enable switch provided by the embodiment of the present invention comprises a switch module and a logic operation module; the switch module is electrically connected to the logic operation module; the switch module is used to output different switch signals according to different switch states; the switch state includes a first state, a second state and a third state; the logic operation module is used to perform a logic operation according to the switch signal output by the switch module, and output an enable signal or a stop signal according to the result of the logic operation; wherein, when the switch module switches from the first state to the second state, the logic operation module outputs an enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs a stop signal. The function of the safety switch is realized by the combination of the switch module and the logic operation module, thereby reducing the cost of the safety switch.

[0056] In some embodiments, Figure 2 As shown, the switch module 100 includes a first switch 110 and a second switch 120 , and both the first switch 110 and the second switch 120 are electrically connected to the logic operation module 200 .

[0057] When the first switch 110 is closed and the second switch 120 is open, the switch state is the first state, such as Figure 2 (a) shown.

[0058] When the first switch 110 and the second switch 120 are both closed, the switch state is the second state, such as Figure 2 (b) as shown.

[0059] When the first switch 110 is open and the second switch 120 is closed, the switch state is the third state, such as Figure 2 (c) as shown.

[0060] like Figure 3 As shown, the logic operation module 200 includes a first operation unit 210 and a second operation unit 220. The first operation unit 210 and the second operation unit 220 are both electrically connected to the switch module 100, and the first operation unit 210 is electrically connected to the second operation unit 220;

[0061] The first operation unit 210 is used to perform a first logic operation according to the switch signal output by the switch module 100 , and output an operation result signal according to the first logic operation result.

[0062] The second operation unit 220 is used to perform a second logic operation according to the switch signal output by the switch module 100 and the operation result signal output by the first operation unit 210, and output an enable signal or a stop signal according to the second logic operation result.

[0063] In some embodiments, Figure 4 As shown, the first operation unit 210 includes a first NAND gate U1 and a second NAND gate U2, and the second operation unit 220 includes an AND gate U3. The first input end of the first NAND gate U1 is electrically connected to the first output pin A1 of the switch module 100, the second input end of the first NAND gate U1 is electrically connected to the output end of the second NAND gate U2, and the output end of the first NAND gate U1 is electrically connected to the first input end of the second NAND gate U2; the power pin of the switch module 100 is electrically connected to the power module.

[0064] The second input terminal of the second NAND gate U2 is electrically connected to the second output pin A2 of the switch module 100 , and the output terminal of the second NAND gate U2 is electrically connected to the first input terminal of the AND gate U3 .

[0065] The second input terminal of the AND gate U3 is electrically connected to the first output pin A1 of the switch module 100 , and the third input terminal of the AND gate U3 is electrically connected to the second output pin A2 of the switch module 100 .

[0066] It should be noted that the first switch 110, the second switch 120, the first NAND gate U1, the second NAND gate U2 and the AND gate U3 have more supply channels than existing safety switches. Therefore, they will not limit the flexibility of procurement and the stability of the supply chain, especially when facing market demand fluctuations or supply interruptions, and will not cause production delays or cost increases due to a single supply channel.

[0067] The switching signal output by the switch module 100 includes a first switching signal output through the first output pin A1 and a second switching signal output through the second output pin A2. When the switching state of the switch module 100 is the first state, the first switching signal is a high-level signal, and the second switching signal is a low-level signal; when the switching state of the switch module 100 is the second state, the first switching signal and the second switching signal are both high-level signals; when the switching state of the switch module 100 is the third state, the first switching signal is a low-level signal, and the second switching signal is a high-level signal.

[0068] It can be understood that when the switch state of the switch module 100 is the first state, Figure 2As shown in (a), the first switch 110 is in a closed state, and the second switch 120 is in an open state, and the VCC output by the power module is output to the logic operation module through the first output pin A1 of the switch module 100, that is, the first switch signal is a high level signal, and the second switch signal is a low level signal; when the switch state of the switch module 100 is the second state, as shown in Figure 2 As shown in (b), the first switch 110 and the second switch 120 are both in a closed state, and the VCC output by the power module is output to the logic operation module through the first output pin A1 and the second output pin A2 of the switch module 100, that is, the first switch signal and the second switch signal are both high-level signals; when the switch state of the switch module 100 is the third state, such as Figure 2 As shown in (c), the first switch 110 is in an open state, and the second switch 120 is in a closed state, and the VCC output by the power module is output to the logic operation module through the second output pin A2 of the switch module 100, that is, the first switch signal is a low level signal, and the second switch signal is a high level signal.

[0069] The truth table of the logic operation module 200 is shown in Table 1. The first stroke is when the switch module 100 switches from the first state to the second state; the second stroke is when the switch module 100 switches from the second state to the third state; the third stroke is when the switch module 100 switches from the third state to the second state; and the fourth stroke is when the switch module 100 switches from the second state to the first state. K1 represents the first switch signal, K2 represents the second switch signal, and G represents the N-1 It is represented by the operation result signal output by the second NAND gate U2 last time, G N It represents the operation result signal currently output by the second NAND gate U2, and Y represents the enable signal / stop signal output by the AND gate U3.

[0070] Table 1

[0071] journey K1 K2 <![CDATA[G N-1 ]]> <![CDATA[G N ]]> Y Initial state 1 0 / 1 0 Itinerary 1 1 1 1 1 1 Itinerary 2 0 1 1 0 0 Itinerary 3 1 1 0 0 0 Itinerary 4 1 0 0 1 0 Itinerary 1 1 1 1 1 1 Itinerary 4 1 0 1 1 0 Itinerary 1 1 1 1 1 1 Itinerary 2 0 1 1 0 0 Itinerary 3 1 1 0 0 0 Itinerary 2 0 1 0 0 0 Itinerary 3 1 1 0 0 0 Itinerary 4 1 0 0 1 0

[0072] According to Table 1, the logical operation expression for calculating the current output of the second NAND gate U2 and the logical operation expression for calculating the output of the AND gate U3 can be obtained:

[0073]

[0074] Y=K2*K1*G N

[0075] The first switch signal K1, the second switch signal K2 and the operation result signal G currently output by the second NAND gate U2 N The state diagram is as follows Figure 5As shown, it can be seen that the logic enable switch 10 can achieve a valid output when the switch module 100 is in the first stroke (from the first state to the second state), and invalid outputs in other strokes.

[0076] In order to improve the stability of the signals output by the first NAND gate U1, the second NAND gate U2 and the AND gate U3, as shown in FIG. Figure 6 As shown, the first operation unit 210 further includes a first resistor R1, a second resistor R2, a first capacitor C1 and a second capacitor C2, and the second operation unit 220 further includes a third resistor R3, a fourth resistor R4 and a third capacitor C3.

[0077] One end of the first resistor R1 is electrically connected to the output end of the first NAND gate U1, and the other end of the first resistor R1 is electrically connected to the power module; one end of the first capacitor C1 is electrically connected to the output end of the first NAND gate U1, and the other end of the first capacitor C1 is grounded.

[0078] One end of the second resistor R2 is electrically connected to the output end of the second NAND gate U2, and the other end of the second resistor R2 is electrically connected to the power module; one end of the second capacitor C2 is electrically connected to the output end of the second NAND gate U2, and the other end of the second capacitor C2 is grounded.

[0079] One end of the third resistor R3 is electrically connected to the output end of the AND gate U3, and the other end of the third resistor R3 is electrically connected to the power module; the fourth resistor R4 is electrically connected to the output end of the AND gate U3; one end of the third capacitor C3 is electrically connected to the output end of the AND gate U3, and the other end of the third capacitor C3 is grounded.

[0080] The first resistor R1, the second resistor R2 and the third resistor R3 are all pull-up resistors. The first resistor R1 can prevent the output end of the first NAND gate U1 from being suspended, so that the signal output by the first NAND gate U1 is stable; the second resistor R2 can prevent the output end of the second NAND gate U2 from being suspended, so that the signal output by the second NAND gate U2 is stable; the third resistor R3 can prevent the output end of the AND gate U3 from being suspended, so that the signal output by the AND gate U3 is stable.

[0081] The first capacitor C1, the second capacitor C2 and the third capacitor C3 are all output bypass capacitors. The first capacitor C1 can filter out the interference of other signals on the signal output by the first NAND gate U1; the second capacitor C2 can filter out the interference of other signals on the signal output by the second NAND gate U2; the third capacitor C3 can filter out the interference of other signals on the signal output by the AND gate U3.

[0082] In order to improve the accuracy and reliability of the logic enable switch, such as Figure 5 As shown, the logic enabling switch 10 further includes a switch debounce module 300 , and the switch debounce module 300 is electrically connected to the switch module 100 and the logic operation module 200 , respectively.

[0083] The switch debouncing module 300 is used to debouncing the switch signal output by the switch module 100 .

[0084] It should be noted that there will be jitter at the moment when the switch module 100 switches its state, which will cause the switch output from the switch module 100 to the logic operation module 200 to be inaccurate, resulting in a logic operation error of the logic operation module 200, thereby causing an error in the signal output by the logic operation module 200. Therefore, a switch de-jitter module 300 is added to de-jitter the switch signal output by the switch module 100 to eliminate the jitter that exists at the moment when the switch module 100 switches its state, thereby improving the accuracy and reliability of the logic enable switch 10.

[0085] In some embodiments, Figure 5 As shown, the switch debounce module 300 includes a fourth capacitor C4 and a fifth capacitor C5. One end of the fourth capacitor C4 is grounded, and the other end of the fourth capacitor C4 is electrically connected to the first output pin A1 of the switch module 100. One end of the fifth capacitor C5 is grounded, and the other end of the fifth capacitor C5 is electrically connected to the second output pin A2 of the switch module 100.

[0086] The fourth capacitor C4 and the fifth capacitor C5 are both bypass capacitors. The fourth capacitor C4 can eliminate the jitter signal of the first output end of the switch module 100 when outputting the first switch signal; the fifth capacitor C5 can eliminate the jitter signal of the second output end of the switch module 100 when outputting the second switch signal.

[0087] It should be noted that capacitors can store charge. When the switch module 100 switches states quickly, the current in the circuit will change suddenly, causing voltage fluctuations. The capacitor can absorb these rapidly changing energies and reduce voltage fluctuations.

[0088] In order to filter out interference and protect the logic operation module 200, as Figure 5 As shown, the switch debouncing module 300 further includes a fifth resistor R5, a sixth resistor R6, a sixth capacitor C6 and a seventh capacitor C7.

[0089] One end of the fifth resistor R5 is electrically connected to the first output pin A1 of the switch module 100, and the other end of the fifth resistor R5 is electrically connected to the logic operation module 200. One end of the sixth capacitor C6 is electrically connected between the fifth resistor R5 and the logic operation module 200, and the other end of the sixth capacitor C6 is grounded. One end of the sixth resistor R6 is electrically connected to the second output pin A2 of the switch module 100, and the other end of the sixth resistor R6 is electrically connected to the logic operation module 200. One end of the seventh capacitor C7 is electrically connected between the sixth resistor R6 and the logic operation module 200, and the other end of the seventh capacitor C7 is grounded.

[0090] The fifth resistor R5 and the sixth resistor R6 are both current limiting filter resistors. The fifth resistor R5 can limit the current input to the first NAND gate U1 and the AND gate U3 when the first switch 110 in the switch module 100 is closed, so as to protect the first NAND gate U1 and the AND gate U3, and the fifth resistor R5 can form an RC filter with the sixth capacitor C6 to make the first switch signal output from the first output pin A1 of the switch module 100 more stable; the sixth resistor R6 can limit the current input to the second NAND gate U2 and the AND gate U3 when the second switch 120 in the switch module 100 is closed, so as to protect the second NAND gate U2 and the AND gate U3, and the sixth resistor R6 can form an RC filter with the seventh capacitor C7 to make the second switch signal output from the second output pin A2 of the switch module 100 more stable.

[0091] In order to make the switch signal input to the logic operation module 200 more stable, Figure 5 As shown, the switch debouncing module 300 further includes a seventh resistor R7 and an eighth resistor R8.

[0092] One end of the seventh resistor R7 is electrically connected between the first output pin A1 of the switch module 100 and the logic operation module 200, and the other end of the seventh resistor R7 is grounded. One end of the eighth resistor R8 is electrically connected between the second output pin A2 of the switch module 100 and the logic operation module 200, and the other end of the eighth resistor R8 is grounded.

[0093] The seventh resistor R7 and the eighth resistor R8 are both pull-down resistors for switching signals. The seventh resistor R7 can prevent the input ends of the first NAND gate U1 and the AND gate U3 from being in a floating state, thereby making the first switching signals input to the first NAND gate U1 and the AND gate U3 more stable; the eighth resistor R8 can prevent the input ends of the second NAND gate U2 and the AND gate U3 from being in a floating state, thereby making the second switching signals input to the second NAND gate U2 and the AND gate U3 more stable.

[0094] It should be noted that Figure 5 VCC is the power provided by the power module.

[0095] An embodiment of the present invention further provides a teaching pendant, which includes the above-mentioned logic enabling switch and a power supply module.

[0096] It should be noted that the teach pendant is a handheld device used for robot control. The teach pendant is mainly used for manual manipulation, program writing, parameter configuration and monitoring of the robot. The teach pendant includes the above-mentioned logic enable switch to ensure the safety of operation. If the operator lightly holds the above-mentioned logic enable switch, the servo drive unit of the robot will be in the on state, and the robot can be operated to move at this time; if the operator does not press or re-holds the above-mentioned logic enable switch, the servo drive unit of the robot will be in the off state, and the robot will stop moving, which can prevent the operator from being injured or damaging the robot when he loses his ability to act or is overly nervous and operates incorrectly.

[0097] In several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and a module, a program segment or a part of the code contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0098] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0099] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A logic enable switch, characterized in that: The logic enable switch includes a switch module and a logic operation module; the switch module is electrically connected to the logic operation module; The switch module is used to output different switch signals according to different switch states; the switch states include a first state, a second state and a third state; The logic operation module is used to perform a logic operation according to the switch signal output by the switch module, and output an enable signal or a stop signal according to the logic operation result; wherein, when the switch module switches from the first state to the second state, the logic operation module outputs the enable signal; when the switch module switches from the second state to the third state, or from the third state to the second state, or from the second state to the first state, the logic operation module outputs the stop signal.

2. The logic enable switch according to claim 1, characterized in that: The switch module includes a first switch and a second switch; the first switch and the second switch are both electrically connected to the logic operation module; When the first switch is closed and the second switch is open, the switch state is the first state; When the first switch and the second switch are both closed, the switch state is the second state; When the first switch is open and the second switch is closed, the switch state is the third state.

3. The logic enable switch according to claim 1, characterized in that: The logic operation module includes a first operation unit and a second operation unit; The first operation unit and the second operation unit are both electrically connected to the switch module, and the first operation unit is electrically connected to the second operation unit; The first operation unit is used to perform a first logic operation according to the switch signal output by the switch module, and output an operation result signal according to the first logic operation result; The second operation unit is used to perform a second logic operation according to the switch signal output by the switch module and the operation result signal output by the first operation unit, and output an enable signal or a stop signal according to the second logic operation result.

4. The logic enabling switch according to claim 3, characterized in that: The first operation unit includes a first NAND gate and a second NAND gate, and the second operation unit includes an AND gate; The first input end of the first NAND gate is electrically connected to the first output pin of the switch module, the second input end of the first NAND gate is electrically connected to the output end of the second NAND gate, and the output end of the first NAND gate is electrically connected to the first input end of the second NAND gate; the power pin of the switch module is electrically connected to the power module; The second input end of the second NAND gate is electrically connected to the second output pin of the switch module, and the output end of the second NAND gate is electrically connected to the first input end of the AND gate; The second input terminal of the AND gate is electrically connected to the first output pin of the switch module, and the third input terminal of the AND gate is electrically connected to the second output pin of the switch module; The switch signal output by the switch module includes a first switch signal output through the first output pin and a second switch signal output through the second output pin. When the switch state of the switch module is the first state, the first switch signal is a high-level signal, and the second switch signal is a low-level signal; when the switch state of the switch module is the second state, the first switch signal and the second switch signal are both high-level signals; when the switch state of the switch module is the third state, the first switch signal is a low-level signal, and the second switch signal is a high-level signal.

5. The logic enabling switch according to claim 4, characterized in that: The first operation unit further includes a first resistor, a second resistor, a first capacitor and a second capacitor, and the second operation unit further includes a third resistor, a fourth resistor and a third capacitor; One end of the first resistor is electrically connected to the output end of the first NAND gate, and the other end of the first resistor is electrically connected to the power module; one end of the first capacitor is electrically connected to the output end of the first NAND gate, and the other end of the first capacitor is grounded; One end of the second resistor is electrically connected to the output end of the second NAND gate, and the other end of the second resistor is electrically connected to the power module; one end of the second capacitor is electrically connected to the output end of the second NAND gate, and the other end of the second capacitor is grounded; One end of the third resistor is electrically connected to the output end of the AND gate, and the other end of the third resistor is electrically connected to the power module; the fourth resistor is electrically connected to the output end of the AND gate; one end of the third capacitor is electrically connected to the output end of the AND gate, and the other end of the third capacitor is grounded.

6. The logic enabling switch according to claim 1, characterized in that: The logic enable switch further includes a switch debounce module, and the switch debounce module is electrically connected to the switch module and the logic operation module respectively; The switch debouncing module is used to debouncing the switch signal output by the switch module.

7. The logic enabling switch according to claim 6, characterized in that: The switch debounce module includes a fourth capacitor and a fifth capacitor; One end of the fourth capacitor is grounded, and the other end of the fourth capacitor is electrically connected to the first output pin of the switch module; One end of the fifth capacitor is grounded, and the other end of the fifth capacitor is electrically connected to the second output pin of the switch module.

8. The logic enabling switch according to claim 7, characterized in that: The switch debouncing module further includes a fifth resistor, a sixth resistor, a sixth capacitor and a seventh capacitor; One end of the fifth resistor is electrically connected to the first output pin of the switch module, and the other end of the fifth resistor is electrically connected to the logic operation module; one end of the sixth capacitor is electrically connected between the fifth resistor and the logic operation module, and the other end of the sixth capacitor is grounded; One end of the sixth resistor is electrically connected to the second output pin of the switch module, and the other end of the sixth resistor is electrically connected to the logic operation module; one end of the seventh capacitor is electrically connected between the sixth resistor and the logic operation module, and the other end of the seventh capacitor is grounded.

9. The logic enabling switch according to claim 7, characterized in that: The switch debouncing module also includes a seventh resistor and an eighth resistor; One end of the seventh resistor is electrically connected between the first output pin of the switch module and the logic operation module, and the other end of the seventh resistor is grounded; One end of the eighth resistor is electrically connected between the second output pin of the switch module and the logic operation module, and the other end of the eighth resistor is grounded.

10. A teaching pendant, characterized in that: The teaching pendant comprises the logic enabling switch and the power supply module as described in any one of claims 1 to 9.

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