Circuit board manufacturing method and circuit board

Abstract

The invention relates to the technical field of circuit board manufacturing, and provides a circuit board manufacturing method and a circuit board, and the method comprises the steps: providing a circuit board which comprises a dense hole region and a dense wiring region, and carrying out the thin plating of the dense hole region and the dense wiring region; covering the circuit board with a protective film, wherein the protective film is provided with a first window at a position corresponding to the dense hole area; carrying out selective plating on the dense hole area through the first window; removing the protective film; and resin hole plugging is conducted on the dense hole area, and hole plugging grinding is conducted. According to the circuit board manufacturing method, thin plating and selective plating are carried out firstly, so that the surface copper thickness of the dense hole area is larger than that of the dense wiring area, a certain height difference is formed, only a resin grinding procedure is needed, multiple copper reduction procedures are not needed, the procedures are simplified, and meanwhile the copper thickness range of the outer-layer circuit is reduced. And moreover, when the resin is ground, the dense wiring area is not ground preferentially or excessively, so that the copper thickness uniformity in the grinding process of the outer-layer circuit is ensured, and the problems of incomplete circuit etching and short circuit in the POFV process are solved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit board manufacturing, and in particular to a circuit board manufacturing method and a circuit board. Background Art

[0002] With the development of data communication products, the number of layers of high-layer circuit boards is increasing, and the requirements for POFV (plating overfilled via, resin plug hole electroplating filling process) process design are also increasing. At the same time, with the decreasing spacing between outer layer traces and the increasing wiring density, new difficulties and challenges are posed to the etching quality of the outer layer of the circuit board.

[0003] When the same current is passed through the dense hole area and the dense routing area for electroplating, the actual current shared is small due to the large surface area of ​​the dense hole area, resulting in the surface copper thickness of the dense hole area being smaller than that of the dense routing area. The greater the copper plating thickness, the greater the difference between the two. For the POFV process, the traditional method requires multiple copper reduction and grinding processes, which makes the process more complicated and will amplify the extreme difference in copper thickness of the outer layer circuit (poor copper thickness uniformity), which has a greater impact on the etching uniformity of the outer layer circuit, resulting in large fluctuations in the tolerance of the etching line width of the outer layer circuit, and is prone to problems such as incomplete etching of the outer layer circuit and thin lines. Summary of the invention

[0004] In view of this, an embodiment of the present application provides a circuit board manufacturing method and a circuit board to solve the problems of incomplete etching of outer layer circuits and thin lines during the POFV process.

[0005] The first aspect of the present application provides a circuit board manufacturing method, comprising:

[0006] Providing a circuit board, the circuit board comprising a dense hole area and a dense wiring area, and performing thin-film plating on the dense hole area and the dense wiring area;

[0007] Covering the circuit board with a protective film, wherein the protective film is provided with a first window at a position corresponding to the dense hole area;

[0008] Selectively plate the dense hole area through the first opening;

[0009] Removing the protective film;

[0010] The dense hole area is plugged with resin and then plugged and ground.

[0011] The beneficial effects of the circuit board manufacturing method provided by the embodiment of the present application are as follows: after thin plating in the dense hole area and the dense routing area, the thickness of the thin-plated surface copper in the dense hole area is less than the thickness of the thin-plated surface copper in the dense routing area; and after selective plating, the dense hole area increases the selectively plated surface copper, while the dense routing area does not increase the selectively plated surface copper; therefore, the surface copper thickness of the dense hole area exceeds the surface copper thickness of the dense routing area, forming a certain height difference, only requiring a resin grinding process, without multiple copper reduction processes, simplifying the process, and at the same time, being able to reduce the extreme difference in copper thickness of the outer layer circuit. Moreover, during resin grinding, the dense routing area will not be preferentially ground or over-ground, ensuring the uniformity of copper thickness during the grinding process of the outer layer circuit, solving the problems of incomplete circuit etching and thin lines during the POFV process.

[0012] In some embodiments, when the hole copper thickness of the dense hole area is designed to be X;

[0013] During thin plating, the thickness of the thin-plated hole copper in the dense hole area is designed to be δ*X, the thickness of the thin-plated surface copper in the dense hole area is δ*X / T1, and the thickness of the thin-plated surface copper in the dense routing area is λ*δ*X / T1;

[0014] During selective plating, the thickness of the selectively plated hole copper in the dense hole area is designed to be δ'*X, and the thickness of the selectively plated surface copper in the dense hole area is δ'*X / T2;

[0015] After the protective film is removed, the height difference between the surface copper of the dense hole area and the surface copper of the dense routing area is △X=δ'*X / T2-(λ*δ*X / T1-δ*X / T1);

[0016] Among them, T1 is the deep plating capability of thin plating, T2 is the deep plating capability of selective plating, δ+δ'=1 and δ<δ', λ is the difference coefficient between the surface copper thickness of the dense hole area and the surface copper thickness of the dense routing area under T1, and the unit of thickness is um.

[0017] In some embodiments, δ and δ' are assigned according to the values ​​of T1 and T2 so that ΔX ≤ 8 um.

[0018] In some embodiments, an isolated hole is further provided on the circuit board. When the circuit board is covered with a protective film, the protective film is further provided with a second window at a position corresponding to the isolated hole, and the isolated hole is selectively plated through the second window, wherein the second window is more than 4 mil larger than a single side of the isolated hole.

[0019] In some embodiments, the circuit board is also provided with a non-dense routing area. When the circuit board is covered with a protective film, the protective film is provided with a third window at a position corresponding to the non-dense routing area, and the non-dense routing area is selectively plated through the third window, wherein the third window is more than 2 mil larger than a single side of the non-dense routing area.

[0020] In some embodiments, when grinding the plug hole, the height of the resin cap is first reduced by a ceramic brush and then ground by an abrasive belt.

[0021] In some embodiments, after the plugging is ground, the hole openings of the dense hole area are first covered with copper plating, and the dense hole area and the dense routing area are covered with copper plating of 8-10 um.

[0022] In some embodiments, the protective film is a dry film.

[0023] In some embodiments, after the hole plugging is completed, the outer layer circuit is produced in the dense routing area, the line width and line spacing of the dense routing area are not greater than 4 mils, and / or the thickness-to-diameter ratio of the circuit board is greater than 8:1.

[0024] The second aspect of the present application proposes a circuit board, which is manufactured by the circuit board manufacturing method described in the first aspect. The circuit board includes a dense hole area and a dense routing area. The holes in the dense hole area are sequentially provided with thin-plated hole copper and selectively plated hole copper, the hole mouths of the dense hole area are sequentially provided with bottom copper, thin-plated surface copper and selectively plated surface copper, and the dense routing area is sequentially provided with bottom copper and thin-plated surface copper.

[0025] The circuit board adopts any one or more embodiments of the circuit board manufacturing method described above, and thus has the beneficial effects of the above embodiments, which will not be described one by one here.

[0026] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or conventional technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 is a flow chart of a circuit board manufacturing method provided by some embodiments of the present application;

[0029] Figure 2 It is a schematic diagram of the structure of the circuit board manufacturing method provided in some embodiments of the present application after thin plating;

[0030] Figure 3It is a schematic diagram of the structure of the circuit board manufacturing method provided in some embodiments of the present application after selective plating;

[0031] Figure 4 It is a schematic diagram of the structure of the circuit board manufacturing method provided in some embodiments of the present application after plugging and grinding.

[0032] The meanings of the marks in the figure are:

[0033] 10. Dense hole area;

[0034] 20. Dense wiring area;

[0035] 30. Bottom copper;

[0036] 40. Thin plated hole copper;

[0037] 50. Thin copper plating;

[0038] 60. Choose plated copper;

[0039] 70. Choose plated copper. DETAILED DESCRIPTION

[0040] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0042] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0043] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0044] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0045] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0046] In the description of the embodiments of the present application, the orientations or positional relationships indicated by technical terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the embodiments of the present application.

[0047] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0048] With the development of data communication products, the number of layers of high-layer circuit boards is increasing, and the requirements for POFV (plating overfilled via, resin plug hole electroplating filling process) process design are also increasing. At the same time, with the decreasing spacing between outer layer traces and the increasing wiring density, new difficulties and challenges are posed to the etching quality of the outer layer of the circuit board.

[0049] When the same current is passed through the dense hole area and the dense routing area for electroplating, the actual shared current is small due to the large surface area of ​​the dense hole area, resulting in the surface copper thickness of the dense hole area being smaller than that of the dense routing area. The greater the copper plating thickness, the greater the difference between the two. When there is a POFV process, the traditional method requires multiple copper reductions and grinding, resulting in a more complicated process. At the same time, it will magnify the extreme difference in copper thickness of the outer layer circuit (the copper thickness is not uniform), which has a greater impact on the etching uniformity of the outer layer circuit, resulting in large fluctuations in the tolerance of the etching line width of the outer layer circuit, and it is easy to have problems such as incomplete etching of the outer layer circuit and thin lines.

[0050] In order to solve the problems of incomplete etching of outer layer circuits and thin lines in POFV process, a circuit board manufacturing method and a circuit board are designed.

[0051] The first embodiment of the present application provides a method for manufacturing a circuit board. Figures 1 to 3 , the circuit board manufacturing method includes:

[0052] S1. Provide a circuit board, wherein the circuit board includes a dense hole area 10 and a dense wiring area 20, and perform thin-film plating on the dense hole area 10 and the dense wiring area 20.

[0053] After thin plating, thin-plated hole copper 40 is formed in the hole of the dense hole area 10, and thin-plated surface copper 50 is formed on the bottom copper 30 of the dense hole area 10; at the same time, thin-plated surface copper 50 is formed on the bottom copper 30 of the dense wiring area 20. Among them, because the electroplating current is shared and affected by the deep plating ability, usually, the thickness of the thin-plated hole copper 40 is less than the thickness of the thin-plated surface copper 50 of the dense hole area 10, and the thickness of the thin-plated surface copper 50 of the dense hole area 10 is less than the thickness of the thin-plated surface copper 50 of the dense wiring area 20.

[0054] Since the copper plating thickness in the thin plating process is small, the thickness difference between the thin-plated copper 50 in the dense hole area 10 and the thin-plated copper 50 in the dense wiring area 20 will be much smaller than that in the traditional method. In the traditional method, the thicker the copper thickness, the greater the difference. For example, when the hole copper thickness is required to be 15um, the copper thickness of the dense hole area 10 is 16um, and the copper thickness of the dense wiring area 20 is 18um, and the difference is 2um; when the hole copper thickness is required to be 20um, the copper thickness of the dense hole area 10 is 22um, and the copper thickness of the dense wiring area 20 is 25um, and the difference is 3um; when the hole copper thickness is required to be 30um, the copper thickness of the dense hole area 10 is 33um, and the copper thickness of the non-dense wiring area 20 is 38um, and the difference is 5um.

[0055] Optionally, the holes in the dense hole area 10 can be through holes, in which case thin plating + selective plating is performed on both sides in the thickness direction of the circuit board. Of course, the holes in the dense hole area 10 can also be blind holes, in which case thin plating + selective plating is performed on one side in the thickness direction of the circuit board.

[0056] Optionally, the dense wiring area 20 has not been etched with circuits yet and is a large copper area.

[0057] Optionally, the dense hole area 10 is a BGA (Ball Grid Array) area, and has more small holes in the BGA area.

[0058] S2. Covering the circuit board with a protective film, wherein a first window is provided at a position of the protective film corresponding to the dense hole area 10 .

[0059] Since the protective film has a first window at the position of the dense hole area 10 and the rest of the positions are covered by the protective film, during subsequent selective plating, only the dense hole area 10 is electroplated, while the dense wiring area 20 is not electroplated.

[0060] The protective film may be a dry film or a wet film.

[0061] The shape of the first window is not limited in this application and is specifically designed according to the approximate shape of the dense hole area 10 .

[0062] S3, selectively plating the dense hole area 10 through the first window opening.

[0063] During selective plating, under the cover of the protective film, the copper ion reduction deposition in the dense wiring area 20 will be suppressed, and the copper ion reduction deposition in the dense hole area 10 will be increased; that is, after selective plating, selective hole copper 60 will be formed on the thin plated hole copper 40 in the dense hole area 10, and selective surface copper 70 will be formed on the thin plated surface copper 50 in the dense hole area 10; however, selective surface copper 70 will not be formed on the thin plated surface copper 50 in the dense wiring area 20. As one rises and the other falls, the surface copper thickness of the dense hole area 10 will exceed the surface copper thickness of the dense wiring area 20, and a certain height difference will be formed, and at this time two planes will appear on the entire board surface.

[0064] Optionally, dense hole areas 10 are provided on both sides of the dense wiring area 20. Since the dense hole area 10 is slightly higher than the dense wiring area 20, a "basin" shape is formed. Of course, the dense hole area 10 can also be provided on one side of the dense wiring area 20.

[0065] The surface copper of the dense hole area 10 includes the bottom copper 30 , the thin-plated surface copper 50 and the selectively plated surface copper 70 of the dense hole area 10 ; the surface copper of the dense routing area 20 includes the bottom copper 30 and the thin-plated surface copper 50 of the dense routing area 20 .

[0066] S4. Remove the protective film.

[0067] The protective film is removed by using a stripping liquid, wherein the stripping liquid may be an organic stripping liquid, for example, a 25% tetramethylammonium hydroxide stripping liquid; or an inorganic stripping liquid, for example, a sodium hydroxide stripping liquid.

[0068] S5, plugging the dense hole area 10 with resin and performing plugging grinding.

[0069] The beneficial effects of the circuit board manufacturing method provided by the embodiment of the present application are as follows: after the dense hole area 10 and the dense wiring area 20 are thinly plated, the thickness of the thin-plated surface copper 50 of the dense hole area 10 is less than the thickness of the thin-plated surface copper 50 of the dense wiring area 20; because the circuit board is covered with a protective film, and the protective film is provided with a first window at the position corresponding to the dense hole area 10, after selective plating, the dense hole area 10 increases the selectively plated surface copper 70, while the dense wiring area 20 does not increase the selectively plated surface copper 70; therefore, the surface copper thickness of the dense hole area 10 exceeds the surface copper thickness of the dense wiring area 20, forming a certain height difference, only requiring a resin grinding process, without multiple copper reduction processes, simplifying the process, and at the same time, being able to reduce the extreme difference in copper thickness of the outer layer circuit. Moreover, during resin grinding, the dense wiring area 20 will not be preferentially ground or over-ground, ensuring the uniformity of copper thickness during the grinding process of the outer layer circuit, solving the problems of incomplete circuit etching and thin lines during the POFV process, and achieving the machinability of fine lines in the high thickness-to-diameter ratio POFV process.

[0070] Among them, line thinness means that the line width after etching is smaller than the designed width.

[0071] Please also refer to Figure 2 and Figure 3 , in some embodiments, when the hole copper thickness of the dense hole area 10 is designed to be X;

[0072] During thin plating, the thickness of the thin-plated hole copper 40 in the dense hole area 10 is designed to be δ*X, the thickness of the thin-plated surface copper 50 in the dense hole area 10 is δ*X / T1, and the thickness of the thin-plated surface copper 50 in the dense routing area 20 is λ*δ*X / T1;

[0073] During selective plating, the thickness of the selectively plated hole copper 60 in the dense hole area 10 is designed to be δ'*X, and the thickness of the selectively plated surface copper 70 in the dense hole area 10 is designed to be δ'*X / T2;

[0074] After the protective film is removed, the height difference between the surface copper of the dense hole area 10 and the surface copper of the dense wiring area 20 is △X=δ'*X / T2-(λ*δ*X / T1-δ*X / T1);

[0075] Among them, T1 is the deep plating capability of thin plating, T2 is the deep plating capability of selective plating, and both T1 and T2 are less than 1.

[0076] δ and δ' are the distribution coefficients of thin plating and selective plating respectively, δ+δ'=1 and δ<δ', for example, δ can be 0.3 and δ' can be 0.7; or, δ can be 0.4 and δ' can be 0.6; or, δ can be 0.45 and δ' can be 0.55.

[0077] λ>1, which is the difference coefficient of the surface copper thickness of the dense hole area 10 and the surface copper thickness of the dense routing area 20 (large copper skin) under T1, where λ belongs to the capacity constant of the electroplating line, which is an empirical coefficient obtained by testing different copper plating thickness parameters and collecting copper thickness data at two locations by slicing, and then fitting based on a large amount of data of the two; the unit of thickness is um.

[0078] In this way, the extreme difference in copper thickness between the dense hole area 10 and the dense wiring area 20 can be reduced. At the same time, the copper thickness design difference of the two electroplating processes can be used to control the copper thickness difference between the dense wiring area 20 and the dense hole area 10, forming a natural height difference on the board surface, so as to protect the dense wiring area 20 from being preferentially ground and over-ground during the resin grinding process in the later process, which would lead to the problem of excessive copper thickness extreme difference. Compared with the traditional method, this method can maximize the control of the surface copper uniformity before the cover electroplating, provide a good environment for the subsequent etching of fine lines on the outer layer, and also have great help and advantages for the etching yield. In addition, the process is relatively simple, which improves the production efficiency and production quality.

[0079] Of course, in other embodiments, δ may be equal to δ', that is, δ and δ' are both 0.5; or, δ may be less than δ', for example, δ may be 0.55 and δ' may be 0.45; or, δ may be 0.6 and δ' may be 0.4.

[0080] In some embodiments, δ and δ′ are assigned according to the values ​​of T1 and T2 so that the height difference ΔX≦8 um.

[0081] Deep plating ability is an important indicator for evaluating the effect of circuit board hole plating. It usually refers to the ratio of the thickness of the electroplated thick hole to the thickness of the hole mouth under the conditions of a certain board thickness and hole diameter, reflecting the uniformity of the copper plating thickness in the hole.

[0082] The three main factors that affect deep plating ability are: First, electroplating process parameters, including current density, electroplating time, electroplating temperature, and electrolyte concentration. Reasonable process parameter settings can ensure uniform deposition of the electroplating layer inside the workpiece and improve deep plating ability. Second, material properties. Different materials have different electrical conductivity and electrochemical properties, which affect the propagation of current inside the workpiece. Therefore, the conductivity and corrosion resistance of the material need to be considered when selecting materials. Third, equipment conditions. The higher the accuracy of the equipment, the more uniform the current propagation inside the workpiece; the better the stability of the equipment, the smaller the fluctuations generated during the electroplating process, which is conducive to improving deep plating ability.

[0083] Therefore, when the equipment and materials are selected, the process parameters are mainly adjusted to improve the deep plating capability. For example, one or more of the current density, plating time, plating temperature and electrolyte concentration can be changed.

[0084] Among them, the resin is plugged and then ground. Due to the existence of the height difference △X, the dense wiring area will not be ground first during the grinding process. When the resin grinding of the dense hole area 10 is almost clean, the dense wiring area will be gradually ground. At this time, the height difference △X will gradually approach "0". During the whole process, the dense wiring area retains the bottom copper 30 and the thin-plated surface copper 50, and the uniformity of the copper thickness is guaranteed to the maximum extent. The "thin plating + selective plating" distributed electroplating also reduces the thickness extremes of the surface copper of the dense hole area 10 and the surface copper of the dense wiring area 20, and the control of the overall etching copper thickness extremes is also more optimized than the traditional conventional method.

[0085] In some embodiments, an isolated hole is provided on the circuit board. When a protective film is covered on the circuit board, a second window is provided on the protective film at a position corresponding to the isolated hole. The isolated hole is selectively plated through the second window, wherein the second window is more than 4 mil larger than a single side of the isolated hole.

[0086] It can be understood that the isolated hole is neither in the dense hole area 10 nor in the dense wiring area 20. There can be one or more isolated holes.

[0087] Optionally, the second window is 4-8 mils larger than a single side of the isolated hole, which can be understood as the radial size of the second window being 8-16 mils larger than the diameter of the isolated hole. The second window can be 4 mil, 5 mil, 6 mil, 7 mil, 8 mil, etc. larger than a single side of the isolated hole.

[0088] By adopting the above technical solution, the distribution uniformity of the electroplating current during selective plating can be improved, thereby ensuring the uniformity of the copper thickness.

[0089] In other embodiments, no isolated hole may be provided on the circuit board, that is, no second window is provided on the protective film.

[0090] In some embodiments, a non-dense wiring area is also provided on the circuit board. When a protective film is covered on the circuit board, a third window is provided on the protective film at a position corresponding to the non-dense wiring area. The non-dense wiring area is selectively plated through the third window, wherein the third window is more than 2 mil larger than a single side of the non-dense wiring area.

[0091] It can be understood that the isolated hole is neither in the dense hole area 10 nor in the dense wiring area 20. There may be one or more lines in the non-dense wiring area.

[0092] Optionally, the third window is 2-4 mils larger than a single side of the non-dense wiring area, which can be understood as the width of the third window is 4-8 mils larger than the width of the non-dense wiring area. The third window can be 2 mil, 3 mil, 4 mil, etc. larger than a single side of the non-dense wiring area.

[0093] By adopting the above technical solution, the distribution uniformity of the electroplating current during selective plating can be improved, thereby ensuring the uniformity of the copper thickness.

[0094] In other embodiments, a non-dense wiring area may not be provided on the circuit board, that is, the third window is not provided on the protective film.

[0095] In some embodiments, when grinding the plug hole, the height of the resin cap is first reduced by a ceramic brush and then ground by an abrasive belt.

[0096] Optionally, when grinding the plug hole, it is necessary to first use four sets of ceramic brushes to lower the height of the resin cap, and then grind the entire section of the sand belt twice (two sets of sand belts rotate in forward and reverse directions), and after grinding, △X < 2um.

[0097] Based on the above solution, the ceramic brush can quickly remove most of the resin to improve the grinding efficiency, and then use the sanding belt to grind to ensure the grinding quality.

[0098] In some embodiments, after the plugging is polished, the hole openings of the dense hole area 10 are first covered with copper plating, and then the dense hole area 10 and the dense routing area 20 are covered with 8-10um copper plating. The dense lines of the subsequent outer layer lines can be made using dynamic compensation.

[0099] The hole openings of the dense hole area 10 are covered with copper, that is, the pads are designed on the vias, and at the same time, no traces of the vias can be seen on the pads.

[0100] It can be understood that the dense hole area 10 and the dense wiring area 20 can be covered with 8um, 9um, 10um copper plating, etc.

[0101] In some embodiments, the protective film is a dry film.

[0102] Dry film is a polymer compound that can produce a stable substance attached to the board surface after being irradiated by ultraviolet rays, thereby achieving the function of blocking electroplating and etching. Among them, dry film has the advantages of easy operation, good stability and high precision.

[0103] In other embodiments, the protective film may also be a wet film, which is a photosensitive ink that is sensitive to ultraviolet rays and can be cured by ultraviolet rays.

[0104] In some embodiments, after the via plugging is polished, outer layer circuits are fabricated in the dense wiring area 20 , the line width and line spacing in the dense wiring area 20 are no greater than 4 mils, and the thickness-to-diameter ratio of the circuit board is greater than 8:1.

[0105] The line width and line spacing of the dense routing area 20 are not greater than 4 mil, that is, the line width and line spacing of the dense routing area 20 are less than or equal to 4 mil, which can be understood as the line of the dense routing area 20 is a thin line. For example, the line can be 4 / 4mil, 3.5 / 3.5mil, 3 / 3mil, 4 / 3.5mil, 3.5 / 3mil, etc. Among them, 1mil is equal to 25.4um.

[0106] The thickness-to-diameter ratio of the circuit board is above 8:1, that is, the circuit board is a circuit board with a high thickness-to-diameter ratio. The thickness-to-diameter ratio refers to the ratio of the thickness of the circuit board to the hole diameter. For example, if the thickness is 100mil and the hole diameter is 10mil, then the thickness-to-diameter ratio is 10:1. The larger the thickness-to-diameter ratio of the circuit board, the worse the deep plating ability, that is, the greater the difference between the copper thickness in the hole and the copper thickness at the hole mouth in one electroplating. The use of thin plating + selective plating can solve this problem well.

[0107] In other embodiments, the line width and line spacing of the dense routing area 20 are greater than 4 mils, and the thickness-to-diameter ratio of the circuit board is greater than 8:1; or, the line width and line spacing of the dense routing area 20 are not greater than 4 mils, and the thickness-to-diameter ratio of the circuit board is less than 8:1; or, the line width and line spacing of the dense routing area 20 are greater than 4 mils, and the thickness-to-diameter ratio of the circuit board is less than 8:1.

[0108] The circuit board manufacturing method provided in some embodiments of the present application includes the following steps: inner layer circuit, lamination, drilling, plasma, copper deposition, electroplating (thin plating), outer layer dry film, electroplating (selective plating), outer layer film stripping, back drilling, resin plugging, plugging grinding, cover copper deposition, cover electroplating, outer layer circuit, etc.

[0109] Please refer to Figure 4 The second aspect of the present application provides a circuit board. The circuit board is made by the circuit board manufacturing method described in the first aspect. The circuit board includes a dense hole area 10 and a dense wiring area 20, the holes of the dense hole area 10 are sequentially provided with thin plated hole copper 40 and selective plated hole copper 60, the hole openings of the dense hole area 10 are sequentially provided with bottom copper 30, thin plated surface copper 50 and selective plated surface copper 70, and the dense wiring area 20 is sequentially provided with bottom copper 30 and thin plated surface copper 50.

[0110] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that: include: Providing a circuit board, the circuit board comprising a dense hole area and a dense wiring area, and performing thin-film plating on the dense hole area and the dense wiring area; Covering the circuit board with a protective film, wherein the protective film is provided with a first window at a position corresponding to the dense hole area; Selectively plate the dense hole area through the first opening; Removing the protective film; The dense hole area is plugged with resin and then plugged and ground.

2. The method for manufacturing a circuit board according to claim 1, wherein: When the hole copper thickness of the dense hole area is designed to be X; During thin plating, the thickness of the thin-plated hole copper in the dense hole area is designed to be δ*X, the thickness of the thin-plated surface copper in the dense hole area is δ*X / T1, and the thickness of the thin-plated surface copper in the dense routing area is λ*δ*X / T1; During selective plating, the thickness of the selectively plated hole copper in the dense hole area is designed to be δ'*X, and the thickness of the selectively plated surface copper in the dense hole area is δ'*X / T2; After the protective film is removed, the height difference between the surface copper of the dense hole area and the surface copper of the dense routing area is △X=δ'*X / T2-(λ*δ*X / T1-δ*X / T1); Among them, T1 is the deep plating capability of thin plating, T2 is the deep plating capability of selective plating, δ+δ'=1 and δ<δ', λ is the difference coefficient between the surface copper thickness of the dense hole area and the surface copper thickness of the dense routing area under T1, and the unit of thickness is um.

3. The method for manufacturing a circuit board according to claim 2, wherein: δ and δ' are allocated according to the values ​​of T1 and T2 so that △X ≤ 8um.

4. The method for manufacturing a circuit board according to claim 1, wherein: The circuit board is also provided with an isolated hole. When the circuit board is covered with a protective film, the protective film is also provided with a second window at a position corresponding to the isolated hole. The isolated hole is selectively plated through the second window, wherein the second window is more than 4 mil larger than a single side of the isolated hole.

5. The method for manufacturing a circuit board according to claim 1, wherein: The circuit board is also provided with a non-dense wiring area. When the circuit board is covered with a protective film, the protective film is provided with a third window at a position corresponding to the non-dense wiring area, and the non-dense wiring area is selectively plated through the third window, wherein the third window is more than 2 mil larger than a single side of the non-dense wiring area.

6. The method for manufacturing a circuit board according to any one of claims 1 to 5, characterized in that: When grinding the plug hole, first use a ceramic brush to lower the height of the resin cap, and then grind it with an abrasive belt.

7. The method for manufacturing a circuit board according to any one of claims 1 to 5, characterized in that: After the plugging holes are ground, the hole openings of the dense hole area are first covered with copper plating, and then the dense hole area and the dense wiring area are covered with 8-10um copper plating.

8. The method for manufacturing a circuit board according to any one of claims 1 to 5, characterized in that: The protective film is a dry film.

9. The method for manufacturing a circuit board according to any one of claims 1 to 5, characterized in that: After the hole plugging is completed, the outer layer circuit is manufactured in the dense wiring area, the line width and line spacing of the dense wiring area are not greater than 4 mil, and / or the thickness-to-diameter ratio of the circuit board is greater than 8:

1.

10. A circuit board, characterized in that: The circuit board is made by the circuit board manufacturing method described in any one of claims 1 to 9, and the circuit board includes a dense hole area and a dense routing area, the holes in the dense hole area are sequentially provided with thin-plated hole copper and selectively plated hole copper, the hole mouths of the dense hole area are sequentially provided with bottom copper, thin-plated surface copper and selectively plated surface copper, and the dense routing area is sequentially provided with bottom copper and thin-plated surface copper.

Images