Semiconductor device, manufacturing method thereof and electronic equipment
By heating the source electrode and drain electrode during the semiconductor device manufacturing process, the problem of diffusion of impurity elements in metal oxide semiconductor materials is solved, and the stability and performance of the device are improved.
Patent Information
- Application Number
- CN202310941816.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-28
- Publication Date
- 2025-02-14
AI Technical Summary
There are defects such as oxygen vacancies in metal oxide semiconductor materials, which are prone to bond with elements such as hydrogen, resulting in changes in the performance of semiconductor materials and thus reducing device performance.
After forming the source electrode and the drain electrode of the transistor, a heat treatment process is introduced, so that impurity elements such as hydrogen elements are diffused away from these electrodes, thereby inhibiting their diffusion into the metal oxide semiconductor material forming channel.
The impurity elements in the source electrode and drain electrode are effectively reduced or eliminated through heating treatment, thereby improving the stability of the resulting device and preventing the impurity elements from affecting the performance of the channel material.
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Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to but are not limited to the field of design and manufacturing of semiconductor devices, and in particular to a semiconductor device and a manufacturing method thereof, and an electronic device. Background Art
[0002] Metal oxide semiconductor materials have excellent properties, such as high resistivity, low conductivity, and high carrier mobility, and are therefore often used as channel materials for transistors. However, due to defects such as oxygen vacancies in metal oxide semiconductor materials, they are easily combined with elements such as hydrogen, causing changes in the properties of the semiconductor materials, thereby reducing the performance of devices using metal oxide semiconductor channels. Summary of the invention
[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of protection of this application.
[0004] The embodiments of the present application provide a semiconductor device and a manufacturing method thereof, and an electronic device. The manufacturing method can effectively inhibit the diffusion of impurity elements in the source electrode and / or drain electrode of the transistor into the metal oxide semiconductor material channel, thereby improving the stability of the manufactured device.
[0005] An embodiment of the present application provides a method for manufacturing a semiconductor device, the method comprising:
[0006] forming a source electrode and a drain electrode of the transistor on the substrate;
[0007] Performing a heat treatment on the source electrode and / or the drain electrode so that at least part of the impurity elements in the source electrode and / or the drain electrode leave the source electrode and / or the drain electrode by diffusion, wherein the impurity elements include at least one of hydrogen and carbon;
[0008] After the heat treatment is completed, a channel of the transistor is formed, wherein a material of the channel includes a metal oxide semiconductor material.
[0009] In an exemplary embodiment of the present application, before the heat treatment, the content of hydrogen elements in the drain electrode may be a first concentration, and the content of hydrogen elements in the source electrode may be a second concentration;
[0010] After the heat treatment, the content of hydrogen in the drain electrode may be a third concentration, and the content of hydrogen in the source electrode may be a fourth concentration;
[0011] Among them, 0≤third concentration<first concentration, 0≤fourth concentration<second concentration.
[0012] In an exemplary embodiment of the present application, before the heat treatment, only one of the source electrode and the drain electrode contains hydrogen element, and the content of the hydrogen element may be a first concentration;
[0013] After the heating treatment, the content of hydrogen element in the source electrode or the drain electrode changes from the first concentration to a third concentration;
[0014] Among them, 0≤third concentration<first concentration.
[0015] In an exemplary embodiment of the present application, forming a source electrode and a drain electrode of a transistor on a substrate may include:
[0016] forming the source electrode, the drain electrode and an insulating layer between the source electrode and the drain electrode of the transistor on the substrate, wherein the insulating layer contains hydrogen element with a fifth concentration;
[0017] The step of heating the source electrode and / or the drain electrode comprises:
[0018] heat-treating the source electrode and / or the drain electrode and the insulating layer, and after the heat-treating, the content of hydrogen element in the insulating layer is a sixth concentration;
[0019] Among them, 0≤sixth concentration<fifth concentration.
[0020] In an exemplary embodiment of the present application, the temperature of the heating treatment may be not less than 250°C.
[0021] In an exemplary embodiment of the present application, the temperature of the heat treatment may be 250°C to 900°C.
[0022] In an exemplary embodiment of the present application, the heat treatment may be performed in a vacuum or in a gas atmosphere, and the gas atmosphere does not contain the impurity element.
[0023] In an exemplary embodiment of the present application, materials of the source electrode and the drain electrode may be independently selected from any one or more of TiN, W, Mo, Ni, TiAl, ITO and IZO.
[0024] An embodiment of the present application also provides a semiconductor device, and the semiconductor device is obtained by the manufacturing method provided in the embodiment of the present application.
[0025] In an exemplary embodiment of the present application, the concentration of hydrogen in the source electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 .
[0026] In an exemplary embodiment of the present application, the concentration of hydrogen in the drain electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 .
[0027] In an exemplary embodiment of the present application, the concentration of hydrogen element in the insulating layer between the source electrode and the drain electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 .
[0028] An embodiment of the present application further provides an electronic device, which includes the semiconductor device provided in the embodiment of the present application.
[0029] The manufacturing method of the semiconductor device in the embodiment of the present application introduces a heat treatment process after forming the source electrode and the drain electrode of the transistor and before forming the channel of the transistor. The heat treatment can cause at least part of the impurity elements such as hydrogen to diffuse away from the source electrode and / or the drain electrode where these impurity elements were originally located, thereby reducing or even eliminating the impurity elements in the source electrode and / or the drain electrode, thereby effectively inhibiting the impurity elements in the source electrode and / or the drain electrode from diffusing into the metal oxide semiconductor material to form the channel in the subsequent steps, thereby improving the stability of the manufactured device.
[0030] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.
[0032] Figure 1 A process flow chart of a method for manufacturing a semiconductor device provided for an exemplary embodiment of the present application;
[0033] Figure 2 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application after forming a first electrode pattern;
[0034] Figure 3 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device after forming an insulating layer, provided as an exemplary embodiment of the present application;
[0035] Figure 4A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application after forming a second electrode pattern;
[0036] Figure 5 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application after forming a through hole K;
[0037] Figure 6 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application when diffusion of impurity elements is performed;
[0038] Figure 7 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device after forming a gate electrode is provided as an exemplary embodiment of the present application. DETAILED DESCRIPTION
[0039] In order to make the purpose, technical solution and advantages of the present application more clear, the embodiments of the present application will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other arbitrarily without conflict.
[0040] The embodiments of the present application are not necessarily limited to the dimensions shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and the embodiments of the present application are not limited to the shapes or values shown in the drawings.
[0041] The ordinal numbers such as "first" and "second" in this application are provided to avoid confusion among constituent elements and do not indicate any order, quantity or importance.
[0042] In this application, for the sake of convenience, the words and phrases indicating the orientation or positional relationship such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on this application. The positional relationship of the constituent elements is appropriately changed according to the direction in which each constituent element is described. Therefore, it is not limited to the words and phrases described in the disclosure and can be appropriately replaced according to the circumstances.
[0043] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0044] In this application, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. In this application, a channel region refers to a region where current mainly flows.
[0045] In the present application, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged when using transistors with opposite polarities or when the current direction changes during circuit operation. Therefore, in the present application, unless otherwise specified, the "source electrode" and the "drain electrode" may be interchanged.
[0046] In the present application, "electrical connection" or "connection" includes the situation where the components are connected together through an element with some electrical function, such as electrical signal connection (coupled connection, such as coupled to), or physical direct connection. There is no particular limitation on "element with some electrical function" as long as it can transfer electrical signals between the connected components. Examples of "element with some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.
[0047] In the present application, "film" and "layer" can be interchanged. For example, "conductive layer" can be replaced by "conductive film" in some cases. Similarly, "insulating film" can be replaced by "insulating layer" in some cases.
[0048] In the present application, the concentration representing the hydrogen content may be understood as the average concentration obtained by testing data at multiple locations.
[0049] In the manufacturing process of metal oxide semiconductor channel transistors, impurity elements, such as hydrogen (H), are often inevitably introduced during the deposition of film layers such as source electrodes, drain electrodes, and insulating layers. If the transistor needs to undergo a high temperature process in subsequent processes, the introduced impurity elements, such as H, may diffuse into the metal oxide semiconductor material, causing significant changes in transistor performance and affecting the stability of the transistor throughout the entire manufacturing process.
[0050] An embodiment of the present application provides a method for manufacturing a semiconductor device.
[0051] Figure 1 The process flow chart of a method for manufacturing a semiconductor device provided by the exemplary embodiment of the present application is as follows. Figure 1 As shown, the manufacturing method comprises:
[0052] forming a source electrode and a drain electrode of a transistor on a substrate, wherein at least one of the source electrode and the drain electrode contains an impurity element, for example, a hydrogen element;
[0053] Performing a heating treatment on the source electrode and / or the drain electrode so that at least part of the impurity elements such as hydrogen in the source electrode and the drain electrode leave the source electrode and / or the drain electrode by diffusion;
[0054] After the heat treatment is completed, a channel of the transistor is formed, wherein a material of the channel includes a metal oxide semiconductor material.
[0055] The manufacturing method of the semiconductor device in the embodiment of the present application introduces a heat treatment process after forming the source electrode and the drain electrode of the transistor and before forming the channel of the transistor. The heat treatment can cause at least part of the impurity elements such as hydrogen to diffuse away from the source electrode and / or the drain electrode where these impurity elements were originally located, thereby reducing or even eliminating the impurity elements in the source electrode and / or the drain electrode, thereby effectively inhibiting the impurity elements in the source electrode and / or the drain electrode from diffusing into the metal oxide semiconductor material to form the channel in the subsequent steps, thereby improving the stability of the manufactured device.
[0056] In an exemplary embodiment of the present application, the impurity element may include at least one of a hydrogen element and a carbon element.
[0057] In an exemplary embodiment of the present application, performing heat treatment on the source electrode and / or the drain electrode includes: performing heat treatment on one or both of the source electrode and the drain electrode containing an impurity element.
[0058] In an exemplary embodiment of the present application, before the heat treatment, the content of hydrogen elements in the drain electrode may be a first concentration, and the content of hydrogen elements in the source electrode may be a second concentration;
[0059] After the heat treatment, the content of hydrogen in the drain electrode may be a third concentration, and the content of hydrogen in the source electrode may be a fourth concentration;
[0060] Among them, 0≤third concentration<first concentration, 0≤fourth concentration<second concentration.
[0061] In an exemplary embodiment of the present application, before the heat treatment, only one of the source electrode and the drain electrode contains hydrogen element, and the content of the hydrogen element may be a first concentration;
[0062] After the heating treatment, the content of hydrogen element in the source electrode or the drain electrode changes from the first concentration to a third concentration;
[0063] Among them, 0≤third concentration<first concentration.
[0064] In an exemplary embodiment of the present application, only one of the source electrode and the drain electrode may contain hydrogen elements. For example, only the source electrode may contain hydrogen elements, while the drain electrode may not contain hydrogen elements. During the heating treatment process, the hydrogen elements in the source electrode may diffuse into the drain electrode. Although the total concentration of hydrogen elements in the source electrode and the drain electrode may not be significantly reduced, the concentration in the source electrode will be significantly reduced. Even if the hydrogen elements will subsequently diffuse into the metal oxide semiconductor channel, the hydrogen content entering the metal oxide semiconductor channel will be significantly reduced.
[0065] In an exemplary embodiment of the present application, forming a source electrode and a drain electrode of a transistor on a substrate may include:
[0066] The source electrode, the drain electrode, and an insulating layer located between the source electrode and the drain electrode of the transistor are formed on the substrate, wherein the insulating layer contains hydrogen element with a fifth concentration.
[0067] In an exemplary embodiment of the present application, heating the source electrode and / or the drain electrode includes:
[0068] heat-treating the source electrode and / or the drain electrode and the insulating layer, and after the heat-treating, the content of hydrogen element in the insulating layer is a sixth concentration;
[0069] Among them, 0≤sixth concentration<fifth concentration.
[0070] In an exemplary embodiment of the present application, the temperature of the heating treatment may be not less than 250°C.
[0071] In an exemplary embodiment of the present application, the temperature of the heat treatment may be 250°C to 900°C, for example, 250°C, 300°C, 350°C, 400°C, 450°C, 500°C, 550°C, 600°C, 650°C, 700°C, 750°C, 800°C, 850°C or 900°C.
[0072] In an exemplary embodiment of the present application, the heat treatment may be performed in a vacuum or in a gas atmosphere, and the gas atmosphere does not contain the impurity element.
[0073] For example, the gas atmosphere includes but is not limited to inert gases such as nitrogen, oxygen, etc. and mixed gases thereof.
[0074] In an exemplary embodiment of the present application, the manufacturing method may further include: before performing the heat treatment, exposing at least a portion of the sidewalls of the source electrode, the drain electrode or the insulating layer containing impurity elements such as hydrogen by etching. This is conducive to the impurity elements such as hydrogen elements diffusing out of the source electrode, the drain electrode or the insulating layer where they were originally located through the exposed sidewalls during the subsequent heat treatment.
[0075] In an exemplary embodiment of the present application, at least a portion of the sidewall of the source electrode, the drain electrode or the insulating layer may be exposed by opening a through hole in the source electrode, the drain electrode or the insulating layer.
[0076] In an exemplary embodiment of the present application, the source electrode, the drain electrode, and the through hole of the insulating layer may be formed by one etching.
[0077] In an exemplary embodiment of the present application, forming a channel of the transistor may include:
[0078] A metal oxide semiconductor material is deposited on the inner wall of the through hole to form a semiconductor layer, and the semiconductor layer forms a channel of the transistor.
[0079] In an exemplary embodiment of the present application, the manufacturing method may further include: forming a gate electrode connected to the channel and forming a gate insulating layer between the channel and the gate electrode.
[0080] In an exemplary embodiment of the present application, forming a gate electrode connected to the channel and forming a gate insulating layer between the channel and the gate electrode may include:
[0081] A gate insulating layer covering the semiconductor layer is deposited on the inner wall of the through hole, and a gate electrode material is filled in the through hole to form the gate electrode located in the through hole.
[0082] In an exemplary embodiment of the present application, the manufacturing method does not include: performing ion implantation or other doping treatment on the source electrode and the drain electrode.
[0083] Figure 2 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application after forming a first electrode pattern; Figure 3 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device after forming an insulating layer, provided as an exemplary embodiment of the present application; Figure 4A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application after forming a second electrode pattern; Figure 5 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application after forming a through hole K; Figure 6 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device provided by an exemplary embodiment of the present application when diffusion of impurity elements is performed; Figure 7 A schematic longitudinal cross-sectional view of a method for manufacturing a semiconductor device after forming a gate electrode is provided as an exemplary embodiment of the present application.
[0084] like Figures 2 to 7 As shown, in an exemplary embodiment of the present application, the manufacturing method may include the following steps.
[0085] S10: depositing a first conductive layer on the substrate 10, and pattern-etching the first conductive layer to form a first electrode pattern 21, wherein the first electrode pattern 21 is used to form a first electrode 20 of the transistor, such as Figure 2 shown.
[0086] Exemplarily, step S10 may form one first electrode pattern 21 , or form a plurality of first electrode patterns 21 distributed in an array.
[0087] S20: depositing an insulating layer 30 covering the first electrode pattern 21 on the substrate 10, and planarizing the insulating layer 30 on the surface of the substrate 10 by a chemical mechanical polishing (CMP) process, such as Figure 3 shown.
[0088] S30: depositing a second conductive layer covering the insulating layer 30 on the substrate 10, and patterning and etching the second conductive layer to form a second electrode pattern 41, wherein the second electrode pattern 41 is used to form a second electrode 40 of the transistor, such as Figure 4 shown.
[0089] Exemplarily, the number of the second electrode patterns 41 is the same as the number of the first electrode patterns 21 , that is, step S30 may form one second electrode pattern 41 , or form a plurality of second electrode patterns 41 distributed in an array.
[0090] For example, the first electrode 20 may be a drain electrode, and the second electrode 40 may be a source electrode; or, the first electrode 20 may be a source electrode, and the second electrode 40 may be a drain electrode.
[0091] For example, Figure 4 As shown, the materials of the first conductive layer and the second conductive layer can be the same. In other embodiments, the materials of the first conductive layer and the second conductive layer can be different.
[0092] S40: Etching the patterned first conductive layer and the second conductive layer and the insulating layer 30 along the direction toward the substrate to form a through hole K penetrating the first electrode pattern 21 and the insulating layer 30 and extending to the second electrode pattern 41. The first electrode pattern 21 penetrated by the through hole K serves as the first electrode 20 of the transistor, and the second electrode pattern 41 penetrated by the through hole K serves as the second electrode 40 of the transistor. Figure 5 As shown. Exemplarily, the through hole K may extend in a direction perpendicular to the substrate 10, and the bottom surface of the through hole K exposes the first conductive layer.
[0093] S50: The substrate obtained in step S40 is subjected to a heating treatment at a temperature not lower than 250° C., for example, 250° C. to 900° C., so that at least part of the impurity elements, such as hydrogen, in the patterned first conductive layer and the second conductive layer and the insulating layer 30 are diffused out of the original film layer, such as Figure 6 shown.
[0094] Before the heat treatment, the first electrode 20 contains hydrogen elements of a first concentration, the second electrode 40 contains hydrogen elements of a second concentration, and the insulating layer 30 contains hydrogen elements of a fifth concentration; after the heat treatment, the hydrogen elements in the first electrode 20 are of a third concentration, the hydrogen elements in the second electrode 40 are of a fourth concentration, and the hydrogen elements in the insulating layer 30 are of a sixth concentration;
[0095] Among them, 0≤third concentration<first concentration, 0≤fourth concentration<second concentration, 0≤sixth concentration<fifth concentration.
[0096] Exemplarily, one or more of the patterned first conductive layer, the second conductive layer and the insulating layer 30 may introduce impurity elements, such as hydrogen and carbon, during the formation process, while the substrate 10 generally does not contain these impurity elements. Therefore, the impurity element content in the film layer containing impurity elements in the patterned first conductive layer, the second conductive layer and the insulating layer 30 is greater than the impurity element content in the substrate 10 and the surrounding environment, forming a concentration gradient; the impurity elements in the patterned first conductive layer, the second conductive layer and the insulating layer 30 can diffuse into the substrate 10 and the surrounding environment where the impurity element concentration is relatively low under the action of the concentration gradient.
[0097] Exemplarily, the heat treatment in step S50 may be performed in a vacuum or in a gas atmosphere that does not contain the impurity elements, and the gas atmosphere includes but is not limited to inert gases such as nitrogen, oxygen, and mixed gases thereof.
[0098] Exemplarily, heat treatment may be performed before opening the through hole K. However, opening the through hole K first and then performing heat treatment is beneficial for exposing more areas of the patterned first conductive layer and the second conductive layer and the insulating layer 30, so that impurity elements such as hydrogen can diffuse out more easily through these exposed areas during heat treatment.
[0099] S60: depositing a metal oxide semiconductor layer 50 and a gate insulating layer 60 on the inner wall of the through hole in sequence, and filling the through hole K with a gate electrode material to form a gate electrode 70 located in the through hole K. The metal oxide semiconductor layer 50 is located in a region between the first electrode 20 and the second electrode 40 to form a channel of the transistor, such as Figure 7 shown.
[0100] In an exemplary embodiment of the present application, materials of the source electrode and the drain electrode may be independently selected from any one or more of TiN, W, Mo, Ni, TiAl, ITO and IZO.
[0101] In an exemplary embodiment of the present application, the source electrode and the drain electrode may each independently be a single-layer structure or a multi-layer structure.
[0102] In an exemplary embodiment of the present disclosure, the material forming the insulating layer may be a low-K dielectric material, that is, a dielectric material with a dielectric constant K<3.9, including but not limited to silicon oxides, such as silicon dioxide (SiO 2 ) or other silicon-containing films, etc.
[0103] In an exemplary embodiment of the present application, the metal oxide semiconductor material may include any one or more of the following: indium gallium zinc oxide (InGaZnO), indium zinc oxide (InZnO), indium gallium oxide (InGaO), indium tin oxide (InSnO), indium gallium tin oxide (InGaSnO), indium gallium zinc tin oxide (InGaZnSnO), indium oxide (InO), tin oxide (SnO), zinc tin oxide (ZnSnO, ZTO), indium aluminum zinc gold oxide (InAlZnO), zinc oxide (ZnO), indium gallium silicon oxide (InGaSiO), indium tungsten oxide (ITO ... nWO, IWO), titanium oxide (TiO), zinc oxynitride (ZnON), magnesium zinc oxide (MgZnO), zirconium indium zinc oxide (ZrInZnO), hafnium indium zinc oxide (HfInZnO), tin indium zinc oxide (SnInZnO), aluminum tin indium zinc oxide (AlSnInZnO), silicon indium zinc oxide (SiInZnO), aluminum zinc tin oxide (AlZnSnO), gallium zinc tin oxide (GaZnSnO), zirconium zinc tin oxide (ZrZnSnO) and other materials, as long as the leakage current of the transistor can meet the requirements, the specific details can be adjusted according to the actual situation.
[0104] These materials have a wide band gap and a low leakage current. For example, when the metal oxide material is IGZO, the leakage current of the transistor is less than or equal to 10 -15 A, thereby improving the working performance of dynamic memory.
[0105] The material of the metal oxide semiconductor layer or channel only emphasizes the element type of the material, and does not emphasize the atomic proportion in the material and the film quality of the material.
[0106] In an exemplary embodiment of the present application, the electrode material of the gate electrode may be any one or more of the following different types of materials:
[0107] For example, it may contain metals such as tungsten, aluminum, titanium, copper, nickel, platinum, ruthenium, molybdenum, gold, iridium, rhodium, tantalum, cobalt, etc.; it may be a metal alloy containing the aforementioned metals;
[0108] It can also be metal oxides, metal nitrides, metal silicides, metal carbides, etc., such as metal oxide materials with high conductivity such as indium tin oxide ITO, indium zinc oxide IZO, indium oxide InO, etc.; for example, metal nitride materials such as titanium nitride (TiN), tantalum nitride (TaN), tungsten nitride (WN), titanium aluminum nitride (TiAlN), etc.;
[0109] Of course, it can also be polysilicon material; it can also be conductive material doped semiconductor material, such as conductively doped silicon, conductively doped germanium, conductively doped silicon germanium, etc.; other materials that embody conductivity, etc.
[0110] In an exemplary embodiment of the present application, the material of the gate insulating layer may include one or more layers of Low-K and / or High-K dielectric materials, or include two or more regions with different dielectric constants K. The characteristics of the gate insulating layer of the present application will be exemplarily described below.
[0111] Low-K materials, such as silicon oxide.
[0112] High-K materials, such as dielectric materials with a dielectric constant K ≥ 3.9. In some embodiments, oxides of one or more of hafnium, aluminum, lanthanum, zirconium, etc. may be included. For example, at least one of the following may be included but is not limited to: hafnium oxide (HfO 2 ), aluminum oxide (Al 2 O 3 ), hafnium aluminum oxide (HfAlO), hafnium lanthanum oxide (HfLaO), zirconium oxide (ZrO 2 ) and other high-K materials.
[0113] The substrate in the embodiment of the present application may be a supporting structure, such as a silicon substrate, or a supporting structure on which other film layers or functions or circuits are already distributed. The device involved in the inventive structure of the embodiment of the present application is arranged on the main surface of the supporting structure.
[0114] An embodiment of the present application also provides a semiconductor device, and the semiconductor device is obtained by the manufacturing method provided in the embodiment of the present application.
[0115] In an exemplary embodiment of the present application, in the manufactured semiconductor device product, the concentration of hydrogen element in the source electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 , for example, it can be 10 12 Number of atoms / cm 3 Up to 10 20 Number of atoms / cm 3 .
[0116] In an exemplary embodiment of the present application, in the manufactured semiconductor device product, the concentration of hydrogen element in the drain electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 , for example, it can be 10 12 Number of atoms / cm 3 Up to 10 20 Number of atoms / cm 3 .
[0117] In an exemplary embodiment of the present application, in the manufactured semiconductor device product, the concentration of hydrogen element in the insulating layer between the source electrode and the drain electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 , for example, it can be 10 12 Number of atoms / cm 3 Up to 10 20 Number of atoms / cm 3 .
[0118] In an exemplary embodiment of the present application, the semiconductor device may be a transistor or a semiconductor device including the transistor, for example, a memory, a display, etc.
[0119] In an exemplary embodiment of the present application, the transistor may be a storage transistor, a gate transistor, or a transistor for driving a display.
[0120] An embodiment of the present application further provides an electronic device, which includes the semiconductor device provided in the embodiment of the present application.
[0121] In an exemplary embodiment of the present application, the electronic device may be: a storage device, a smart phone, a computer, a tablet, an artificial intelligence device, a wearable device, or a mobile power supply, etc. The storage device may include a memory in a computer, etc., which is not limited here.
[0122] Although the embodiments disclosed in this application are as above, the contents described are only embodiments adopted to facilitate understanding of this application and are not intended to limit this application. Any technician in the field to which this application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this application, but the scope of protection of this application shall still be based on the scope defined in the attached claims.
Claims
1. A method for manufacturing a semiconductor device, characterized in that: include: forming a source electrode and a drain electrode of the transistor on the substrate; Performing a heat treatment on the source electrode and / or the drain electrode so that at least part of the impurity elements in the source electrode and / or the drain electrode leave the source electrode and / or the drain electrode by diffusion, wherein the impurity elements include at least one of hydrogen and carbon; After the heat treatment is completed, a channel of the transistor is formed, wherein a material of the channel includes a metal oxide semiconductor material.
2. The manufacturing method according to claim 1, characterized in that: Before the heating treatment, the content of hydrogen in the drain electrode is a first concentration, and the content of hydrogen in the source electrode is a second concentration; After the heat treatment, the content of hydrogen in the drain electrode is a third concentration, and the content of hydrogen in the source electrode is a fourth concentration; Among them, 0≤third concentration<first concentration, 0≤fourth concentration<second concentration.
3. The manufacturing method according to claim 1, characterized in that: Before the heating treatment, only one of the source electrode and the drain electrode contains hydrogen element, and the content of the hydrogen element is a first concentration; After the heating treatment, the content of hydrogen element in the source electrode or the drain electrode changes from the first concentration to a third concentration; Among them, 0≤third concentration<first concentration.
4. The manufacturing method according to claim 1, characterized in that: Forming a source electrode and a drain electrode of a transistor on a substrate includes: forming the source electrode, the drain electrode and an insulating layer between the source electrode and the drain electrode of the transistor on the substrate, wherein the insulating layer contains hydrogen element with a fifth concentration; The step of heating the source electrode and / or the drain electrode comprises: heat-treating the source electrode and / or the drain electrode and the insulating layer, and after the heat-treating, the content of hydrogen element in the insulating layer is a sixth concentration; Among them, 0≤sixth concentration<fifth concentration.
5. The manufacturing method according to any one of claims 1 to 4, characterized in that: The temperature of the heating treatment is not less than 250°C.
6. The manufacturing method according to claim 5, characterized in that: The temperature of the heating treatment is 250°C to 900°C.
7. The manufacturing method according to any one of claims 1 to 4, characterized in that: The heat treatment is performed in a vacuum or gas atmosphere, and the gas atmosphere does not contain the impurity element.
8. The manufacturing method according to any one of claims 1 to 4, characterized in that: The materials of the source electrode and the drain electrode are each independently selected from any one or more of TiN, W, Mo, Ni, TiAl, ITO and IZO.
9. A semiconductor device, characterized in that: Obtained by the production method according to any one of claims 1 to 8.
10. The semiconductor device according to claim 9, characterized in that The concentration of hydrogen in the source electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 and / or, The concentration of hydrogen in the drain electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 and / or, The concentration of hydrogen in the insulating layer between the source electrode and the drain electrode of the transistor is not higher than 10 20 Number of atoms / cm 3 .
11. An electronic device, characterized in that: Comprising the semiconductor device according to claim 9 or 10.