Method for reducing impurities in substrate, semiconductor structure and preparation method thereof
By setting an isolation structure on the substrate of the image sensor and forming a groove structure, the problems of dark current increase and silicon substrate damage caused by metal impurities introduced in the production process are solved, and the image quality of the image sensor and the protection of the substrate are improved. Effect of intensity.
Patent Information
- Application Number
- CN202310961406.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-01
- Publication Date
- 2025-02-14
AI Technical Summary
During the image sensor manufacturing process, due to metal impurities introduced by the production process, dark current increases, white pixels are formed, affecting the imaging quality, and the existing back damage and absorption methods will damage the silicon substrate and affect its strength.
By providing an isolation structure on the first surface of the substrate and forming a first dielectric layer on the second surface, a plurality of spaced first grooves are etched to expose the second surface of the substrate, and then forming a suction of the groove inside the groove. layer, adsorb impurities introduced in the production process.
It effectively reduces the number of impurities in the substrate, improves the performance of the semiconductor structure, avoids mechanical damage to the silicon substrate, reduces the number of white pixels, and improves the imaging quality of the image sensor.
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Figure CN119451253A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a method for reducing impurities in a substrate, a semiconductor structure and a preparation method thereof. Background Art
[0002] Image sensor is a widely used semiconductor device. Image sensors are generally divided into two categories: charge-coupled device (CCD) image sensor and complementary metal oxide semiconductor (CMOS) image sensor (CIS). CIS includes a pixel array formed by individual pixels on a silicon substrate wafer, and each pixel includes several devices such as a photodiode (PD) and a pixel transistor.
[0003] During the manufacturing process of CIS devices, metal impurities will be introduced due to the production process. Metal ions with charges will stay in the photodiode area for a long time, and the continuous accumulation of a large amount of charges will form dark current (Dark Current). For a pixel, when its dark current is greater than the photocurrent generated by capturing photons, the pixel will become a white pixel (White pixel, WP). White pixels are one of the key parameters affecting the performance of CIS devices. When the number of white pixels is large, the imaging quality of CIS will be seriously reduced.
[0004] In the related art, a method of introducing damage on the back of a silicon substrate wafer is usually used to capture metal impurities introduced in the production process to reduce the number of white pixels. However, the mechanical damage caused by the back damage impurity removal method will affect the strength of the silicon substrate wafer. In the subsequent production process, it will cause the silicon substrate wafer to warp or even break, reducing production efficiency. Summary of the invention
[0005] The present application provides a method for reducing impurities in a substrate, a semiconductor structure and a preparation method thereof, which are used to adsorb impurities introduced into the substrate by a production process, thereby improving the performance of the semiconductor structure containing the substrate.
[0006] In a first aspect, an embodiment of the present application provides a method for reducing impurities in a substrate, comprising:
[0007] Providing a substrate, wherein an isolation structure for defining an active area is disposed on a first surface of the substrate, and a first dielectric layer is formed on a second surface of the substrate, wherein the first surface and the second surface are disposed opposite to each other;
[0008] Etching a region of the first dielectric layer corresponding to the active region to form a plurality of spaced first grooves, wherein the first grooves expose the second surface of the substrate;
[0009] A gettering layer is formed, wherein the gettering layer at least covers an inner wall of the first groove.
[0010] The method for reducing impurities in a substrate provided in an embodiment of the present application first provides a substrate, an isolation structure for defining an active region is provided on the first surface of the substrate, a first dielectric layer is formed on the second surface of the substrate, and the first surface and the second surface are arranged oppositely; then, the region corresponding to the active region in the first dielectric layer is etched to form a plurality of spaced first grooves, the first grooves exposing the second surface of the substrate; finally, a gettering layer covering at least the inner wall of the first groove is formed. By forming the gettering layer at least on the inner wall of the first groove exposing the second surface of the substrate, since the gettering layer formed in each first groove is a small area, compared with the method of directly depositing a large area gettering layer on the second surface of the substrate, the gettering layer formed by the above method has a lower probability of falling off; in addition, by forming a gettering region between the gettering layer and the substrate, impurities introduced by the production process can be effectively adsorbed, and the performance of the semiconductor structure containing the substrate can be improved by reducing the impurities in the substrate.
[0011] In an optional embodiment, after forming the plurality of first grooves, the method further includes: etching the exposed second surface of the substrate to form a plurality of second grooves; and the gettering layer at least covers the inner walls of the second grooves.
[0012] In the above method, after forming a plurality of first grooves, the second surface of the exposed substrate is etched to form a plurality of second grooves, and the gettering layer at least covers the inner wall of the second groove. By continuing to etch the second surface of the substrate exposed by the first groove, a plurality of second grooves are formed, and a gettering layer is formed inside each second groove, so that the contact area between the gettering layer and the substrate is increased, and the gettering effect of the gettering layer on the substrate is further improved.
[0013] In an optional embodiment, the opening size of the second groove is the same as the opening size of the first groove.
[0014] The above method increases the contact area between the gettering layer covering the inner wall of the second groove and the substrate by setting the opening size of the second groove to be the same as the opening size of the first groove, thereby improving the gettering effect of the gettering layer on the substrate.
[0015] In an optional embodiment, the isolation structure is an inverted trapezoidal structure, the maximum distance between two opposite side walls of two adjacent isolation structures is a first size, the minimum distance is a second size, the opening size of the first groove is the first size, and the opening size of the second groove is the second size.
[0016] The above method sets the opening size of the first groove to the first size and the opening size of the second groove to the second size, and the first size is larger than the second size, so that the inner wall of the groove structure composed of the first groove and the second groove presents a stepped structure, thereby increasing the contact area between the impurity gettering layer covering the inner walls of the first groove and the second groove and the substrate, thereby improving the impurity gettering effect of the impurity gettering layer on the substrate.
[0017] In an optional embodiment, the depth of the second groove is greater than or equal to the depth of the first groove.
[0018] The above method increases the contact area between the gettering layer covered by the side of the inner wall of the second groove and the substrate by setting the depth of the second groove to be greater than or equal to the depth of the first groove, thereby improving the gettering effect of the gettering layer on the substrate.
[0019] In an optional embodiment, when the first dielectric layer is formed on the second surface of the substrate, the first dielectric layer is simultaneously formed on the first surface of the substrate; before etching the area in the first dielectric layer corresponding to the active area, it also includes: forming an insulating protective layer, wherein the insulating protective layer covers the first dielectric layer located on the first surface of the substrate.
[0020] The above method first forms a first dielectric layer on the first surface and the second surface of the substrate at the same time, and then forms an insulating protective layer on the first dielectric layer formed on the first surface of the substrate, and then etches the area corresponding to the active area in the first dielectric layer. By forming the first dielectric layer and the insulating protective layer stacked on the first surface of the substrate to form a protective layer on the first surface of the substrate, damage to the first surface of the substrate is avoided when the substrate is turned over, thereby achieving the purpose of protecting the substrate.
[0021] In an optional embodiment, before forming the first dielectric layer on the second surface of the substrate, the method further includes: performing a nitridation pretreatment on the second surface of the substrate using nitrogen-containing plasma.
[0022] The above method firstly performs a nitridation pretreatment on the second surface of the substrate using a nitrogen-containing plasma, and then forms a first dielectric layer on the second surface of the substrate. The nitrogen-containing plasma removes particles on the second surface of the substrate, and at the same time converts the silicon hydroxyl bonds on the second surface of the substrate into silicon nitrogen bonds, so as to enhance the adhesion between the subsequently formed first dielectric layer and the impurity-gettering layer and the substrate, and reduce the probability of the peeling phenomenon.
[0023] In a second aspect, an embodiment of the present application provides a method for preparing a semiconductor structure, providing a substrate, forming an epitaxial layer on the surface of the substrate, forming an isolation structure for defining an active area in the epitaxial layer, using the substrate and the epitaxial layer as a base, and performing an impurity gettering treatment on the base by the method for reducing impurities in the base as described in any one of the embodiments of the first aspect above.
[0024] In an optional embodiment, the preparation method further comprises: after performing the gettering treatment on the substrate, thinning the second surface of the substrate to remove the gettering layer and the first dielectric layer.
[0025] In a third aspect, an embodiment of the present application provides a semiconductor structure, which is prepared by using a preparation method as described in any one of the embodiments in the second aspect above.
[0026] For the technical effects that may be achieved by the method for preparing the semiconductor structure disclosed in the second aspect and the semiconductor structure disclosed in the third aspect, please refer to the technical effects that can be achieved by the first aspect or various possible schemes in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0028] Figure 1 A schematic diagram of a structure of a substrate formed by back-side damage gettering provided for related technology;
[0029] Figure 2 A schematic flow chart of a method for reducing impurities in a substrate provided in an embodiment of the present application;
[0030] Figure 3 A schematic diagram of the structure of a substrate provided in an embodiment of the present application;
[0031] Figure 4A schematic diagram of the structure of a chemical vapor deposition device for a substrate provided in an embodiment of the present application;
[0032] Figure 5 A schematic diagram of a structure for converting a silanol bond on a second surface of a substrate into a silanol bond provided in an embodiment of the present application;
[0033] Figure 6 A schematic diagram of the structure of another substrate provided in an embodiment of the present application;
[0034] Figure 7 A schematic structural diagram of a substrate provided in an embodiment of the present application, wherein a plurality of first grooves and second grooves are formed;
[0035] Figure 8 A schematic structural diagram of another substrate provided in an embodiment of the present application, wherein a plurality of first grooves and second grooves are formed;
[0036] Fig. 9 A schematic structural diagram of another substrate provided in an embodiment of the present application, wherein a plurality of first grooves and second grooves are formed;
[0037] Fig.10a A schematic diagram of the structure of another substrate provided in an embodiment of the present application;
[0038] Fig.10b A schematic diagram of the structure of another substrate provided in an embodiment of the present application;
[0039] Fig.10c A schematic diagram of the structure of another substrate provided in an embodiment of the present application;
[0040] Fig.11a A schematic structural diagram of a substrate without a gettering layer provided in an embodiment of the present application;
[0041] Fig.11b A schematic structural diagram of a substrate having a gettering layer provided in an embodiment of the present application;
[0042] Fig.12 A schematic diagram of the structure of a semiconductor structure provided in an embodiment of the present application. DETAILED DESCRIPTION
[0043] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.
[0044] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.
[0045] In the manufacturing process of image sensors, in order to reduce the metal impurities introduced in the production process, reduce the number of white pixels of the produced image sensors, and improve their imaging quality, the silicon wafer impurity removal method is usually used to capture the metal impurities introduced in the production process. In the semiconductor manufacturing process, the common impurity removal methods currently include external impurity removal and internal impurity removal. Among them, internal impurity removal is to use high-temperature rapid heat treatment to promote the nucleation and growth of oxygen precipitation in the substrate to capture metal impurities, such as annealing process; external impurity removal is to introduce stress or damage to the back side of the substrate, induce secondary defects after heat treatment, and attract metal impurities, such as back side damage impurity removal (Backside Damage) or poly-backside seal impurity removal (Poly-Backside Seal).
[0046] Figure 1 A schematic diagram of the structure of a substrate formed by back-side damage gettering is shown. Figure 1 As shown, the substrate 10 includes a substrate 11, an epitaxial layer 12, a crystal plane 13 and a crystal back 14, oxygen precipitates 15 and metal impurities 16 are formed in the substrate 10, and a pixel transistor 17 is arranged on the crystal plane 13 of the substrate 10, wherein the pixel transistor can be a MOS transistor, a triode, etc. Damage is introduced at the crystal back 14 of the substrate 10 to form a doping region 18 for capturing the metal impurities 16.
[0047] However, for internal doping, the temperature of the epitaxial layer of the substrate is high during the manufacturing process, which causes the oxygen precipitates in the substrate to be ablated, thereby weakening the doping ability of this method. At the same time, the annealing process takes a long time, which is prone to risks. For external doping, the back damage doping method requires the introduction of damage on the back of the substrate. This mechanical damage will seriously affect the strength of the substrate. In the subsequent high-temperature process, it is easy to cause fragmentation, reducing production efficiency.
[0048] Based on this, the embodiments of the present application provide a method for reducing impurities in a substrate, a semiconductor structure and a method for preparing the same, which adsorb impurities introduced into the substrate by the production process without damaging the substrate, thereby improving the performance of the semiconductor structure including the substrate.
[0049] The method for reducing impurities in a substrate provided by the present application is described below by means of specific embodiments. Figure 2 As shown, the method comprises the following steps:
[0050] Step S201, providing a substrate, disposing an isolation structure for defining an active area on a first surface of the substrate, and forming a first dielectric layer on a second surface of the substrate, wherein the first surface and the second surface are disposed opposite to each other;
[0051] It should be noted that the first dielectric layer in the embodiment of the present application can be a silicon dioxide (SiO2) layer, a silicon oxynitride (SiON) layer, an aluminum oxide (Al2O3) layer, or a dielectric layer formed by other oxides. The embodiment of the present application does not impose any restrictions on this.
[0052] In a specific implementation, for a base composed of a substrate and an epitaxial layer, a shallow trench isolation (STI) process may be used to process a first surface of the base to form a plurality of isolation structures on the first surface of the base, where the isolation structures are used to define an active area.
[0053] Preferably, the first surface 303 in the embodiment of the present application may be a crystal plane of the substrate 30 , and the second surface 304 may be a crystal back of the substrate 30 .
[0054] For example, Figure 3 A schematic diagram of the structure of a substrate provided in an embodiment of the present application is shown. Figure 3 As shown, the base 30 includes an epitaxial layer 301, a substrate 302, a first surface 303 and a second surface 304. Shallow trench isolation is performed on the first surface 303 of the base 30 to form a plurality of isolation structures 305 in the epitaxial layer 301. The isolation structures 305 define a plurality of active areas 306 in the epitaxial layer 301.
[0055] It should be noted that in the embodiment of the present application, the substrate 30 formed with a plurality of isolation structures 305 presents a tensile stress characteristic; each isolation structure 305 presents an inverted trapezoidal structure.
[0056] In an optional embodiment, nitrogen-containing plasma is used to perform a nitridation pretreatment on the second surface of the substrate, and a first dielectric layer is formed on the second surface of the substrate.
[0057] It should be noted that in the embodiment of the present application, a nitridation pretreatment step can be performed after any step before forming the first dielectric layer. For example, a substrate provided with an isolation structure can be first provided, and then the second surface of the substrate can be nitrided and pretreated, and finally the first dielectric layer is formed on the second surface of the substrate; or the second surface of the substrate can be nitrided and pretreated first, and then a substrate provided with an isolation structure can be provided, and finally the first dielectric layer is formed on the second surface of the substrate; the embodiment of the present application does not impose any restrictions on this.
[0058] In a specific implementation, ammonia gas can be introduced into a reaction chamber where the substrate is placed, so that the ammonia gas reacts with the silicon hydroxyl bonds on the second surface of the substrate to undergo a nitridation reaction, converting the silicon hydroxyl bonds into silicon nitrogen bonds, thereby achieving nitridation pretreatment of the second surface of the substrate.
[0059] For example, the substrate may be subjected to NH3 Plasma Treatment. Figure 4 As shown, it is a structural schematic diagram of a chemical vapor deposition device, which includes a first spray device (Sho-ped) 401, a plasma (Plasma) 402, a carrier ring (Carrier Ring) 403 and a second spray device (Showerhead, SHD) 404, wherein the first spray device 401 serves as a grounded reference electrode and also as a passage for the reaction gas to enter the reaction chamber; the carrier ring 403 is used to place the substrate 30; the second spray device 404 serves as an electrode for applying an external voltage and also as another passage for the reaction gas to enter the reaction chamber.
[0060] In one embodiment, the substrate 30 is placed on the gasket 403 so that the first surface of the substrate after placement is close to the second spray device 404, and the second surface of the substrate 30 after placement is close to the plasma 402, and the distance between the first surface of the substrate 30 and the second spray device 404 is set to 2mm-5mm to ensure that the first surface of the substrate 30 is not damaged during the operation. Then, ammonia (NH3) is input into the reaction chamber through the first spray device 401. After the ammonia passes through the plasma 402, it is excited to produce nitrogen-containing plasma. The nitrogen-containing plasma reacts with the silicon hydroxyl bonds on the second surface of the substrate 30 to nitride, so that the silicon hydroxyl bonds are converted into silicon nitrogen bonds, so as to enhance the adhesion of the second surface of the substrate 30 and reduce the probability of peeling. The chemical reactions occurring in this process are:
[0061] Si-OH+N→Si-NN-Si+H2O;
[0062] like Figure 5 , which is a schematic diagram of converting the silicon hydroxyl bonds on the second surface of the substrate into silicon nitrogen bonds.
[0063] In the above method, ammonia gas is first introduced into a reaction chamber where the substrate is placed, and the second surface of the substrate is pre-nitrided by using the generated nitrogen-containing plasma, and then a first dielectric layer is formed on the second surface of the substrate. The nitrogen-containing plasma removes particles on the second surface of the substrate, and at the same time, the silicon hydroxyl bonds on the second surface of the substrate are converted into silicon nitrogen bonds, so as to enhance the adhesion between the subsequently formed first dielectric layer and the impurity-gettering layer and the substrate, and reduce the probability of the peeling phenomenon.
[0064] In a specific implementation, for a base composed of a substrate and an epitaxial layer, a thin film deposition process may be used to process the second surface of the base to form a first dielectric layer on the second surface of the base.
[0065] For example, Figure 6 A schematic diagram of the structure of a substrate provided in an embodiment of the present application is shown. Figure 6 As shown, the base 30 includes an epitaxial layer 301, a substrate 302, a first surface 303 and a second surface 304. A plurality of isolation structures 305 are formed in the epitaxial layer 301 of the base 30. The isolation structures 305 define a plurality of active regions 306 in the epitaxial layer 301. A thin film is deposited on the second surface of the base 30 to form a first dielectric layer 601 on the side of the substrate 302 away from the epitaxial layer 301, i.e., the second surface 304.
[0066] Preferably, the thickness of the first dielectric layer in the embodiment of the present application may be 5 nanometers to 10 nanometers.
[0067] In an optional embodiment, when the first dielectric layer is formed on the second surface of the substrate, the first dielectric layer is simultaneously formed on the first surface of the substrate; then, an insulating protective layer is formed, the insulating protective layer covers the first dielectric layer located on the first surface of the substrate, and the area in the first dielectric layer corresponding to the active area is etched.
[0068] In a specific implementation, since it is necessary to perform operations such as etching on the second surface of the substrate, the substrate needs to be turned over. In order to avoid damage to the device layer provided on the first surface of the substrate during the turning process, before the etching operation is performed, a first dielectric layer can be formed simultaneously on the first surface and the second surface of the substrate, and then an insulating protective layer is stacked on the first dielectric layer on the first surface of the substrate to prevent damage to the first surface of the substrate during the substrate turning operation.
[0069] It should be noted that the insulating protection layer in the embodiment of the present application may be a silicon nitride (SiN) layer, a silicon oxynitride (SiON) layer, a silicon carbon nitride (SiCN) layer, etc., and the embodiment of the present application does not impose any limitation on this.
[0070] In the above method, by simultaneously forming the first dielectric layer on the first surface and the second surface of the substrate, the time required for the process of forming the dielectric layer on the surface of the substrate can be shortened, thereby improving the production efficiency; in addition, by continuing to form the insulating protective layer on the first dielectric layer formed on the first surface of the substrate, damage to the first surface of the substrate can be avoided when the substrate is turned over, thereby achieving the purpose of protecting the substrate.
[0071] In an optional embodiment, a first dielectric layer is formed on the second surface of the substrate, and a second dielectric layer is formed on the first surface of the substrate; then, an insulating protective layer is formed, the insulating protective layer covers the first dielectric layer located on the first surface of the substrate, and an area in the first dielectric layer corresponding to the active area is etched.
[0072] It should be noted that in the embodiment of the present application, dielectric layers are respectively formed on the first surface and the second surface of the substrate. Specifically, the second dielectric layer can be first formed on the first surface of the substrate, and then the first dielectric layer can be formed on the second surface of the substrate; or the first dielectric layer can be first formed on the second surface of the substrate, and then the second dielectric layer can be formed on the first surface of the substrate. The embodiment of the present application does not impose any restrictions on this.
[0073] The above method first forms a first dielectric layer on the second surface of the substrate, and forms a second dielectric layer on the first surface of the substrate, and then forms an insulating protective layer on the second dielectric layer formed on the first surface of the substrate, and then etches the area corresponding to the active area in the first dielectric layer. By forming the second dielectric layer and the insulating protective layer stacked on the first surface of the substrate to form a protective layer on the first surface of the substrate, damage to the first surface of the substrate is avoided when the substrate is turned over, thereby achieving the purpose of protecting the substrate.
[0074] Step S202, etching the area corresponding to the active area in the first dielectric layer to form a plurality of spaced first grooves, wherein the first grooves expose the second surface of the substrate;
[0075] In a specific implementation, an etching process is used to perform an etching operation on the region in the first dielectric layer corresponding to the multiple active regions on the first surface of the substrate, and the etching depth is the depth of the first dielectric layer, so that the multiple first grooves obtained after etching all expose the second surface of the substrate. For example, if the depth of the first dielectric layer is 6nm, the depth of the formed first groove is also 6nm; if the depth of the first dielectric layer is 8nm, the depth of the formed first groove is also 8nm; and so on.
[0076] For example, Figure 7 A schematic diagram of a structure of a substrate having a plurality of first grooves is shown. Figure 7As shown, a plurality of first grooves 701 are formed in the first dielectric layer 601 , and a side of each first groove 701 facing away from the opening exposes the second surface 304 of the substrate 30 , and the first grooves 701 correspond to the active areas 306 one by one.
[0077] Optional, such as Figure 7 As shown, the isolation structure 305 is an inverted trapezoidal structure, the maximum distance between two opposite side walls of two adjacent isolation structures is the first size L1, the opening size of the first groove 701 is equal to the first size L1, and the depth of the first groove 701 is equal to the thickness of the first dielectric layer 601. By setting the opening size of the first groove 701 to the maximum distance between two opposite side walls of two adjacent isolation structures, the contact area between the gettering layer formed on the inner wall of the first groove and the substrate is increased, thereby improving the gettering effect of the gettering layer.
[0078] In an optional embodiment, after forming the plurality of first grooves, the exposed second surface of the substrate is etched to form a plurality of second grooves; the gettering layer at least further covers the inner walls of the second grooves.
[0079] In a specific implementation, after forming a plurality of first grooves, the second surface of the substrate exposed by the first grooves is further etched to form a plurality of second grooves, and a gettering layer is formed so that the gettering layer at least covers the inner walls of the first grooves and the second grooves.
[0080] It should be noted that, in the embodiment of the present application, in the process of etching the first groove and the second groove, the first dielectric layer can be etched first to form the first groove, and after the etching of the first dielectric layer is completed, the exposed second surface of the substrate can be etched; the first dielectric layer and the second surface of the substrate can also be etched at the same time, that is, after etching the first dielectric layer to form any first groove, the exposed second surface of the substrate continues to be etched to form a second groove, and then the first dielectric layer is re-etched to form the next first groove, and the cycle is repeated until the etching is completed; the embodiment of the present application does not impose any restrictions on this.
[0081] In an optional embodiment, the opening size of the second groove is the same as the opening size of the first groove.
[0082] In a specific implementation, the opening size of the second groove obtained by etching is the same as the opening size of the first groove, so that the contact area between the gettering layer covering the inner wall of the second groove and the substrate is increased, thereby improving the gettering effect of the gettering layer on the substrate.
[0083] For example, Figure 8 A schematic diagram of a structure of a substrate having a plurality of first grooves and second grooves is shown. Figure 8As shown, the isolation structure 305 is an inverted trapezoidal structure, and the maximum distance between the two opposite side walls of two adjacent isolation structures is the first dimension L1; a plurality of first grooves 701 are formed in the first dielectric layer 601, and the opening dimension of the first groove 701 is equal to the first dimension L1, and the depth of the first groove 701 is H1, and H1 is equal to the thickness of the first dielectric layer 601; a second groove 801 is formed by etching the second surface exposed by the first groove 701, and the opening dimension of the second groove 801 is equal to the opening dimension of the first groove 701, and both are the first dimension L1. Thus, the inner wall of the groove structure composed of the first groove 701 and the second groove 801 is a smooth structure.
[0084] Optionally, the depth of the second groove formed in the embodiment of the present application is greater than or equal to the depth of the first groove.
[0085] like Figure 8 As shown, the depth of the first groove 701 is H1, and the depth of the second groove 801 is H2. By setting H2≥H1, the contact area between the gettering layer covered by the side of the inner wall of the second groove 801 and the substrate is increased, thereby further improving the gettering effect of the gettering layer on the substrate.
[0086] In the above method, after forming a plurality of first grooves, the second surface of the exposed substrate is etched to form a plurality of second grooves, and the gettering layer at least covers the inner wall of the second groove. By continuing to etch the second surface of the substrate exposed by the first groove to form a plurality of second grooves, and forming a gettering layer inside each second groove, compared with a structure in which only the first groove is formed and the gettering layer is formed on the inner wall of the first groove, the contact area between the gettering layer formed on the inner wall of the second groove and the substrate is larger, and the gettering effect of the gettering layer on the substrate can be further improved.
[0087] In an optional embodiment, the isolation structure is an inverted trapezoidal structure, the maximum distance between the two opposite side walls of two adjacent isolation structures is the first size, the minimum distance is the second size, the opening size of the first groove is the first size, and the opening size of the second groove is the second size.
[0088] In a specific implementation, the opening size of the second groove obtained by etching is smaller than the opening size of the first groove, that is, the opening size of the second groove is equal to the minimum distance between the two opposite side walls of the two adjacent isolation structures, and the opening size of the first groove is equal to the maximum distance between the two opposite side walls of the two adjacent isolation structures, so that the contact area between the impurity gettering layer covering the inner walls of the first groove and the second groove and the substrate is increased, thereby improving the impurity gettering effect of the impurity gettering layer on the substrate.
[0089] For example, Fig. 9 A schematic diagram of a structure of a substrate having a plurality of first grooves and second grooves is shown. Fig. 9 As shown, the isolation structure 305 is an inverted trapezoidal structure, the maximum distance between the two opposite side walls of two adjacent isolation structures is the first dimension L1, and the minimum distance is the second dimension L2; a plurality of first grooves 701 are formed in the first dielectric layer 601, the opening dimension of the first groove 701 is equal to the first dimension L1, the depth of the first groove 701 is H1, and H1 is equal to the thickness of the first dielectric layer 601; the second groove 901 is formed by etching the second surface exposed by the first groove 701, and the opening dimension of the second groove 901 is equal to the second dimension L2. Thus, the inner wall of the groove structure composed of the first groove 701 and the second groove 901 is a stepped structure.
[0090] Optionally, the depth of the second groove formed in the embodiment of the present application is greater than or equal to the depth of the first groove.
[0091] The above method increases the contact area between the gettering layer covered by the side of the inner wall of the second groove and the substrate by setting the depth of the second groove to be greater than or equal to the depth of the first groove, thereby improving the gettering effect of the gettering layer on the substrate.
[0092] like Fig. 9 As shown, the depth of the first groove 701 is H1, and the depth of the second groove 901 is H3. By setting H3≥H1, the contact area between the gettering layer covered by the side of the inner wall of the second groove 901 and the substrate is increased, thereby further improving the gettering effect of the gettering layer on the substrate.
[0093] The above method sets the opening size of the first groove to the first size, the opening size of the second groove to the second size, and the first size is larger than the second size, so that the inner wall of the groove structure composed of the first groove and the second groove is a stepped structure, thereby increasing the contact area between the gettering layer covering the inner walls of the first groove and the second groove and the substrate, thereby improving the gettering effect of the gettering layer on the substrate. In an optional embodiment, a plurality of grooves with different opening sizes can be formed on the second surface of the substrate, and a stepped structure with gradually decreasing opening sizes can be formed by etching to further increase the contact area and provide a gettering effect.
[0094] Step S203 , forming a gettering layer, wherein the gettering layer at least covers the inner wall of the first groove.
[0095] It should be noted that the gettering layer in the embodiment of the present application may be a silicon nitride layer or a polysilicon layer, and the embodiment of the present application does not impose any limitation on this.
[0096] Preferably, if the gettering layer in the embodiment of the present application is a silicon nitride layer, the silicon nitride layer exhibits compressive stress characteristics. Since the substrate formed with the isolation structure exhibits tensile stress characteristics and the silicon nitride layer exhibits compressive stress characteristics, the bending direction of the first surface of the substrate is consistent with the bending direction of the second surface of the substrate, so as to avoid the occurrence of peeling.
[0097] In a specific implementation, while the gettering layer is deposited on the inner wall of the first groove and the second groove, the gettering layer is also deposited on the side of the first dielectric layer away from the substrate after etching. The gettering layer deposited on the inner wall of the first groove and the second groove and the gettering layer deposited on the side of the first dielectric layer after etching constitute a complete gettering layer. Among them, since the adhesion between the above-mentioned gettering layer and the first dielectric layer is stronger than the adhesion between the gettering layer and the substrate, the part of the gettering layer deposited on the surface of the first dielectric layer can play a supporting role, reducing the probability of the gettering layer peeling off; in addition, the active area is arranged in an array, so the gettering area formed between the gettering layer and the substrate is the gettering area corresponding to the active area arranged in an array, so as to absorb the metal impurities diffused from the active area, reduce the time the metal impurities stay in the active area, and thus improve the performance of the semiconductor structure including the substrate.
[0098] For example, Fig.10a A schematic diagram of the structure of a substrate is shown, such as Fig.10a As shown, a first groove 701 is formed in the substrate 30 , and a gettering layer 1001 is deposited on the inner wall of each first groove 701 and on the surface of the first dielectric layer 601 .
[0099] For example, Fig.10b A schematic diagram of the structure of a substrate is shown, such as Fig.10b As shown, a first groove 701 and a second groove 801 are formed in the substrate 30 , and a gettering layer 1002 is deposited on the inner wall of the first groove 701 , the inner wall of the second groove 801 and the surface of the first dielectric layer 601 .
[0100] For example, Fig.10c A schematic diagram of the structure of a substrate is shown, such as Fig.10c As shown, a first groove 701 and a second groove 901 are formed in the substrate 30 , and a gettering layer 1003 is deposited on the inner wall of the first groove 701 , the inner wall of the second groove 901 and the surface of the first dielectric layer 601 .
[0101] The method for reducing impurities in a substrate provided in an embodiment of the present application first provides a substrate, an isolation structure for defining an active region is provided on the first surface of the substrate, a first dielectric layer is formed on the second surface of the substrate, and the first surface and the second surface are arranged oppositely; then, the region corresponding to the active region in the first dielectric layer is etched to form a plurality of spaced first grooves, the first grooves exposing the second surface of the substrate; finally, a gettering layer covering at least the inner wall of the first groove is formed. By forming the gettering layer at least on the inner wall of the first groove exposing the second surface of the substrate, since the gettering layer formed in each first groove is a small area, compared with the method of directly depositing a large area gettering layer on the second surface of the substrate, the gettering layer formed by the above method has a lower probability of falling off; in addition, by forming a gettering region between the gettering layer and the substrate, impurities introduced by the production process can be effectively adsorbed, and the performance of the semiconductor structure containing the substrate can be improved by reducing the impurities in the substrate.
[0102] In the specific implementation, Fig.11a , which is a schematic diagram of a structure of a substrate without a gettering layer, wherein an isolation structure 305 is provided in the substrate 30, and the isolation structure 305 is used to define an active area 306, and pixels for light sensing are provided in the active area 306. Fig.11a It can be seen that a large amount of metal impurities 110 are introduced into the substrate 30 . Since the metal impurities 110 carry charges, most of the metal impurities 110 will gather in the active region 306 , thereby reducing the performance of the semiconductor structure including the substrate.
[0103] like Fig.11b FIG. 1 is a schematic diagram of a structure of a substrate having a gettering layer formed thereon. Fig.11b It can be seen that a gettering layer is formed on the back of the substrate 30, and a gettering region 111 is formed between the gettering layer and the substrate. The density of interface traps in the gettering region 111 is relatively high, which is 10 11 ~10 12 cm -2 , which easily attracts electric charges, can therefore adsorb most of the metal impurities 110 gathered in the active region 306, so as to improve the performance of the semiconductor structure including the substrate; in addition, when the doping layer is a silicon nitride layer, since the thermal expansion coefficient of silicon nitride is close to that of the substrate, the probability of the substrate warping or even breaking is greatly reduced during the subsequent manufacturing process, thereby improving the production efficiency.
[0104] Based on the same concept, an embodiment of the present application also provides a method for preparing a semiconductor structure. Since the semiconductor structure is a semiconductor structure obtained by performing an impurity absorption treatment through the method for reducing impurities in the substrate in the embodiment of the present application, and the principle of solving the problem by the semiconductor structure is similar to that of the method, the implementation of the substrate semiconductor structure can refer to the implementation of the method, and the repeated parts will not be repeated.
[0105] The method for preparing the semiconductor structure includes: providing a substrate, forming an epitaxial layer on the surface of the substrate, forming an isolation structure for defining an active area in the epitaxial layer, using the substrate and the epitaxial layer as a base, and performing an impurity gettering treatment on the base by a method for reducing impurities in the base provided in any of the above embodiments.
[0106] In an optional embodiment, the preparation method further comprises: after performing the gettering treatment on the substrate, thinning the second surface of the substrate to remove the gettering layer and the first dielectric layer.
[0107] In a specific implementation, after the substrate is subjected to gettering treatment, the second surface of the substrate is thinned to remove the gettering layer and the first dielectric layer to avoid affecting the product composed of the semiconductor structure obtained by the preparation method.
[0108] Based on the same concept, an embodiment of the present application also provides a semiconductor structure. Since the semiconductor structure is a semiconductor structure obtained by the preparation method of the semiconductor structure in the embodiment of the present application, and the principle of solving the problem by the semiconductor structure is similar to that of the method, the implementation of the base semiconductor structure can refer to the implementation of the method, and the repeated parts will not be repeated.
[0109] like Fig.12 FIG. 1 is a schematic diagram of a semiconductor structure. The semiconductor structure 120 includes:
[0110] The pixel array 121 and the substrate 30 provided in the embodiment of the present application are subjected to a gettering treatment by a method for reducing impurities in the substrate. The pixel array 1201 is disposed on an active region of the substrate 30 .
[0111] The pixel array 121 is composed of pixels 1211 distributed in an array, and the pixels 1211 are used to sense light and generate photocurrent.
[0112] Preferably, the semiconductor structure in the embodiment of the present application may be an image sensor, such as a CMOS image sensor.
[0113] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.
[0114] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.
Claims
1. A method for reducing impurities in a substrate, characterized in that: include: Providing a substrate, wherein an isolation structure for defining an active area is disposed on a first surface of the substrate, and a first dielectric layer is formed on a second surface of the substrate, wherein the first surface and the second surface are disposed opposite to each other; Etching a region of the first dielectric layer corresponding to the active region to form a plurality of spaced first grooves, wherein the first grooves expose the second surface of the substrate; A gettering layer is formed, wherein the gettering layer at least covers an inner wall of the first groove.
2. The method according to claim 1, characterized in that After forming the plurality of first grooves, the method further includes: etching the exposed second surface of the substrate to form a plurality of second grooves; and the gettering layer at least covers the inner walls of the second grooves.
3. The method according to claim 2, characterized in that The opening size of the second groove is the same as the opening size of the first groove.
4. The method according to claim 2, characterized in that The isolation structure is an inverted trapezoidal structure, the maximum distance between two opposite side walls of two adjacent isolation structures is a first size, the minimum distance is a second size, the opening size of the first groove is the first size, and the opening size of the second groove is the second size.
5. The method according to any one of claims 2 to 4, characterized in that: The depth of the formed second groove is greater than or equal to the depth of the first groove.
6. The method according to claim 1, characterized in that When forming the first dielectric layer on the second surface of the substrate, simultaneously forming the first dielectric layer on the first surface of the substrate; Before etching the area in the first dielectric layer corresponding to the active area, the method further includes: forming an insulating protection layer, wherein the insulating protection layer covers the first dielectric layer located on the first surface of the substrate.
7. The method according to any one of claims 1 to 4, characterized in that: Before forming the first dielectric layer on the second surface of the substrate, the method further includes: performing a nitridation pretreatment on the second surface of the substrate using nitrogen-containing plasma.
8. A method for preparing a semiconductor structure, characterized in that: A substrate is provided, an epitaxial layer is formed on the surface of the substrate, an isolation structure for defining an active area is formed in the epitaxial layer, the substrate and the epitaxial layer are used as a base, and the base is subjected to a doping treatment by the method for reducing impurities in a base as described in any one of claims 1 to 7.
9. The preparation method according to claim 8, characterized in that: The preparation method further comprises: after performing the gettering process on the substrate, thinning the second surface of the substrate to remove the gettering layer and the first dielectric layer.
10. A semiconductor structure, characterized in that: The semiconductor structure is prepared by the preparation method as claimed in claim 8 or 9.