3C-SiC epitaxial layer, preparation method thereof and semiconductor device
By etching and growing the buffer layer on a 4H-SiC or 6H-SiC substrate, the problem of high defect density of the 3C-SiC epitaxial layer is solved, and the preparation of a high-quality 3C-SiC epitaxial layer is realized. It is suitable for high-voltage semiconductor devices and other fields, and has a process window suitable for mass production.
Patent Information
- Application Number
- CN202411603543.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-11
- Publication Date
- 2025-03-28
AI Technical Summary
In the prior art, the defect density of the 3C-SiC epitaxial layer is high and the epitaxial quality is low, especially the twin defect DPB, which leads to the inability to meet the demand, and the growth strips are harsh, the process window is narrow, and mass production cannot be achieved.
A method of preparing a 3C-SiC epitaxial layer is employed, including etching on a 4H-SiC or 6H-SiC substrate to form a first buffer layer, and then heteroepitically growing the 3C-SiC buffer layer at a second growth temperature, and finally epitaxially growing the 3C-SiC epitaxial layer on the 3C-SiC buffer layer.
It achieves high crystal quality and low surface defects of the 3C-SiC epitaxial layer, extends the service life of semiconductor devices, improves wafer utilization, and enables semiconductor devices to be widely used in high voltage and other fields, and has a wide process window, which is suitable for industrial mass production.
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Figure CN119710914A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor materials, and in particular to a 3C-SiC epitaxial layer and a preparation method thereof, and a semiconductor device. Background Art
[0002] 3C-SiC is the only cubic crystal among many silicon carbide crystal forms, also known as β-SiC, and is an important form of many silicon carbide. Compared with 4H-SiC and 6H-SiC, 3C-SiC has higher advantages in electron mobility and high saturated electron drift velocity, especially the high electron mobility makes it more advantageous in the application of MOSFET devices. At the same time, 3C-SiC also has excellent properties such as high breakdown voltage, good thermal conductivity, high hardness, wide bandgap, high temperature resistance, and radiation resistance. Therefore, it has great potential in electronics, optoelectronics, sensors, and applications under extreme conditions, which has promoted the development and innovation of related technologies and demonstrated broad application potential in many fields.
[0003] However, due to the large difference between the lattice constant of Si and that of SiC (about 20%), as well as the large thermal expansion coefficient (8%), the defect density of the 3C-SiC epitaxial layer on the silicon substrate is relatively high and the epitaxial quality is low, especially the twin defect DPB. In order to reduce the lattice mismatch and improve the crystal quality, 6H-SiC, 15R-SiC or 4H-SiC with (0001) plane is currently used as a substrate to grow a 3C-SiC epitaxial layer to reduce the defect density. Although the quality of the 3C-SiC epitaxial layer has improved, the existing crystal quality and surface defect conditions still cannot meet the demand, and the growth strip is very harsh, the process window is relatively narrow, and mass production is impossible. In particular, the crystal quality of thick-film 3C-SiC epitaxial wafers is even worse, and the problem of high surface defect density seriously restricts the development of 3C-SiC devices. Summary of the invention
[0004] The present invention aims to solve one of the technical problems in the related art at least to a certain extent. To this end, one object of the present invention is to provide a method for preparing a 3C-SiC epitaxial layer, wherein the 3C-SiC epitaxial layer prepared by the method has good crystal quality or a wide process window.
[0005] In one aspect of the present invention, the present invention provides a method for preparing a 3C-SiC epitaxial layer. According to an embodiment of the present invention, the method for preparing a 3C-SiC epitaxial layer includes: S100: providing a SiC substrate and placing the SiC substrate in a reaction chamber, wherein the SiC substrate is a 4H-SiC substrate or a 6H-SiC substrate; S200: raising the temperature of the reaction chamber from an initial temperature to an etching temperature; S300: etching the surface of the SiC substrate at the etching temperature; S400: raising the temperature of the reaction chamber from the etching temperature to a first growth temperature; S500: at the first growth temperature, etching the surface of the SiC substrate after etching A first buffer layer is obtained by homoepitaxial growth on the surface, wherein the first buffer layer is a 4H-SiC buffer layer or a 6H-SiC buffer layer; S600: lowering the temperature of the reaction chamber from the first growth temperature to a second growth temperature, and introducing a carbon source into the reaction chamber; S700: at the second growth temperature, heteroepitaxially growing the first buffer layer on the surface away from the SiC substrate to obtain a 3C-SiC buffer layer; S800: at the second growth temperature, epitaxially growing the 3C-SiC buffer layer on the surface away from the SiC substrate to obtain a 3C-SiC epitaxial layer.
[0006] According to an embodiment of the present invention, the 3C-SiC epitaxial layer prepared by the above method has higher crystal quality and lower surface defects, which is beneficial to prolonging the service life of semiconductor devices and improving the utilization rate of wafers; a thicker 3C-SiC epitaxial layer can be prepared, and the film thickness can reach 50-150μm, so that it is widely used in semiconductor devices (such as high-voltage semiconductor devices); the above-mentioned preparation method of the 3C-SiC epitaxial layer has a wider process window, which is conducive to industrial mass production.
[0007] According to an embodiment of the present invention, the etching further includes: S310: introducing hydrogen into the reaction chamber, and performing a first etching on the surface of the SiC substrate under the action of the hydrogen; S320: introducing the hydrogen and hydrogen chloride into the reaction chamber, and performing a second etching on the SiC substrate under the action of the hydrogen and the hydrogen chloride.
[0008] According to an embodiment of the present invention, in step S600, at least one of the following conditions is met: the second growth temperature is 1370-1430°C; the cooling time from the first growth temperature to the second growth temperature is 3-5min; the holding time of the second growth temperature is 5-10min; the carbon source is introduced during the holding process, and the flow range of the carbon source is 30-50sccm.
[0009] According to an embodiment of the present invention, the conditions for growing the 3C-SiC buffer layer meet at least one of the following conditions: a first mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, and the flow rate of the hydrogen is 80-130 L / min; the flow rate ratio of the silicon source to the hydrogen is 0.06%-0.09%; the atomic number ratio of carbon atoms to silicon atoms in the first mixed gas is 0.6-1; the atomic number ratio of chlorine atoms to silicon atoms in the first mixed gas is 3-5.
[0010] According to an embodiment of the present invention, the thickness of the 3C-SiC buffer layer is 0.5-1 μm, and the doping concentration of the 3C-SiC buffer layer is 2E17-1E18 cm -3 .
[0011] According to an embodiment of the present invention, the conditions for growing the 3C-SiC epitaxial layer meet at least one of the following: a second mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, and the flow rate of the hydrogen is 80-130 L / min; the flow rate ratio of the silicon source to the hydrogen is 0.16%-0.34%; the atomic number ratio of carbon atoms to silicon atoms in the second mixed gas is 0.8-1.2; the atomic number ratio of chlorine atoms to silicon atoms in the second mixed gas is 3-8; the growth rate of the 3C-SiC epitaxial layer is 30-80 μm / h.
[0012] According to an embodiment of the present invention, the thickness of the 3C-SiC epitaxial layer is 50-150 μm, and the doping concentration of the 3C-SiC buffer layer is 8E14-5E16 cm -3 .
[0013] According to an embodiment of the present invention, in the first etching, at least one of the following conditions is met: the flow rate of the hydrogen is 80-130 L / min; the etching temperature is 1550-1620° C.; and the time of the first etching is 3-5 min.
[0014] According to an embodiment of the present invention, in the second etching, at least one of the following conditions is met: the flow rate of the hydrogen is 80-130 L / min; the flow rate of the hydrogen chloride is 20-150 sccm; the etching temperature is 1550-1620° C.; and the time of the second etching is 5-10 min.
[0015] According to an embodiment of the present invention, in step S200, the temperature rising from the initial temperature to the etching temperature satisfies at least one of the following conditions: the initial temperature is 700-900°C; the heating rate from the initial temperature to the etching temperature is 50-70°C / min, and the heating time is 8-12min; the holding time of the etching temperature is 2-4min.
[0016] According to an embodiment of the present invention, in step S400, the heating from the etching temperature to the first growth temperature satisfies at least one of the following conditions: the first growth temperature is 1580-1650°C; the heating time from the etching temperature to the first growth temperature is 2-4 minutes; the holding time of the first growth temperature is 2 to 4 minutes.
[0017] According to an embodiment of the present invention, the conditions for growing the first buffer layer meet at least one of the following: a third mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, and the flow rate of the hydrogen is 80-130 L / min; the flow rate ratio of the silicon source to the hydrogen is 0.05%-0.075%; the atomic number ratio of carbon atoms to silicon atoms in the third mixed gas is 0.4-0.8; the atomic number of chlorine atoms to silicon atoms in the third mixed gas is 3-5.
[0018] According to an embodiment of the present invention, the thickness of the first buffer layer is 0.5-1 μm, and the doping concentration of the first buffer layer is 1E18-5E18 cm -3 .
[0019] In another aspect of the present invention, the present invention provides a 3C-SiC epitaxial layer. According to an embodiment of the present invention, the 3C-SiC epitaxial layer is prepared by the preparation method described above. The 3C-SiC epitaxial layer of the present invention has high crystal quality and low surface defects, which is beneficial to prolong the service life of semiconductor devices and improve the utilization rate of wafers; a thicker 3C-SiC epitaxial layer can be prepared, so that semiconductor devices (such as high-voltage semiconductor devices) are widely used; the preparation method of the above-mentioned 3C-SiC epitaxial layer has a wide process window, which is conducive to industrial mass production.
[0020] According to an embodiment of the present invention, the thickness of the 3C-SiC epitaxial layer is 50-150 μm.
[0021] In another aspect of the present invention, the present invention provides a semiconductor device. According to an embodiment of the present invention, the semiconductor device includes the 3C-SiC epitaxial layer described above. As a result, the semiconductor device has a longer service life, better performance, a wider application field, and higher production efficiency. It can be understood by those skilled in the art that the semiconductor device has all the features and advantages of the 3C-SiC epitaxial layer preparation method described above, and no further elaboration is given here. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0023] Figure 1 is a flow chart of preparing a 3C-SiC epitaxial layer in one embodiment of the present invention;
[0024] Figure 2 is a flow chart of preparing a 3C-SiC epitaxial layer in another embodiment of the present invention;
[0025] Figure 3 is a flow chart of preparing a 3C-SiC epitaxial layer in another embodiment of the present invention;
[0026] Figure 4 is a schematic diagram of a triangular defect in a 3C-SiC epitaxial layer in Example 2;
[0027] Figure 5 This is an optical magnified image of a triangular defect on the surface of the 3C-SiC epitaxial layer in Example 2;
[0028] Figure 6 is an AFM surface morphology image of the 3C-SiC epitaxial layer in Example 2;
[0029] Figure 7 is a film thickness curve diagram of the 3C-SiC epitaxial layer in Example 2;
[0030] Figure 8 It is a carrier concentration curve diagram of the 3C-SiC epitaxial layer in Example 2.
[0031] Reference numerals: SiC substrate 100 ; first buffer layer 200 ; 3C—SiC buffer layer 300 ; 3C—SiC epitaxial layer 400 . DETAILED DESCRIPTION
[0032] The scheme of the present invention will be explained below in conjunction with the embodiments. It will be appreciated by those skilled in the art that the following embodiments are only used to illustrate the present invention and should not be considered as limiting the scope of the present invention. Where specific techniques or conditions are not indicated in the embodiments, the techniques or conditions described in the literature in this area or the product specifications are used. The reagents or instruments used are not indicated by the manufacturer and are all conventional products that can be obtained commercially.
[0033] The present invention is described below with reference to specific embodiments. It should be noted that these embodiments are merely illustrative and do not limit the present invention in any way.
[0034] In one aspect of the present invention, the present invention provides a method for preparing a 3C-SiC epitaxial layer. Figure 1 and Figure 2 , the preparation method of 3C-SiC epitaxial layer comprises:
[0035] S100 : providing a SiC substrate 100 , and placing the SiC substrate 100 in a reaction chamber, wherein the SiC substrate 100 is a 4H-SiC substrate or a 6H-SiC substrate.
[0036] In some embodiments of the present invention, a 4H-SiC substrate or a 6H-SiC substrate with a crystal angle of 2°-8° in the <11-20> direction may be used, wherein the size of the substrate may be flexibly designed according to the semiconductor device involved, for example, a 4-inch or 6-inch SiC substrate may be used.
[0037] The SiC substrate may be placed in a graphite tray and then introduced into a reaction chamber. In some embodiments, the reaction chamber may be a growth chamber of a chemical vapor deposition (CVD) epitaxial furnace.
[0038] S200: raising the temperature of the reaction chamber from the initial temperature to the etching temperature.
[0039] According to some embodiments of the present invention, the initial temperature may be the standby temperature of the CVD device, the initial temperature is 700-900°C, and the etching temperature is 1550-1620°C, such as 1550°C, 1560°C, 1570°C, 1580°C, 1590°C, 1600°C, 1610°C, 1620°C, etc. At the above temperatures, good etching of the SiC substrate can be effectively achieved, and a SiC substrate with a smoother surface and better crystal quality can be obtained, which is conducive to the good growth of the thickness buffer layer and reduces the crystal defects generated during the growth process.
[0040] According to some embodiments of the present invention, the heating rate from the initial temperature to the etching temperature is 50-70°C / min, and the heating time is 8-12min. At the above rate, the temperature can be raised relatively smoothly and stably without causing adverse effects on the SiC substrate due to sudden temperature changes.
[0041] According to some embodiments of the present invention, the etching temperature is maintained for 2 to 4 minutes. After a few minutes of maintaining the temperature, the temperature in the reaction chamber can reach a more stable state, which is beneficial to the subsequent etching effect.
[0042] According to some embodiments of the present invention, when the temperature is raised to the etching temperature, hydrogen is passed into the reaction chamber to reach the set pressure of the reaction chamber, and argon is introduced. In some specific embodiments, the pressure of the reaction chamber is set between 40-150mbar, and hydrogen is introduced into the cavity of the reaction chamber at a flow rate of 80-130L / min during the process; argon is used as a cyclone gas with a flow rate of 0.5-1.5L / min.
[0043] S300 : etching the surface of the SiC substrate 100 at an etching temperature.
[0044] According to some embodiments of the present invention, referring to Figure 3 The etching in this step may include two steps of etching. Specifically, the etching includes:
[0045] S310: hydrogen is introduced into the reaction chamber, and the surface of the SiC substrate is first etched under the action of hydrogen.
[0046] In some embodiments of the present invention, in the first etching, at least one of the following conditions is met: the flow rate of hydrogen is 80-130 L / min, such as 80 L / min, 90 L / min, 100 L / min, 110 L / min, 120 L / min, 130 L / min, etc.; the etching temperature is 1550-1620°C, such as 1550°C, 1560°C, 1570°C, 1580°C, 1590°C, 1600°C, 1610°C, 1620°C, etc.; the time of the first etching is 3-5 min, such as 3 min, 3.5 min, 4 min, 4.5 min, 5 min, etc. Under the above conditions, the surface of the SiC substrate can be preliminarily and effectively etched to reduce surface defects.
[0047] S320: introducing hydrogen and hydrogen chloride into the reaction chamber, and performing a second etching on the SiC substrate under the action of hydrogen and hydrogen chloride.
[0048] In some embodiments of the present invention, in the second etching, at least one of the following conditions is met: the flow rate of hydrogen is 80-130 L / min, such as 80 L / min, 90 L / min, 100 L / min, 110 L / min, 120 L / min, 130 L / min, etc.; the flow rate of hydrogen chloride is 20-150 sccm, such as 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90sccm, 100sccm, 110sccm, 120sccm, 130sccm, 140sccm, 150sccm, etc.; the etching temperature is 1550-1620°C, such as 1550°C, 1560°C, 1570°C, 1580°C, 1590°C, 1600°C, 1610°C, 1620°C, etc.; the second etching time is 5-10min, such as 5min, 6min, 7min, 8min, 9min, 10min, etc. Under the above conditions, the surface of the SiC substrate can be further effectively etched, the surface defects can be further reduced, an excellent growth substrate can be provided for subsequent growth, the quality of the grown crystals can be improved, and the defects of the grown crystals can be reduced.
[0049] In some embodiments of the present invention, the surface of the SiC substrate can be etched more effectively through two-step etching, further reducing defects such as surface dislocations and stacking faults, providing an excellent growth substrate for subsequent growth, improving the quality of the grown crystals, and reducing the defects of the grown crystals; moreover, the two-step etching can use the same etching temperature, so there is no need to adjust the temperature between the two steps of etching, thereby simplifying the process flow.
[0050] S400: raising the temperature of the reaction chamber from the etching temperature to the first growth temperature;
[0051] According to some embodiments of the present invention, in step S400, the temperature rise from the etching temperature to the first growth temperature satisfies at least one of the following conditions: the first growth temperature is 1580-1650°C, such as 1580°C, 1590°C, 1600°C, 1610°C, 1620°C, 1630°C, 1640°C, 1650°C, etc.; the temperature rise time from the etching temperature to the first growth temperature is 2-4min; the holding time of the first growth temperature is 2-4min. Thus, the temperature can be raised relatively smoothly and stably at the above rate, and the SiC substrate will not be adversely affected by the sudden temperature change; the temperature in the reaction chamber can reach a more stable state after holding the temperature for a few minutes, which is conducive to improving the quality of subsequent crystal growth; the above first growth temperature can grow a first buffer layer with better crystal quality and fewer crystal defects.
[0052] S500: homoepitaxially growing a first buffer layer 200 on the surface of the etched SiC substrate 100 at a first growth temperature, wherein the first buffer layer 200 is a 4H-SiC buffer layer or a 6H-SiC buffer layer;
[0053] According to some embodiments of the present invention, during the growth of the first buffer layer, a third mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, wherein the flow rate of hydrogen is 80 L / min-130 L / min, such as 80 L / min, 90 L / min, 100 L / min, 110 L / min, 120 L / min, 130 L / min, etc.; the flow rate ratio of the silicon source to the hydrogen is 0.05%-0.075%, such as 0.05%, 0.055%, 0.06%, 0.06 5%, 0.07%, 0.0755; the atomic ratio of carbon atoms to silicon atoms in the third mixed gas C / Si is 0.4-0.8, such as 0.4, 0.5, 0.6, 0.7, 0.8, etc.; the atomic ratio of chlorine atoms to silicon atoms in the third mixed gas Cl / Si is 3-5, such as 3, 3.5, 4, 4.5, 5, etc.; the first growth temperature is 1580-1650°C, such as 1580°C, 1590°C, 1600°C, 1610°C, 1620°C, 1630°C, 1640°C, 1650°C, etc. Under the above conditions, a first buffer layer with excellent crystal quality can be grown, wherein the introduction of hydrogen chloride can prevent the formation of silicon droplets during the growth of the first buffer.
[0054] In some embodiments, the silicon source may include but is not limited to TCS and / or SiH4, the carbon source may include but is not limited to ethylene and / or propane, and the N-type doping source may include but is not limited to nitrogen and / or ammonia.
[0055] According to some embodiments of the present invention, the thickness of the first buffer layer is 0.5-1 μm, such as 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1 μm, etc., and the doping concentration of the first buffer layer is 1E18-5E18 cm -3 , for example, 1E18cm -3 、2E18cm -3 、3E18cm -3 、4E18cm -3 、5E18cm -3 The doping concentration of the first buffer layer is lower than the doping concentration of the SiC substrate, so that the ion doping concentration is closer to the 3C-SiC buffer layer and the 3C-SiC epitaxial layer to be grown later, that is, the doping concentration of the first buffer layer plays a good role of concentration transition, which is more conducive to improving the crystal growth quality of the 3C-SiC buffer layer and the 3C-SiC epitaxial layer.
[0056] In some embodiments of the present invention, the first buffer layer is obtained by homoepitaxial growth. Therefore, when the SiC substrate is a 4H-SiC substrate, the first buffer layer is a 4H-SiC buffer layer; when the SiC substrate is a 6H-SiC substrate, the first buffer layer is a 6H-SiC buffer layer.
[0057] S600: The temperature of the reaction chamber is lowered from the first growth temperature to the second growth temperature, and a carbon source is introduced into the reaction chamber. Before the temperature is lowered, the introduction of the third mixed gas is first stopped.
[0058] According to some embodiments of the present invention, in step S600, cooling from the first growth temperature to the second growth temperature satisfies at least one of the following conditions: the second growth temperature is 1370-1430°C, such as 1370°C, 1380°C, 1390°C, 1400°C, 1410°C, 1420°C, 1430°C, etc.; the cooling time from the first growth temperature to the second growth temperature is 3-5min, such as 3min, 4min, 5min, etc.; the holding time of the second growth temperature is 5-10min, such as 5min, 6min, 7min, 8min, 9min, 10min, etc.; during the holding process, a carbon source is introduced, and the flow rate range of the carbon source is 30-50sccm, such as 30sccm, 35sccm, 40sccm, 45sccm, 50sccm, etc. Therefore, at the above rate, the temperature can be lowered relatively smoothly and stably, and the first buffer layer will not be adversely affected by sudden temperature changes; by maintaining the temperature for a few minutes, the temperature in the reaction chamber can reach a more stable state, which is beneficial to improving the quality of subsequent crystal growth; the above second growth temperature can grow a 3C-SiC buffer layer with better crystal quality and fewer crystal defects; the above flow rate of carbon source can help to efficiently grow the 3C-SiC buffer layer.
[0059] S700 : heteroepitaxially growing a 3C—SiC buffer layer 300 on a surface of the first buffer layer 200 away from the SiC substrate 100 at a second growth temperature.
[0060] According to some embodiments of the present invention, the conditions for growing a 3C-SiC buffer layer satisfy at least one of the following: during the growth of the 3C-SiC buffer layer, a first mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, and the flow rate of hydrogen is 80-130 L / min, such as 80 L / min, 90 L / min, 100 L / min, 110 L / min, 120 L / min, 130 L / min, etc.; the flow rate ratio of the silicon source to the hydrogen is 0.06%-0.09%, such as 0.06%, 0.065%, 0.07 %, 0.075%, 0.08%, 0.085%, 0.09%, etc.; the atomic ratio of carbon atoms to silicon atoms in the first mixed gas is 0.6-1, such as 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, 0.9, 0.95, 1, etc.; the atomic ratio of chlorine atoms to silicon atoms in the first mixed gas is 3-5, such as 3, 3.5, 4, 4.5, 5, etc.; the second growth temperature is 1370-1430℃, such as 1370℃, 1380℃, 1390℃, 1400℃, 1410℃, 1420℃, 1430℃, etc. Under the above conditions, a 3C-SiC buffer layer with excellent crystal quality can be grown, wherein the introduction of hydrogen chloride can prevent the formation of silicon droplets during the growth of the 3C-SiC buffer layer.
[0061] In some embodiments, the silicon source may include but is not limited to TCS and / or SiH4, the carbon source may include but is not limited to ethylene and / or propane, and the N-type doping source may include but is not limited to nitrogen and / or ammonia.
[0062] According to some embodiments of the present invention, the thickness of the 3C-SiC buffer layer is 0.5-1 μm, such as 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1 μm, etc., and the doping concentration of the 3C-SiC buffer layer is 2E17-1E18 cm -3 , for example, 2E17cm -3 、3E17cm -3 、4E17cm -3 、5E17cm -3 、6E17cm -3 、7E17cm -3 、8E17cm -3 、9E17cm -3 、1E18cm -3Etc. The 3C-SiC buffer layer of the above thickness and doping concentration is conducive to the growth of a 3C-SiC epitaxial layer with excellent crystal quality and fewer surface defects. Among them, compared with the doping concentration of the SiC substrate or the first buffer layer, the doping concentration of the 3C-SiC buffer layer is closer to the doping concentration of the 3C-SiC epitaxial layer, which can further improve the crystal growth quality of the 3C-SiC epitaxial layer and reduce crystal defects such as surface dislocations and stacking faults.
[0063] In some embodiments of the present invention, a 3C-SiC epitaxial layer is grown on the surface of a 3C-SiC buffer layer. Compared with growing the 3C-SiC epitaxial layer directly on the surface of a SiC substrate or a first buffer layer, the technical solution of the present invention can grow a 3C-SiC epitaxial layer with better crystal quality and fewer surface defects, which is beneficial to extend the service life of semiconductor devices and improve the utilization rate of wafers; moreover, the method can grow a thicker 3C-SiC epitaxial layer with a film thickness of up to 50-150μm, so that it is widely used in semiconductor devices (such as high-voltage semiconductor devices); the above-mentioned preparation method of the 3C-SiC epitaxial layer has a wider process window, which is conducive to industrial mass production.
[0064] S800 : epitaxially growing a 3C—SiC epitaxial layer 400 on a surface of the 3C—SiC buffer layer 300 away from the SiC substrate 100 at a second growth temperature.
[0065] According to some embodiments of the present invention, the conditions for growing a 3C-SiC epitaxial layer meet at least one of the following: in the process of growing the 3C-SiC epitaxial layer, a second mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, and the flow rate of hydrogen is 80-130 L / min, such as 80 L / min, 90 L / min, 100 L / min, 110 L / min, 120 L / min, 130 L / min, etc.; the flow rate ratio of the silicon source to the hydrogen is 0.16%-0.34%, such as 0.16%, 0.18%, 0.20%, 0.22%, 0.24%, 0.25%, 0.26%, 0.28%, 0.30%, 0.32%, 0.34%, etc.; the atomic number ratio of carbon atoms to silicon atoms in the second mixed gas is C / Si is 0.8-1.2, such as 0.8, 0.85, 0.9, 0.95, 1.0, 1.05, 1.1, 1.15, 1.2, etc.; the atomic ratio of chlorine atoms to silicon atoms in the second mixed gas is Cl / Si is 3-8, such as 3, 3.5, 4, 4.5, 5, 6, 7, 8, etc.; the growth rate of the 3C-SiC epitaxial layer is 30-80μm / h, such as 30μm / h, 35μm / h, 40μm / h, 45μm / h, 50μm / h, 55μm / h, 60μm / h, 65μm / h, 70μm / h, 75μm / h, 80μm / h, etc.; the second growth temperature is 1370-1430°C, such as 1370°C, 1380°C, 1390°C, 1400°C, 1410°C, 1420°C, 1430°C, etc. Under the above conditions, a 3C-SiC epitaxial layer with excellent crystal quality can be grown, wherein the introduction of hydrogen chloride can prevent the formation of silicon droplets during the growth of the 3C-SiC epitaxial layer.
[0066] In some embodiments, the silicon source may include but is not limited to TCS and / or SiH4, the carbon source may include but is not limited to ethylene and / or propane, and the N-type doping source may include but is not limited to nitrogen and / or ammonia. Furthermore, the growth temperature of the 3C-SiC buffer layer and the 3C-SiC epitaxial layer may be the same, which can reduce the temperature adjustment process by one step, thereby simplifying the process flow.
[0067] According to some embodiments of the present invention, the thickness of the 3C-SiC epitaxial layer is 50-150 μm, such as 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, etc.; the doping concentration of the 3C-SiC buffer layer is 8E14-5E16 cm -3 , for example 8E14cm -3 、1E15cm -3 、2E15cm -3、5E15cm -3 、8E15cm -3 、1E16cm -3 、2E16cm -3 、4E16cm -3 、5E16cm -3 Etc. Therefore, the present invention can obtain a thicker 3C-SiC epitaxial layer, the film thickness can reach 50-150 μm, so that it can be widely used in semiconductor devices (such as high-voltage semiconductor devices).
[0068] According to an embodiment of the present invention, the above method prepares a 3C-SiC epitaxial layer. Compared with directly growing a 3C-SiC epitaxial layer directly on the surface of a SiC substrate or a first buffer layer, the technical solution of the present invention is to grow a 3C-SiC epitaxial layer on the surface of a 3C-SiC buffer layer. In this way, a 3C-SiC epitaxial layer with better crystal quality and fewer surface defects can be grown, which is beneficial to extending the service life of semiconductor devices and improving the utilization rate of wafers; moreover, the method can grow a thicker 3C-SiC epitaxial layer with a film thickness of up to 50-150μm, so that it is widely used in semiconductor devices (such as high-voltage semiconductor devices); the above-mentioned method for preparing a 3C-SiC epitaxial layer has a wider process window, which is conducive to industrial mass production.
[0069] In another aspect of the present invention, the present invention provides a 3C-SiC epitaxial layer. According to an embodiment of the present invention, the 3C-SiC epitaxial layer is prepared by the preparation method described above. The 3C-SiC epitaxial layer of the present invention has high crystal quality and low surface defects, which is beneficial to prolong the service life of semiconductor devices and improve the utilization rate of wafers; a thicker 3C-SiC epitaxial layer can be prepared, so that semiconductor devices (such as high-voltage semiconductor devices) are widely used; the preparation method of the above-mentioned 3C-SiC epitaxial layer has a wide process window, which is conducive to industrial mass production.
[0070] According to some embodiments of the present invention, the thickness of the 3C-SiC epitaxial layer is 50-150 μm, such as 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, etc. Thus, the present invention can obtain a thicker 3C-SiC epitaxial layer, the film thickness can reach 50-150 μm, so that it is widely used in semiconductor devices (such as high-voltage semiconductor devices).
[0071] In another aspect of the present invention, the present invention provides a semiconductor device. According to an embodiment of the present invention, the semiconductor device includes a 3C-SiC epitaxial layer prepared by the preparation method described above. As a result, the semiconductor device has a long service life, good performance, a wide application field, and high production efficiency. It can be understood by those skilled in the art that the semiconductor device has all the features and advantages of the 3C-SiC epitaxial layer preparation method described above, and no further elaboration is given here.
[0072] Example
[0073] Example 1
[0074] The preparation method of the 3C-SiC epitaxial layer specifically comprises the following steps:
[0075] Step 1: Select a 6-inch 6H-SiC substrate with a 4° deviation in the <11-20> direction, place the substrate on a graphite tray, and then transfer it to the graphite tray in the growth chamber of the CVD epitaxial furnace;
[0076] Step 2: Raise the temperature from the standby temperature of 900°C to the etching temperature of 1620°C, while introducing hydrogen into the reaction chamber at a flow rate of 110L / min to reach a pressure of 120mbar in the reaction chamber, and introduce argon as cyclone gas at a flow rate of 1.2L / min;
[0077] Step 3, introducing hydrogen gas at a flow rate of 110 L / min to perform a first etching on the 6H-SiC substrate for 5 minutes;
[0078] Step 4: introducing hydrogen and hydrogen chloride mixed gas at flow rates of 110 L / min and 100 sccm respectively to perform a second etching on the 6H-SiC substrate for 8 min;
[0079] Step 5: Stop introducing hydrogen chloride gas, raise the temperature to the first growth temperature of 1650° C. for 4 minutes, and maintain the temperature for 2 minutes;
[0080] Step 6: Continue to introduce hydrogen at a flow rate of 110 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.075%, and introduce C3H8 and HCl at a C / Si ratio of 0.7 and a Cl / Si ratio of 5, with N2 as the N-type doping source; grow a film with a thickness of 1 μm and a doping concentration of 3E18 cm -3 6H-SiC buffer layer;
[0081] Step 7: Stop the introduction of TCS / HCl / N2 / C3H8, cool down to the second growth temperature of 1430°C for 5 minutes, hold the temperature for 10 minutes, and introduce C3H8 at a flow rate of 50 sccm during the temperature holding process;
[0082] Step 8: Continue to introduce hydrogen at a flow rate of 110 L / min, introduce TCS at a TCS to hydrogen flow rate ratio of 0.09%, and introduce C3H8 and HCl at a C / Si ratio of 0.8 and a Cl / Si ratio of 5, with NH3 as the N-type doping source; grow a film with a thickness of 1 μm and a doping concentration of 1E18 cm -3 3C-SiC buffer layer;
[0083] Step 9: Continue to introduce hydrogen at a flow rate of 110 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.32%, and introduce C3H8 and HCl at a C / Si ratio of 1.1 and a Cl / Si ratio of 7, with NH3 as the N-type doping source; grow a 120 μm thick and doping concentration of 2E15 cm at a rate of 73 μm / h. -3 The drift layer is the 3C-SiC epitaxial layer;
[0084] Step 10: Turn off TCS / HCl / NH3 / Ar / C3H8, use hydrogen to cool the reaction chamber to the standby temperature of 900°C, transfer the wafer to obtain a 120μm thick 3C-SiC heteroepitaxial layer.
[0085] Example 2
[0086] The preparation method of the 3C-SiC epitaxial layer specifically comprises the following steps:
[0087] Step 1: Select a 6-inch 4H-SiC substrate with a 4° deviation in the <11-20> direction, place the 4H-SiC substrate on a graphite tray, and then transfer it to the graphite tray in the growth chamber of the CVD epitaxial furnace;
[0088] Step 2: Raise the temperature from the standby temperature of 800°C to the etching temperature of 1590°C, while introducing hydrogen into the reaction chamber at a flow rate of 120L / min to reach a set reaction chamber pressure of 120mbar, and introduce argon as cyclone gas at a flow rate of 0.8L / min;
[0089] Step 3, introducing hydrogen gas at a flow rate of 120 L / min to perform a first etching on the 4H-SiC substrate for 4 min;
[0090] Step 4, introducing hydrogen and hydrogen chloride mixed gas at flow rates of 120 L / min and 80 sccm respectively to perform a second etching on the 4H-SiC substrate for 7 minutes;
[0091] Step 5: Stop introducing hydrogen chloride gas, raise the temperature to the first growth temperature of 1610°C for 2 minutes, and maintain the temperature for 2 minutes;
[0092] Step 6: Continue to introduce hydrogen at a flow rate of 120 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.065%, and introduce C3H8 and HCl at a C / Si ratio of 0.6 and a Cl / Si ratio of 4, with N2 as the N-type doping source; grow a film with a thickness of 0.7 μm and a doping concentration of 1E18 cm -3 4H-SiC buffer layer;
[0093] Step 7: Stop the introduction of TCS / HCl / N2 / C3H8, cool down to the second growth temperature of 1390°C for 5 minutes, hold the temperature for 8 minutes, and introduce C3H8 at a flow rate of 40 sccm during the temperature holding process;
[0094] Step 8: Continue to introduce hydrogen at a flow rate of 120 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.09%, and introduce C3H8 and HCl at a C / Si ratio of 0.9 and a Cl / Si ratio of 5, with NH3 as the N-type doping source; grow a layer with a thickness of 0.8 μm and a doping concentration of 5E17 cm -3 3C-SiC buffer layer;
[0095] Step 9: Continue to introduce hydrogen at a flow rate of 120 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.29%, and introduce C3H8 and HCl at a C / Si ratio of 0.9 and a Cl / Si ratio of 5, with NH3 as the N-type doping source; grow a 120 μm thick and doping concentration of 2E15 cm at a rate of 60 μm / h. -3 The drift layer is the 3C-SiC epitaxial layer;
[0096] Step 10: Turn off TCS / HCl / NH3 / Ar / C3H8, use hydrogen to cool the reaction chamber to the standby temperature of 900°C, transfer the wafer to obtain a 120μm thick 3C-SiC heteroepitaxial layer.
[0097] Example 3
[0098] The difference between this embodiment and embodiment 2 is that the first etching time in step 3 is 2 minutes, and the remaining steps are the same as those in embodiment 2, and a 120 μm thick 3C-SiC heteroepitaxial layer is obtained.
[0099] Example 4
[0100] The difference between this embodiment and embodiment 2 is that the second etching time in step 4 is 10 minutes, and the remaining steps are the same as those in embodiment 2, and a 120 μm thick 3C-SiC heteroepitaxial layer is obtained.
[0101] Example 5
[0102] The difference between this embodiment and embodiment 2 is that the C3H8 flow rate in step seven is 30 sccm, and the remaining steps are the same as those in embodiment 2, and a 120 μm thick 3C-SiC heteroepitaxial layer is obtained.
[0103] Example 6
[0104] The difference between this embodiment and embodiment 2 is that step 3 is not implemented, and the second etching time in step 4 is 10 minutes.
[0105] Comparative Example 1
[0106] The difference between this embodiment and embodiment 2 is that the step of growing a 4H-SiC buffer layer is not performed. The method for preparing a 3C-SiC epitaxial layer specifically includes the following steps:
[0107] Step 1: Select a 6-inch 4H-SiC substrate with a 4° deviation in the <11-20> direction, place the 4H-SiC substrate on a graphite tray, and then transfer it to the graphite tray in the growth chamber of the CVD epitaxial furnace;
[0108] Step 2: Raise the temperature from the standby temperature of 800°C to the etching temperature of 1590°C, while introducing hydrogen into the reaction chamber at a flow rate of 120L / min to reach a set reaction chamber pressure of 120mbar, and introduce argon as cyclone gas at a flow rate of 0.8L / min;
[0109] Step 3, introducing hydrogen gas at a flow rate of 120 L / min to perform a first etching on the 4H-SiC substrate for 4 min;
[0110] Step 4, introducing hydrogen and hydrogen chloride mixed gas at flow rates of 120 L / min and 80 sccm respectively to perform a second etching on the 4H-SiC substrate for 7 minutes;
[0111] Step 5: Stop introducing hydrogen chloride gas, raise the temperature to the first growth temperature of 1610°C for 2 minutes, and maintain the temperature for 2 minutes;
[0112] Step 6: Continue to introduce hydrogen at a flow rate of 120 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.065%, and introduce C3H8 and HCl at a C / Si ratio of 0.6 and a Cl / Si ratio of 4, with N2 as the N-type doping source; grow a film with a thickness of 0.7 μm and a doping concentration of 1E18 cm -3 4H-SiC buffer layer;
[0113] Step 7: Stop the introduction of TCS / HCl / N2 / C3H8, cool down to the second growth temperature of 1390°C for 5 minutes, hold the temperature for 8 minutes, and introduce C3H8 at a flow rate of 40 sccm during the temperature holding process;
[0114] Step 8: Continue to introduce hydrogen at a flow rate of 120 L / min, introduce TCS at a TCS to hydrogen flow ratio of 0.29%, and introduce C3H8 and HCl at a C / Si ratio of 0.9 and a Cl / Si ratio of 5, with NH3 as the N-type doping source; grow a 120 μm thick and doping concentration of 2E15 cm at a rate of 60 μm / h. -3 The drift layer is the 3C-SiC epitaxial layer;
[0115] Step nine, turn off TCS / HCl / NH3 / Ar / C3H8, use hydrogen to cool the reaction chamber to the standby temperature of 900°C, transfer the wafer to obtain a 120μm thick 3C-SiC heteroepitaxial layer.
[0116] The thick 3C-SiC heteroepitaxial layers obtained in the above-mentioned Examples 1-6 and Comparative Example 1 were subjected to relevant tests, and the results are shown in Table 1. The schematic diagram of the triangular defect of the 3C-SiC heteroepitaxial layer in Example 2 is shown in Figure 4 As shown in the figure, it can be seen that the number of triangular defects on the surface of the epitaxial wafer is small, which is a great improvement compared with Comparative Example 1. In order to further understand the cause of the triangular defects, the surface triangular defects are magnified and observed with an optical microscope. Figure 5 As shown in the AFM surface morphology Figure 6 As shown, the film thickness curve is as follows Figure 7 As shown in the figure, the carrier concentration curve is as follows Figure 8 shown.
[0117] The calculation formula of film thickness non-uniformity is: in, n represents the number of tests in the same product. In this embodiment, n is 17. Each test is performed at a different location to test the thickness of the 3C-SiC epitaxial layer. The test value of each test is x. i ;
[0118] The calculation method of doping non-uniformity is the same as that of film thickness non-uniformity;
[0119] The number of triangle defects can be detected by SICA82 defect detection equipment to detect sample surface defects.
[0120] The DPBs (Double Crystal Twin Boundaries) density test method is: chemical etching solution can selectively etch crystal planes of different orientations, and different grain boundaries (including DPBs) will form different etching patterns. These patterns can be observed under a microscope to identify DPBs.
[0121] Table 1
[0122]
[0123]
[0124] It can be seen from the data that compared with Comparative Example 1, the number of triangular defects in each 3C-SiC heteroepitaxial layer of Examples 1 to 5 is less than 20, and the DPBs density is significantly reduced compared with Comparative Example 1, indicating that the crystal quality of the 3C-SiC epitaxial layer is significantly improved, and the doping uniformity, film thickness uniformity and roughness are relatively good. It can be seen that the technical solution of the present invention can effectively improve the crystal quality of the 3C-SiC epitaxial layer crystal. As for Example 2, its doping non-uniformity, film thickness non-uniformity, roughness Ra, and roughness Rq are 2.1%, 0.5%, 0.163nm, and 0.204nm respectively, and the number of triangular defects in the entire 6-inch 3C-SiC heteroepitaxial layer is only 10; because only one step of etching is performed in Example 6, the crystal quality of the grown 3C-SiC heteroepitaxial layer is poorer than that of other embodiments, and the defects are relatively more.
[0125] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0126] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.
[0127] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.
Claims
1. A method for preparing a 3C-SiC epitaxial layer, characterized in that: include: S100: providing a SiC substrate and placing the SiC substrate in a reaction chamber, wherein the SiC substrate is a 4H-SiC substrate or a 6H-SiC substrate; S200: raising the temperature of the reaction chamber from an initial temperature to an etching temperature; S300: etching the surface of the SiC substrate at the etching temperature; S400: raising the temperature of the reaction chamber from the etching temperature to a first growth temperature; S500: homoepitaxially growing a first buffer layer on the surface of the etched SiC substrate at the first growth temperature, wherein the first buffer layer is a 4H-SiC buffer layer or a 6H-SiC buffer layer; S600: lowering the temperature of the reaction chamber from the first growth temperature to a second growth temperature, and introducing a carbon source into the reaction chamber; S700: heteroepitaxially growing a 3C-SiC buffer layer on a surface of the first buffer layer away from the SiC substrate at the second growth temperature; S800: epitaxially growing a 3C-SiC epitaxial layer on a surface of the 3C-SiC buffer layer away from the SiC substrate at the second growth temperature.
2. The preparation method according to claim 1, characterized in that: The etching further comprises: S310: introducing hydrogen into the reaction chamber, and performing a first etching on the surface of the SiC substrate under the action of the hydrogen; S320: introducing the hydrogen gas and hydrogen chloride into the reaction chamber, and performing a second etching on the SiC substrate under the action of the hydrogen gas and the hydrogen chloride.
3. The preparation method according to claim 1 or 2, characterized in that: In step S600, at least one of the following conditions is met: The second growth temperature is 1370-1430°C; The cooling time from the first growth temperature to the second growth temperature is 3-5 minutes; The holding time of the second growth temperature is 5-10min; The carbon source is introduced during the temperature-maintaining process, and the flow rate of the carbon source is in the range of 30-50 sccm.
4. The preparation method according to claim 1 or 2, characterized in that: The conditions for growing the 3C-SiC buffer layer satisfy at least one of the following: A first mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, wherein the flow rate of the hydrogen is 80-130 L / min; The flow ratio of the silicon source to the hydrogen is 0.06%-0.09%; The atomic ratio of carbon atoms to silicon atoms in the first mixed gas is 0.6-1; The atomic ratio of chlorine atoms to silicon atoms in the first mixed gas is 3-5.
5. The preparation method according to claim 1 or 2, characterized in that: The thickness of the 3C-SiC buffer layer is 0.5-1 μm, and the doping concentration of the 3C-SiC buffer layer is 2E17-1E18 cm -3 .
6. The preparation method according to claim 1 or 2, characterized in that: The conditions for growing the 3C-SiC epitaxial layer satisfy at least one of the following: A second mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, wherein the flow rate of the hydrogen is 80-130 L / min; The flow ratio of the silicon source to the hydrogen is 0.16%-0.34%; The atomic ratio of carbon atoms to silicon atoms in the second mixed gas is 0.8-1.2; The atomic ratio of chlorine atoms to silicon atoms in the second mixed gas is 3-8; The growth rate of the 3C-SiC epitaxial layer is 30-80 μm / h.
7. The preparation method according to claim 1 or 2, characterized in that: The thickness of the 3C-SiC epitaxial layer is 50-150 μm, and the doping concentration of the 3C-SiC buffer layer is 8E14-5E16 cm -3 .
8. The preparation method according to claim 2, characterized in that: In the first etching, at least one of the following conditions is met: The flow rate of the hydrogen is 80-130 L / min; The etching temperature is 1550-1620°C; The first etching time is 3-5 minutes.
9. The preparation method according to claim 2 or 8, characterized in that: In the second etching, at least one of the following conditions is met: The flow rate of the hydrogen is 80-130 L / min; The flow rate of the hydrogen chloride is 20-150 sccm; The etching temperature is 1550-1620°C; The second etching time is 5-10 minutes.
10. The preparation method according to claim 1 or 2, characterized in that: In step S200, the temperature is raised from the initial temperature to the etching temperature to meet at least one of the following conditions: The initial temperature is 700-900°C; The heating rate from the initial temperature to the etching temperature is 50-70°C / min, and the heating time is 8-12min; The etching temperature is maintained for 2 to 4 minutes.
11. The preparation method according to claim 1 or 2, characterized in that: In step S400, the temperature is raised from the etching temperature to the first growth temperature to meet at least one of the following conditions: The first growth temperature is 1580-1650°C; The heating time from the etching temperature to the first growth temperature is 2-4 minutes; The first growth temperature is maintained for 2 to 4 minutes.
12. The preparation method according to claim 1 or 2, characterized in that: The conditions for growing the first buffer layer satisfy at least one of the following: A third mixed gas containing hydrogen, a silicon source, a carbon source, an N-type doping source and hydrogen chloride is introduced into the reaction chamber, wherein the flow rate of the hydrogen is 80-130 L / min; The flow ratio of the silicon source to the hydrogen is 0.05%-0.075%; The atomic ratio of carbon atoms to silicon atoms in the third mixed gas is 0.4-0.8; The atomic ratio of chlorine atoms to silicon atoms in the third mixed gas is 3-5.
13. The preparation method according to claim 1 or 2, characterized in that: The thickness of the first buffer layer is 0.5-1 μm, and the doping concentration of the first buffer layer is 1E18-5E18 cm -3 .
14. A 3C-SiC epitaxial layer, characterized in that: The invention is prepared by the preparation method according to any one of claims 1 to 13.
15. The 3C-SiC epitaxial layer according to claim 14, characterized in that: The thickness of the 3C-SiC epitaxial layer is 50-150 μm.
16. A semiconductor device, characterized in that: The semiconductor device comprises the 3C-SiC epitaxial layer according to claim 14 or 15.
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