Distributed configuration of programmable devices

Abstract

Embodiments herein describe a distributed configuration system for configurable devices. Implementations herein do not rely solely on a central configuration manager to distribute configuration information to various subsystems in the device, but rather include configuration interface managers (CIMs) distributed in different regions of the device, whether the regions are in one integrated circuit or include multiple integrated circuits. These embodiments may still use a central configuration manager to distribute configuration information in a device image to the plurality of CIMs, which may then forward the configuration information to their assigned areas.

Description

Technical Field

[0001] Examples of the present disclosure generally relate to a distributed system for configuring a device including one or more integrated circuits. Background Art

[0002] Traditionally, configurable devices are configured through a central configuration manager. Therefore, the configuration manager is usually the bottleneck when configuring the device. This is allowed when the device (e.g., integrated circuit) is small and does not include different subsystems. However, recent configurable devices may include a system on chip (SoC), which includes a heterogeneous computing system, which may include a network on chip (NoC), a memory controller, a data processing engine, a processor subsystem, a programmable logic, and other subsystems that require their own programming information. Additionally, these subsystems can be directly interfaced with programmable logic, which has grown by several orders of magnitude, especially with the emergence of stacked die devices. Any configuration (or partial reconfiguration) of these devices requires mixing of various configuration partitions transmitted through different interfaces. The size and non-isomorphic nature of the programming images of these devices make configuration through a central configuration manager more inefficient. Summary of the invention

[0003] One embodiment describes a configurable device that includes a central configuration manager circuit and a plurality of configuration interface manager (CIM) circuits connected to the central configuration manager circuit and distributed throughout the configurable device. The central configuration manager circuit is configured to receive a device image for configuring the configurable device, parse the device image to identify a configuration packet for the plurality of CIM circuits, and send the configuration packet to the plurality of CIM circuits. In addition, the plurality of CIM circuits are configured to forward the configuration packet to a designated area of ​​the configurable device. Thus, a hardware accelerator is configured to...

[0004] Another embodiment described herein is a method comprising: receiving a device image for configuring a configurable device at a central configuration manager circuit; parsing the device image to identify configuration packets for multiple CIM circuits in the configurable device; sending the configuration packets from the central configuration manager circuit to the multiple CIM circuits; and forwarding the configuration packets by the multiple CIM circuits to a designated area of ​​the configurable device.

[0005] Another embodiment described herein is a configurable device comprising: a central configuration manager circuit, a network, and a plurality of configuration interface manager (CIM) circuits connected to the central configuration manager circuit via the network. The central configuration manager circuit is configured to receive a device image for configuring the configurable device, identify a portion of the device image intended for each of the plurality of CIM circuits, and send the portion of the device image to the plurality of CIM circuits. Additionally, the plurality of CIM circuits are configured to forward the portion of the device image to a designated area of ​​the configurable device. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] In order to be able to understand in detail the manner in which the above features are described, a more specific description briefly summarized above may be obtained by reference to example implementations, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only typical example implementations and therefore should not be considered to limit the scope thereof.

[0007] Figure 1 Configuring an integrated circuit using a distributed system according to an embodiment is illustrated.

[0008] Figure 2A and Figure 2B Configuring a plurality of integrated circuits using a distributed configuration system according to an embodiment is illustrated.

[0009] Figure 3 is a flow chart for configuring a device using a distributed system according to an embodiment.

[0010] Figure 4 Configuring a device using a distributed system according to an embodiment is illustrated.

[0011] Figure 5 A portion of a device image according to an implementation scheme is illustrated.

[0012] Figure 6 Grouping in a device image according to an embodiment is illustrated.

[0013] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements of one example may be beneficially incorporated in other examples. DETAILED DESCRIPTION

[0014] Various features are described below with reference to the accompanying drawings. It should be noted that the drawings may or may not be drawn to scale, and elements of similar structure or function are represented by similar reference numerals in all drawings. It should be noted that the drawings are intended only to facilitate the description of the features. They are not intended as an exhaustive description or as a limitation on the scope of the claims. In addition, the illustrated examples do not necessarily have all the aspects or advantages shown. The aspects or advantages described in conjunction with a particular example are not necessarily limited to that example, and may be practiced in any other example even if not so illustrated or so explicitly described.

[0015] The embodiments herein describe a distributed configuration system for configurable devices. Rather than relying solely on a central configuration manager circuit to distribute configuration information to the various subsystems in the device, the embodiments herein include configuration interface managers (CIMs) (also referred to as CIM circuits) distributed in different areas of the device, whether these areas are in one integrated circuit or across multiple integrated circuits. These embodiments can still use a central configuration manager to enhance the security of the system and provide users with a unified application programming interface (API) for docking. In addition, a central configuration manager can provide basic infrastructure to parallelize the configuration information included in the device image and distribute the responsibility for parsing and programming the area to the CIM.

[0016] In one embodiment, each zone in a configurable device has its own dedicated configuration interface, which is accessed by a dedicated CIM for each zone. In addition, the CIMs can operate in parallel. This distributed architecture provides orders of magnitude improvement in the time required to configure and start a device without introducing any additional complexity for users designing their systems.

[0017] Figure 1 The use of a distributed system to configure a configurable device 100 according to an embodiment is illustrated. In this example, the configurable device 100 includes a single integrated circuit (IC) 110. In one embodiment, IC 110 includes a heterogeneous computing system that includes different types of subsystems (e.g., NoC, data processing engine, memory controller, programmable logic, etc.) that are configured using configuration information in device image 105. For example, IC 110 may be a SoC or an application specific integrated circuit (ASIC).

[0018] In another embodiment, IC 110 comprises a homogeneous computing system. While the distributed configuration system described herein may provide the greatest improvements to devices having heterogeneous computing systems (due to having a mix of various configuration partitions transmitted over different interfaces), embodiments herein may also improve the process of configuring homogeneous computing systems, especially as those systems become larger. For example, IC 110 may be a large field programmable array (FPGA) including programmable logic configured by device image 105.

[0019] It should be noted that configurable devices are not limited to having programmable logic. That is, the embodiments herein may be applied to configurable devices that include or do not include programmable logic. The distributed configuration system described herein may be used in any configurable device that relies on a received device image 105 to configure at least one subsystem in the device before the device begins to execute user functions.

[0020] IC 110 includes a stream engine 115 (e.g., circuitry) that receives a device image 105 for configuring device 100. Stream engine 115 is one example of a central configuration manager circuit, and in other embodiments, the stream functionality may be implemented at the physical interface level using back-to-back memory mapped transfers. Thus, stream engine 115 may be a memory mapped engine that receives a device image by writing memory mapped data.

[0021] As shown, the flow engine 115 receives the device image 105 composed of packetized configuration data, and then forwards corresponding configuration (config) packets 125 to different areas in the IC 110. The flow engine 115 can act as a user interface with an API to communicate with an external host computing system (not shown). The flow engine 115 will be discussed in more detail below, but in general, this hardware component distributes the configuration information included in the device image 105 to various areas of the IC 110 in the form of configuration packets 125.

[0022] To distribute the configuration packets 125, the IC 110 includes a hardware network 120. In one embodiment, the network 120 is a NoC, but is not limited thereto. For example, the IC 110 may have dedicated configuration traces for distributing the configuration packets 125 to different areas in the IC 110. The type of hardware network used may affect how the flow data is transmitted from the central configuration manager (e.g., the flow engine 115) to the distributed CIM circuit 130 at the physical level.

[0023] exist Figure 1, IC 110 is subdivided into different regions (e.g., region A and region B). Although two regions are shown, IC 110 can be divided into any number of regions. One advantage of a distributed configuration system is that it can be easily scaled with the size of configurable device 100. That is, as the size of IC 110 increases, additional regions can be added.

[0024] Each region in IC 110 includes a dedicated CIM circuit 130 for distributing configuration information to the subsystems in that region. That is, stream engine 115 may receive device image 105 and distribute packetized configuration information such that data for configuring subsystems in region A is sent to CIM circuit 130A, while data for configuring subsystems in region B is sent to CIM circuit 130B.

[0025] Although not shown herein, the CIM circuits 130 may have corresponding interfaces or ports to the subsystems in their respective regions. For example, the CIM circuit 130A may parse the received configuration packet 125A and send the configuration information to different circuits in the region. In this case, region A includes a first circuit 135A and a second circuit 135B. These circuits may be different (i.e., heterogeneous) circuits. For example, the first circuit 135A may be a memory controller, and the second circuit 135B may be a hardened data processing engine. These circuits may communicate with the CIM circuit 130A using different types of interfaces and use different types of configuration data. In this example, rather than a central configuration manager (e.g., a stream engine 115) having to parse the configuration information and distribute it to all subsystems in the IC, the stream circuit 115 may forward the configuration information to each region, and then the CIM circuit 130 may distribute the configuration information to the circuits in the region using different interfaces. However, in another embodiment, the first circuit 135A and the second circuit 135B may be isomorphic circuits (e.g., both may be memory controllers, or both may be programmable logic blocks). Thus, the embodiments herein may be used with either heterogeneous circuits or homogeneous circuits in these regions.

[0026] In addition, since the stream circuit 115 distributes configuration information to different regions having dedicated CIM circuits 130, the CIM circuits 130 in each region can operate in parallel. That is, while the CIM circuit 130A distributes configuration information to the first circuit 135A and the second circuit 135B, the CIM circuit 130B can distribute configuration information to the third circuit 135C and the fourth circuit 135D. In this way, the regions in the IC 110 can be configured in parallel by the dedicated CIM circuits 130.

[0027] Figure 2A and Figure 2B2 illustrates configuring a plurality of integrated circuits in a configurable device 200 using a distributed system according to an embodiment. Figure 1 The distributed devices in 100 are different, Figure 2A and Figure 2B The configurable device 200 in FIG. 1 includes multiple ICs, namely IC 110, IC 205, and IC 210. These ICs may be provided in the same package. Although three ICs are shown, the configurable device 200 may include any number of ICs.

[0028] exist Figure 2A In the embodiment of the present invention, configurable device 200A, ICs are arranged in a 3D stack. For example, IC 110 can be a base die, and IC 205 and IC 210 are stacked on top of the base die. For example, the base die can include peripheral devices and communication interfaces for communicating with an external host, while IC 205 and IC 210 include different types of circuits 220 (e.g., arrays of programmable logic or data processing engines). The ICs can use through-holes to send data to each other.

[0029] Figure 2A The IC 110 can be used with Figure 1 The IC 110 shown is the same as the one shown in FIG. 1 , which includes multiple regions, each region including a dedicated CIM circuit 130. Figure 1 As shown in the same IC, the 2D area is assigned Figure 2A In FIG. 1 , CIM circuits are assigned 3D regions that span three ICs. That is, CIM circuit 130A is assigned region A, which may include circuits in IC 110 (not shown), circuits 220A in IC 205, and circuits 220C in IC 210. CIM circuit 130B is assigned region B, which may include circuits in IC 110 (not shown), circuits 220B in IC 205, and circuits 220D in IC 210.

[0030] The circuits 220 in each of IC 205 and IC 210 may be the same or different. In one example, the circuits 220A and 220B in IC 205 may be the same (e.g., programmable logic), while the circuits 220C and 220D in IC 210 may be the same (e.g., data processing engines). In addition, the circuits 220A-220D in both ICs 205 and 210 may be the same, e.g., all data processing engines.

[0031] Although Figure 2AThe ICs are illustrated as being stacked, but in another embodiment, the ICs may be disposed (i.e., disposed side by side) on an interposer, wherein the interposer provides a communication channel for sending data between the ICs. For example, IC 110 may be an anchor die, while IC 205 and IC 210 are chiplets. In this example, IC 205 and IC 210 may be disposed on different sides of IC 110. The anchor die may include common blocks, such as a processor subsystem (PS), a memory subsystem (DDR controller), etc. The chiplets may include dedicated logic, such as a data processing engine, a high-speed transceiver, or a high-bandwidth memory. In this case, these areas would not be 3D areas, but nonetheless, each CIM circuit 130 may be assigned an area that includes the CPU from the 3D area. Figure 2A parts of each of the three ICs in .

[0032] In summary, Figure 2A The use of CIM circuit 130 in one IC to configure circuit 220 in a different IC is illustrated. Thus, IC 205 and IC 210 do not have their own CIM circuits.

[0033] Similar to Figure 2A , Figure 2B 200B is illustrated as having multiple ICs, but with Figure 2A Different from the above, each IC has at least one CIM circuit 130. Figure 2A Unlike the case where the region in extends across the IC, Figure 2B In , the region can be confined to one IC.

[0034] It should be noted that Figure 2B The three ICs can be arranged as Figure 2A The 3D stack shown is the same as above, or arranged side by side on an interposer.

[0035] The network 120 in IC 110 may be used to forward configuration packets to other ICs 205 and IC 210. That is, in addition to the configuration packets identifying the zones on IC 110, the flow engine 115 distributes configuration packets for zones in IC 205 and IC 210. Since IC 205 includes two zones (zones C and D) with dedicated CIM circuits 130C and 130D, the flow engine 115 sends configuration packet 125C to CIM circuit 130C for configuring circuits in zone C (not shown), and sends a different configuration packet 125D to CIM circuit 130D for configuring circuits in zone D (not shown).

[0036] However, IC 210 is not divided into multiple regions (although it could be divided into multiple regions). In this case, flow engine 115 sends configuration packet 125E to CIM circuit 130E for configuring circuits in IC 210. For example, IC 210 may be smaller than IC 205 or have fewer configurable circuits, and thus, IC 210 is not divided into regions.

[0037] therefore, Figure 2B A configurable device 200B is illustrated that includes multiple ICs, where a central configuration manager (e.g., flow engine 115) on one of the ICs can distribute configuration packets 125 to CIM circuits 130 on different ICs. Depending on how many regions there are in the IC, the ICs can each have more than one CIM circuit 130.

[0038] Figure 3 300 is a flow chart of a method 300 for configuring a device using a distributed system according to an embodiment. At block 305, a stream engine (e.g., a central configuration manager) receives a device image for configuring a configurable device. The device image may be received as streaming data or memory mapped data.

[0039] A configurable device may include only one IC including Figure 1 The multiple CIM circuits shown, or the configurable device may include Figure 2A and Figure 2B Multiple ICs are shown. Regardless, in one embodiment, there is only one stream engine in the configurable device (ie, there is only one central configuration manager).

[0040] At block 310, the stream circuit configures the network in the configurable device. In one embodiment, the network is provided on the same IC that includes the stream circuit. The stream circuit may first be configured so that the stream circuit distributes configuration information to the CIM circuit in the configurable device. For example, if the stream circuit uses a NoC to communicate with the CIM circuit, the device image may include data for configuring the NoC so it can communicate with the CIM circuit.

[0041] In one embodiment, the stream circuit includes its own CIM circuit for configuring the network. That is, the stream circuit can identify configuration information in a received device image that is intended to configure the network and forward that information to its CIM circuit, which in turn configures the network. The network can be configured to send data to CIM circuits on the same IC as well as CIM circuits on other ICs (in the case where the configurable device has multiple ICs with their own CIM circuits).

[0042] At box 315, the streaming circuit parses the device image to identify configuration information (e.g., configuration packets) for the CIM circuits in the configurable device. In one embodiment, the device image may include an embedded header that indicates what data is intended for which region. That is, the software tool in the host that generates the device image and transmits the device image to the configurable device can be aware of the regions in the configurable device. Therefore, when generating the device image, the software application can organize the device image so that the configuration information for the circuits in a specific region of the device is organized as packet data. Therefore, when parsing the device image, the streaming circuit can easily identify different portions of the device image that are assigned to different regions (e.g., different CIM circuits), which different regions can be arranged as data packets. This will be discussed below in Figure 5 is discussed in more detail in .

[0043] In one embodiment, the packetization of configuration information in a device image may be performed by a dynamic scheduling algorithm based on a relocatable configuration context by the stream circuitry.

[0044] At block 320, the flow circuit sends the configuration packet to the CIM circuit. That is, after identifying the data in the device image intended for the destination zone, the flow circuit can forward the corresponding configuration packet to the dedicated CIM circuits in those zones. Thus, each zone receives only configuration information for configuring the circuits in that zone.

[0045] In one embodiment, the configurable device includes at least two CIM circuits. These CIM circuits can be located on the same IC or on multiple ICs. In addition, the region can include the entire IC, a 2D region that only includes a sub-portion of the IC, or a 3D region that spans multiple ICs. Figure 2B An example is shown in which a region may include an entire IC (eg, IC 210), while Figure 1 illustrates a 2D region covering a sub-portion of an IC (eg, IC 110), and Figure 2A A 3D region extending across multiple ICs is illustrated.

[0046] In one embodiment, the communication between the stream circuit and the plurality of CIM circuits is encrypted such that each of the plurality of CIM circuits decrypts the portion (e.g., configuration packet) received from the central configuration manager circuit. Additionally, in one embodiment, each of the plurality of CIM circuits is configured to perform an integrity check on the portion (packet) received from the stream circuit.

[0047] At block 325, the CIM circuit forwards the configuration information to the circuits in the region assigned to the CIM circuit. That is, the CIM circuit parses the received data packets, which may have configuration information for multiple subsystems in the region, and identifies which configuration information should be transmitted to which subsystem. The CIM circuit may connect to different subsystems in the region using different interfaces or ports if the subsystems are heterogeneous systems.

[0048] Advantageously, in method 300, the stream circuit is primarily responsible for streaming configuration information to the various CIM circuits, as specified by the device image. The actual processing of the configuration data and forwarding of the configuration data to the specific circuit being configured is delegated to the CIM.

[0049] In one embodiment, the CIM circuit operates in two modes. When in the first mode, a direct memory access (DMA) circuit in the stream circuit distributes configuration information for a region as a continuous stream to the CIM circuit responsible for the region. When a configuration packet for a region is buffered in the CIM circuit, the CIM circuit can process the packet while the stream circuit transmits the configuration packet to the CIM circuit in the configurable device.

[0050] When in the second mode, the flow circuit a priori copies the configuration packets of each region in the continuous partition to DRAM, and simultaneously instructs the CIM circuit to fetch packets from their regions in DRAM. A continuous partition is a partition where all data in the partition is intended to be processed by a single CIM. Local memory in the CIM circuit is used to store packets fetched from DRAM by the CIM circuit for hashing and authentication before use.

[0051] Figure 4 The use of a distributed system to configure a configurable device 400 according to an embodiment is illustrated. As shown, the configurable device 400 receives a device image 105 at a stream circuit 115. In addition to distributing the configuration information in the device image 105 to different regions as described above, the stream circuit 115 (e.g., a central configuration manager) may perform other functions. First, the stream circuit 115 may create an abstraction level that remains consistent across devices. That is, the stream circuit 115 may maintain a consistent protocol for all functions performed by the stream circuit 115, regardless of the size of the device 400 and the mix of features in the device 400. Second, the stream circuit 115 may serve as a root of trust for the device 400. In one embodiment, the stream circuit 115 authenticates the device image 105 before it is distributed to the CIM circuit. Third, the stream circuit 115 may include debug interface logic and a debug packet controller for identifying errors that may occur during the configuration process.

[0052] In one embodiment, the stream circuit 115 is implemented in a processor, which may be a general purpose processor. However, in other embodiments, the stream circuit 115 may be a dedicated circuit for performing the functions described herein.

[0053] The device 400 includes N number of regions corresponding to the N number of CIMs 405. In this case, it is assumed that region 0 is provided on the same IC as the stream circuit 115. The region includes a CIM circuit 405A, a PS 410, a NoC 415, and a peripheral device 420.

[0054] PS 410 may be a general purpose processor including any number of cores. PS 410 may be one or more processing subsystems that are also configured by a corresponding CIM (ie, CIM circuit 405A).

[0055] Although not shown, the NoC 415 may extend throughout the device 400 to allow the various components in the device 400 to communicate with each other. For example, in one physical implementation, the stream circuit 115 may be disposed in the upper right portion of an IC in the configurable device 400, while the CIMs 405B and 405C are disposed in the upper left and lower left portions of the IC (or on another IC). However, using the NoC 415, the stream circuit 115 may still communicate with the CIM circuits 405B and 405C in those areas. However, in an embodiment, before the stream circuit 115 can send configuration information to the CIM circuits 405B and 405C, the stream circuit may first be required to configure the NoC 415, which is discussed in block 310 of the method 300.

[0056] Peripheral device 420 may include I / O circuitry for communicating with external computing systems or devices. For example, peripheral device 420 may include a DMA engine for retrieving memory from a host computing system.

[0057] Although shown as separate, in one embodiment, CIM circuit 405A is part of stream circuit 115. Customizing firmware for configuring each subsystem in stream circuit 115 (e.g., central configuration manager) increases complexity and prevents optimization, resulting in larger code size, inefficient execution, and difficulty in verification. Since the processing of the region is performed by CIM instead, and the stream circuit only streams packets to CIM, a common firmware can be used to push configuration images to each region on the device. These regions may include different IPs and functionality. In addition, by including CIM circuits in the stream circuit, the same programming model can be suitable for regions that communicate directly with the stream circuit on the same IC or regions that are integrated with the stream circuit. An example of a configuration completed by a local CIM circuit 405A in stream circuit 115 is the configuration of PS 410, NoC 415, and peripherals 420.

[0058] In this embodiment, region 1 and region n may include similar circuit elements, but this is not required. That is, both regions include programmable logic (PL) blocks 425, hard IP 430, interfaces to chiplets 440 (in the case of Figure 2A 440 and 441. Alternatively, region 1 may include only programmable logic, while region n includes only DPE segments.

[0059] CIM circuits 405B and 405C may include separate interfaces or ports to different circuit elements in region 1 and region n. Region 1 and region n may be located in the same IC as region 0, or may be located in different ICs. For example, region 0 may be provided in a first IC and regions 1 to n may be provided in a second IC, or region 0 may be provided in a first IC and region 1 may be provided in a second IC and region n may be provided in a third IC.

[0060] PL blocks 425 in region 1 and region n may include any amount of programmable logic. Using configuration information in device image 105, CIM circuits 405B and 405C may configure PL blocks 425 to perform user-defined functions during operation.

[0061] Hard IP 430 may include any type of hardened circuitry that may be configured using device image 105 .

[0062] The data processing engine (DPE) segment 435 may include multiple DPEs that may be arranged in a grid, cluster, or checkerboard pattern in the device 400. In addition, each segment 435 may be of any size and have any number of rows and columns formed by DPEs. In one embodiment, the DPEs in the segment 435 are identical. That is, each DPE (also referred to as a slice or block) in the DPE may have the same hardware components or circuits. In addition, the embodiments herein are not limited to DPEs. Instead, the device 400 may include an array of any kind of processing elements, for example, the DPE may be a digital signal processing engine, a cryptographic engine, a forward error correction (FEC) engine, or other dedicated hardware for performing one or more dedicated tasks.

[0063] The chiplet 440 may be as described above in Figure 2A For example, CIM circuit 405B may be intended to forward configuration information to chiplet 440A, while CIM circuit 405C may be intended to forward configuration information to chiplet 440B.

[0064] Involving the stream circuitry 115 (e.g., a central configuration manager) in low-level data movement at the device level for configuration is inefficient in terms of performance and power. Therefore, as described above, the stream circuitry 115 streams configuration information to the CIM circuitry 405 distributed across the devices over the network (e.g., NoC 415). By using hardware to stream configuration information directly to the CIM circuitry 405, the stream circuitry 115 does not create a bottleneck. In addition, the configuration packets (which consist of Figure 4 The continuous stream (shown) is transferred from the stream circuit to the CIM circuit 405 with the largest burst capability to avoid overloading the NoC 415 with many small independent memory transfers.

[0065] Figure 5 A portion of a device image 105 is illustrated according to an embodiment. Figure 5 1 illustrates a high-level organization that can be used in a device image 105 for a configurable device. The image 105 includes a boot header and multiple programming partitions, where each partition is assigned to a specific area in the configurable device. The boot header provides information for authenticating access to the device and for processing the rest of the image 105, including its authentication and decryption.

[0066] Partition 505 in device image 105 is a primary partition that may always be present and includes a platform loader and manager (PLM) firmware executed on a processor that also includes, for example, streaming circuitry or a central configuration manager. In one embodiment, primary partition 505 is loaded from a read-only memory (ROM) in the processor, while loading of other partitions is accomplished by the PLM firmware in conjunction with the CIM circuitry.

[0067] In this example, each subsequent partition 510 includes a security partition header that is processed by the flow circuit to establish keys and other configuration information used by the CIM circuit to process the partition. The remainder of the partition 510 is divided into multiple packets, and the flow circuit routes the multiple packets to a specific CIM circuit (e.g., CIM a, CIM b, CIM c, etc.) for processing. The packet headers of the packets in the partition 510 identify the target CIM circuit, so the flow circuit knows the destination of each packet in the packet. In this way, the flow circuit is able to packetize the data as discussed in block 315 of method 300 and forward the packets to a specific CIM circuit.

[0068] Furthermore, the packet data of each of the packets in partition 510 is then processed at the CIM circuits rather than at the flow circuits. Thus, once a data packet is received by the CIM circuits, processing the configuration information in the packet (and forwarding the configuration information to the specific circuit being configured) is delegated to those circuits.

[0069] Figure 6The CIM grouping 600 in the device image according to the embodiment is illustrated. That is, Figure 6 Illustrated Figure 5 6. Packet 600 is divided into header 605 and packet data 610 (ie, payload). The first quadword in packet 600 specifies the target CIM (using the CIM ID), packet length, header length, and packet attributes.

[0070] In one embodiment, the length of packet 600 and header 605 is always a multiple of four words. In addition, the least significant bit of the packet attributes may indicate whether the packet is the last packet in the partition that needs to be transferred using, for example, direct memory access (DMA).

[0071] Packet header 605 also includes a SHA hash of the next packet (eg, or any other suitable cryptographic element). Padding in header 605 may be used to ensure that the packet length meets the requirements of the SHA-3 architecture. Figure 5 The last packet in one of the partitions 510 in may not include a SHA hash and padding because there is no next packet in that partition 510.

[0072] In one embodiment, CIM packet 600 is hashed in its entirety, including header 605 and payload (i.e., packet data 610). In one embodiment, each CIM circuit includes sufficient internal storage to buffer at least two packets. Buffering packets 600 in the CIM circuits allows packets 600 to also be authenticated to ensure data integrity, and decrypted to ensure data privacy.

[0073] In the foregoing, reference is made to the embodiments presented in this disclosure. However, the scope of the present disclosure is not limited to the specifically described embodiments. On the contrary, any combination of the described features and elements (whether or not involving different embodiments) is contemplated as implementing and practicing the contemplated embodiments. In addition, although the embodiments disclosed herein may achieve advantages over other possible solutions or over the prior art, whether a particular advantage is achieved by a given embodiment does not limit the scope of the present disclosure. Therefore, the foregoing aspects, features, embodiments and advantages are merely illustrative and are not considered to be elements or limitations of the appended claims unless expressly stated in the claims.

[0074] As will be appreciated by those skilled in the art, the embodiments disclosed herein may be embodied as systems, methods, or computer program products. Thus, various aspects may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects, all of which may be generally referred to herein as a "circuit," "module," or "system." Furthermore, various aspects may take the form of a computer program product embodied in one or more computer-readable media having computer-readable program code embodied thereon.

[0075] Any combination of one or more computer-readable media may be utilized. A computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, for example but not limited to, an electrical, magnetic, optical, electromagnetic, infrared or semiconductor system, device or apparatus, or any suitable combination of the foregoing. More specific examples (not a complete list) of computer-readable storage media would include the following: an electrical connector having one or more wires, a portable computer floppy disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium is any tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device or apparatus.

[0076] A computer readable signal medium may include a propagated data signal having computer readable program code embodied therein (e.g., in baseband or as part of a carrier wave). Such a propagated signal may take any of a variety of forms, including but not limited to electromagnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0077] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0078] The computer program code for performing operations for various aspects of the present disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages ​​(such as Java, Smalltalk, C++, etc.) and conventional procedural programming languages ​​(such as the "C" programming language or similar programming languages). The program code can be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0079] Aspects of the present disclosure are described below with reference to flowchart illustrations and / or block diagrams of the methods, devices (systems) and computer program products of the embodiments presented in the present disclosure. It should be understood that each frame of the flowchart illustration and / or block diagram and the combination of frames in the flowchart illustration and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine, so that instructions executed by a processor of a computer or other programmable data processing device create components for implementing the functions / actions specified in one or more frames of a flowchart and / or block diagram.

[0080] These computer program instructions may also be stored in a computer-readable medium that can direct a computer, other programmable data processing apparatus, or other device to function in a specific manner, so that the instructions stored in the computer-readable medium produce an article of manufacture including instructions for implementing the functions / actions specified in one or more boxes of the flowchart and / or block diagram.

[0081] The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operating steps to be performed on the computer, other programmable apparatus, or other devices to produce a computer-implemented method, so that the instructions executed on the computer or other programmable apparatus provide a process for implementing the functions / actions specified in one or more boxes of the flowchart and / or block diagram.

[0082] The flow chart and block diagram in the figure illustrate the possible concrete implementation architecture, functionality and operation of the system, method and computer program product according to various examples of the present invention.In this regard, each frame in the flow chart or block diagram may represent the module, segment or part of one or more executable instructions for realizing the specified logical function of the instruction.In some alternative implementations, the function pointed out in the frame may not occur in the order pointed out in the figure.For example, depending on the functionality involved, the two frames shown in succession can actually be performed substantially at the same time, or these frames can sometimes be performed in reverse order.It will also be noted that each frame in the block diagram and / or flow chart illustration and the combination of the frames in the block diagram and / or flow chart illustration can be realized by a system based on special hardware that performs a specified function or action or performs a combination of special hardware and computer instructions.

[0083] The above-described techniques may be expressed in terms of some non-limiting embodiments described below.

[0084] Embodiment 1. A configurable device, the configurable device comprising:

[0085] central configuration manager circuitry; and

[0086] A plurality of configuration interface manager (CIM) circuits connected to the central configuration manager circuit and distributed throughout the configurable device

[0087] wherein the central configuration manager circuit is configured to:

[0088] receiving a device image for configuring the configurable device;

[0089] parsing the device image to identify configuration groups for the plurality of CIM circuits; and

[0090] sending the configuration packet to the plurality of CIM circuits; and

[0091] The plurality of CIM circuits are configured to forward the configuration packet to an assigned area of ​​the configurable device.

[0092] Embodiment 2. A configurable device according to embodiment 1, wherein the device image is received in at least one of the following: (i) as streaming data at the central configuration manager circuit, or (ii) via memory mapped data written at the central configuration manager circuit.

[0093] Embodiment 3. A configurable device according to embodiment 2, wherein the streaming data or the memory-mapped data includes an embedded header, which indicates which configuration data in the streaming data or the memory-mapped data is intended for which of the assigned regions.

[0094] Embodiment 4. The configurable device of embodiment 3, wherein each CIM circuit of the plurality of CIM circuits is assigned to only one region, wherein each CIM circuit of the plurality of CIM circuits receives only configuration data intended for its assigned region.

[0095] Embodiment 5. The configurable device of embodiment 1 further comprising only one integrated circuit, wherein the assigned region separates subsystems in the integrated circuit.

[0096] Embodiment 6. The configurable device of embodiment 1, further comprising a plurality of integrated circuits, wherein at least one of the assigned regions spans across the plurality of integrated circuits.

[0097] Embodiment 7. The configurable device of embodiment 6, wherein at least two of the assigned regions span the plurality of integrated circuits.

[0098] Embodiment 8. A configurable device according to embodiment 1, wherein the central configuration manager circuit is configured to use the configuration information in the device image to configure a network in the configurable device before sending the configuration packet to the multiple CIM circuits, wherein the network communicatively couples the multiple CIM circuits to the central configuration manager.

[0099] Embodiment 9. The configurable device of embodiment 8, wherein the central configuration manager circuit comprises a CIM circuit among the plurality of CIM circuits that uses the configuration information to configure the network.

[0100] Embodiment 10. A method, comprising:

[0101] receiving, at a central configuration manager circuit, a device image for configuring a configurable device;

[0102] Parse the device image to identify configurations for a plurality of CIM circuits in the configurable device.

[0103] Set grouping;

[0104] sending the configuration packet from the central configuration manager circuit to the plurality of CIM circuits;

[0105] as well as

[0106] The configuration packet is forwarded by the plurality of CIM circuits to an assigned area of ​​the configurable device.

[0107] Embodiment 11. A method according to embodiment 10, wherein the device image is received in at least one of the following: (i) as streaming data at the central configuration manager circuit, or (ii) via memory mapped data written at the central configuration manager circuit.

[0108] Embodiment 12. The method according to embodiment 11, wherein the streaming data or the memory mapping data includes an embedded header, which indicates which configuration data in the streaming data or the memory mapping data is intended for which of the assignment areas.

[0109] Embodiment 13. The method of embodiment 12, wherein each CIM circuit of the plurality of CIM circuits is assigned to only one zone, wherein each CIM circuit of the plurality of CIM circuits receives only configuration data intended for its assigned zone.

[0110] Embodiment 14. The method of embodiment 10, wherein the configurable device comprises only one integrated circuit, wherein the assigned region separates subsystems in the integrated circuit.

[0111] Embodiment 15. The method of Embodiment 10, wherein the configurable device comprises a plurality of integrated circuits, wherein at least one of the assigned regions spans the plurality of integrated circuits.

[0112] Embodiment 16. The method according to embodiment 10, further comprising:

[0113] Prior to sending the configuration packet to the plurality of CIM circuits, a network in the configurable device is configured using the configuration information in the device image, wherein the network communicatively couples the plurality of CIM circuits to the central configuration manager.

[0114] Embodiment 17. The method of embodiment 16, wherein the central configuration manager circuit includes a CIM circuit among the plurality of CIM circuits that uses the configuration information to configure the network.

[0115] Embodiment 18. A configurable device, the configurable device comprising:

[0116] central configuration manager circuit;

[0117] Network; and

[0118] a plurality of configuration interface manager (CIM) circuits connected to the central configuration manager circuit via the network;

[0119] Wherein the central configuration manager circuit is configured as:

[0120] receiving a device image for configuring the configurable device;

[0121] identifying a portion of the device image intended for each CIM circuit of the plurality of CIM circuits; and

[0122] sending the portion of the device image to the plurality of CIM circuits; and

[0123] The plurality of CIM circuits are configured to forward the portion of the device image to an assigned area of ​​the configurable device.

[0124] Embodiment 19. The configurable device of Embodiment 18, wherein the device image includes an embedded header that indicates which portions of the device image are intended for use with which of the assigned regions.

[0125] Embodiment 20. The configurable device of embodiment 18, wherein communications between the central configuration manager circuit and the plurality of CIM circuits are encrypted, wherein each CIM circuit of the plurality of CIM circuits decrypts the portion received from the central configuration manager circuit, and

[0126] Wherein each CIM circuit of the plurality of CIM circuits is configured to perform an integrity check on the portion received from the central configuration manager circuit.

[0127] While the foregoing is directed to particular examples, other and further examples may be devised without departing from the basic scope of the invention, and the scope of the invention is determined by the following claims.

Claims

1. A configurable device, the configurable device comprising: central configuration manager circuit; and a plurality of configuration interface manager (CIM) circuits connected to the central configuration manager circuit and distributed throughout the configurable devices; Wherein the central configuration manager circuit is configured to: receiving a device image for configuring the configurable device; parsing the device image to identify configuration groups for the plurality of CIM circuits; and sending the configuration packet to the plurality of CIM circuits; and The plurality of CIM circuits are configured to forward the configuration packets to an assigned area of ​​the configurable device.

2. The configurable device of claim 1 , wherein the device image is received in at least one of: (i) as streaming data at the central configuration manager circuit, or (ii) via memory mapped data written at the central configuration manager circuit.

3. The configurable device of claim 1, further comprising only one integrated circuit, wherein the assigned regions partition subsystems in the integrated circuit. 4 . The configurable device of claim 1 , further comprising a plurality of integrated circuits, wherein at least one of the assigned regions spans across the plurality of integrated circuits. 5 . The configurable device of claim 4 , wherein at least two of the assigned regions span the plurality of integrated circuits.

6. The configurable device of claim 1 , wherein the central configuration manager circuit is configured to use the configuration information in the device image to configure a network in the configurable device before sending the configuration packet to the plurality of CIM circuits, wherein the network communicatively couples the plurality of CIM circuits to the central configuration manager.

7. A method comprising: receiving, at a central configuration manager circuit, a device image for configuring a configurable device; parsing the device image to identify configuration groups for a plurality of CIM circuits in the configurable device; sending the configuration packet from the central configuration manager circuit to the plurality of CIM circuits; as well as The configuration packet is forwarded by the plurality of CIM circuits to an assigned area of ​​the configurable device.

8. The method of claim 7, wherein the device image is received in at least one of: (i) as streaming data at the central configuration manager circuit, or (ii) via memory mapped data written at the central configuration manager circuit.

9. The method of claim 8, wherein the streaming data or the memory-mapped data includes an embedded header indicating which configuration data in the streaming data or the memory-mapped data is intended for which of the assigned regions.

10. The method of claim 7, wherein the configurable device comprises only one integrated circuit, wherein the assigned regions partition subsystems within the integrated circuit.

11. The method of claim 7, wherein the configurable device comprises a plurality of integrated circuits, wherein at least one of the assigned regions spans the plurality of integrated circuits.

12. The method according to claim 7, further comprising: Prior to sending the configuration packet to the plurality of CIM circuits, a network in the configurable device is configured using the configuration information in the device image, wherein the network communicatively couples the plurality of CIM circuits to the central configuration manager.

13. A configurable device, the configurable device comprising: central configuration manager circuit; network; and a plurality of configuration interface manager (CIM) circuits connected to the central configuration manager circuit via the network; Wherein the central configuration manager circuit is configured to: receiving a device image for configuring the configurable device; identifying a portion of the device image intended for each CIM circuit of the plurality of CIM circuits; as well as sending the portion of the device image to the plurality of CIM circuits; and Wherein the plurality of CIM circuits are configured to forward the portion of the device image to an assigned area of ​​the configurable device.

14. The configurable device of claim 13, wherein the device image includes an embedded header that indicates which portions of the device image are intended for which of the assigned regions.

15. The configurable device of claim 13, wherein communications between the central configuration manager circuit and the plurality of CIM circuits are encrypted, wherein each of the plurality of CIM circuits decrypts the portion received from the central configuration manager circuit, and Wherein each CIM circuit of the plurality of CIM circuits is configured to perform an integrity check on the portion received from the central configuration manager circuit.

Images