Test equipment

Abstract

The application discloses a test device for electrically testing a chip. The test device comprises a housing, a first circuit board and a probe connector. The first circuit board is arranged in the housing, and a plane of the first circuit board is perpendicular to a plane of the chip. The probe connector comprises a base, a second circuit board, a plurality of first probes and a plurality of second probes. The second circuit board is arranged in the base. The base comprises a first base portion and a second base portion arranged perpendicularly to the first base portion. The first base portion is connected to the housing, and the second base portion extends from the first base portion to the outside of the housing. The first probes are arranged in the first base portion along a first direction, and opposite ends of the first probes are electrically connected to the second circuit board and the first circuit board respectively. The second probes are arranged in the second base portion along a second direction, and opposite ends of the second probes are electrically connected to the second circuit board and the chip respectively. In this way, the high and low performance of the chip can be synchronously tested.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor testing devices, and in particular to a testing device. BACKGROUND

[0002] With the development of the communication industry, the requirements for chips and chip testing are also increasing. At present, when the high-frequency performance and the low-frequency performance of the chip are tested synchronously, the high-frequency testing device will interfere with the low-frequency testing device due to the space problem of the testing device, and the testing cannot be performed synchronously, which affects the testing effect.

[0003] Therefore, it is necessary to provide a testing device to solve the above problems. SUMMARY

[0004] The present application aims to provide a testing device, which can synchronize the low-frequency performance testing and the high-frequency performance testing, and improve the testing efficiency.

[0005] To achieve the above-mentioned purpose, the present application adopts the following technical solutions:

[0006] A testing device for testing the electrical performance of a chip under test, comprising:

[0007] a housing;

[0008] a first circuit board arranged in the housing, the plane of the first circuit board being perpendicular to the plane of the chip under test;

[0009] a probe connector, the probe connector comprising a base, a second circuit board, a plurality of first probes and a plurality of second probes, the second circuit board being arranged in the base, the base comprising a first base portion and a second base portion arranged perpendicularly to the first base portion, the first base portion being parallel to the first circuit board, the second base portion being parallel to the chip under test, the first base portion being connected to the housing, the second base portion extending from the first base portion to the outside of the housing, the first probes being arranged in the first base portion along a first direction, and the opposite ends of the first probes being electrically connected to the second circuit board and the first circuit board respectively, the second probes being arranged in the second base portion along a second direction, and the opposite ends of the second probes being electrically connected to the second circuit board and the chip under test respectively, the first direction being perpendicular to the second direction;

[0010] the second circuit board comprising a first sub-circuit board and a second sub-circuit board, the first sub-circuit board being arranged in the first base portion, the second sub-circuit board being arranged in the second base portion, the first sub-circuit board being electrically connected to the second sub-circuit board;

[0011] The probe connector further comprises a first pressing plate arranged between the first sub-circuit board and the first base, one end of the first probe is electrically connected with the first sub-circuit board through the first pressing plate.

[0012] The first base has a first recess, the first recess has a plurality of first through holes, at least part of the first probe is inserted into the first through holes, the first pressing plate is arranged in the first recess, and at least another part of the first probe is electrically connected with the first sub-circuit board through the first pressing plate.

[0013] The first through hole comprises a first hole part and a second hole part, the first hole part and the second hole part are communicated, the diameter of the first hole part is greater than that of the second hole part, the first hole part is close to the first pressing plate relative to the second hole part, the first probe comprises a first body part and two first contact parts elastically arranged at opposite ends of the first body part, the first body part is arranged in the first hole part, one of the first contact parts is electrically connected with the first circuit board through the second hole part, and the other of the first contact parts is electrically connected with the first sub-circuit board through the first pressing plate.

[0014] Further, the probe connector further comprises a connecting line, two ends of the connecting line are electrically connected with the first sub-circuit board and the second sub-circuit board respectively.

[0015] Further, the probe connector further comprises a second pressing plate arranged between the second sub-circuit board and the second base, one end of the second probe is electrically connected with the second sub-circuit board through the second pressing plate.

[0016] Further, the second base has a second recess, the second recess has a plurality of second through holes, at least part of the second probe is inserted into the second through holes, the second pressing plate is arranged in the second recess, and at least another part of the second probe is electrically connected with the second sub-circuit board through the second pressing plate.

[0017] Further, the second through hole comprises a third hole part and a fourth hole part, the third hole part and the fourth hole part are communicated, and the diameter of the third hole part is greater than that of the fourth hole part, the third hole part is close to the second pressing plate relative to the fourth hole part, the second probe comprises a second body part and two second contact parts elastically arranged at opposite ends of the second body part, the second body part is arranged in the third hole part, one of the second contact parts is electrically connected with the to-be-tested chip through the fourth hole part, and the other of the second contact parts is electrically connected with the second sub-circuit board through the second pressing plate.

[0018] Further, the first recess is provided with a first positioning column, the first pressing plate is provided with a first positioning hole, the first sub-circuit board is provided with a second positioning hole, and the first positioning column passes through the first positioning hole and the second positioning hole; the second recess is provided with a second positioning column, the second pressing plate is provided with a third positioning hole, the second sub-circuit board is provided with a fourth positioning hole, and the second positioning column passes through the third positioning hole and the fourth positioning hole.

[0019] Further, the probe connector further comprises a first fastener and a second fastener, the first fastener connects the first sub-circuit board, the first pressing plate and the first base, and the second fastener connects the second sub-circuit board, the second pressing plate and the second base.

[0020] Compared with the prior art, the present application has the following beneficial effects:

[0021] The present application discloses a test device for testing the electrical performance of a chip to be tested. The test device comprises a housing, a first circuit board and a probe connector. The first circuit board is arranged in the housing, and the plane of the first circuit board is perpendicular to the plane of the chip to be tested. The probe connector comprises a base, a second circuit board, a plurality of first probes and a plurality of second probes. The second circuit board is arranged in the base, and the base comprises a first base and a second base arranged vertically on the first base, the first base is connected with the housing, and the second base extends outward from the first base to the housing. By arranging the first probes in the first base along a first direction, arranging the second probes in the second base along a second direction, and electrically connecting the opposite ends of the second probes with the second circuit board and the chip to be tested respectively, the low-frequency performance of the chip to be tested is tested. In this way, when the test device tests the low-frequency performance of the chip to be tested, it does not interfere with the device that tests the high-frequency performance, improves the test efficiency and reduces the cost. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is a perspective view of the test device and the chip to be tested in the present application;

[0023] Figure 2 is a perspective exploded view of the test device in the present application;

[0024] Figure 3 is a perspective view of the probe connector in the present application;

[0025] Figure 4 is a perspective view of the probe connector in the present application; Figure 3 from another angle;

[0026] Figure 5 is a top view of Figure 3 ;

[0027] Figure 6 is Figure 5 a sectional view along A-A in

[0028] Figure 7 is Figure 3 a perspective exploded view of

[0029] Figure 8 is Figure 7 a partial enlarged view of part B in

[0030] Figure 9 is Figure 7 a partial enlarged view of part C in

[0031] Figure 10 is a perspective view of the base, the first probe, the first pressing plate, the second probe and the second pressing plate in the present application;

[0032] Figure 11 is Figure 10 a perspective exploded view of

[0033] Figure 12 is a perspective view of the base in the present application;

[0034] Figure 13 is a perspective view of the base, the first pressing block and the second pressing block in the assembled state in the present application;

[0035] Figure 14 is Figure 13 a partial enlarged view of part D in

[0036] Figure 15 is Figure 14 a partial enlarged view of part E in DETAILED DESCRIPTION

[0037] The exemplary embodiments of the present application will be described in detail below with reference to the accompanying drawings. If there are several embodiments, the features in these embodiments can be combined with each other when there is no conflict. When the description refers to the accompanying drawings, the same numbers in different drawings represent the same or similar elements unless otherwise specified. The description in the following exemplary embodiments does not represent all the embodiments consistent with the present application; rather, they are merely examples of devices, products and / or methods consistent with some aspects of the present application as recited in the claims of the present application.

[0038] The terms used in the present application are merely for the purpose of describing the exemplary embodiments, and are not intended to limit the scope of the protection of the present application. The singular forms "a", "an" and "the" used in the specification and claims of the present application are also intended to include the plural forms unless the context clearly indicates otherwise.

[0039] Referring to Figures 1 to 15 The present application discloses a testing device 100 for testing the electrical performance of a chip 200. The testing device 100 comprises a housing 1, a first circuit board 2 and a probe connector 3. The first circuit board 2 is arranged in the housing 1, and the plane of the first circuit board 2 is perpendicular to the plane of the chip 200. The housing 1 has a receiving cavity 101, and the first circuit board 2 is arranged in the receiving cavity 101. The outer wall of the housing 1 has a mounting hole 102, and at least part of the testing device 100 extends out of the mounting hole 102. The probe connector 3 comprises a base 31, a second circuit board 32, a plurality of first probes 33 and a plurality of second probes 34. The second circuit board 32 is arranged in the base 31. The base 31 comprises a first base portion 311 and a second base portion 312 arranged perpendicularly to the first base portion 311. The first base portion 311 is parallel to the first circuit board 2, and the second base portion 312 is parallel to the chip 200. The first base portion 311 is connected to the housing 1, and the second base portion 312 extends outwardly from the first base portion 311. The first probes 33 are arranged in the first base portion 311 along a first direction D1-D1, and the opposite ends of the first probes 33 are electrically connected to the second circuit board 32 and the first circuit board 2, respectively. The second probes 34 are arranged in the second base portion 312 along a second direction D2-D2, and the opposite ends of the second probes 34 are electrically connected to the second circuit board 32 and the chip 200, respectively. In this way, when the testing device 100 tests the low-frequency performance of the chip 200, it does not interfere with another device that tests the high-frequency performance, thereby improving the testing efficiency and reducing the cost.

[0040] For ease of illustration, as shown in the accompanying drawings Figure 2 The front-to-back direction of the probe mechanism is defined as the first direction D1-D1, the up-to-down direction of the probe mechanism is defined as the second direction D2-D2, and the left-to-right direction of the probe mechanism is defined as the third direction D3-D3. The first direction D1-D1, the second direction D2-D2 and the third direction D3-D3 are perpendicular to each other.

[0041] Referring to Figure 2 In this embodiment, the first circuit board 2 is fixed to the inner wall of the housing 1. The wall of the housing 1 is provided with a boss 11, and the boss 11 is arranged close to the mounting hole 102. At least part of the first base portion 311 is located in the receiving cavity 101, and at least part of the first base portion 311 is connected to the boss 11 by a fastener. At least another part of the first base portion 311 extends outwardly from the mounting hole 102 along the second direction D2-D2, and the second base portion 312 is arranged perpendicularly to the free end of the first base portion 311 along the first direction D1-D1.

[0042] Referring to Figures 3 to 6The second circuit board 32 comprises a first sub-circuit board 321 and a second sub-circuit board 322. The first sub-circuit board 321 is arranged on the first base 311, and the second sub-circuit board 322 is arranged on the second base 312. The first sub-circuit board 321 is electrically connected to the second sub-circuit board 322. In this embodiment, the first base 311 and the second base 312 are in the shape of "L". The first sub-circuit board 321 and the second sub-circuit board 322 are arranged on the same side of the base 31, so that the first sub-circuit board 321 and the second sub-circuit board 322 can be electrically connected. In this embodiment, the probe connector 3 further comprises a connecting wire. The two ends of the connecting wire are electrically connected to the first sub-circuit board 321 and the second sub-circuit board 322 respectively, so that the first sub-circuit board 321, the second sub-circuit board 322 and the first circuit board 2 are electrically connected, thereby enabling the low-frequency performance of the chip 200 to be tested. In other embodiments, the second circuit board 32 is a flexible circuit board as a whole. The flexible circuit board is electrically connected to the first probe 33 and the second probe 34 respectively, and the low-frequency performance of the chip 200 can also be tested. Here, no limitation is made.

[0043] Please refer to Figures 3 to 7 The probe connector 3 further comprises a first pressing plate 35 and a second pressing plate 36. The first pressing plate 35 is arranged between the first sub-circuit board 321 and the first base 311. One end of the first probe 33 passes through the first pressing plate 35 and is electrically connected to the first sub-circuit board 321. The second pressing plate 36 is arranged between the second sub-circuit board 322 and the second base 312. One end of the second probe 34 passes through the second pressing plate 36 and is electrically connected to the second sub-circuit board 322. In this way, the first probes 33 can be fixed to the first base 311, and the second probes 34 can be fixed to the second base 312, thereby improving the test stability of the first probes 33 and the second probes 34.

[0044] Please refer to Figure 7 The first base 311 has a first recess 3111. The first recess 3111 has a plurality of first through holes 301. At least part of the first probes 33 are inserted into the first through holes 301. The first pressing plate 35 is arranged in the first recess 3111. At least another part of the first probes 33 pass through the first pressing plate 35 and are electrically connected to the first sub-circuit board 321. In this embodiment, the first recess 3111 is arranged on the other side of the first base 311 relative to the second base 312. The plurality of first through holes 301 extend along the third direction D3-D3. The number of the plurality of first through holes 301 is arranged according to the test requirements to cooperate with the installation of the first probes 33. The shape of the first recess 3111 is consistent with the shape of the first pressing plate 35, so that the first pressing plate 35 can be embedded in the first recess 3111, thereby making the overall structure of the probe connector 3 more compact.

[0045] Please refer toFigures 3 to 15 The first through hole 301 includes a first hole portion 3001 and a second hole portion 3002, the first hole portion 3001 communicates with the second hole portion 3002, the diameter of the first hole portion 3001 is larger than that of the second hole portion 3002, the first hole portion 3001 is close to the first pressing plate 35 relative to the second hole portion 3002, the first probe 33 includes a first body portion 331 and two first contact portions 332 elastically arranged at opposite ends of the first body portion 331, the first body portion 331 is arranged in the first hole portion 3001, one of the first contact portions 332 passes through the second hole portion 3002 and is electrically connected with the first circuit board 2, and the other of the first contact portions 332 passes through the first pressing plate 35 and is electrically connected with the first sub-circuit board 321. In the embodiment, the first pressing plate 35 is provided with a plurality of first limiting holes 303, the arrangement direction of the plurality of first limiting holes 303 is consistent with the arrangement direction of the first through holes 301, and each of the first limiting holes 303 is arranged in correspondence with each of the first through holes 301 in the up-down direction, so as to facilitate assembly of the first probe 33. Specifically, the first limiting hole 303 includes a fifth hole portion 3005 and a sixth hole portion 3006, the fifth hole portion 3005 communicates with the sixth hole portion 3006, and the diameter of the fifth hole portion 3005 is larger than that of the sixth hole portion 3006. At least part of the first body portion 331 of the first probe 33 is arranged in the fifth hole portion 3005, and one of the first contact portions 332 passes through the sixth hole portion 3006 and is electrically connected with the first sub-circuit board 321. In this way, when the first pressing plate 35 is embedded in the first groove 3111, the first probe 33 can be fixed between the first base 311 and the first pressing plate 35, so as to avoid position change of the first probe 33 and circuit disconnection, thereby affecting the test.

[0046] Please refer to Figures 3 to 15 The second base 312 has a second groove 3121, the second groove 3121 has a plurality of second through holes 302, at least part of the second probes 34 are inserted into the second through holes 302, the second pressing plate 36 is arranged in the second groove 3121, and at least another part of the second probes 34 passes through the second pressing plate 36 and is electrically connected with the second sub-circuit board 322. In the embodiment, the second groove 3121 is arranged on the other side of the second base 312 relative to the first base 311. The plurality of second through holes 302 are arranged in the third direction D3-D3. The number of the plurality of second through holes 302 is arranged according to the need of the test, so as to cooperate with the installation of the second probe 34. The shape of the second groove 3121 is consistent with that of the second pressing plate 36, so that the second pressing plate 36 can be embedded in the second groove 3121, thereby making the overall structure of the probe connector 3 more compact.

[0047] The second through hole 302 comprises a third hole portion 3003 and a fourth hole portion 3004, the third hole portion 3003 and the fourth hole portion 3004 are communicated, and the diameter of the third hole portion 3003 is larger than that of the fourth hole portion 3004, the third hole portion 3003 is close to the second pressing plate 36 relative to the fourth hole portion 3004, the second probe 34 comprises a second body portion 341 and two second contact portions 342 elastically arranged at opposite ends of the second body portion 341, the second body portion 341 is arranged in the third hole portion 3003, one of the second contact portions 342 passes through the fourth hole portion 3004 and is electrically connected with the chip 200 to be tested, and the other of the second contact portions 342 passes through the second pressing plate 36 and is electrically connected with the second sub-circuit board 322. In the embodiment, the second pressing plate 36 is provided with a plurality of second limiting holes 304, the arrangement direction of the plurality of second limiting holes 304 is consistent with that of the second through holes 302, and each of the second limiting holes 304 is arranged in correspondence with each of the second through holes 302 in up and down direction, so as to facilitate assembly of the second probe 34. Specifically, the second limiting hole 304 comprises a seventh hole portion 3007 and an eighth hole portion 3008, the seventh hole portion 3007 and the eighth hole portion 3008 are communicated, and the diameter of the seventh hole portion 3007 is larger than that of the eighth hole portion 3008. The second body portion 341 of at least part of the second probe 34 is arranged in the seventh hole portion 3007, and one of the second contact portions 342 passes through the eighth hole portion 3008 and is electrically connected with the second sub-circuit board 322. In this way, when the second pressing plate 36 is embedded in the second groove 3121, the second probe 34 can be fixed between the second base 312 and the second pressing plate 36, so as to avoid change of position of the second probe 34 and circuit disconnection, and affect the test.

[0048] Please refer to Figure 7 and Figures 10 to 12, the first recess 3111 is provided with a first positioning column 3112, the first pressing plate 35 is provided with a first positioning hole 305, and the first sub-circuit board 321 is provided with a second positioning hole 306. Specifically, the first positioning column 3112 includes two, and the two first positioning columns 3112 are arranged at the top of the first recess 3111 along the third direction D3-D3. The first positioning hole 305 includes two, and the two first positioning holes 305 are arranged at the first pressing plate 35 along the third direction D3-D3. The second positioning hole 306 includes two, and the two second positioning holes 306 are arranged at the first sub-circuit board 321 along the third direction D3-D3. The first positioning column 3112, the first positioning hole 305 and the second positioning hole 306 are arranged in a one-to-one correspondence. When the first pressing plate 35 is embedded in the first recess 3111 and the first sub-circuit board 321 is arranged at the top of the first pressing plate 35, the first positioning column 3112 passes through the first positioning hole 305 and the second positioning hole 306, so that the first base 311, the first pressing plate 35 and the first sub-circuit board 321 are fixed firmly, and the test accuracy is improved. The second base 312 is provided with a second positioning column 3122, the second pressing plate 36 is provided with a third positioning hole 307, and the second sub-circuit board 322 is provided with a fourth positioning hole 308. Specifically, the second positioning column 3122 includes two, and the two second positioning columns 3122 are arranged at the top of the second recess 3121 along the third direction D3-D3. The third positioning hole 307 includes two, and the two third positioning holes 307 are arranged at the second pressing plate 36 along the third direction D3-D3. The fourth positioning hole 308 includes two, and the two fourth positioning holes 308 are arranged at the second sub-circuit board 322 along the third direction D3-D3. The second positioning column 3122, the third positioning hole 307 and the fourth positioning hole 308 are arranged in a one-to-one correspondence. When the second pressing plate 36 is embedded in the second recess 3121 and the second sub-circuit board 322 is arranged at the top of the second pressing plate 36, the second positioning column 3122 passes through the third positioning hole 307 and the fourth positioning hole 308, so that the second base 312, the second pressing plate 36 and the second sub-circuit board 322 are fixed firmly, and the test accuracy is improved.

[0049] Please refer to Figures 10 to 11 The first pressing plate 35 is further provided with a first connecting hole 309, the first connecting hole 309 is located between the two first positioning holes 305, and a fastener passes through the first connecting hole 309 and is screwed with the first base 311, so that the first pressing plate 35 is connected and fixed with the first base 311, thereby fixing the first probe 33 to the first base 311. The second pressing plate 36 is further provided with two second connecting holes 310, the two first connecting holes 309 are located outside the two second limiting holes 304, and a fastener passes through the second connecting hole 310 and is screwed with the second base 312, so that the second pressing plate 36 is connected and fixed with the second base 312, thereby fixing the second probe 34 to the second base 312.

[0050] Please refer to Figure 7 The probe connector 3 further comprises a first fastener 37 and a second fastener 38. The first fastener 37 is connected with the housing 1 through the first sub-circuit board 321, the first pressing plate 35 and the first base 311. The second fastener 38 is connected with the second base 312 through the second sub-circuit board 322 and the second pressing plate 36. In the embodiment, the first fastener is fixedly connected with the boss 11, so as to fix the probe connector 3 to the boss 11.

[0051] In summary, the present application discloses a test device 100 for testing the electrical performance of a chip 200. The test device 100 comprises a housing 1, a first circuit board 2 and a probe connector 3. The first circuit board 2 is arranged in the housing 1, and the plane of the first circuit board 2 is perpendicular to the plane of the chip 200. The probe connector 3 comprises a base 31, a second circuit board 32, a plurality of first probes 33 and a plurality of second probes 34. The second circuit board 32 is arranged in the base 31. The base 31 comprises a first base 311 and a second base 312 arranged perpendicularly to the first base 311. The first base 311 is connected with the housing 1, and the second base 312 extends outwardly from the first base 311. The first probes 33 are arranged in the first base 311 along a first direction D1-D1, and the second probes 34 are arranged in the second base 312 along a second direction D2-D2. The opposite ends of the second probes 34 are electrically connected with the second circuit board 32 and the chip 200, respectively. The low-frequency performance of the chip 200 is tested. In this way, the test device 100 for testing the low-frequency performance of the chip 200 does not interfere with the device for testing the high-frequency performance, so as to improve the test efficiency and reduce the cost.

[0052] It should be understood that the use of terms such as "first" and "second", and words of simi lar effect, used in the description and claims of the present application do not connote any ordinal, chronological, positional or spatial importance, but are simply used to distinguish one feature from another. Similarly, the use of terms such as "a" and "an", as well as "the" and "said", are not intended to refer to only a singular entity, but include the general class of which a specific example could be used for illustration. The words "comprise", "comprises" and "comprising" and the like are used herein to specify the presence of stated features, integers, steps and / or components but do not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof. The use of the word "about" is intended to modify any term it precedes so as to permit for some imprecision in the values it precedes. If imprecision is not intended, the term "exactly" will be used instead. The indefinite articles "a" and "an", as used herein in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean "at least one".

[0053] The above examples are only used to illustrate the present application and not to limit the technical solutions described in the present application. The understanding of the present specification should be based on the skilled person in the art. For example, the directional description such as "front", "back", "left", "right", "up", "down", and the like. Although the present specification has been described in detail with reference to the above examples, it should be understood by those skilled in the art that the skilled person in the art can still modify or equivalently replace the present application, and all technical solutions and improvements which do not deviate from the spirit and scope of the present application should be covered within the scope of the claims of the present application.

Claims

1. A test device for performing electrical performance testing on a chip to be tested (200), characterized in that: include: Housing (1); A first circuit board (2) is arranged in the housing (1), wherein the plane where the first circuit board (2) is located is perpendicular to the plane where the chip to be tested (200) is located; A probe connector (3), the probe connector (3) comprising a base (31), a second circuit board (32), a plurality of first probes (33) and a plurality of second probes (34), the second circuit board (32) being arranged on the base (31), the base (31) comprising a first base (311) and a second base (312) arranged perpendicularly to the first base (311), the first base and the first circuit board (2) being parallel to each other, the second base (312) and the chip to be tested (200) being parallel to each other, the first base (311) being connected to the housing (1), The second base (312) extends from the first base (311) to the outside of the housing (1); the first probe (33) is arranged in the first base (311) along a first direction, and the opposite ends of the first probe (33) are electrically connected to the second circuit board (32) and the first circuit board (2) respectively; the second probe (34) is arranged in the second base (312) along a second direction, and the opposite ends of the second probe (34) are electrically connected to the second circuit board (32) and the chip to be tested (200) respectively, and the first direction is perpendicular to the second direction; The second circuit board (32) comprises a first sub-circuit board (321) and a second sub-circuit board (322), wherein the first sub-circuit board (321) is arranged on the first base portion (311), and the second sub-circuit board (322) is arranged on the second base portion (312), and the first sub-circuit board (321) and the second sub-circuit board (322) are electrically connected; The probe connector (3) further comprises a first pressing plate (35), wherein the first pressing plate (35) is arranged between the first sub-circuit board (321) and the first base (311), and one end of the first probe (33) passes through the first pressing plate (35) and is electrically connected to the first sub-circuit board (321); The first base (311) has a first groove (3111), the first groove (3111) has a plurality of first through holes (301), at least part of the first probes (33) are inserted into the first through holes (301), the first pressing plate (35) is arranged in the first groove (3111), and at least another part of the first probes (33) passes through the first pressing plate (35) and is electrically connected to the first sub-circuit board (321); The first through hole (301) includes a first hole portion (3001) and a second hole portion (3002), the first hole portion (3001) and the second hole portion (3002) are connected, the diameter of the first hole portion (3001) is larger than that of the second hole portion (3002), the first hole portion (3001) is closer to the first pressure plate (35) relative to the second hole portion (3002), the first probe (33) includes a first body portion (331) and two first contact portions (332) elastically arranged at opposite ends of the first body portion (331), the first body portion (331) is arranged in the first hole portion (3001), one of the first contact portions (332) passes through the second hole portion (3002) and is electrically connected to the first circuit board (2), and the other first contact portion (332) passes through the first pressure plate (35) and is electrically connected to the first sub-circuit board (321).

2. The test device according to claim 1, wherein: The probe connector (3) further comprises a connecting wire, the two ends of which are electrically connected to the first sub-circuit board (321) and the second sub-circuit board (322) respectively.

3. The testing device according to claim 2, wherein: The probe connector (3) further includes a second pressing plate (36), which is arranged between the second sub-circuit board (322) and the second base (312), and one end of the second probe (34) passes through the second pressing plate (36) and is electrically connected to the second sub-circuit board (322).

4. The testing device according to claim 3, wherein: The second base (312) has a second groove (3121), the second groove (3121) has a plurality of second through holes (302), at least part of the second probes (34) are inserted into the second through holes (302), the second pressing plate (36) is arranged in the second groove (3121), and at least another part of the second probes (34) passes through the second pressing plate (36) and is electrically connected to the second sub-circuit board (322).

5. The testing device according to claim 4, wherein: The second through hole (302) includes a third hole portion (3003) and a fourth hole portion (3004), the third hole portion (3003) is connected to the fourth hole portion (3004), and the diameter of the third hole portion (3003) is larger than that of the fourth hole portion (3004), and the third hole portion (3003) is closer to the second pressure plate (36) relative to the fourth hole portion (3004), and the second probe (34) includes a second body portion (341) and two second contact portions (342) elastically arranged at opposite ends of the second body portion (341), the second body portion (341) is arranged in the third hole portion (3003), one of the second contact portions (342) passes through the fourth hole portion (3004) to be electrically connected to the chip to be tested (200), and the other second contact portion (342) passes through the second pressure plate (36) to be electrically connected to the second sub-circuit board (322).

6. The testing device according to claim 5, wherein: A first positioning column (3112) is provided in the first groove (3111), the first pressure plate (35) has a first positioning hole (305), the first sub-circuit board (321) has a second positioning hole (306), and the first positioning column (3112) passes through the first positioning hole (305) and the second positioning hole (306); a second positioning column (3122) is provided in the second groove (3121), the second pressure plate (36) has a third positioning hole (307), the second sub-circuit board (322) has a fourth positioning hole (308), and the second positioning column (3122) passes through the third positioning hole (307) and the fourth positioning hole (308).

7. The testing device according to claim 3, wherein: The probe connector (3) further includes a first fastener (37) and a second fastener (38), wherein the first fastener (37) passes through the first sub-circuit board (321) and the first pressure plate (35) to be connected to the first base (311), and the second fastener (38) passes through the second sub-circuit board (322) and the second pressure plate (36) to be connected to the second base (312).

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