IC chip testing system and testing method

Abstract

The present invention provides an IC chip testing system and method. The testing system primarily includes a test control unit, a test management unit, and a test execution unit. The test control unit and the test management unit are connected via a network, and the test management unit and the test execution unit are connected via a hub. The test execution unit includes a programmer and a device under test. The programmer's input is connected to the hub, and its output is connected to the device under test. The device under test integrates a function board for different IC chip models, which is equipped with several peripheral driver hardware circuits. The present invention can shorten chip selection and verification cycles, reducing labor costs and the costs of supporting software and hardware.

Description

Technical Field

[0001] The present invention mainly relates to the field of chip testing technology, and in particular to an IC chip testing system and testing method. Background Art

[0002] An IC chip (integrated circuit chip) is a semiconductor product that integrates numerous microelectronic components (such as transistors, resistors, capacitors, and diodes) onto a small silicon wafer. These components are interconnected through complex circuits to form a microelectronic system with specific functions. IC chips are an indispensable component of modern electronic devices and are widely used in computers, communications equipment, consumer electronics, automotive electronics, industrial control systems, and other fields.

[0003] Chip performance testing is a crucial step in ensuring that a chip meets expected performance requirements in real-world applications, especially during the chip selection phase. These tests typically encompass multiple aspects, such as verifying the proper functioning of the chip's input and output interfaces and internal logic circuitry. Using specific test vectors or test engineering source code to simulate the chip's actual operating environment, observing whether the chip can correctly respond to and process data, and evaluating the chip's performance under various operating conditions, such as processing speed, power consumption, and latency. When conducting chip performance testing, consult the datasheets, technical documentation, and support tools provided by the manufacturer or distributor. These tests provide a comprehensive assessment of chip performance to ensure it meets the requirements of a specific application.

[0004] Currently, during the chip selection phase, users typically require the manufacturer or distributor to provide the chip, a supporting development board (or a custom-designed board), and technical documentation to verify that the chip's functionality meets their requirements. This process also requires the cooperation of a range of professional technicians, which can take time to communicate. For the manufacturer or distributor, the more users involved, the more resources they must invest. Overall, current approaches suffer from low chip testing efficiency and high investment costs. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide an IC chip testing system and testing method, which shortens the chip selection and verification cycle and reduces labor costs and software and hardware supporting costs.

[0006] In order to solve the above technical problems, in the first aspect, the present invention provides an IC chip testing system, comprising: a test control unit, a test management unit and a test execution unit, wherein the test control unit is connected to the test management unit via a network, and the test management unit is connected to the test execution unit via a hub; wherein the test execution unit comprises a burner and a device under test, the input end of the burner is connected to the hub, the output end of the burner is connected to the device under test, the device under test is integrated with a function board of different types of IC chips, and the function board is equipped with a number of peripheral drive hardware circuits; the test control unit is configured to: send binding or unbinding signals to the test management unit according to the received external input The method comprises the following steps: receiving a request from the device under test; sending information of the device under test and the test source code engineering file to the test management unit; receiving a test result sent by the test management unit; the test management unit being configured to: determine a current state of the device under test in the test execution unit; receiving information of the device under test and the test source code engineering file; binding or unbinding the device under test; compiling the test source code engineering file into an executable file; controlling the burner to burn the executable file; obtaining a test result from the test execution unit; and sending the test result to the test control unit; the test execution unit being configured to: execute a corresponding IC chip test process according to the burned test source code engineering file.

[0007] Optionally, the test control unit is configured with one or more of the following functions: IC chip selection, chip initialization configuration, template cases for test source code, code editing, project compilation, and remote monitoring and simulation functions.

[0008] Optionally, the peripheral driving hardware circuit includes one or more of the following: a TFT screen circuit, a digital tube clock circuit, a WIFI circuit, a buzzer circuit, a touch circuit, and a temperature acquisition circuit.

[0009] Optionally, the test execution unit further includes a camera and / or a microphone, which are connected to the hub and are used for video acquisition and voice acquisition during the IC chip test process, respectively.

[0010] In a second aspect, the present invention provides an IC chip testing method, which is applied to a test management unit in an IC chip testing system as described in the first aspect, and includes: determining the current status of a device under test in a test execution unit, and if the device under test is in an online state, determining whether the device under test is in an idle state; receiving information of the device under test and a test source code project file; executing a binding or unbinding operation of the device under test according to a request to bind or unbind the device under test; compiling the test source code project file into an executable file, and the source code project corresponding to the executable file is the test source code project file; controlling a burner in the test execution unit to burn the executable file; obtaining a test result of the test execution unit; and sending the test result to a test control unit.

[0011] Optionally, determining whether the device under test is in an idle state also includes: traversing all USB devices, obtaining the burner LinkID according to the device type, reading the ICID of the connected device through the burner, combining the LinkID and the device ICID to construct a device object with a unique identifier UID, adding the device object to the device under test list, and determining and marking the status of the device under test; wherein the ICID is the name of the IC chip corresponding to the device, and the LinkID is the burner identifier.

[0012] Optionally, compiling the test source code engineering file into an executable file includes: receiving the test source code engineering file to be compiled, starting a thread task to decrypt and decompress the test source code engineering file, compiling the test source code engineering file to generate an executable hex file, and feeding back compilation information and hex file path to the test control unit.

[0013] Optionally, performing the binding operation of the device under test according to the request to bind the device under test includes: according to the ICID and IP:Port in the connection request, searching for the device with idle ICID in the device under test list, updating its status to in use, and updating the binding object to IP:Port, wherein the ICID is the name of the IC chip corresponding to the device, and the IP:Port is the unique identification of the test control unit through IP and Port.

[0014] Optionally, obtaining the test result of the test execution unit includes: collecting operation data of each monitoring point in the device under test corresponding to the test execution unit.

[0015] In a third aspect, the present invention provides an IC chip testing method, which is applied to a test control unit in an IC chip testing system as described in the first aspect, and includes: determining an IC chip to be tested, generating an engineering project including initialization code and test code for chip resources used, wherein the engineering project is embodied as a test source code engineering file; sending a request to bind or unbind a device under test to a test management unit based on received external input; sending information of the device under test and a test source code engineering file to the test management unit; and receiving test results sent by the test management unit.

[0016] Optionally, the test source code project file includes: a test source code project file generated by selecting a template case, or a test source code project file formed by code editing.

[0017] Optionally, after receiving the test results sent by the test management unit, the method further includes: presenting corresponding function charts, curves, videos and / or voices on the monitoring interface.

[0018] In a fourth aspect, the present invention provides an electronic device comprising: a processor and a memory, wherein the memory stores a program or input instruction that can be run on the processor, and when the program or input instruction is executed by the processor, the steps of the IC chip testing method as described in the second aspect or the third aspect are implemented.

[0019] In a fifth aspect, the present invention provides a readable storage medium storing a program or input instruction. When the program or input instruction is executed by a processor, the steps of the IC chip testing method as described in the second aspect or the third aspect are implemented.

[0020] Compared with the existing technology, the present invention has the following advantages: the test control unit and the test management unit are connected through a network, and the test management unit and the test execution unit are connected through a hub, wherein the test execution unit includes a burner and a device under test, the input end of the burner is connected to the hub, and the output end of the burner is connected to the device under test, and the device under test is integrated with a functional board of different models of IC chips, and the functional board is equipped with a number of peripheral driving hardware circuits. Therefore, users can directly program, simulate and verify functions in this test system, greatly shortening the chip selection and verification cycle, and reducing labor costs and software and hardware supporting costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are included to provide a further understanding of the present application. They are incorporated into and constitute a part of this application. The accompanying drawings illustrate embodiments of the present application and, together with this specification, serve to explain the principles of the present application. In the accompanying drawings:

[0022] Figure 1 1 is a schematic structural diagram of an IC chip testing system according to an embodiment of the present invention;

[0023] Figure 2 is a schematic structural diagram of a test execution unit in one embodiment of the present invention;

[0024] Figure 3 This is a schematic diagram of the process of an IC chip testing method according to an embodiment of the present invention. Figure 1 ;

[0025] Figure 4 This is a schematic diagram of an implementation process of a test control unit in one embodiment of the present invention;

[0026] Figure 5 This is a schematic diagram of the process of an IC chip testing method according to an embodiment of the present invention. Figure 2 ;

[0027] Figure 6 This is a schematic diagram of an implementation process of a test management unit in one embodiment of the present invention;

[0028] Figure 7 is a schematic diagram of the interaction between the test control unit and the test management unit in one embodiment of the present invention;

[0029] Figure 8 FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] To more clearly illustrate the technical solutions of the embodiments of this application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, the drawings described below are merely examples or embodiments of this application. Those skilled in the art can apply this application to other similar scenarios based on these drawings without inventive effort. Unless otherwise apparent from the context or otherwise noted, the same reference numerals in the figures represent the same structure or operation.

[0031] As used in this application and the claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not intended to refer to the singular but may include the plural. Generally speaking, the terms "comprises" and "include" only indicate the inclusion of the steps and elements specifically identified, and these steps and elements do not constitute an exclusive list. A method or apparatus may also include other steps or elements.

[0032] Flowcharts are used in this application to illustrate the operations performed by systems according to embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed in exact order. Instead, the various steps may be processed in reverse order or simultaneously. Furthermore, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0033] refer to Figure 1~Figure 2 As shown, the IC chip test system of this embodiment mainly includes a test control unit, a test management unit and a test execution unit. The test control unit and the test management unit are connected through a network, which can be a wired network connection or a wireless network connection. The test management unit and the test execution unit are connected through a hub; wherein the test execution unit includes a burner and a device under test, the input end of the burner is connected to the hub, and the output end of the burner is connected to the device under test, and the device under test integrates a functional board with different types of IC chips, and the functional board is equipped with several peripheral driving hardware circuits.

[0034] In this embodiment, the test control unit is configured to: send a request to bind or unbind the device under test to the test management unit based on received external input, send information about the device under test and a test source code project file to the test management unit, and receive test results sent by the test management unit. The test management unit is configured to: determine the current state of the device under test in the test execution unit, receive information about the device under test and the test source code project file, bind or unbind the device under test, compile the test source code project file into an executable file, control the burner to burn the executable file, obtain test results from the test execution unit, and send the test results to the test control unit. The test execution unit is configured to: execute the corresponding IC chip test process based on the burned test source code project file.

[0035] For example, in this embodiment, the test control unit can be configured as a client (PC), and the test management unit can be configured as a chip test platform (server or server). This chip test platform can be called by different clients to perform performance tests on the IC chip under test. Based on this configuration, the test system in this embodiment includes a chip test platform, a client, a function board integrating different chip models, a function board equipped with hardware circuits for different peripheral drivers, a programmer for connecting to the device under test, and a hub connecting the programmer and the chip test platform. The client can have functions such as IC chip selection, chip initialization configuration, test source code templates and examples, IC resource configuration, code editing, project compilation, and remote monitoring and simulation.

[0036] For example, chip initialization configuration generally involves setting the operating mode, clock source, I / O port status, etc. of the chip. Taking the STM32 series chip as an example, its initialization configuration may include configuring GPIO port, NVIC interrupt, USART communication, etc., and specific initialization configuration and initialization code may vary according to different chip models and application requirements. Remote monitoring and simulation functions allow users to monitor and control the test operation status of the chip through software simulation or network connection without directly contacting the hardware. Other functions are not shown here, and each function of the above-mentioned test control unit has a corresponding implementation method. The present embodiment is not to improve the specific implementation method of the above-mentioned functions, and will not be repeated here, and will not affect understanding of the substantive content of the present embodiment.

[0037] In this embodiment, the chip testing platform can manage all devices under test and all clients (online, offline, resource scheduling, device control, etc.). Therefore, users can directly program, simulate, and verify functions within this test system, significantly shortening chip selection and verification cycles, reducing labor costs and hardware and software costs, and possessing broad application value in chip promotion.

[0038] In one example, the peripheral driving hardware circuit includes one or more of the following: a TFT screen circuit, a digital tube clock circuit, a WIFI circuit, a buzzer circuit, a touch circuit, and a temperature acquisition circuit.

[0039] Peripheral driver hardware circuits bridge the gap between IC chips and external devices (such as sensors, actuators, and communication modules). They are responsible for converting control signals from the IC chip into signals understandable by the external device and driving the device to perform the corresponding operations. The design and implementation of these peripheral driver hardware circuits require consideration of factors such as signal matching, power management, and electromagnetic compatibility (EMC). In addition to the TFT display circuit and digital tube clock circuit mentioned above, peripheral driver hardware circuits may also include interrupt controllers, motor drive circuits, sensor interfaces, and other components. These components can be determined based on actual needs and are not specifically limited here.

[0040] In one example, the test execution unit further includes a camera and / or a microphone, which are connected to the hub and are used for video capture and voice capture during the IC chip test process, respectively.

[0041] For example, after setting up the camera and / or microphone, turn on the camera for video capture and turn on the microphone for voice capture, then the chip testing platform will transmit this data back to the client, and the client will present the corresponding function charts / curves and video and voice information on the monitoring interface for the user to check and confirm.

[0042] The test system in this embodiment supports multiple users concurrently, allowing multiple clients (such as PC1, PC2, and PC3) to simultaneously log in and operate different devices under test. Once a device under test is occupied, other clients cannot control it. The device under test can only be re-bound and controlled after it has been unbound by a client. Furthermore, the number of devices under test in the test system can be increased as the number of IC chip types increases, and the number of devices under test for a specific chip can also be expanded. That is, the chip test platform can connect to multiple devices under test, such as device under test 1, device under test 2, and device under test 3.

[0043] For example, if the test control unit is set as the client and the test management unit is set as the chip test platform, the IC chip test system can be operated through the following process: 1. After the IC chip test system is running, each device under test and the burner are connected and powered on. After powering on, the device under test and the burner report the unique code such as the device name, IC model and burner ID to the chip test platform. The chip test platform dynamically creates a device object based on the device ID, IC model and burner ID for management. The online devices and the current status of the devices can be viewed, including online or offline, bound or idle, etc. 2. Run the client on the PC, first select the IC chip to be tested through the chip selection interface, and after selecting the IC chip model to be debugged, you can select the test source code project file corresponding to the test function through the template case, or the user can edit the currently selected program through the code editing module, save it and compile it. 3. Obtain a list of idle device IDs of matched IC models from the chip test platform through the test device management module of the client, and select a device to bind. After binding, the client sends a binding event to the chip test platform, which then returns the device binding results to the client. 4. After successful device binding, the client's remote burning module sends the selected test source code project file to the chip test platform. The chip test platform compiles the received test source code project file into an executable hex file based on the device ID, the programmer ID, and the received test source code project file. The executable file is then burned using the programmer connected to the device under test, and the burning results are returned to the client. 5. After the file is successfully burned, the client enables monitoring and debugging functions and notifies the chip test platform. The chip test platform collects operating data from each monitoring point within the corresponding test device and enables camera and audio capture. The chip test platform transmits this data back to the client, which displays corresponding functional charts / curves, video, and audio information on the monitoring interface for user verification and confirmation. It is important to note that the burned executable file has monitoring points pre-set. The test board transmits this monitoring point data in real time to the programmer via UART / JTAG, which then transmits it to the chip test platform via USB.

[0044] In this embodiment, the client can also issue simulation-related instructions to the chip test platform, which in turn issues corresponding instructions to the programmer connected to the device under test. The programmer then controls the device under test to implement on-board simulation. After successfully entering simulation, the client displays the simulation interface, where users can set breakpoints, monitor register status and data, monitor variables and momery data, and perform real-time on-board simulation.

[0045] In this embodiment, the IC chip test system can be continuously supplemented with new devices as chip types increase, and the device under test for a specific chip can also be expanded. Users can directly program, simulate, and verify functions in this test system, significantly shortening the chip selection and verification cycle and reducing labor and hardware and software costs.

[0046] An embodiment of the present invention provides an IC chip testing method, which can be referred to Figure 3 As shown, method 300 is applied to the test management unit in the aforementioned IC chip test system, mainly including: S310, determining the current state of the device under test in the test execution unit, and if the device under test is in an online state, then determining whether the device under test is in an idle state; S320, receiving information of the device under test and a test source code project file; S330, executing the binding or unbinding operation of the device under test according to a request to bind or unbind the device under test; S340, compiling the test source code project file into an executable file, and the source code project corresponding to the executable file is the test source code project file; S350, controlling the burner in the test execution unit to burn the executable file; S360, obtaining the test result of the test execution unit; and sending the test result to the test control unit.

[0047] In one example, determining whether the device under test is in an idle state can include traversing all USB devices, obtaining the programmer's LinkID based on the device type, reading the ICID of the connected device through the programmer, combining the LinkID and the device's ICID to create a unique identifier (UID) to construct a device object, adding the device object to a list of devices under test, and determining and marking the state of the device under test. The ICID is the name of the IC chip corresponding to the device, and the LinkID is the identifier of the programmer.

[0048] In one example, compiling a test source code project file into an executable file can be: receiving the test source code project file to be compiled, starting a thread task to decrypt and decompress the test source code project file, compiling the test source code project file to generate an executable hex file, and feeding back the compilation information and hex file path to the test control unit.

[0049] In one example, performing the binding operation of the device under test according to the request to bind the device under test can be: according to the ICID and IP:Port in the connection request, searching for the device with idle ICID in the list of devices under test, updating its status to in use, and updating the binding object to IP:Port, where ICID is the name of the IC chip corresponding to the device, and IP:Port is the unique identification of the test control unit through IP and Port.

[0050] In one example, obtaining the test result of the test execution unit includes collecting operation data of each monitoring point in the device under test corresponding to the test execution unit.

[0051] Exemplary, reference Figure 4 and Figure 7 As shown in the figure, when the test control unit is a client, it has functions such as communication services, SDK development kit, device management, chip selection, IC resource configuration, case templates, programming, compilation, burning, simulation and data monitoring, etc. It completes the test project source code development and performs data monitoring. Specifically, the following steps can be performed, including:

[0052] 1) Chip selection: compare and retrieve information about various chip resources and search for specific chip data;

[0053] 2) Resource configuration: Graphically configure chip resources and dynamically generate initialization code and projects;

[0054] 3) Code editing: Provides a code editor for secondary development based on the code generated in step 2), including application code, monitoring point code, etc.

[0055] 4) Project compilation (request): Complete project packaging, encryption, and upload, download and analyze compilation results, and obtain the execution file path (path on the chip test platform). Compilation involves uploading the local project to the chip test platform for compilation.

[0056] 5) Device management: manage connections to the chip test platform, bind or unbind devices, etc.; send a connection request (with ICID) to the chip test platform's specified IP and Port, obtain the available device UID, and complete device binding; send an unbinding message to the chip test platform (with UID) to complete device unbinding;

[0057] 6) Project burning (request): Send a burning request to the chip test platform (carrying the execution file path and UID). The chip test platform finds the corresponding burner and test equipment according to the UID, and finds the executable file compiled by the chip test platform through the file path;

[0058] 7) Data monitoring: Circularly send data requests to the chip test platform to obtain monitoring point data, and display it in real time in the form of charts and curves according to a certain period.

[0059] Another embodiment of the present invention provides an IC chip testing system method, referring to Figure 5 As shown, method 500 can be applied to a test control unit in an IC chip test system, including: S510, determining the IC chip to be tested, generating an engineering project including initialization code and test code for chip resources to be used, the engineering project being embodied as a test source code engineering file; S520, sending a request to bind or unbind the device under test to the test management unit based on the received external input; S530, sending information about the device under test and the test source code engineering file to the test management unit; S540, receiving the test results sent by the test management unit.

[0060] In one example, the test source code project file includes a test source code project file generated by selecting a template case, or a test source code project file formed by code editing.

[0061] In one example, after receiving the test result sent by the test management unit, the method 500 further includes presenting a corresponding function chart, curve, video and / or voice on the monitoring interface.

[0062] For example, please refer to Figure 6 and Figure 7 As shown, when the test management unit is a chip test platform, it can perform the following steps, including:

[0063] 1) Communication service: complete TCP / IP protocol communication with the client and USB protocol communication with the writer;

[0064] 2) Device Management

[0065] Device discovery: traverse all USB devices, obtain the LinkID of the burner according to the device type, read the connection ICID through the burner, and construct the device object by combining the LinkID and ICID to uniquely identify the UID. Add it to the device list and mark the state as idle;

[0066] Device allocation: Obtain the ICID and the IP:Port of the current connection request through client management; query the device list for idle devices based on the ICID, update their status to in-use, update the binding object to IP:Port, and return a response to the client (with the UID, which serves as the unique identifier for communication on this connection);

[0067] Device unbinding: The communication service module receives the unbinding command and publishes an unbinding event. The device management module responds to the unbinding event, searches for the corresponding object in the device list by UID, resets the object status to idle, resets the object's bound object to empty, and feedbacks the result.

[0068] 3) Client management: client connection monitoring, client IP:Port list management (addition and deletion); save client uploaded project information;

[0069] 4) Cloud Compilation Service: After receiving the project data to be compiled (i.e., the test source code project file), it starts a thread task to decrypt and decompress the data, compiles the project data to generate an executable hex file, and returns the compilation information and hex file path.

[0070] 5) Project burning: Find the executable file to be burned by the path, find the corresponding burner and the device connected to the burner in the device list by UID, burn the executable file through the burner, and return the burning result information;

[0071] 6) Data service: respond to client requests, monitor and collect test equipment monitoring point data through the burner, and send it back to the client.

[0072] The other details of each step in this embodiment can be referred to the previous embodiment and will not be expanded here. Through the IC chip testing method of this embodiment, users can directly program, simulate and verify functions, significantly shortening the chip selection and verification cycle, and reducing labor costs and software and hardware supporting costs.

[0073] The present application also provides an electronic device, comprising: a memory for storing programs or input instructions that can be executed by a processor; and a processor for executing the above programs or input instructions to implement the various processes of the above-mentioned IC chip testing method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0074] Figure 8Figure 8 is a schematic diagram of an electronic device according to an embodiment of the present invention. Electronic device 800 may include an internal communication bus 801, a processor 802, a read-only memory (ROM) 803, a random access memory (RAM) 804, and a communication port 805. When used in a personal computer, electronic device 800 may also include a hard disk 806. The internal communication bus 801 enables data communication between components of electronic device 800. Processor 802 can make decisions and issue prompts. In some embodiments, processor 802 may consist of one or more processors. Communication port 805 enables data communication between electronic device 800 and the outside world. In some embodiments, electronic device 800 can send and receive information and data from a network via communication port 805. Electronic device 800 may also include various forms of program storage units and data storage units, such as a hard disk 806, a read-only memory (ROM) 803, and a random access memory (RAM) 804, capable of storing various data files used for computer processing and / or communication, as well as possible programs or input instructions executed by processor 802. The result processed by the processor 802 is transmitted to the user equipment through the communication port 805 and displayed on the user interface.

[0075] The aforementioned IC chip testing method may be implemented as a computer program, stored in the hard disk 806 , and recorded in the processor 802 for execution to implement any IC chip testing method in the present application.

[0076] An embodiment of the present application also provides a readable storage medium, on which a program or input instruction is stored. When the program or input instruction is executed by the processor, the various processes of the above-mentioned IC chip testing method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0077] For those skilled in the art, the above invention disclosure is intended only as an example and does not constitute a limitation of this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and amendments to this application. Such modifications, improvements, and amendments are suggested in this application and remain within the spirit and scope of the exemplary embodiments of this application.

[0078] Similarly, it should be noted that, in order to simplify the presentation of this application and thus facilitate understanding of one or more embodiments of the invention, the foregoing descriptions of the embodiments of this application sometimes combine multiple features into a single embodiment, figure, or description thereof. However, this disclosure method does not mean that the subject matter of this application requires more features than those recited in the claims. In fact, an embodiment may have fewer features than all of the features of a single embodiment disclosed above.

[0079] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions can be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the scope of the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. An IC chip testing system, characterized in that: include: A test control unit, a test management unit and a test execution unit, wherein the test control unit and the test management unit are connected via a network, and the test management unit and the test execution unit are connected via a hub; The test execution unit includes a programmer and a device under test, wherein the input end of the programmer is connected to the hub, and the output end of the programmer is connected to the device under test, wherein the device under test is integrated with a function board of IC chips of different models, and the function board is equipped with a plurality of peripheral drive hardware circuits; The test control unit is configured to: send a request to bind or unbind the device under test to the test management unit according to the received external input; send information of the device under test and a test source code project file to the test management unit; and receive a test result sent by the test management unit; The test management unit is configured to: determine the current state of the device under test in the test execution unit, and if the device under test is in an online state, determine whether the device under test is in an idle state; Receive the information of the device under test and the test source code engineering file; bind or unbind the device under test; compile the test source code engineering file into an executable file; control the burner to burn the executable file; Obtaining a test result of the test execution unit; sending the test result to the test control unit; Wherein, determining whether the device under test is in an idle state further comprises: traversing all USB devices, obtaining a LinkID of a burner according to the device type, reading the ICID of the connected device through the burner, dynamically constructing a device object by combining the LinkID and the unique identifier UID of the device ICID, adding the device object to a list of devices under test, and determining and marking the state of the device under test; wherein the ICID is the name of the IC chip corresponding to the device, and the LinkID is the identifier of the burner; and binding the device under test comprises: according to the ICID and IP:Port in the connection request, searching for a device with an idle ICID in the list of devices under test, updating its state to in use, and updating the binding object to IP:Port, wherein the ICID is the name of the IC chip corresponding to the device, and the IP:Port is the unique identifier of the test control unit through the IP and Port; The test execution unit is configured to execute a corresponding IC chip test process according to the burned test source code engineering file.

2. The IC chip testing system according to claim 1, wherein: The test control unit is configured with one or more of the following functions: IC chip selection, chip initialization configuration, template cases for test source code, code editing, project compilation, and remote monitoring and simulation functions.

3. The IC chip testing system according to claim 1, wherein: The peripheral drive hardware circuit includes one or more of the following: TFT screen circuit, digital tube clock circuit, WIFI circuit, buzzer circuit, touch circuit and temperature acquisition circuit.

4. The IC chip testing system according to claim 1, wherein: The test execution unit further includes a camera and / or a microphone, which are connected to the hub and are used for video acquisition and voice acquisition during the IC chip test process, respectively.

5. An IC chip testing method, applied to a test management unit in an IC chip testing system according to any one of claims 1 to 4, characterized in that: include: Determine the current state of the device under test in the test execution unit, and if the device under test is in an online state, determine whether the device under test is in an idle state; Determining whether the device under test is in an idle state further includes: traversing all USB devices, obtaining a LinkID of a burner according to the device type, reading an ICID of a connected device through the burner, dynamically constructing a device object by combining the LinkID and the device ICID to form a unique identifier UID, adding the device object to a list of devices under test, and determining and marking the state of the device under test; wherein the ICID is the name of the IC chip corresponding to the device, and the LinkID is the identifier of the burner; Receiving information of the device under test and a test source code engineering file; Executing a binding or unbinding operation of the device under test according to a request to bind or unbind the device under test; wherein the binding operation of the device under test includes: searching for a device with an idle ICID in the device under test list according to the ICID and IP:Port in the connection request, updating its status to in use, and updating the binding object to IP:Port, wherein the ICID is the name of the IC chip corresponding to the device, and the IP:Port is the unique identification of the test control unit through the IP and Port; Compiling the test source code project file into an executable file, wherein the source code project corresponding to the executable file is the test source code project file; Controlling the burner in the test execution unit to burn the executable file; Acquire the test result of the test execution unit; and send the test result to the test control unit.

6. The IC chip testing method according to claim 5, wherein: Compiling the test source code project file into an executable file includes: Receive the test source code project file that needs to be compiled, start the thread task to decrypt and decompress the test source code project file, compile the test source code project file to generate an executable hex file, and feed back the compilation information and hex file path to the test control unit.

7. The IC chip testing method according to claim 5, wherein: Acquiring the test result of the test execution unit includes: collecting operation data of each monitoring point in the tested device corresponding to the test execution unit.

8. An electronic device, characterized in that: include: A processor and a memory, wherein the memory stores a program or input instruction that can be run on the processor, and when the program or input instruction is executed by the processor, the steps of the IC chip testing method according to any one of claims 5 to 7 are implemented.

9. A readable storage medium, characterized in that The readable storage medium stores a program or input instruction, and when the program or input instruction is executed by the processor, the steps of the IC chip testing method according to any one of claims 5 to 7 are implemented.

Images