Method, device and equipment for determining light source mask cooperative optimization IRO model

Abstract

The application provides a method, device and equipment for determining a light source mask cooperative optimization IRO model. The method comprises the following steps: inputting a test pattern obtained in advance into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern comprises a key pattern in the initial design layout; performing photolithography on a test mask plate using a target photoresist according to the initial light source to obtain actual FEM data and actual cross-section data of the target photoresist at a key position of the test mask plate, wherein the test mask plate is determined according to the test pattern; determining a photoresist model according to the actual FEM data and the actual cross-section data, optimizing the initial IRO model, and obtaining a target IRO model. The embodiment of the application can improve the optimization accuracy of the IRO model.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, device, and apparatus for determining an IRO model for collaborative optimization of a light source and a mask. Background Art

[0002] With the continuous advancement of integrated circuit technology, especially the move towards higher integration and smaller process nodes, the accuracy and efficiency of the lithography process, as a core link, have become key factors restricting chip performance improvements. The limitations of existing light source and mask collaborative optimization (IRO) models have gradually become apparent when dealing with these increasingly complex manufacturing processes. In particular, for manufacturing processes involving complex chemical interactions, such as certain special development processes, traditional IRO model methods based on simplified optical models have difficulty fully capturing the physical and chemical changes in the actual process, resulting in significant deviations between the predicted results and the actual lithography effects, making the existing IRO model optimization accuracy poor. Summary of the Invention

[0003] The present application provides a method, device, and apparatus for determining a light source mask collaborative optimization IRO model, which can improve the optimization accuracy of the IRO model.

[0004] In a first aspect, an embodiment of the present application provides a method for determining an IRO model for light source and mask collaborative optimization, the method comprising:

[0005] Inputting the pre-acquired test pattern into the initial IRO model to obtain the initial light source corresponding to the initial design layout, wherein the test pattern includes the key patterns in the initial design layout;

[0006] Performing photolithography on a test mask using a target photoresist according to an initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at key positions of the test mask, wherein the test mask is determined according to the test pattern;

[0007] Determine the photoresist model based on actual FEM data and actual cross-section data;

[0008] Based on the photoresist model, the initial IRO model is optimized to obtain the target IRO model.

[0009] In a second aspect, the present application provides a device for determining a light source mask collaborative optimization IRO model, the device comprising:

[0010] A first determination module is configured to input a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout;

[0011] a photolithography module, configured to perform photolithography on a test mask using a target photoresist according to the initial light source, to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at key positions of the test mask, wherein the test mask is determined according to the test pattern;

[0012] A second determining module is used to determine a photoresist model according to the actual FEM data and the actual cross-sectional data;

[0013] The optimization module is used to optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

[0014] In a third aspect, an embodiment of the present application provides an electronic device, the electronic device comprising: a processor and a memory storing computer program instructions;

[0015] When the processor executes the computer program instructions, it implements the method for determining the light source mask collaborative optimization IRO model in any one of the embodiments of the first aspect.

[0016] In a fourth aspect, an embodiment of the present application provides a computer storage medium having computer program instructions stored thereon. When the computer program instructions are executed by a processor, a method for determining a light source mask collaborative optimization IRO model as in any one of the embodiments in the first aspect is implemented.

[0017] In a fifth aspect, an embodiment of the present application provides a computer program product. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes a method for determining a light source mask collaborative optimization IRO model as in any one of the embodiments of the first aspect above.

[0018] In a method, device and apparatus for determining a light source mask collaborative optimization IRO model provided in an embodiment of the present application, a more accurate photoresist model is constructed by introducing the actual exposure energy matrix FEM data and the actual cross-sectional data of the photoresist in the actual photolithography process. Subsequently, based on this high-precision photoresist model, the initial IRO model is deeply optimized to make it closer to the actual production environment. The optimized target IRO model effectively overcomes the limitations of traditional optical models in prediction accuracy and can fully simulate the actual behavior of the target photoresist under complex chemical interactions, thereby significantly reducing the deviation from the actual results when predicting the photolithography effect, significantly improving the consistency between the predicted results and the actual photolithography effect, thereby greatly improving the accuracy of the IRO model optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0020] Figure 1 This is one of the flow charts of a method for determining a light source mask collaborative optimization IRO model provided by an embodiment of the present application;

[0021] Figure 2 This is one of the flow charts of a method for determining a light source mask collaborative optimization IRO model provided by an embodiment of the present application;

[0022] Figure 3 This is one of the flow charts of a method for determining a light source mask collaborative optimization IRO model provided by an embodiment of the present application;

[0023] Figure 4 1 is a schematic structural diagram of a device for determining a light source and mask collaborative optimization IRO model provided in an embodiment of the present application;

[0024] Figure 5 It is a structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features therein can be combined with each other in the absence of conflict.

[0026] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0027] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprises" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article or device. In the absence of further limitations, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device that includes the element.

[0028] Integrated circuit technology is the core technology of the semiconductor industry. It precisely integrates electronic components such as transistors, resistors, and capacitors onto tiny wafers, and then packages them into chips with specific circuit functions. Photolithography plays a crucial role in this process. It uses photochemical principles to precisely draw circuit patterns on the wafer surface, and is the key force driving the continued progress of Moore's Law.

[0029] With increasing chip performance requirements, especially the dual challenges of reducing power consumption and increasing computing power, chip manufacturers are constantly pursuing higher integration densities—maximizing the number of transistors per unit area. This has directly led to a continuous reduction in the linewidth of lithography processes. As traditional lithography enters the subwavelength regime, it faces severe challenges. To overcome these challenges, light source and mask collaborative optimization technology has emerged as a key tool for improving the imaging performance of lithography systems and approaching the resolution limit.

[0030] The existing IRO optimization process is a multi-stage iterative process, centered on optimizing lithography imaging quality by precisely adjusting the light source shape, intensity distribution, and mask pattern. The process begins with preliminary optimization based on the optical model and critical patterns. Through simulation and calculation, sub-resolution assist features (SBARs) are extracted. These SBARs further enhance the imaging quality of the primary pattern. Subsequently, a more refined optimization phase takes into account the synergistic effects of the primary pattern, SBARs, and light source, achieving optimal imaging results through repeated iterative adjustments.

[0031] However, it's worth noting that existing IRO optimization processes primarily focus on optimizing optical models, with the output being an aerial image (AI)—the image formed on the photoresist surface after light passes through the optical system. This approach is relatively effective for positive tone development (PTD) processes, where the exposed portion of the photoresist is developed away, resulting in an imaging process that closely matches the optical simulation. However, the situation is quite different for negative tone development (NTD) processes. In negative tone development, the exposed photoresist undergoes complex chemical reactions, such as the resist shrinkage effect (RSE), leading to significant deviations between the actual imaging and the optical simulation. Therefore, the ability to predict the process window (PW) of NTD processes based solely on optical models is limited, often requiring experienced engineers to repeatedly debug based on actual conditions to achieve a light source configuration that meets the requirements. Consequently, while existing IRO optimization processes have achieved significant success in advancing photolithography processes, they remain insufficient for complex processes like negative tone development.

[0032] In order to solve the problems existing in the prior art, embodiments of the present application provide a method, apparatus, and device for determining an IRO model for collaborative optimization of a light source and a mask.

[0033] The embodiment of the present application provides a method, device and apparatus for determining a light source mask collaborative optimization IRO model. The following first introduces the method for determining a light source mask collaborative optimization IRO model provided by the embodiment of the present application. Figure 1 As shown, the method specifically includes the following steps:

[0034] S100 , inputting a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout.

[0035] Optionally, in an embodiment of the present application, the test pattern is a specific set of patterns used in the light source mask collaborative optimization process. The test pattern contains the most critical and representative graphic elements in the initial design layout, which are crucial to the performance and yield of the final chip. These test patterns can be selected based on historical data, simulation analysis, or engineering experience, and can fully reflect the various challenges and complexities that may be encountered in the manufacturing process.

[0036] Critical features are the graphic elements in the initial design layout that have the greatest impact on chip performance, yield, and reliability. These critical features have complex shapes or dense layouts, making them more susceptible to various physical and chemical effects during the lithography process. The imaging quality of these critical features directly determines the performance and reliability of the final chip.

[0037] Optionally, the initial design layout contains the layout information for all the expected circuit elements and connections on the chip. These elements, such as transistors, resistors, capacitors, and wires, are precisely placed on the chip according to specific logic and functional requirements. In the photolithography process, the initial design layout is the starting point of the manufacturing process, determining the shape and location of the circuits on the final chip. However, due to various physical and chemical effects during the photolithography process, the actual pattern produced may deviate from the design layout.

[0038] Optionally, in one possible implementation of the present application, when a test pattern is input into the initial IRO model, the initial IRO model simulates and calculates the test pattern based on its built-in optical imaging principles, lithography process parameters, and material properties. This calculation process considers multiple factors, such as the shape, intensity distribution, and wavelength of the light source, as well as the layout and size of the mask pattern, to predict the image quality that these patterns may form on the wafer under specific lithography conditions.

[0039] Through this simulation, the initial IRO model outputs an initial light source configuration corresponding to the test pattern. This initial light source configuration is the best prediction the initial IRO model can provide based on the current settings and input conditions. It is designed to achieve the best imaging effect in the lithography process under specific conditions. However, it should be noted that due to the limitations of the initial IRO model, this initial light source configuration is not completely accurate or optimal. Therefore, the initial light source configuration output by the S100 will serve as the starting point for subsequent steps, and through further experimental verification and model optimization, it will gradually approach the actual optimal light source configuration.

[0040] S200, performing photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at a key position of the test mask, wherein the test mask is determined according to the test pattern.

[0041] Optionally, the actual exposure energy matrix (Focus-Energy Matrix, FEM) data refers to the exposure energy distribution map formed on the wafer surface by the lithography machine through precise control of the light source and exposure conditions during the lithography process. FEM data is a two-dimensional matrix, in which each element represents the exposure energy intensity received by the corresponding position on the wafer. FEM data is crucial for evaluating the uniformity and resolution of the lithography process and predicting the shape and size of the final graphics. By comparing the simulated values ​​and actual values ​​of FEM data, problems with light source distribution, deviations in exposure time, or errors in lithography machine calibration can be identified.

[0042] Optionally, key test reticle locations refer to representative areas or patterns selected on the test reticle that significantly impact the lithography results. These areas include key patterns from the initial design layout, such as small lines, dense pattern arrays, and combinations of varying line widths and spacings. Detailed measurement and analysis at these key locations allows for more accurate assessment of lithography process performance and consistency.

[0043] The target photoresist refers to the specific type of photoresist used when the initial design layout is subjected to the photolithography process.

[0044] Alternatively, the actual cross-sectional data of the target photoresist refers to data obtained by a high-precision measurement tool (such as a scanning electron microscope (SEM)) about the actual graphic cross-section formed by the photoresist after steps such as exposure and development. These data include key information such as the thickness, profile, line edge roughness, and degree of graphic distortion of the photoresist. By comparing with the actual design layout, the transfer accuracy and fidelity of the photolithography process to the graphic can be evaluated, and potential process problems can be identified and optimized. Actual cross-sectional data is an important basis for verifying the accuracy of the photoresist model and optimizing the photolithography process.

[0045] Alternatively, in one possible implementation of the present application, a test mask, determined based on the test pattern, is first prepared. This test mask contains key patterns from the initial design layout and is used to simulate the photolithography scene in a real manufacturing environment. Next, a photolithography machine is used to illuminate the test mask with an initial light source. By precisely controlling parameters such as exposure time and light intensity, the experimental conditions are ensured to be consistent with expectations.

[0046] During the exposure process, the target photoresist undergoes varying degrees of chemical reaction depending on the exposure energy, forming a specific pattern. To quantify this process, the lithography machine records the actual exposure energy matrix (FEM) data. This FEM data details the light energy intensity received at each point within the exposure area. Furthermore, to more intuitively understand the changes in the photoresist after exposure, cross-section analysis of the target photoresist at key locations on the test mask is performed, obtaining actual cross-sectional data using a scanning electron microscope or other high-precision measurement tools.

[0047] S300 , determining a photoresist model according to the actual FEM data and the actual cross-sectional data.

[0048] Optionally, the photoresist model is a mathematical or physical model used to simulate and predict how a target photoresist responds to exposure energy and subsequently forms patterns during development under specific lithography conditions. This model is constructed based on experimental data (such as actual exposure energy matrix FEM data and actual cross-sectional data) and takes into account the physicochemical properties of the photoresist, exposure conditions (such as light source intensity, wavelength, exposure time, etc.), and development process parameters (such as developer type, concentration, temperature, and time, etc.).

[0049] Alternatively, in a feasible implementation of the present application, first, these actual FEM data and actual cross-sectional data are input into professional simulation software. These simulation software can simulate the chemical reaction of the photoresist under different exposure energies, the change in solubility, and the formation process of the final pattern. The actual FEM data provides the key exposure condition input for the simulation. At the same time, the actual cross-sectional data provides the actual pattern features formed by the photoresist after exposure and development, such as line width, edge roughness, bottom profile, etc. These data are used to verify and calibrate the accuracy of the simulation model.

[0050] During the simulation process, the parameters of the photoresist model can be continuously adjusted based on the physical and chemical properties of the target photoresist (such as photosensitivity and development rate) and experimental conditions (such as exposure time and developer concentration) until the simulation results are highly consistent with the experimental data. This process may require multiple iterations, including adjustments to parameters such as exposure energy distribution, photoresist thickness, and development time, to optimize the model's predictive capabilities.

[0051] Once the photoresist model is successfully constructed and verified, it can be used to simulate the lithography process of the target photoresist under different light source and mask conditions, predicting and evaluating the shape and size of the final pattern. This is crucial for subsequent light source and mask co-optimization, as it allows for rapid evaluation of the feasibility of different design options and finding the optimal light source and mask configuration without the need for actual lithography experiments.

[0052] S400: Optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

[0053] Optionally, in a feasible implementation of the present application, the photoresist model can be first integrated into the optimization algorithm. The optimization algorithm is based on the initial IRO model and continuously adjusts the light source parameters (such as light intensity distribution, wavelength, etc.) and mask design (such as line width, spacing, phase, etc.) to minimize the deviation between the lithography results and the expected design.

[0054] During the optimization process, the photoresist model will simulate the corresponding lithography effect based on the light source and mask configuration after each adjustment, and output the predicted actual graphic features. These predicted results will be compared with the FEM data and photoresist cross-section data obtained from the actual test to evaluate the lithography performance under the current configuration. Based on this evaluation, the optimization algorithm will further adjust the light source and mask parameters until a set of configurations is found so that the predicted lithography effect is highly consistent with the actual test results and meets the key indicators in the design requirements (such as line accuracy, edge roughness, etc.). Finally, when the optimization algorithm converges to a stable and optimal solution, the optimized IRO model obtained is the target IRO model.

[0055] In a method for determining a light source mask collaborative optimization IRO model provided in an embodiment of the present application, a more accurate photoresist model is constructed by introducing the actual exposure energy matrix FEM data and the actual cross-sectional data of the photoresist in the actual photolithography process. Subsequently, based on this high-precision photoresist model, the initial IRO model is deeply optimized to make it closer to the actual production environment. The optimized target IRO model effectively overcomes the limitations of traditional optical models in prediction accuracy and can fully simulate the actual behavior of the target photoresist under complex chemical interactions, thereby significantly reducing the deviation from the actual results when predicting the photolithography effect, significantly improving the consistency between the predicted results and the actual photolithography effect, thereby greatly improving the accuracy of IRO model optimization.

[0056] In one embodiment, performing photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at a key position of the test mask includes:

[0057] Constructing the test mask according to the test pattern;

[0058] Performing photolithography on the test mask based on the initial light source;

[0059] collecting the actual FEM data of the test mask during the photolithography process through a scanning electron microscope;

[0060] The actual cross-section data of the target photoresist at the key positions of the test mask during the lithography process is collected by a transmission electron microscope.

[0061] Optionally, in one specific implementation of the present application, first, test patterns are prepared, which cover and represent all the key feature information on the initial design layout. These key feature information includes but is not limited to line width, pitch, density variation, and complex structures that may exist.

[0062] Then, the prepared test patterns are input into the existing light source mask co-optimization framework (i.e., the initial IRO model). In the initial IRO model, through simulation and debugging, an initial light source configuration that meets the specific lithography performance requirements is found. This initial light source configuration is the basis for subsequent lithography experiments, aiming to ensure that the expected lithography effect can be produced in the actual lithography process.

[0063] Subsequently, the actual lithography operation stage is entered. First, the corresponding test mask is made according to the test pattern, which is a key component in the lithography process, used to transfer the pattern information from the mask to the photoresist. Then, the test mask is lithographed using the initial light source debugged in the initial IRO model. During the lithography process, by precisely controlling the exposure time, light source intensity and other parameters, it is ensured that the lithography process proceeds according to the predetermined scheme.

[0064] In order to evaluate the lithography effect, advanced microscopic techniques are also needed to collect key data. Specifically, the actual exposure energy matrix (FEM) data of the test mask during the lithography process is collected by a scanning electron microscope device. At the same time, in order to deeply understand the behavior changes of the photoresist during the lithography process, especially its cross-sectional morphology, the actual cross-section data of the target photoresist at the key positions of the test mask can also be collected by a transmission electron microscope device.

[0065] In these optional embodiments, through precise experimental design and microscopic observation techniques, the comprehensiveness and accuracy of the lithography process data are ensured, providing a reliable basis for constructing an accurate photoresist model and optimizing the lithography process, thereby effectively improving the precision and efficiency of semiconductor manufacturing.

[0066] In one embodiment, the determining a photoresist model according to the actual FEM data and the actual cross-section data comprises:

[0067] Inputting the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, mask information of the test mask, the actual FEM data, and the actual cross-sectional data into a preset simulation tool, simulating the photolithography process using the preset simulation tool to obtain physical parameters of the target photoresist;

[0068] The physical parameters are input into a preset optical model to generate the photoresist model including the physical parameters of the target photoresist.

[0069] Optionally, in an embodiment of the present application, the exposure information of the initial design layout refers to the exposure conditions defined in the design layout for the photolithography process during semiconductor manufacturing. These conditions include, but are not limited to, exposure dose (i.e., the total amount of light energy irradiated onto the photoresist), exposure time (the duration of light irradiation), exposure wavelength (the wavelength of the light source used), etc. The exposure information directly affects the exposure effect of the photoresist and is one of the key factors determining the quality of the lithography pattern.

[0070] Optionally, the material information for each thin film layer in the initial design layout refers to: In semiconductor manufacturing, multiple thin film layers are stacked on the chip surface, including photoresist layers, anti-reflective layers, dielectric layers, and metal layers. Each thin film layer has its own specific material composition, with different physical and chemical properties such as refractive index, absorption coefficient, and thickness. This material information is crucial for simulation tools because it determines the behavior of light as it passes through different thin film layers, thereby affecting the formation of photolithographic patterns.

[0071] Optionally, the test reticle's mask information includes the specific patterns on the mask, as well as details such as their size, position, and shape. This information is crucial for accurately simulating the photolithography process, as it directly reflects the interaction between light and photoresist during the actual lithography process. By inputting this mask information into simulation tools, it is possible to simulate how light penetrates the mask and strikes the photoresist during the actual lithography process, thereby predicting the resulting lithographic pattern.

[0072] Optionally, the physical parameters of the target photoresist refer to key numerical indicators derived from high-precision simulations using pre-defined simulation tools. These physical parameters directly reflect the photoresist's behavior under specific process conditions, including but not limited to thickness variation, sidewall angle, bottom residue, refractive index, and extinction coefficient. Together, they describe how the photoresist responds to external conditions during the photolithography process and ultimately forms the desired fine contours. The accuracy of these parameters is crucial for subsequent photolithography process optimization, product performance prediction, and overall manufacturing process stability.

[0073] Optionally, in a specific implementation of the present application, the characteristics of the initial light source (such as wavelength, intensity distribution, etc.), the exposure information of the initial design layout (including exposure dose, time, etc.), the material information of each thin film layer (such as photoresist, anti-reflective layer, substrate, etc.) in the design layout (such as refractive index, absorption coefficient, etc.), and the precise mask information of the test mask obtained through actual experiments, the actual FEM data and the actual cross-sectional data of the target photoresist at key positions are all used as input data to comprehensively and detailedly characterize the actual state of the lithography process.

[0074] This input data then undergoes complex physical and chemical simulations within pre-defined simulation tools. These tools utilize advanced algorithms and models, such as ray tracing, electromagnetic field simulation, and chemical reaction kinetics, to accurately calculate the interaction between light and matter during the photolithography process. This allows them to predict and derive the physical parameters of the target photoresist under specific conditions, such as thickness variation, sidewall angle, and bottom residue. These physical parameters are key indicators for evaluating photolithography results and are directly related to the performance and quality of the final chip.

[0075] Finally, the simulated physical parameters of the target photoresist are further input into a pre-set optical model. This optical model, based on the wave nature and interference principles of light, takes into account optical properties such as the photoresist's refractive index and extinction coefficient, as well as the complex interaction between light and the photoresist during the lithography process. Through calculations using the optical model, a photoresist model containing the detailed physical parameters of the target photoresist is generated. This model not only reflects the morphological changes of the photoresist in three-dimensional space but also includes the impact of its optical properties on lithographic imaging, providing a solid theoretical foundation and reliable reference for subsequent process optimization and layout design adjustments.

[0076] Alternatively, in other embodiments of the present application, the photoresist model obtained through rigorous simulation can be replaced by an OPC model. The OPC model incorporates the lithography parameters of a rich photoresist to simulate the physical effects of the photoresist and has predictive capabilities. Although the OPC model is a semi-empirical, semi-physical model optimized for specific cases, it can effectively simulate photoresist behavior, achieving functional replacement of the photoresist model and providing strong support for lithography process optimization.

[0077] In these alternative embodiments, by integrating experimental data with simulation technology, the lithography process of the target photoresist is accurately simulated, detailed physical parameters of the target photoresist are obtained, and a high-precision photoresist model is constructed based on these parameters. This method not only improves model accuracy but also provides a reliable basis for lithography process optimization, significantly enhancing the precision and efficiency of semiconductor manufacturing.

[0078] In one embodiment, if Figure 2As shown, the initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data, and the actual cross-sectional data are input into a preset simulation tool, and the photolithography process is simulated by the preset simulation tool to obtain the physical parameters of the target photoresist, including:

[0079] S310, inputting an initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, and mask information of a test mask into a preset simulation tool, simulating the process using the preset simulation tool to obtain a first simulation result;

[0080] S320, determining a first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data respectively;

[0081] S330, adjusting the preset simulation tool according to the first difference degree to obtain an adjusted simulation tool;

[0082] S340, inputting the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, and mask information of the test mask into the adjusted simulation tool, and simulating the photolithography process using the adjusted simulation tool to obtain a second simulation result;

[0083] S350 , when second differences between the second simulation result and the actual FEM data and the actual cross-sectional data respectively satisfy a preset convergence condition, obtaining physical parameters of the target photoresist from the second simulation result.

[0084] Alternatively, a pre-defined simulation tool is computer software or a system specifically designed to simulate and predict the various physical and chemical changes in the lithography process. It integrates advanced physical and chemical models with numerical calculation methods to perform high-precision simulations of the lithography process based on input initial conditions (such as the initial light source, exposure information for the design layout, material information for the thin film layers, and mask information for the test mask).

[0085] Optionally, in an embodiment of the present application, the simulation result obtained by the preset simulation tool is a simulation prediction of the photolithography process. It is based on the input initial light source characteristics, the exposure information of the initial design layout, the material information of each thin film layer in the design layout, and the mask information of the test mask. Through the calculation of physical and chemical models, it simulates the key links such as the interaction between light and matter in the photolithography process, the exposure reaction of the photoresist, and the final formed graphic contour. Specifically, the simulation results include the exposure energy distribution of the photoresist at different positions (i.e., a simulation of FEM data), the chemical changes of the photoresist after exposure (such as photolysis, cross-linking, etc.), the cross-sectional morphology of the photoresist (including line width, sidewall angle, bottom residue, etc.), and the trend of how these parameters change with changes in exposure conditions.

[0086] In this application, the degree of discrepancy is determined by comparing key parameters in the simulation results (such as exposure energy distribution and photoresist cross-sectional morphology) with the actual FEM data and actual cross-sectional data collected during the experiment. The degree of discrepancy can be measured using various metrics, such as numerical difference, graphical similarity, and percentage error. By calculating the degree of discrepancy, the accuracy and reliability of the simulation model can be evaluated and the simulation tool can be adjusted and optimized accordingly.

[0087] Alternatively, in one specific implementation of the present application, the initial light source characteristics, the initial design layout exposure conditions, the detailed material parameters of each thin film layer in the design layout, and the precise mask information of the test mask are first imported as input into a pre-set rigorous simulation tool. This simulation tool, based on advanced physical models and algorithms, is capable of simulating the complex interactions between light and matter during the lithography process.

[0088] Next, a simulation tool is used to perform a preliminary lithography process simulation to obtain a first simulation result. Although this first simulation result is based on accurate input data, due to possible deviations between the simulation model and the actual process, the first simulation result often does not fully match the actual lithography effect.

[0089] To narrow this gap, it is necessary to determine the first degree of difference between the first simulation results and the actual FEM data and actual cross-sectional data. This can be achieved by comparing key parameters in the simulation results (such as exposure energy distribution, photoresist cross-sectional morphology, etc.) with corresponding values ​​in the experimental data.

[0090] Based on the analysis of the first degree of discrepancy, targeted adjustments are made to the pre-set simulation tool. This process specifically involves adjusting parameters within the pre-set simulation tool, such as the refractive index of the optical model and the reaction rate constant of the chemical model, to more accurately reflect the physical and chemical changes in the actual lithography process. This parameter adjustment is accomplished through the simulation tool's automatic calibration function, which automatically optimizes the simulation model based on feedback from experimental data, gradually bringing the simulation results closer to reality.

[0091] The adjusted simulation tool is used again to simulate the lithography process, generating a second simulation result. This second simulation result should be closer to the actual data than the first simulation. A second degree of difference is then compared between the second simulation result and the actual FEM data and the actual cross-sectional data.

[0092] This process is repeated until the difference between the simulation results and the actual data falls within an acceptable range, thus satisfying the pre-set convergence criteria. Each iteration optimizes the simulation model and approximates the actual data. This continuous iterative optimization and verification ensures that the resulting photoresist physical parameters are both accurate and reliable, truly reflecting the photoresist's behavior under specific process conditions.

[0093] If the second degree of difference meets the preset convergence criteria (i.e., the difference is acceptably small), the simulation results are considered sufficiently accurate, and the physical parameters of the target photoresist can be extracted from the second simulation results. These physical parameters not only reflect the behavior of the photoresist under specific process conditions, but also, because they are obtained through rigorous simulation, have broad applicability and can be applied to any manufacturing scenario using the target photoresist.

[0094] Alternatively, in an embodiment of the present application, the physical properties of the target photoresist are obtained by strict simulation and parameterized to construct a photoresist model. This photoresist model not only simulates optical imaging, but also considers the physical effects of the photoresist in detail. Then, the photoresist model is utilized to optimize the initial IRO model. The optimization process not only considers the spatial image, but also deeply calculates the photoresist image to be closer to the actual process conditions. Through optimization, the target IRO model is obtained. When optimizing the light source, mask pattern and sub-resolution auxiliary feature (SBAR), the target IRO model is all based on the photoresist image, and the predictive ability is significantly improved. The optimized SBAR is placed more reasonably and is closer to the mask pattern after OPC correction, which helps to reduce the later correction workload and improve manufacturing efficiency and product quality.

[0095] In these alternative embodiments, precise input and iterative optimization effectively narrow the gap between simulation and experimental results, ensuring the accuracy of photoresist physical parameters. This iterative optimization process not only improves the reliability of simulation tools but also provides solid data support for optimizing semiconductor manufacturing processes, helping to improve product yield and performance.

[0096] In one embodiment, if Figure 3 As shown, after optimizing the initial IRO model based on the photoresist model to obtain the target IRO model, the method further includes:

[0097] S500 , optimizing the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout.

[0098] Alternatively, in an embodiment of the present application, the process window of the initial design layout is an important concept in the semiconductor manufacturing process, which refers to the process condition range in which the graphics on the design layout can be successfully accurately transferred to the silicon wafer during the photolithography process, and the quality of the graphics meets specific standards. Specifically, the process window includes multiple parameters, and these parameters jointly define the stability and repeatability of the photolithography process. The parameters of the process window size can include exposure energy, the focal length of the optical system, the thickness of the photoresist (photoresist), soft baking after gluing, baking after exposure, hard baking temperature and anti-reflection layer thickness, etc. The changes of these factors will affect the quality of the photolithography graphics.

[0099] Optionally, in one specific implementation of the present application, the target IRO model is used to optimize the initial design layout. During this process, the IRO model analyzes the geometric features, material stacking, and expected exposure and development conditions of the initial layout, and automatically adjusts the layout's line width, spacing, and possible auxiliary patterns (such as SRAF) through an algorithm to maximize the process window, that is, to ensure that a qualified pattern can be obtained within a certain process fluctuation range.

[0100] During the optimization process, the IRO model iterates repeatedly, adjusting the layout based on the current optimization results and pre-defined objectives (such as uniformity of critical dimensions and minimization of line edge roughness) until the predetermined optimization criteria are met. Ultimately, the design layout optimized by the IRO model will have a wider process window, maintaining high pattern quality and yield under different lithography and manufacturing conditions.

[0101] In these optional embodiments, optimizing the initial design layout through the target IRO model not only improves the design flexibility in semiconductor manufacturing, but also effectively reduces the production risks caused by process fluctuations, which is of great significance for improving product performance, reducing costs and accelerating product time to market.

[0102] In one embodiment, optimizing the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout includes:

[0103] Optimizing the initial design layout according to the target IRO model to obtain a target light source, a target mask pattern, and a target auxiliary pattern placement method of the initial design layout;

[0104] According to the target light source, target mask pattern and target auxiliary pattern placement method, a target process window corresponding to the initial design layout is obtained through simulation calculation.

[0105] In this embodiment, the initial design layout is first deeply optimized using a previously constructed and validated target IRO model. The target IRO model comprehensively optimizes the placement of the design layout's source, mask, and auxiliary features (such as SBARs, sub-resolution assist features) based on the physical properties of the photoresist. The optimization goal is to maximize the process window, ensuring that the design layout can be accurately and accurately transferred to silicon wafers with high quality across a wide range of process fluctuations.

[0106] Specifically, the target IRO model takes into account the nonlinear behavior of photoresist, such as the complex shrinkage effect during the exposure process. By adjusting the intensity and distribution of the light source, optimizing the shape and size of the mask pattern, and rationally placing auxiliary patterns, it aims to reduce pattern distortion and defects caused by process fluctuations. These optimization measures aim to improve pattern uniformity, reduce line edge roughness, and expand the boundaries of the process window.

[0107] After optimization is complete, the resulting target light source, target mask pattern, and target auxiliary pattern placement method are input into the simulation tool. Based on these optimized parameters, the simulation tool simulates the entire lithography process, including light propagation, photoresist exposure, development, and pattern formation. Through simulation, the design layout's pattern quality can be predicted and evaluated under different process conditions (such as exposure energy and focal length variations), thereby determining the target process window corresponding to the initial design layout.

[0108] In these alternative embodiments, because the physical properties of the photoresist and its complex behavior after exposure are fully considered, the simulated process window more closely matches the performance under actual process conditions, resulting in more accurate predictions. Furthermore, the optimized auxiliary pattern placement provides a valuable reference for subsequent optical proximity correction (OPC), helping to reduce OPC workload and ensuring that the OPC-corrected pattern is consistent with the IRO-optimized pattern, further improving manufacturing efficiency and product quality.

[0109] Figure 4 A structural schematic diagram of a device for determining an IRO model in cooperation with a light source mask provided by another embodiment of the present application is shown, and only parts related to the embodiments of the present application are shown for ease of illustration.

[0110] With reference to Figure 4 The device for determining an IRO model in cooperation with a light source mask can include:

[0111] A first determining module 401 is configured to input a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout.

[0112] A photolithography module 402 is configured to perform photolithography on a test mask based on the initial light source using a target photoresist to obtain actual FEM data and actual cross-section data of the target photoresist at key positions of the test mask, wherein the test mask is determined based on the test pattern.

[0113] A second determining module 403 is configured to determine a photoresist model based on the actual FEM data and the actual cross-section data.

[0114] An optimization module 404 is configured to optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

[0115] In an embodiment, the photolithography module 402 can include:

[0116] A first framework sub-module is configured to construct the test mask based on the test pattern.

[0117] A first photolithography sub-module is configured to perform photolithography on the test mask based on the initial light source.

[0118] A first collection sub-module is configured to collect the actual FEM data of the test mask in the photolithography process by a scanning electron microscope.

[0119] A second collection sub-module is configured to collect actual cross-section data of the target photoresist at the key positions of the test mask in the photolithography process by a transmission electron microscope.

[0120] In an embodiment, the second determining module 403 can include:

[0121] A first simulation submodule is configured to input the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, mask information of the test mask, the actual FEM data, and the actual cross-sectional data into a preset simulation tool, and simulate the photolithography process using the preset simulation tool to obtain physical parameters of the target photoresist;

[0122] The first generating submodule is configured to input the physical parameters into a preset optical model to generate the photoresist model including the physical parameters of the target photoresist.

[0123] In one embodiment, the first simulation submodule may include:

[0124] a first simulation unit, configured to input the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, and mask information of the test mask into a preset simulation tool, and simulate the process using the preset simulation tool to obtain a first simulation result;

[0125] a first determining unit, configured to determine a first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data, respectively;

[0126] an adjusting unit, configured to adjust the preset simulation tool according to the first difference degree to obtain an adjusted simulation tool;

[0127] a second simulation unit, configured to input the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, and mask information of the test mask into the adjusted simulation tool, and simulate the photolithography process using the adjusted simulation tool to obtain a second simulation result;

[0128] An acquiring unit is configured to acquire the physical parameters of the target photoresist from the second simulation result when a second degree of difference between the second simulation result and the actual FEM data and the actual cross-sectional data respectively satisfies a preset convergence condition.

[0129] In one embodiment, the apparatus for determining the light source mask collaborative optimization IRO model may further include:

[0130] The second optimization module is used to optimize the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout.

[0131] In one embodiment, the second optimization module may include:

[0132] An optimization submodule, configured to optimize the initial design layout according to the target IRO model to obtain a target light source, a target mask pattern, and a target auxiliary pattern placement method of the initial design layout;

[0133] The second simulation submodule is used to obtain the target process window corresponding to the initial design layout through simulation calculation according to the target light source, target mask pattern and target auxiliary pattern placement method.

[0134] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiment of the present application, and are devices corresponding to the above-mentioned battery thermal runaway warning method. All implementation methods in the above-mentioned method embodiment are applicable to the embodiments of the device. Its specific functions and technical effects can be found in the method embodiment section and will not be repeated here.

[0135] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0136] Figure 5 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown.

[0137] The device may include a processor 501 and a memory 502 storing program instructions.

[0138] When the processor 501 executes the program, the steps in any of the above method embodiments are implemented.

[0139] For example, the program may be divided into one or more modules / units, one or more modules / units being stored in the memory 502 and executed by the processor 501 to complete the present application. One or more modules / units may be a series of program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the program in the device.

[0140] Specifically, the processor 501 may include a central processing unit (CPU), or an application-specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0141] The memory 502 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 502 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 502 may include removable or non-removable (or fixed) media. Where appropriate, the memory 502 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 502 is a non-volatile solid-state memory.

[0142] The memory may include read-only memory (ROM), random access memory (RAM), magnetic disk storage media devices, optical storage media devices, flash memory devices, electrical, optical or other physical / tangible memory storage devices. Thus, generally, the memory includes one or more tangible (non-transitory) readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present disclosure.

[0143] The processor 501 implements any one of the methods in the above embodiments by reading and executing program instructions stored in the memory 502 .

[0144] In one example, the electronic device may further include a communication interface 503 and a bus 510. The processor 501, the memory 502, and the communication interface 503 are connected via the bus 510 and communicate with each other.

[0145] The communication interface 503 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0146] Bus 510 includes hardware, software or both, and the components of online data flow metering equipment are coupled to each other. For example, but not limitation, bus can include accelerated graphics port (AGP) or other graphics bus, enhanced industry standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industry standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 510 can include one or more buses. Although the present application embodiment describes and shows specific bus, the application considers any suitable bus or interconnection.

[0147] In addition, in combination with the methods in the above embodiments, embodiments of the present application may provide a storage medium for implementation. The storage medium stores program instructions; when the program instructions are executed by a processor, any one of the methods in the above embodiments is implemented.

[0148] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0149] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0150] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0151] It should be understood that the present application is not limited to the specific configurations and processes described above and illustrated in the figures. For the sake of brevity, a detailed description of known methods is omitted here. In the above embodiments, several specific steps are described and illustrated as examples. However, the method process of the present application is not limited to the specific steps described and illustrated. Those skilled in the art can make various changes, modifications, and additions, or change the order of the steps after understanding the spirit of the present application.

[0152] The functional modules shown in the above block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), suitable firmware, a plug-in unit, a function card or the like. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium that can store or transmit information. The example of a machine-readable medium includes an electronic circuit, a semiconductor memory device, a ROM, a flash memory, an erasable ROM (EROM), a floppy disk, a CD-ROM, an optical disk, a hard disk, an optical fiber medium, a radio frequency (RF) link, or the like. The code segment can be downloaded via a computer grid such as the Internet, an intranet, etc.

[0153] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps. In other words, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0154] Aspects of the present disclosure have been described above with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed via the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. This processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit. It is also understood that each box in the block diagram and / or the flowchart and the combination of the boxes in the block diagram and / or the flowchart can also be implemented by the dedicated hardware that performs the specified function or action, or can be implemented by the combination of dedicated hardware and computer instructions.

[0155] The above is only a specific implementation method of the present application. Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the scope of protection of the present application is not limited to this. Any technician familiar with this technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the scope of protection of this application.

Claims

1. A method for determining a light source mask collaborative optimization IRO model, characterized in that: The method comprises: Inputting a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to the initial design layout, wherein the test pattern includes a key pattern in the initial design layout; performing photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at key positions of the test mask, the test mask being determined according to the test pattern; Determining a photoresist model according to the actual FEM data and the actual cross-sectional data; Based on the photoresist model, the initial IRO model is optimized to obtain a target IRO model.

2. The method according to claim 1, characterized in that The method of performing photolithography on a test mask using a target photoresist according to the initial light source to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at a key position of the test mask comprises: Constructing the test mask according to the test pattern; Performing photolithography on the test mask based on the initial light source; collecting the actual FEM data of the test mask during the photolithography process through a scanning electron microscope; Actual cross-sectional data of the target photoresist at key positions of the test mask during the photolithography process are collected through a transmission electron microscope.

3. The method according to claim 1, characterized in that Determining a photoresist model according to the actual FEM data and the actual cross-sectional data includes: Inputting the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, mask information of the test mask, the actual FEM data, and the actual cross-sectional data into a preset simulation tool, simulating the photolithography process using the preset simulation tool to obtain physical parameters of the target photoresist; The physical parameters are input into a preset optical model to generate the photoresist model including the physical parameters of the target photoresist.

4. The method according to claim 3, characterized in that The initial light source, the exposure information of the initial design layout, the material information of each thin film layer in the initial design layout, the mask information of the test mask, the actual FEM data, and the actual cross-sectional data are input into a preset simulation tool, and the photolithography process is simulated by the preset simulation tool to obtain the physical parameters of the target photoresist, including: Inputting the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, and mask information of the test mask into a preset simulation tool, simulating the process using the preset simulation tool to obtain a first simulation result; determining a first degree of difference between the first simulation result and the actual FEM data and the actual cross-sectional data, respectively; Adjusting the preset simulation tool according to the first difference degree to obtain an adjusted simulation tool; Inputting the initial light source, exposure information of the initial design layout, material information of each thin film layer in the initial design layout, and mask information of the test mask into the adjusted simulation tool, and simulating the photolithography process using the adjusted simulation tool to obtain a second simulation result; When second degrees of difference between the second simulation result and the actual FEM data and the actual cross-sectional data respectively satisfy a preset convergence condition, the physical parameters of the target photoresist are obtained from the second simulation result.

5. The method according to claim 1, wherein After optimizing the initial IRO model based on the photoresist model to obtain a target IRO model, the method further includes: The initial design layout is optimized according to the target IRO model to obtain a target process window corresponding to the initial design layout.

6. The method according to claim 5, characterized in that Optimizing the initial design layout according to the target IRO model to obtain a target process window corresponding to the initial design layout includes: Optimizing the initial design layout according to the target IRO model to obtain a target light source, a target mask pattern, and a target auxiliary pattern placement method of the initial design layout; According to the target light source, target mask pattern and target auxiliary pattern placement method, a target process window corresponding to the initial design layout is obtained through simulation calculation.

7. A device for determining a light source mask collaborative optimization IRO model, characterized in that: The device comprises: A first determination module is configured to input a pre-acquired test pattern into an initial IRO model to obtain an initial light source corresponding to an initial design layout, wherein the test pattern includes a key pattern in the initial design layout; a photolithography module, configured to perform photolithography on a test mask using a target photoresist according to the initial light source, to obtain actual exposure energy matrix FEM data and actual cross-sectional data of the target photoresist at key positions of the test mask, wherein the test mask is determined according to the test pattern; A second determining module is used to determine a photoresist model according to the actual FEM data and the actual cross-sectional data; The optimization module is used to optimize the initial IRO model based on the photoresist model to obtain a target IRO model.

8. An electronic device, characterized in that: The device includes: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method for determining the light source mask collaborative optimization IRO model according to any one of claims 1 to 6 is implemented.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the method for determining a light source mask collaborative optimization IRO model according to any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for determining a light source mask collaborative optimization IRO model according to any one of claims 1 to 6.

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