A method for correcting temperature drift characteristics of a VFC circuit scale factor

Abstract

The application relates to a temperature drift characteristic correction method of a VFC circuit scale factor, which comprises the following steps: step 1, connecting the VFC circuit to a system and working in a temperature test box to measure positive and negative scale factors of the VFC under different working environment temperatures; step 2, comparing the positive and negative scale factors under a fixed temperature to determine the mathematical relationship between the positive and negative scale factors and the respective positive and negative constant current source on-off times N + and N ‑ ; step 3, using the obtained relationship between the scale factor and the constant current source on-off times, determining the voltage value of the smaller constant current source which needs to be compensated by a DAC through a successive approximation iteration method; and step 4, determining the DAC compensation voltage value corresponding to the scale factor under each environment temperature, so as to perform real-time correction on the VFC output under the whole working temperature domain. The application can improve the temperature drift characteristic and asymmetry of the VFC circuit scale factor, thereby improving the signal conversion precision.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of data processing of analog signal to digital signal, and relates to a temperature drift characteristic correction method, in particular to a temperature drift characteristic correction method of a scale factor of a VFC circuit. BACKGROUND

[0002] The VFC circuit can continuously convert the analog current signal output by the accelerometer into an analog voltage signal and integrate it, and convert it into a digital pulse frequency signal in linear proportion to it, to realize the digitization of analog information. The output pulse frequency corresponding to each milliamperes of input current is defined as the scale factor of the VFC circuit. Since the parameters of the components of the VFC circuit have certain temperature drift characteristics, and the positive and negative constant current sources have asymmetry, it is necessary to compensate and correct the temperature drift characteristics and asymmetry of the scale factor.

[0003] The correction method of the temperature drift characteristics of the scale factor of the VFC circuit in the past is divided into two categories. One is to quantitatively correct the current output of the feedback constant current source through a three-terminal adjustable current source with temperature sensitive characteristics; the other is to calculate the compensation parameters such as bias, first-order term and second-order term at various temperatures by traversing the VFC data conversion at various temperatures, and then to quantitatively correct the software. The first method excessively depends on the hardware accuracy, and the related components occupy about 1 / 5 of the area of the printed circuit board, which is not conducive to the miniaturization of the VFC circuit. The second method excessively depends on the algorithm calculation, and the correction process is redundant and complex, which increases the resource and time consumption of the FPGA, and the compensation parameters are not constant, and the cost of redefining the compensation parameters is huge.

[0004] Therefore, the present application proposes a temperature drift characteristic correction method of a scale factor of a VFC circuit.

[0005] After searching, no existing technical disclosure literature similar to the present application has been found. SUMMARY

[0006] The purpose of the present application is to overcome the shortcomings of the prior art, and to propose a temperature drift characteristic correction method of a scale factor of a VFC circuit, which can convert the analog current signal output by the accelerometer of an optical fiber inertial navigation equipment into a digital pulse frequency signal in real time, compensate the positive and negative constant current sources in real time by using the DAC in the VFC (voltage / frequency conversion) circuit under the cooperation of the digital correction algorithm, and improve the temperature drift characteristics and asymmetry of the scale factor of the VFC circuit, thereby improving the signal conversion accuracy.

[0007] The present application solves its practical problems by adopting the following technical scheme:

[0008] A temperature drift characteristic correction method of a scale factor of a VFC circuit, comprising the following steps:

[0009] Step 1, connect the VFC circuit to the system and put it into the temperature test box to work, and measure the positive and negative scale factors of the VFC under different working environmental temperatures;

[0010] Step 2, compare the positive and negative scale factors under the fixed temperature to determine the mathematical relationship between the positive and negative scale factors and the respective on-off times (N + and N - ) of the positive and negative constant current sources;

[0011] Step 3, using the obtained relationship between the scale factor and the on-off times of the constant current source, determine the voltage value that needs to be compensated by the DAC through the iterative method of successive approximation;

[0012] Step 4, determine the DAC compensation voltage value corresponding to the scale factor under each environmental temperature, so as to correct the VFC output in real time under the full working temperature domain.

[0013] Moreover, the specific method of step 1 is:

[0014] The temperature interval for scale factor determination can be selected as 1 degree Celsius. Adjust the temperature test box, and the environmental temperature value jumps by 1 degree Celsius from low to high, and maintains for a long enough time, and the positive and negative scale factors are measured multiple times and averaged. Finally, the positive and negative scale factors of each integer temperature value under the full working temperature domain are measured and summarized.

[0015] Moreover, the specific method of step 2 is:

[0016] The scale factor is the output pulse frequency corresponding to each milliamperes of input current, so the mathematical relationship between the positive and negative 1 milliamperes and the on-off times of the positive and negative constant current sources can be determined to determine the scale factor:

[0017]

[0018] Where I + or I - represent the input positive and negative 1 milliamperes of current, which become analog voltage quantities after passing through the resistor R2, t1 to t2 represent the two time instants of current signal input, q q is the quantized unit charge, N + and N - represent the on-off times of the positive and negative constant current sources in the t1 to t2 time period, t q represents the quantized single on-off time, σ represents the 1 LSB voltage value of the DAC, k represents the coefficient of the number of LSB voltage values that need to be compensated by the DAC, and V ref+ and V ref- are Figure 2Reference voltage at the end of R9 and R11, delta represents a small amount of error parameters.

[0019] And the specific method of step 3 is:

[0020] N + Greater than N - For example, the coefficient k + From the integer 1, increase successively, when N + (n) N - <0 and N + (n+1) N - >0, the approximation is completed, k + (n) That is, the coefficient obtained by successive approximation, k + (n) Sigma is the voltage value of the DAC required to compensate for the positive constant current source, refer to the following (3) and (4) formula:

[0021]

[0022] And the specific method of step 4 is:

[0023] Determine the DAC compensation voltage value k coefficient corresponding to the scale factor at each ambient temperature, and store these coefficients in FPGA; the subsequent VFC circuit will retrieve the k coefficient at the corresponding temperature from FPGA through the temperature value provided by the thermistor, if the temperature value is an integer, directly use the k coefficient to calculate; if the temperature is not an integer (set to T M ), refer to the k coefficients (set to k L And k R ) corresponding to the left and right adjacent two integer temperature values (set to T L And T R ), establish a new k coefficient (set to k M ) for calculation. In the above two cases, the real-time correction of VFC output in the whole working temperature domain is completed.

[0024] The advantages and beneficial effects of the present application are:

[0025] 1. The present application proposes a VFC circuit scale factor temperature drift characteristic correction method, which is a digital correction algorithm for real-time compensation of positive and negative constant current sources, to improve the temperature drift characteristic and asymmetry of the VFC circuit scale factor, and solve the problem of high hardware or software resource overhead and low correction accuracy of the traditional VFC circuit.

[0026] 2. The temperature drift characteristic correction method for the scale factor of the VFC, when applied, can utilize one FPGA and one DAC to compensate the constant current source of the VFC at different temperatures, realize output data correction, and has simple structure and high real-time performance.

[0027] 3. The temperature drift characteristic correction method for the scale factor of the VFC abandons a large number of temperature-sensitive current sources, precision resistors and other debugging devices, significantly reduces the area and mass of the circuit board, and is beneficial to the miniaturization and light weight of the VFC.

[0028] 4. The temperature drift characteristic correction method for the scale factor of the VFC has simple and efficient calculation process, and does not need to store a large number of complex compensation parameters in advance, thereby reducing the resource and time consumption of the FPGA. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 It is a VFC circuit overall design scheme block diagram of the application;

[0030] Figure 2 It is a VFC circuit core circuit diagram of the application. DETAILED DESCRIPTION

[0031] The embodiments of the application are further described in detail below with reference to the accompanying drawings:

[0032] A temperature drift characteristic correction method for the scale factor of a VFC circuit, comprising the following steps:

[0033] Step 1, connecting the VFC circuit to the system and working in the temperature test box, and measuring the positive and negative scale factors of the VFC at different working environmental temperatures;

[0034] The specific method of step 1 is:

[0035] The temperature interval for scale factor measurement can be selected as 1 degree Celsius. The temperature test box is adjusted, the environmental temperature value is from low to high, each jump of 1 degree Celsius is maintained for a long enough time, and the positive and negative scale factors are measured multiple times to take the average value. Finally, the positive and negative scale factors of each integer temperature value in the whole working temperature domain are measured and collected.

[0036] Step 2, comparing the positive and negative scale factors at a fixed temperature to determine the mathematical relationship between the positive and negative scale factors and the respective positive and negative constant current source on-off times (N + and N - );

[0037] The specific method of step 2 is:

[0038] The scale factor is the output pulse frequency corresponding to per-mA input current, so the scale factor can be determined by determining the mathematical relationship between the positive and negative 1-mA and the corresponding positive and negative constant current source on-off times:

[0039]

[0040] where I + and I - represent the input positive and negative 1-mA currents, respectively, which become analog voltage quantities after passing through the resistor R2, t1 to t2 represent two time instants of the current signal input, q q is the quantized unit charge, N + and N - represent the on-off times of the positive and negative constant current sources in the time period t1 to t2, t q represents the quantized single on-off time, σ represents the 1-LSB voltage value of the DAC, k represents the coefficient of the number of LSB voltage values that the DAC needs to compensate, V ref+ and V ref- are the reference voltages at the ends of R9 and R11 in (3), respectively, and δ represents a small error parameter. Figure 2

[0041] Step 3: Using the obtained relationship between the scale factor and the constant current source on-off times, a smaller constant current source needs to be compensated by the DAC through the iterative method of successive approximation;

[0042] The specific method of step 3 is:

[0043] Taking N + > N - as an example, the coefficient k + is increased successively from 1 upwards, when N + (n) -N - <0 and N + (n+1) -N - >0, the approximation is completed, and k + (n) is the coefficient obtained by successive approximation, and k + (n) σ is the voltage value that the DAC needs to compensate for the positive constant current source, as shown in the following (3) and (4):

[0044]

[0045] Step 4: Determine the DAC compensation voltage value corresponding to the scale factor at each environmental temperature, so as to real-time correct the VFC output in the full working temperature range.

[0046] The specific method of step 4 is: ​

[0047] Determine the DAC compensation voltage value corresponding to the scale factor at each ambient temperature k coefficient, and store these coefficients in the FPGA; the subsequent VFC circuit will retrieve the corresponding temperature k coefficient from the FPGA through the temperature value provided by the thermistor, if the temperature value is exactly an integer, then directly use the k coefficient to calculate; if the temperature is not an integer (set to T M ), then refer to the k coefficients (set to k L and k R ) corresponding to the left and right adjacent two integer temperature values (set to T L and T R ) to establish a new k coefficient (set to k M ) for calculation. In summary, the two cases complete the real-time correction of VFC output in the full working temperature domain.

[0048] As shown in Figure 1 , the VFC circuit includes integrator, constant current source, comparator, FPGA (Field Programmable Gate Array), DAC (Digital-to-Analog Converter), and switch circuit six parts.

[0049] System workflow: analog current signal input to integrator, integrator converts current to voltage signal input to comparator, comparator compares voltage signal with threshold voltage and outputs signal to FPGA, FPGA controls positive and negative constant current source coupled to integrator through switch. Finally, FPGA controls the conduction time pulse number of the corresponding switch of the positive and negative constant current source through judgment, thereby converting the analog current signal into digital signal.

[0050] As shown in Figure 2As shown, the VFC core circuit operates as follows: The integrator consists of a capacitor C1 with low leakage current and an operational amplifier U1 with high impedance. Assuming the initial value of the integration voltage U_OUT is 0, the positive and negative constant current sources are connected to GND through switch U3, and the IFC circuit has no pulse output. Starting from a certain moment, if the input current I_INPUT is constant and non-zero, then U_OUT changes linearly. If I_INPUT < 0, U_OUT increases linearly. When it exceeds 2V, the OUTA (COMP-) output of comparator U2 is high and the OUTB (COMP+) outputs low. The FPGA controls I_Switch+ to be high, and switch U3 turns on the positive constant current source until U_OUT falls back to the threshold voltage range of [-2V, 2V]. If I_INPUT > 0, U_OUT decreases linearly. When it is below -2V, the OUTB (COMP+) output of comparator U2 is high and the OUTA (COMP-) outputs low. The FPGA controls I_Switch- to be high, and switch U3 turns on the negative constant current source until U_OUT falls back to the threshold voltage range of [-2V, 2V].

[0051] The following provides a further detailed description of the invention's embodiments:

[0052] Suppose that from time t1 to time t2 (e.g., the time difference between t1 and t2 is 1 second), the input current remains constant and becomes an analog voltage after passing through resistor R2. The total input charge is Q. INPUT The constant current source is switched on N times, and the unit time for each switch is t. q (Unit time is 1 ms), quantized unit charge is q q The constant current source switching times N and the input charge Q can be obtained. INPUT The relationship between the change in charge on capacitor C1 is expressed as (5):

[0053]

[0054] When Q INPUT Much greater than ΔQ C1 (t2,t1) (ΔQ in actual design) C1 (t2,t1) is not greater than q q N is approximately proportional to Q INPUT This allows for the digital quantization of the accelerometer's output current. Transforming the above equation yields the direct relationship between the current and the number of times the constant current source is switched on, and ΔQ. C1 The parameters related to (t2, t1) are represented by δ (this parameter is extremely small). This allows us to determine the input positive or negative milliampere current (denoted by I) at a specific temperature. + or I - The number of times (N, where N represents the absolute value of the current) is connected to the corresponding negative or positive constant current source.- or N + represents) expression:

[0055]

[0056] σ represents the 1 LSB voltage value of DAC, k represents the coefficient of the number of LSB voltage values that DAC needs to compensate, V ref+ and V ref- are Figure 2 the reference voltage at the end of R9 and R11, δ represents a small amount of error parameter. If N + is greater than N - (representing that the output of the positive constant current source is less than the negative constant current source, and the positive constant current source needs to be compensated by the DAC), let k - be zero, and the upper two formulas are simplified to equation (9) (δ' is the simplified δ parameter term):

[0057]

[0058] Referring to equations (10) and (11), initialize the coefficient k + in the FPGA and substitute it into the equation, so that the coefficient k + is increased by 1 integer at a time, and k + is gradually approaching N + . Such a loop iteration, when N - + -N (n) <0 and N - >0, the termination condition is reached and the loop is exited, and the successive approximation process is completed, k + (n+1) -N - >0, the termination condition is reached and the loop is exited, and the successive approximation process is completed, k + (n) is the obtained coefficient, k + (n) σ is the voltage value of the positive constant current source that the DAC needs to compensate.

[0059]

[0060] If N + is less than N - (representing that the output of the positive constant current source is greater than the negative constant current source, and the negative constant current source needs to be compensated by the DAC), let k + be zero, and similarly refer to equations (8), (9), (10), and (11), change the related parameters, initialize the coefficient k - in the FPGA and substitute it into the equation, so that the coefficient k - is increased by 1 integer at a time, and k - is gradually approaching N -It will shrink to a new value and gradually approach N. + This process is repeated iteratively, checking when N... - (n) -N + <0 and N - (n+1) -N + When k > 0, the termination condition is met, the loop exits, and the successive approximation process is complete. - (n) That is, the obtained coefficient, k - (n) σ is the voltage value of the negative constant current source that the DAC needs to compensate for.

[0061] Through the steps described above, the DAC compensation voltage value k coefficient corresponding to the scaling factor at each integer ambient temperature is determined in the temperature test chamber, and these coefficients are stored in the FPGA.

[0062]

[0063] The subsequent VFC circuit will retrieve the k coefficient at the corresponding temperature from the FPGA using the temperature value provided by the thermistor. If the temperature value is an integer, the k coefficient will be used directly for calculation; otherwise, if the temperature is not an integer (let's say T), the calculation will be performed using the k coefficient. M If the two adjacent integer temperature values ​​are referenced (let's say T), then... L With T R The corresponding k coefficient (let's call it k) L With k R ), establish a new k M The coefficient is used for calculation, if k L With k R If the coefficients correspond to the same polarity constant current source, then calculate k. M Formula reference (12); if k L With k R If the coefficients do not correspond to the same polarity constant current source, then calculate k. M Formula reference (13) (the obtained k) M If the coefficient is not an integer, it should be rounded to an integer for calculation. In summary, this completes the real-time correction of the VFC output across the entire operating temperature range.

[0064] It should be emphasized that the embodiments described in this invention are illustrative rather than limiting. Therefore, this invention includes, but is not limited to, the embodiments described in the specific implementation. Any other implementations derived by those skilled in the art based on the technical solutions of this invention are also within the scope of protection of this invention.

Claims

1. A method for correcting temperature drift characteristics of a VFC circuit scale factor, characterized by: The method comprises the following steps: Step 1, connect the VFC circuit to the system and put it into the temperature test box to work, and measure the positive and negative scale factors of the VFC under different working environmental temperatures; Step 2, compare the positive and negative scale factor size at a fixed temperature, determine the positive and negative scale factor and the respective positive and negative constant current source on time N + and N - mathematical relationship between Step 3, by using the obtained relationship between the scale factor and the number of times of connecting the constant current source, the voltage value of the constant current source which needs to be compensated by the DAC is determined through the iterative method of successive approximation; Step 4, the DAC compensation voltage value corresponding to the scale factor at each environmental temperature is determined, so as to correct the VFC output in real time under the whole working temperature domain; The specific method of step 2 is: The scale factor is the output pulse frequency corresponding to each milliamperes of input current, so the mathematical relationship between the positive and negative 1 milliamperes and the number of times of connecting the constant current source is determined to determine the scale factor: ; where I + or I - represent the input positive and negative one milliampere current, which is converted into analog voltage after passing through resistor R2, t1 to t2 represent the two time instants of the current signal input, q q is the quantized unit charge, N + and N - represent the number of turn-on times of the positive and negative constant current sources in the time period from t1 to t2, t q represents the quantized single turn-on time, σ represents the 1 LSB voltage value of the DAC, k represents the number coefficient of the LSB voltage values that the DAC needs to compensate, V ref+ and V ref- are the reference voltages at the ends of R9 and R11 in FIG. 2, and δ represents a small error parameter.

2. The method of claim 1, wherein: The specific method of step 1 is: The temperature interval reference for determining the scale factor is selected as 1 degree Celsius, the environmental temperature value is adjusted from low to high, each time the temperature is increased by 1 degree Celsius, the temperature is maintained for a long enough time, and the positive and negative scale factors are measured multiple times to take the average value; finally, the positive and negative scale factors of each integer temperature value under the whole working temperature domain are measured and collected.

3. The method of claim 1, wherein the VFC circuit is a voltage controlled oscillator (VCO) circuit. The specific method of step 3 is: N + greater than N - For example, the coefficient k + From the integer 1 to increase sequentially, when N + (n) -N - <0 and N + (n+1) -N - >0, the approximation is completed, k + (n) That is, the coefficient obtained by the successive approximation, k + (n) σ is the voltage value of the DAC required to compensate for the positive constant current source, as shown in the following (3) and (4) formulas: 。 4. The method for correcting the temperature drift characteristics of the scaling factor of a VFC circuit according to claim 1, characterized in that: The specific method of step 4 is: Determine the DAC compensation voltage value corresponding to the scale factor of each environment temperature k coefficient, and store these coefficients in FPGA; the subsequent VFC circuit will retrieve the corresponding temperature k coefficient from the FPGA through the temperature value provided by the thermistor, if the temperature value is an integer, directly use k coefficient to calculate; if the temperature is not an integer, set to T M , reference to the left and right adjacent two integer temperature value, set to T L , R , the corresponding k coefficient, set to k L , R , establish a new k coefficient, set to k M , for calculation; in the above two cases, complete the real-time correction of VFC output in the whole working temperature domain.

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