Method and device for determining voltage and current stress of IGBT of MMC sub-module

Abstract

The invention discloses a voltage and current stress determination method and device for an IGBT of an MMC sub-module, and the method comprises the steps: carrying out the discretization of a capacitor in a half-bridge sub-module, and constructing a discretization accompanying model of the capacitor, the half-bridge sub-module, and a bridge arm; determining the operation state of each half-bridge sub-module according to the number of the input sub-modules, and further calculating the equivalent resistance and the equivalent voltage source voltage of the discretization adjoint model; and the capacitance voltage and the conduction current of the sub-module are obtained through simulation calculation, and the voltage stress and the current stress of the IGBT in the sub-module are obtained. The method can improve the simulation precision while ensuring the simulation efficiency, is suitable for large-scale power grid system simulation, and facilitates failure mechanism analysis and state monitoring research on the crimping type IGBT device for the submodule.

Description

Technical Field

[0001] The present invention relates to the technical field of flexible direct current transmission, and in particular to a method and device for determining voltage and current stress of an MMC submodule IGBT. Background Art

[0002] In the flexible DC transmission system, MMC (modular multilevel converter) is an important main equipment of the converter station. It has a complex structure, contains a large number of sub-modules, and is in switching action all the time. Statistics show that the main reason for the failure of the converter valve is the failure of the converter valve components. At present, the power devices used in the flexible DC converter valve are mainly IGBT (insulated gate bipolar thyristor). Therefore, the reliability of IGBT devices is crucial to the safe and reliable operation of the flexible DC transmission converter valve. In order to better analyze the failure mechanism and status monitoring of the sub-module IGBT devices, it is necessary to analyze the voltage and current stress of a single sub-module IGBT in the flexible DC transmission project.

[0003] At present, the voltage and current stress of IGBT is generally obtained by building an electromagnetic transient model of MMC. The model is mainly divided into two categories: detailed model and equivalent model. The detailed model has high accuracy but slow simulation speed, and is not suitable for simulation of large-scale flexible direct current systems. The equivalent model is mainly divided into MMC precise equivalent model and MMC simplified model; although the MMC precise equivalent model has high simulation accuracy, the simulation efficiency of the converter part will decrease rapidly with the increase of the number of levels because the sub-modules are still directly connected in series; the MMC simplified model has higher efficiency in the simulation of large-scale systems, but it usually has certain restrictions on the capacitance parameters of the simulated precise model, and the simulation accuracy is low. Therefore, there is an urgent need for a method for determining the voltage and current stress of a single sub-module IGBT that can ensure simulation speed while also ensuring simulation accuracy. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a method and device for determining the voltage and current stress of an MMC sub-module IGBT. By constructing a discrete accompanying model for simulation, the voltage and current stress of the sub-module IGBT can be directly obtained, thereby improving the simulation accuracy while ensuring the simulation speed.

[0005] An embodiment of the present invention provides a method for determining voltage and current stress of an MMC submodule IGBT, comprising:

[0006] Discretize the capacitor in the half-bridge submodule, construct a discrete adjoint model of the capacitor, and make the combination of the IGBT and the diode in the half-bridge submodule equivalent to two variable resistors to construct a discrete adjoint model of the half-bridge submodule; obtain a discrete adjoint model of the bridge arm according to the superposition of the discrete adjoint models of the half-bridge submodules to perform simulation calculation;

[0007] Obtain the number of submodules respectively put into use in the upper and lower bridge arms, and determine the operating status of each half-bridge submodule using a sorting and voltage-sharing algorithm according to the number of submodules put into use;

[0008] Based on the operating status of each half-bridge sub-module, respectively determining the equivalent resistance of the capacitor and the discretized adjoint model of the half-bridge sub-module;

[0009] Determine the capacitor voltage, capacitor current and equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current simulation moment according to the equivalent resistance of the capacitor and the capacitor voltage and capacitor current at the previous simulation moment;

[0010] Obtaining an equivalent voltage source voltage of a discretized adjoint model of the half-bridge submodule according to an equivalent voltage source voltage of the capacitor, so as to determine an on-current of the half-bridge submodule;

[0011] According to the changes of the capacitor voltage and the conduction current of the half-bridge sub-module, the voltage stress and current stress of the IGBT in the half-bridge sub-module are obtained.

[0012] As an improvement of the above solution, the capacitors in the half-bridge submodule are discretized to construct a discretized adjoint model of the capacitors, including:

[0013] Based on the original circuit of the capacitor in the half-bridge submodule, construct the differential equation describing the capacitor;

[0014] The differential equation of the capacitor is discretized using a numerical integration formula to determine a discretized adjoint model of the capacitor in the form of Thevenin; the discretized adjoint model of the capacitor is composed of an equivalent resistor and an equivalent voltage source connected in series.

[0015] As an improvement of the above solution, the discretized adjoint models of the half-bridge submodule and the bridge arm are both Thevenin equivalent circuits consisting of an equivalent voltage source and an equivalent resistor connected in series;

[0016] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the half-bridge submodule are:

[0017]

[0018] Among them, R smeqis the equivalent resistance of the half-bridge submodule, R C is the equivalent resistance of the capacitor, R1 and R2 are the two variable resistors, and E smeq (t-Δt) is the equivalent voltage source voltage of the half-bridge submodule, E C (t-Δt) is the equivalent voltage source voltage of the capacitor, t represents time t, and Δt is the simulation step size;

[0019] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the bridge arm are:

[0020]

[0021] Among them, R armeq is the equivalent resistance of the bridge arm, is the equivalent resistance of the i-th half-bridge submodule, E armeq (t-Δt) is the equivalent voltage source voltage of the bridge arm, is the equivalent voltage source voltage of the i-th half-bridge submodule, and N is the number of submodules in the bridge arm.

[0022] As an improvement to the above solution, the number of submodules respectively invested in the upper and lower bridge arms is calculated according to the following formula:

[0023]

[0024] Among them, N p 、N n are the number of submodules invested in the upper and lower bridge arms respectively, and N is the total number of submodules included in the upper and lower bridge arms. is the phase voltage reference value, U C is the average DC voltage of the submodule, and round(x) represents the integer closest to x.

[0025] As an improvement of the above solution, the operation status of each half-bridge sub-module is determined by using a sorting and voltage-sharing algorithm according to the number of sub-modules put into operation, including:

[0026] According to the number of submodules currently put into operation in the bridge arm, determine whether the number of submodules currently put into operation is the same as the number of submodules put into operation last time; if so, determine the current operating state of each half-bridge submodule according to the last submodule switching situation; if not, determine whether the bridge arm current is greater than 0;

[0027] If the bridge arm current is greater than 0, the capacitor voltages of the half-bridge submodules are arranged in ascending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are cut out to obtain the current operating status of each half-bridge submodule; M is the number of submodules currently put into operation;

[0028] If the bridge arm current is not greater than 0, the capacitor voltages of the half-bridge submodules are arranged in descending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are switched out to obtain the current operating status of each half-bridge submodule.

[0029] As an improvement of the above scheme, the equivalent voltage source voltage of the discretized adjoint model of the capacitor is The calculation formula is:

[0030]

[0031] in, is the equivalent voltage source voltage of the capacitor at the n+1th moment, u n is the capacitor voltage at the nth moment, R C is the equivalent resistance of the capacitor; i n is the capacitor current at the nth moment;

[0032] The capacitor voltage u n+1 The calculation formula is:

[0033]

[0034] Among them, u n+1 is the capacitor voltage at the n+1th moment, i n+1 is the capacitor current at the n+1th moment.

[0035] As an improvement of the above solution, the construction and simulation calculation of the discretized adjoint model of the bridge arm are implemented by PSCAD simulation software, and the method further includes:

[0036] In the PSCAD simulation software, construct an initial value module, a submodule scheduling calculation module, and a bridge arm module;

[0037] The initial value module is used to initialize the simulation parameters, define the size of the storage array of the historical parameters and the storage space required for the three-phase voltage;

[0038] The submodule scheduling calculation module is used to determine the number of submodules required for the upper and lower bridge arms according to the input voltage reference wave;

[0039] The bridge arm module is used to calculate the equivalent voltage source voltage and equivalent resistance of each capacitor, half-bridge sub-module and bridge arm according to the input sub-module number of the upper and lower bridge arms and the initial value of the simulation parameter, and obtain the capacitor voltage and conduction current of the target sub-module.

[0040] The embodiment of the present invention further provides a device for determining voltage and current stress of an MMC submodule IGBT, comprising:

[0041] A model building module is used to discretize the capacitor in the half-bridge submodule, build a discretized adjoint model of the capacitor, and make the combination of the IGBT and the diode in the half-bridge submodule equivalent to two variable resistors to build a discretized adjoint model of the half-bridge submodule; according to the superposition of the discretized adjoint models of the half-bridge submodules, a discretized adjoint model of the bridge arm is obtained to perform simulation calculation;

[0042] The submodule input module is used to obtain the number of submodules respectively input into the upper and lower bridge arms, and determine the operating status of each half-bridge submodule by using a sorting and voltage-sharing algorithm according to the number of submodules input;

[0043] An equivalent resistance module, used to determine the equivalent resistance of the capacitor and the discretized adjoint model of the half-bridge sub-module respectively based on the operating status of each half-bridge sub-module;

[0044] An equivalent voltage module, used to determine the capacitor voltage, capacitor current and equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current simulation moment according to the equivalent resistance of the capacitor and the capacitor voltage and capacitor current at the previous simulation moment;

[0045] A submodule current module, used to obtain an equivalent voltage source voltage of a discretized adjoint model of the half-bridge submodule according to an equivalent voltage source voltage of the capacitor, so as to determine an on-current of the half-bridge submodule;

[0046] The voltage and current stress module is used to obtain the voltage stress and current stress of the IGBT in the half-bridge sub-module according to the changes of the capacitor voltage and the conduction current of the half-bridge sub-module.

[0047] Furthermore, the discrete adjoint models of the half-bridge submodule and the bridge arm are both Thevenin equivalent circuits consisting of an equivalent voltage source and an equivalent resistor connected in series;

[0048] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the half-bridge submodule are:

[0049]

[0050] Among them, R smeq is the equivalent resistance of the half-bridge submodule, R C is the equivalent resistance of the capacitor, R1 and R2 are the two variable resistors, and E smeq (t-Δt) is the equivalent voltage source voltage of the half-bridge submodule, E C (t-Δt) is the equivalent voltage source voltage of the capacitor, t represents time t, and Δt is the simulation step size;

[0051] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the bridge arm are:

[0052]

[0053] Among them, R armeq is the equivalent resistance of the bridge arm, is the equivalent resistance of the i-th half-bridge submodule, E armeq (t-Δt) is the equivalent voltage source voltage of the bridge arm, is the equivalent voltage source voltage of the i-th half-bridge submodule, and N is the number of submodules in the bridge arm.

[0054] Furthermore, the equivalent voltage source voltage of the discretized adjoint model of the capacitor is The calculation formula is:

[0055]

[0056] in, is the equivalent voltage source voltage of the capacitor at the n+1th moment, u n is the capacitor voltage at the nth moment, R C is the equivalent resistance of the capacitor; i n is the capacitor current at the nth moment;

[0057] The capacitor voltage u n+1 The calculation formula is:

[0058]

[0059] Among them, u n+1 is the capacitor voltage at the n+1th moment, i n+1 is the capacitor current at the n+1th moment.

[0060] Compared with the prior art, the beneficial effects of a method and device for determining the voltage and current stress of an MMC sub-module IGBT provided by an embodiment of the present invention are: by constructing a discrete companion model of the capacitor, half-bridge sub-module, and bridge arm, the operating status of each half-bridge sub-module is determined according to the number of sub-modules invested, and then the equivalent resistance and equivalent voltage source voltage of the discrete companion model are determined, and the capacitor voltage and on-current of the sub-module are obtained by simulation, and then the voltage stress and current stress of the IGBT in the sub-module are obtained. This method can improve the simulation accuracy while ensuring the simulation efficiency, is suitable for large-scale power grid system simulation, and is conducive to failure mechanism analysis and status monitoring research on crimped IGBT devices for sub-modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 It is a flow chart of a method for determining voltage and current stress of an MMC sub-module IGBT provided by an embodiment of the present invention;

[0062] Figure 2 It is a topological structure diagram of an MMC provided by an embodiment of the present invention;

[0063] Figure 3 is a schematic diagram of a discretized adjoint model of a capacitor provided by an embodiment of the present invention;

[0064] Figure 4 is a schematic diagram of a discretized adjoint model of a half-bridge submodule provided by an embodiment of the present invention;

[0065] Figure 5 is a Thevenin equivalent circuit diagram of a discretized adjoint model of a half-bridge submodule provided by an embodiment of the present invention;

[0066] Figure 6 is a schematic diagram of a discretized adjoint model of a bridge arm provided by an embodiment of the present invention;

[0067] Figure 7 is a schematic diagram of different working states of the MMC provided by an embodiment of the present invention;

[0068] Figure 8 This is a waveform diagram of the on-off current variation of the 200-level lower half-bridge submodule provided in an embodiment of the present invention;

[0069] Fig. 9 It is a structural schematic diagram of a device for determining voltage and current stress of an MMC sub-module IGBT provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0070] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0071] See also Figure 1 , Figure 1 The present invention provides a method for determining the voltage and current stress of an MMC submodule IGBT. The method for determining the voltage and current stress of an MMC submodule IGBT comprises:

[0072] S1: Discretize the capacitor in the half-bridge submodule, construct a discrete adjoint model of the capacitor, and treat the combination of the IGBT and the diode in the half-bridge submodule as two variable resistors to construct a discrete adjoint model of the half-bridge submodule; obtain a discrete adjoint model of the bridge arm according to the superposition of the discrete adjoint models of the half-bridge submodules to perform simulation calculations;

[0073] S2: Obtain the number of submodules respectively put into use in the upper and lower bridge arms, and determine the operating status of each half-bridge submodule using a sorting and voltage-sharing algorithm according to the number of submodules put into use;

[0074] S3: Based on the operating status of each half-bridge sub-module, respectively determine the equivalent resistance of the capacitor and the discretized adjoint model of the half-bridge sub-module;

[0075] S4: determining the capacitor voltage, capacitor current and equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current simulation moment according to the equivalent resistance of the capacitor and the capacitor voltage and capacitor current at the previous simulation moment;

[0076] S5: obtaining an equivalent voltage source voltage of a discretized adjoint model of the half-bridge submodule according to the equivalent voltage source voltage of the capacitor, so as to determine an on-current of the half-bridge submodule;

[0077] S6: Obtaining voltage stress and current stress of the IGBT in the half-bridge sub-module according to changes in the capacitor voltage and the conduction current of the half-bridge sub-module.

[0078] For details, please refer to Figure 2 , a topological structure diagram of an MMC provided by an embodiment of the present invention. Each bridge arm is composed of a reactor and N submodules in series, and there are 6 bridge arms in total for three phases. The upper and lower two bridge arms of each phase constitute a phase unit. Each submodule (SM n ) There are three switching states: both IGBTs are locked, which is generally used at startup and fault, called the locked state; the upper IGBT (T1) is turned on and the lower IGBT (T2) is locked. At this time, the output voltage of the submodule is the capacitor voltage, which is called the input state; the upper IGBT (T1) is locked and the lower IGBT (T2) is turned on. At this time, the output voltage of the submodule is 0, which is called the cut-off state. Therefore, the output voltage of the submodule can be controlled by a trigger pulse. According to the switching state and current direction of the upper and lower bridge arm IGBTs of the submodule, there are 6 working modes, as shown in the following table.

[0079]

[0080] Further, according to Figure 2 , the differential equation mathematical model of MMC can be derived:

[0081]

[0082] The differential mode voltage and common mode voltage of the upper and lower bridge arms are defined as u diffj and u comj :

[0083]

[0084] Combine the differential equations of MMC and substitute u diffj and u comj Then the mathematical expression characterizing the dynamic performance of the AC and DC sides of the MMC is obtained:

[0085]

[0086] In the formula, i cirj Defined as the j-phase circulation:

[0087]

[0088] For the controller design of MMC, we only focus on the fundamental component on the AC side. Under the symmetrical condition of the AC system, u oo′ The fundamental component of is zero. Therefore, it can be simplified to:

[0089]

[0090] definition:

[0091]

[0092] The fundamental frequency dynamic equation of the MMC AC side can be obtained as:

[0093]

[0094] Furthermore, a general three-phase power system is provided by a set of interacting three-phase voltages and three-phase currents, but an actual three-phase system cannot be regarded as a simple addition of three independent single-phase subsystems. Therefore, the control system of the three-phase grid-connected power converter needs to use variables obtained through Park transformation to control it. The time domain form of MMC in the dq coordinate system obtained through Park transformation is:

[0095]

[0096] Furthermore, by using the Lassen transformation, the frequency domain form of the state equation of MMC in the dq coordinate system can be obtained:

[0097]

[0098] Furthermore, the frequency domain model of MMC can be obtained through the frequency domain equation.

[0099] Furthermore, the discretized adjoint model of the half-bridge submodule can be regarded as consisting of the discretized adjoint model of the capacitor and the variable resistor, so the discretized adjoint model of the capacitor is constructed first.

[0100] As one of the optional embodiments, the discretization of the capacitor in the half-bridge submodule and the construction of the discretization adjoint model of the capacitor include:

[0101] Based on the original circuit of the capacitor in the half-bridge submodule, construct the differential equation describing the capacitor;

[0102] The differential equation of the capacitor is discretized using a numerical integration formula to determine a discretized adjoint model of the capacitor in the form of Thevenin; the discretized adjoint model of the capacitor is composed of an equivalent resistor and an equivalent voltage source connected in series.

[0103] Specifically, according to the original circuit of the capacitor, the differential equation describing the capacitor is obtained:

[0104]

[0105] Integrating both sides of the differential equation and discretizing it using the trapezoidal formula for numerical integration yields:

[0106]

[0107] Among them, Δt represents the step size, u n 、i n They represent the capacitor voltage and current at the nth moment respectively, and C is the capacitance value. By derivation, we can get:

[0108]

[0109] Then we get the Thevenin form of the discretized adjoint model of capacitance, as Figure 3 shown.

[0110] Furthermore, after the discretized adjoint model of the capacitor is determined, the discretized adjoint model of the half-bridge submodule can be derived.

[0111] The half-bridge module consists of two IGBTs with anti-parallel diodes and capacitors. Based on the difference between their switched-on and switched-off states, the combination of IGBTs and diodes can be equivalent to two variable resistors. When the combination is turned on, the variable resistor is a very small on-state resistor; when the combination is turned off, the variable resistor is a very large reverse resistor.

[0112] Combination Figure 3 The capacitor discretization adjoint model is obtained as Figure 4 The adjoint model of the half-bridge submodule is shown in Fig. Figure 4 In the circuit, looking into the circuit from the port, it can be equivalent to a sub-module Thevenin equivalent circuit consisting of an equivalent voltage source and an equivalent resistor, such as Figure 5 shown.

[0113] Furthermore, after obtaining the discrete adjoint model of the half-bridge submodule, the discrete adjoint model of the entire bridge arm can be derived. The bridge arm is composed of several half-bridge submodules in series, and the equivalent power supply and equivalent resistance of the bridge arm are obtained by superposition of each submodule. A bridge arm is composed of N submodules in series, then the output voltage of a bridge arm is the sum of the output voltages of all submodules of this bridge arm, and the bridge arm current is equal to the half-bridge submodule current: i arm (t) = i sm (t). Figure 6 As shown in Figure 1, it is the discretized adjoint model of the bridge arm.

[0114] As one of the optional embodiments, the discretized companion models of the half-bridge sub-module and the bridge arm are both Thevenin equivalent circuits consisting of an equivalent voltage source and an equivalent resistor connected in series;

[0115] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the half-bridge submodule are:

[0116]

[0117] Among them, R smeq is the equivalent resistance of the half-bridge submodule, R C is the equivalent resistance of the capacitor, R1 and R2 are the two variable resistors, and E smeq (t-Δt) is the equivalent voltage source voltage of the half-bridge submodule, E C (t-Δt) is the equivalent voltage source voltage of the capacitor, t represents time t, and Δt is the simulation step size;

[0118] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the bridge arm are:

[0119]

[0120] Among them, R armeq is the equivalent resistance of the bridge arm, is the equivalent resistance of the i-th half-bridge submodule, E armeq (t-Δt) is the equivalent voltage source voltage of the bridge arm, is the equivalent voltage source voltage of the i-th half-bridge submodule, and N is the number of submodules in the bridge arm.

[0121] Furthermore, the number of submodules put into operation in the upper and lower bridge arms is obtained, and according to the number of submodules put into operation, a sorting and voltage-sharing algorithm is used to determine the operation status of each half-bridge submodule.

[0122] Specifically, there are two conditions for the normal operation of MMC: one is the maintenance of DC voltage, that is, the number of submodules in the three phase units in the on-state is equal and unchanged, so that the voltage of each phase satisfies: u A1+u A2 =u B1 +u B2 =u C1 +u C2 ; The second is the output of three-phase AC voltage, which is to adjust the output voltage of the converter by allocating the number of sub-modules in the upper and lower bridge arms of the three phase units.

[0123] Taking phase A as an example, without considering the margin of submodules, each phase has 2N submodules. When all N submodules of the upper bridge arm of phase A are removed, u A1 =0, the voltage at point a is the DC positive voltage. At this time, all N submodules in the lower bridge arm of phase A must be put into operation to obtain the maximum DC voltage, thereby improving the device utilization rate. Because the number of submodules in the phase unit in the put-in state is a constant, in general, the number of submodules in the put-in state in each phase unit is N, which is half of the total number of submodules in the phase unit (2N). In this way, the number of submodules in the put-in state in a single bridge arm can be 0, 1, 2...N, which means that the maximum number of levels that the MMC can output is N+1.

[0124] Furthermore, in terms of modulation of the bridge arm voltage reference value, the nearest level approximation method is usually used. The nearest level approximation modulation (NLM) is to approximate the sine wave by a step wave, and the fitting effect is better when applied to high-level situations. When using the nearest level modulation, the key step is to select the appropriate submodule to switch on the MMC main circuit so that its output is as close to the modulation wave as possible.

[0125] As one of the optional embodiments, the number of submodules respectively invested in the upper and lower bridge arms is calculated according to the following formula:

[0126]

[0127] Among them, N p 、N n are the number of submodules invested in the upper and lower bridge arms respectively, and N is the total number of submodules included in the upper and lower bridge arms. is the phase voltage reference value, U C is the average DC voltage of the submodule, and round(x) represents the integer closest to x.

[0128] Specifically, the step wave output waveform can be obtained by the following formula:

[0129]

[0130] Select the level output that is closest to the reference voltage per unit value, such as When u0=U CIt can be seen that the error range of the step wave and the modulation wave is maintained at half of the submodule capacitor voltage, so the more the number of output levels, the smaller the error and the lower the harmonic content.

[0131] If the number of submodules put into use in the upper and lower bridge arms at a certain moment is N p and N n , then the output voltage u of the upper and lower bridge arms is p and u n for:

[0132]

[0133] Since the output voltage is a step wave, the number of modules N put into the upper and lower bridge arms can be obtained p and N n They are:

[0134]

[0135] The above formula can be used to calculate the number of sub-modules put into use in the upper and lower bridge arms at any time.

[0136] Furthermore, after obtaining the number of sub-modules to be put into or removed by modulating the bridge arm reference voltage, it is necessary to select specific appropriate sub-modules to be put into or removed to ensure the balance of capacitor voltages inside each sub-module, which is generally achieved through a sub-module capacitor voltage sorting and equalization algorithm.

[0137] As one of the optional embodiments, the operation status of each half-bridge sub-module is determined by using a sorting and voltage-sharing algorithm according to the number of sub-modules put into use, including:

[0138] According to the number of submodules currently put into operation in the bridge arm, determine whether the number of submodules currently put into operation is the same as the number of submodules put into operation last time; if so, determine the current operating state of each half-bridge submodule according to the last submodule switching situation; if not, determine whether the bridge arm current is greater than 0;

[0139] If the bridge arm current is greater than 0, the capacitor voltages of the half-bridge submodules are arranged in ascending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are cut out to obtain the current operating status of each half-bridge submodule; M is the number of submodules currently put into operation;

[0140] If the bridge arm current is not greater than 0, the capacitor voltages of the half-bridge submodules are arranged in descending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are switched out to obtain the current operating status of each half-bridge submodule.

[0141] Specifically, first determine whether the number of sub-modules M currently put into operation has changed. If not, continue to put into operation the sub-modules put into operation last time. If it has changed, it is necessary to reselect the sub-modules to be put into operation. In this way, the sub-modules to be put into operation are reselected only when M changes, which is conducive to reducing switching losses.

[0142] When M changes, first determine whether the bridge arm current is greater than 0, and then determine whether the current submodule needs to be charged or discharged. When the bridge arm current is ≥0, sort the capacitor voltages of the submodules in ascending order, then sort the capacitor voltages from small to large, set the voltage of the Mth capacitor as the threshold, put the submodules with capacitor voltages less than the threshold into operation, and bypass the remaining NM submodules, so that the M submodules with smaller capacitor voltages are charged to increase the voltage. When the bridge arm current is <0, sort the capacitor voltages of the submodules in descending order, sort the capacitor voltages from large to small, set the voltage of the Mth capacitor as the threshold, select the M submodules with capacitor voltages greater than the threshold to discharge, and bypass the remaining NM submodules. Then obtain the operating status of each submodule.

[0143] Furthermore, according to the operating status of each submodule, the number of current working capacitors can be determined, and the equivalent resistance R of the overall capacitor can be calculated from the number of current working capacitors. C .

[0144] Furthermore, the capacitor voltage and capacitor current at the previous moment are used to calculate the equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current moment; and the capacitor voltage at the current moment is calculated using the equivalent voltage source voltage of the capacitor and the measured capacitor current at the current moment, and the capacitor current at the current moment is synchronously updated for use in the next time step.

[0145] As one of the optional embodiments, the equivalent voltage source voltage of the discretized adjoint model of the capacitor is The calculation formula is:

[0146]

[0147] in, is the equivalent voltage source voltage of the capacitor at the n+1th moment, u n is the capacitor voltage at the nth moment, R C is the equivalent resistance of the capacitor; i n is the capacitor current at the nth moment;

[0148] The capacitor voltage u n+1 The calculation formula is:

[0149]

[0150] Among them, u n+1is the capacitor voltage at the n+1th moment, i n+1 is the capacitor current at the n+1th moment.

[0151] Furthermore, according to the discrete adjoint model of the bridge arm, it can be known that at any given moment, the equivalent voltage source voltage of the bridge arm and the equivalent voltage source voltage of the capacitor have an algebraic relationship, and the equivalent resistance is a constant value that is only related to the operating state of the submodule at that moment. Therefore, after the parameter values ​​of the discrete adjoint model of the capacitor are determined, the discrete adjoint model of the bridge arm can be obtained.

[0152] As one of the optional embodiments, the construction and simulation calculation of the discretized adjoint model of the bridge arm are implemented by PSCAD simulation software, and the method further includes:

[0153] In the PSCAD simulation software, construct an initial value module, a submodule scheduling calculation module, and a bridge arm module;

[0154] The initial value module is used to initialize the simulation parameters, define the size of the storage array of the historical parameters and the storage space required for the three-phase voltage;

[0155] The submodule scheduling calculation module is used to determine the number of submodules required for the upper and lower bridge arms according to the input voltage reference wave;

[0156] The bridge arm module is used to calculate the equivalent voltage source voltage and equivalent resistance of each capacitor, half-bridge sub-module and bridge arm according to the input sub-module number of the upper and lower bridge arms and the initial value of the simulation parameter, and obtain the capacitor voltage and conduction current of the target sub-module.

[0157] Specifically, during the model building process, the parameters of the previous time step are required when calculating the parameters in the current time step, for example: the discretization adjoint model construction of the capacitor. At this time, it is necessary to define a storage space to store historical values, which is implemented in PSCAD by relying on the STORF (NSTORF) storage array. The data stored in STORF (x) can be called in the entire model and plays the role of a global variable. Therefore, in the model, create an "Initial" module (i.e., initial value module), in which the parameters are initialized (initial values ​​are assigned), define the size of the STORF (x) storage array and allocate the storage space required for the three phases A, B, and C to facilitate the construction of the subsequent model. At the same time, create an "Nsmcompute" module (i.e., sub-module scheduling calculation module): This module inputs the voltage reference wave and determines the number of sub-modules that need to be invested in the upper and lower bridge arms.

[0158] Furthermore, an Arm module (i.e., bridge arm module) is constructed: the inputs in the Arm module are Nap, Nan (the number of submodules put into the upper and lower bridge arms respectively) and StartNSTORF_a (providing the initial value of the pointer), and the outputs are Eap, Ean (equivalent voltage sources of the upper and lower bridge arms), Rap, Ran (equivalent resistances of the upper and lower bridge arms). The module implements the function of calculating the equivalent resistance of the capacitor and the equivalent voltage source voltage at the current moment, and further obtains the equivalent voltage value of each submodule at the current moment, and then sorts each submodule in the Arm module according to the size of the submodule voltage, and then determines the operating state (put into / cut off) of each submodule according to the direction of the bridge arm current at this time, and the overall output is displayed through the bridge arm voltage of the upper and lower bridge arms. After the Arm module is completed, the bridge arm current is updated, and the input enters the Feedback module, in which the function of updating the capacitor voltage and capacitor current at the current moment is implemented. The results obtained in the Feedback module are stored in the STORF(x) storage array. When the next simulation step comes, the Arm module will read the results in STORF(x) to perform calculations at the next simulation moment, thus forming a closed loop and realizing the construction of the MMC discretized adjoint model in PSCAD.

[0159] Exemplarily, an MMC open-loop simulation model is built based on PSCAD simulation software, with a DC side voltage of 400 kV and 400 bridge arm submodules.

[0160] Set simulation conditions: total level number is 200 / 400, DC voltage is 320kV, AC voltage is 135kV*1.732 / 1.414 (effective value of line voltage), and phase voltage peak is 135kV. Under 200 levels, the voltage of a single submodule is 1.6kV; under 400 levels, the voltage of a single submodule is 0.8kV.

[0161] Voltage stress is the voltage that the device withstands. The voltage that the IGBT withstands during the shutdown process is the capacitor voltage on the submodule. Its value will fluctuate during the operation of the MMC and can be considered as an approximate average value, that is, 1.6kV (200 level) or 0.8kV (400 level).

[0162] Current stress refers to the current that a device bears when it is turned on, and the on-off current of the IGBT depends on the on-off current of the half-bridge submodule. Therefore, in the simulation, we mainly focus on the change law of the on-off current of the IGBT, that is, the change of the on-off current of the submodule. Figure 7 The simulation results at level 200 are shown in Figure 8 As shown, it can be obtained that the current direction is from top to bottom. When the simulation current is positive, the corresponding mode 2 ( Figure 7), that is, the module current passes through diode D1, but at this time mode 2 ( Figure 7 ) in which the IGBT T1 is in the on state. Therefore, when the simulation current is negative, the corresponding mode 5 ( Figure 7 ), that is, the module current passes through the IGBT at this time. Then, by conducting the current through the sub-module, the current stress of the IGBT can be obtained.

[0163] The embodiment of the present invention can monitor the voltage and current stress of the submodule to determine the working state of the IGBT in real time, and predict its possible failure risk by combining historical data and failure mechanism model. This state monitoring helps to extend the life of the equipment, reduce the risk of unexpected downtime, and improve the reliability of the flexible DC transmission system.

[0164] The beneficial effects of a method and device for determining the voltage and current stress of an MMC sub-module IGBT provided by an embodiment of the present invention are as follows: by constructing discrete companion models of capacitors, half-bridge sub-modules, and bridge arms, the operating status of each half-bridge sub-module is determined according to the number of sub-modules invested, and then the equivalent resistance and equivalent voltage source voltage of the discrete companion model are determined, and the capacitor voltage and on-current of the sub-module are obtained by simulation, and then the voltage stress and current stress of the IGBT in the sub-module are obtained. This method can improve the simulation accuracy while ensuring the simulation efficiency, is suitable for large-scale power grid system simulation, and is conducive to failure mechanism analysis and status monitoring research on crimped IGBT devices for sub-modules.

[0165] Correspondingly, the present invention also provides a device for determining voltage and current stress of an MMC sub-module IGBT, which can implement all the processes of the method for determining voltage and current stress of an MMC sub-module IGBT in the above embodiment.

[0166] See also Fig. 9 , Fig. 9 1 is a schematic diagram of a structure of a device for determining voltage and current stress of an MMC submodule IGBT provided by an embodiment of the present invention. The device for determining voltage and current stress of an MMC submodule IGBT comprises:

[0167] The model building module 901 is used to discretize the capacitor in the half-bridge submodule, build a discretized adjoint model of the capacitor, and make the combination of the IGBT and the diode in the half-bridge submodule equivalent to two variable resistors to build a discretized adjoint model of the half-bridge submodule; according to the superposition of the discretized adjoint models of the half-bridge submodules, a discretized adjoint model of the bridge arm is obtained to perform simulation calculation;

[0168] The submodule input module 902 is used to obtain the number of submodules respectively input into the upper and lower bridge arms, and determine the operating status of each half-bridge submodule by using a sorting and voltage-sharing algorithm according to the number of submodules input;

[0169] An equivalent resistance module 903, used to determine the equivalent resistance of the capacitor and the discretized adjoint model of the half-bridge sub-module respectively based on the operating status of each half-bridge sub-module;

[0170] An equivalent voltage module 904 is used to determine the capacitor voltage, capacitor current and equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current simulation moment according to the equivalent resistance of the capacitor and the capacitor voltage and capacitor current at the previous simulation moment;

[0171] The submodule current module 905 is used to obtain the equivalent voltage source voltage of the discretized adjoint model of the half-bridge submodule according to the equivalent voltage source voltage of the capacitor, so as to determine the on-current of the half-bridge submodule;

[0172] The voltage and current stress module 906 is used to obtain the voltage stress and current stress of the IGBT in the half-bridge sub-module according to the changes of the capacitor voltage and the conduction current of the half-bridge sub-module.

[0173] Preferably, the discretization of the capacitors in the half-bridge submodule and construction of a discretized adjoint model of the capacitors include:

[0174] Based on the original circuit of the capacitor in the half-bridge submodule, construct the differential equation describing the capacitor;

[0175] The differential equation of the capacitor is discretized using a numerical integration formula to determine a discretized adjoint model of the capacitor in the form of Thevenin; the discretized adjoint model of the capacitor is composed of an equivalent resistor and an equivalent voltage source connected in series.

[0176] Preferably, the discretized adjoint models of the half-bridge submodule and the bridge arm are both Thevenin equivalent circuits consisting of an equivalent voltage source and an equivalent resistor connected in series;

[0177] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the half-bridge submodule are:

[0178]

[0179] Among them, R smeq is the equivalent resistance of the half-bridge submodule, R C is the equivalent resistance of the capacitor, R1 and R2 are the two variable resistors, and E smeq (t-Δt) is the equivalent voltage source voltage of the half-bridge submodule, E C (t-Δt) is the equivalent voltage source voltage of the capacitor, t represents time t, and Δt is the simulation step size;

[0180] The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the bridge arm are:

[0181]

[0182] Among them, R armeq is the equivalent resistance of the bridge arm, is the equivalent resistance of the i-th half-bridge submodule, E armeq (t-Δt) is the equivalent voltage source voltage of the bridge arm, is the equivalent voltage source voltage of the i-th half-bridge submodule, and N is the number of submodules in the bridge arm.

[0183] Preferably, the number of submodules respectively invested in the upper and lower bridge arms is calculated according to the following formula:

[0184]

[0185] Among them, N p 、N n are the number of submodules invested in the upper and lower bridge arms respectively, and N is the total number of submodules included in the upper and lower bridge arms. is the phase voltage reference value, U C is the average DC voltage of the submodule, and round(x) represents the integer closest to x.

[0186] Preferably, the operation status of each half-bridge submodule is determined by using a sorting and voltage-sharing algorithm according to the number of submodules put into operation, including:

[0187] According to the number of submodules currently put into operation in the bridge arm, determine whether the number of submodules currently put into operation is the same as the number of submodules put into operation last time; if so, determine the current operating state of each half-bridge submodule according to the last submodule switching situation; if not, determine whether the bridge arm current is greater than 0;

[0188] If the bridge arm current is greater than 0, the capacitor voltages of the half-bridge submodules are arranged in ascending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are cut out to obtain the current operating status of each half-bridge submodule; M is the number of submodules currently put into operation;

[0189] If the bridge arm current is not greater than 0, the capacitor voltages of the half-bridge submodules are arranged in descending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are switched out to obtain the current operating status of each half-bridge submodule.

[0190] Preferably, the equivalent voltage source voltage of the discretized adjoint model of the capacitor is The calculation formula is:

[0191]

[0192] in, is the equivalent voltage source voltage of the capacitor at the n+1th moment, u n is the capacitor voltage at the nth moment, R C is the equivalent resistance of the capacitor; i n is the capacitor current at the nth moment;

[0193] The capacitor voltage u n+1 The calculation formula is:

[0194]

[0195] Among them, u n+1 is the capacitor voltage at the n+1th moment, i n+1 is the capacitor current at the n+1th moment.

[0196] Preferably, the construction and simulation calculation of the discretized adjoint model of the bridge arm are implemented by PSCAD simulation software, and the device is also used for:

[0197] In the PSCAD simulation software, construct an initial value module, a submodule scheduling calculation module, and a bridge arm module;

[0198] The initial value module is used to initialize the simulation parameters, define the size of the storage array of the historical parameters and the storage space required for the three-phase voltage;

[0199] The submodule scheduling calculation module is used to determine the number of submodules required for the upper and lower bridge arms according to the input voltage reference wave;

[0200] The bridge arm module is used to calculate the equivalent voltage source voltage and equivalent resistance of each capacitor, half-bridge submodule and bridge arm according to the number of submodules put into the upper and lower bridge arms and the initial value of the simulation parameter, and obtain the capacitor voltage and conduction current of the target submodule. In the specific implementation, the working principle, control process and technical effect of the voltage and current stress determination device of the MMC submodule IGBT provided in the embodiment of the present invention are the same as those of the voltage and current stress determination method of the MMC submodule IGBT in the above embodiment, and will not be repeated here.

[0201] The embodiment of the present invention provides a method and device for determining the voltage and current stress of an MMC sub-module IGBT, and the beneficial effects are: by constructing a discrete companion model of a capacitor, a half-bridge sub-module, and a bridge arm, the operating state of each half-bridge sub-module is determined according to the number of sub-modules invested, and then the equivalent resistance and the equivalent voltage source voltage of the discrete companion model are determined, and the capacitor voltage and the on-current of the sub-module are obtained by simulation, and then the voltage stress and current stress of the IGBT in the sub-module are obtained. The method can improve the simulation accuracy while ensuring the simulation efficiency, is suitable for large-scale power grid system simulation, and is conducive to the failure mechanism analysis and status monitoring research of crimped IGBT devices for sub-modules.

[0202] The above is a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A method for determining voltage and current stress of an MMC submodule IGBT, characterized in that: include: Discretize the capacitor in the half-bridge submodule, construct a discrete adjoint model of the capacitor, and equate the combination of the IGBT and the diode in the half-bridge submodule to two variable resistors to construct a discrete adjoint model of the half-bridge submodule; According to the superposition of the discretized adjoint models of the half-bridge submodules, a discretized adjoint model of the bridge arm is obtained to perform simulation calculation; Obtain the number of submodules respectively put into use in the upper and lower bridge arms, and determine the operating status of each half-bridge submodule using a sorting and voltage-sharing algorithm according to the number of submodules put into use; Based on the operating status of each half-bridge sub-module, respectively determining the equivalent resistance of the capacitor and the discretized adjoint model of the half-bridge sub-module; Determine the capacitor voltage, capacitor current and equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current simulation moment according to the equivalent resistance of the capacitor and the capacitor voltage and capacitor current at the previous simulation moment; Obtaining an equivalent voltage source voltage of a discretized adjoint model of the half-bridge submodule according to an equivalent voltage source voltage of the capacitor, so as to determine an on-current of the half-bridge submodule; According to the changes of the capacitor voltage and the conduction current of the half-bridge sub-module, the voltage stress and current stress of the IGBT in the half-bridge sub-module are obtained.

2. The method for determining the voltage and current stress of the MMC submodule IGBT according to claim 1, characterized in that: The discretization processing of the capacitor in the half-bridge submodule and the construction of the discretization adjoint model of the capacitor include: Based on the original circuit of the capacitor in the half-bridge submodule, construct the differential equation describing the capacitor; The differential equation of the capacitor is discretized using a numerical integration formula to determine a discretized adjoint model of the capacitor in the form of Thevenin; the discretized adjoint model of the capacitor is composed of an equivalent resistor and an equivalent voltage source connected in series.

3. The method for determining the voltage and current stress of the MMC submodule IGBT according to claim 1, characterized in that: The discrete adjoint models of the half-bridge submodule and the bridge arm are both Thevenin equivalent circuits consisting of an equivalent voltage source and an equivalent resistor in series; The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the half-bridge submodule are: Among them, R smeq is the equivalent resistance of the half-bridge submodule, R C is the equivalent resistance of the capacitor, R1 and R2 are the two variable resistors, and E smeq (t-Δt) is the equivalent voltage source voltage of the half-bridge submodule, E C (t-Δt) is the equivalent voltage source voltage of the capacitor, t represents time t, and Δt is the simulation step size; The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the bridge arm are: Among them, R armeq is the equivalent resistance of the bridge arm, is the equivalent resistance of the i-th half-bridge submodule, E armeq (t-Δt) is the equivalent voltage source voltage of the bridge arm, is the equivalent voltage source voltage of the i-th half-bridge submodule, and N is the number of submodules in the bridge arm.

4. The method for determining the voltage and current stress of the MMC submodule IGBT according to claim 1, characterized in that: The number of submodules respectively put into the upper and lower bridge arms is calculated according to the following formula: Among them, N p 、N n are the number of submodules invested in the upper and lower bridge arms respectively, and N is the total number of submodules included in the upper and lower bridge arms. is the phase voltage reference value, U C is the average DC voltage of the submodule, and round(x) represents the integer closest to x.

5. The method for determining the voltage and current stress of the MMC submodule IGBT according to claim 1, characterized in that: The operation state of each half-bridge submodule is determined by using a sorting and voltage-sharing algorithm according to the number of submodules put into operation, including: According to the number of submodules currently put into operation in the bridge arm, determine whether the number of submodules currently put into operation is the same as the number of submodules put into operation last time; if so, determine the current operating state of each half-bridge submodule according to the last submodule switching situation; if not, determine whether the bridge arm current is greater than 0; If the bridge arm current is greater than 0, the capacitor voltages of the half-bridge submodules are arranged in ascending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are cut out to obtain the current operating status of each half-bridge submodule; M is the number of submodules currently put into operation; If the bridge arm current is not greater than 0, the capacitor voltages of the half-bridge submodules are arranged in descending order, the first M half-bridge submodules are selected to be put into operation, and the remaining half-bridge submodules are switched out to obtain the current operating status of each half-bridge submodule.

6. The method for determining the voltage and current stress of the MMC submodule IGBT according to claim 1, characterized in that: The equivalent voltage source voltage of the discretized adjoint model of the capacitor is The calculation formula is: in, is the equivalent voltage source voltage of the capacitor at the n+1th moment, u n is the capacitor voltage at the nth moment, R C is the equivalent resistance of the capacitor; i n is the capacitor current at the nth moment; The capacitor voltage u n+1 The calculation formula is: Among them, u n+1 is the capacitor voltage at the n+1th moment, i n+1 is the capacitor current at the n+1th moment.

7. The method for determining the voltage and current stress of the MMC submodule IGBT according to claim 1, characterized in that: The construction and simulation calculation of the discretized adjoint model of the bridge arm are implemented by PSCAD simulation software, and the method further includes: In the PSCAD simulation software, construct an initial value module, a submodule scheduling calculation module, and a bridge arm module; The initial value module is used to initialize the simulation parameters, define the size of the storage array of the historical parameters and the storage space required for the three-phase voltage; The submodule scheduling calculation module is used to determine the number of submodules required for the upper and lower bridge arms according to the input voltage reference wave; The bridge arm module is used to calculate the equivalent voltage source voltage and equivalent resistance of each capacitor, half-bridge sub-module and bridge arm according to the input sub-module number of the upper and lower bridge arms and the initial value of the simulation parameter, and obtain the capacitor voltage and conduction current of the target sub-module.

8. A device for determining voltage and current stress of an MMC submodule IGBT, characterized in that: include: A model building module is used to discretize the capacitor in the half-bridge submodule, build a discretized adjoint model of the capacitor, and make the combination of the IGBT and the diode in the half-bridge submodule equivalent to two variable resistors to build a discretized adjoint model of the half-bridge submodule; according to the superposition of the discretized adjoint models of the half-bridge submodules, a discretized adjoint model of the bridge arm is obtained to perform simulation calculation; The submodule input module is used to obtain the number of submodules respectively input into the upper and lower bridge arms, and determine the operating status of each half-bridge submodule by using a sorting and voltage-sharing algorithm according to the number of submodules input; An equivalent resistance module, used to determine the equivalent resistance of the capacitor and the discretized adjoint model of the half-bridge sub-module respectively based on the operating status of each half-bridge sub-module; An equivalent voltage module, used to determine the capacitor voltage, capacitor current and equivalent voltage source voltage of the discretized adjoint model of the capacitor at the current simulation moment according to the equivalent resistance of the capacitor and the capacitor voltage and capacitor current at the previous simulation moment; A submodule current module, used to obtain an equivalent voltage source voltage of a discretized adjoint model of the half-bridge submodule according to an equivalent voltage source voltage of the capacitor, so as to determine an on-current of the half-bridge submodule; The voltage and current stress module is used to obtain the voltage stress and current stress of the IGBT in the half-bridge sub-module according to the changes of the capacitor voltage and the conduction current of the half-bridge sub-module.

9. The device for determining voltage and current stress of an MMC submodule IGBT according to claim 8, characterized in that: The discrete adjoint models of the half-bridge submodule and the bridge arm are both Thevenin equivalent circuits consisting of an equivalent voltage source and an equivalent resistor in series; The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the half-bridge submodule are: Among them, R smeq is the equivalent resistance of the half-bridge submodule, R C is the equivalent resistance of the capacitor, R1 and R2 are the two variable resistors, and E smeq (t-Δt) is the equivalent voltage source voltage of the half-bridge submodule, E C (t-Δt) is the equivalent voltage source voltage of the capacitor, t represents time t, and Δt is the simulation step size; The calculation formulas for the equivalent resistance and equivalent voltage source of the discretized adjoint model of the bridge arm are: Among them, R armeq is the equivalent resistance of the bridge arm, is the equivalent resistance of the i-th half-bridge submodule, E armeq (t-Δt) is the equivalent voltage source voltage of the bridge arm, is the equivalent voltage source voltage of the i-th half-bridge submodule, and N is the number of submodules in the bridge arm.

10. The device for determining voltage and current stress of an MMC submodule IGBT according to claim 8, characterized in that: The equivalent voltage source voltage of the discretized adjoint model of the capacitor is The calculation formula is: in, is the equivalent voltage source voltage of the capacitor at the n+1th moment, u n is the capacitor voltage at the nth moment, R C is the equivalent resistance of the capacitor; i n is the capacitor current at the nth moment; The capacitor voltage u n+1 The calculation formula is: Among them, u n+1 is the capacitor voltage at the n+1th moment, i n+1 is the capacitor current at the n+1th moment.

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