Current sharing control method, system, device and medium for interleaved parallel LLC resonant converter
By replacing the synchronous rectifier tubes in the interleaved parallel LLC resonant converter and adjusting the switching timing, the problem of uneven current distribution was solved, achieving rapid current sharing and low conduction loss, thus extending the equipment lifespan.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2026-03-20
AI Technical Summary
In low-voltage, high-current applications, the interleaved parallel LLC resonant converter suffers from uneven current distribution, which shortens the equipment's lifespan. Existing synchronous rectification technology lacks theoretical calculation support, and the switching transistors have high conduction losses and slow current sharing speed.
The four diodes on the secondary side of the interleaved parallel LLC resonant converter are replaced with synchronous rectifier diodes, and the turn-on and turn-off times of the synchronous rectifier diodes are adjusted by regulating the average output current of each phase, so as to achieve equal transmission power in each phase.
This improves the current sharing speed of the interleaved parallel LLC resonant converter, reduces the conduction loss of the switching transistors, and extends the service life of the equipment.
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Figure CN119483291B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the field of power electronic technology DC / DC converter, and relates to a current sharing control method, system, device and medium of an interleaved LLC resonant converter. BACKGROUND
[0002] With the increasing demand for electric energy in modern society, LLC resonant converters are widely used in light-emitting diode driving, electric vehicle charging and other fields due to their high power density and excellent soft switching characteristics. In low-voltage and high-current application scenarios, interleaved parallel technology can overcome the disadvantage of large current stress of single-phase LLC. However, the difference in resonant parameters of each phase will cause serious current sharing problems, which greatly shortens the service life of the device.
[0003] Synchronous rectification technology uses controllable devices (such as MOSFET) to control current flow and voltage waveform, which can improve power factor, reduce heat loss and conduction loss, and is one of the important technologies of modern power conversion systems. For interleaved LLC resonant converters with full-bridge primary and secondary sides, to solve the current sharing problem, domestic and foreign scholars have proposed a current sharing control strategy of replacing part of the diodes (1 or 2) on the secondary side with synchronous rectification MOS tubes and adjusting their turn-on time or turn-off time. However, this strategy lacks theoretical calculation results; it does not replace all four diodes with synchronous rectification tubes, so there is still room for reducing the conduction loss of the switching tube; it does not adjust the turn-on time and turn-off time of the synchronous rectification tube at the same time, so when the resonant parameters change, the speed of the two-phase current sharing still has room for improvement. SUMMARY
[0004] The purpose of the present application is to overcome the shortcomings of the prior art and provide a current sharing control method, system, device and medium of an interleaved LLC resonant converter, which can improve the speed of current sharing of the interleaved LLC resonant converter and has low conduction loss.
[0005] To achieve the above purpose, the present application adopts the following technical solutions:
[0006] In one aspect, the present application provides a current sharing control method of an interleaved LLC resonant converter, comprising:
[0007] Replacing the four diodes in the secondary side of the interleaved LLC resonant converter with synchronous rectification tubes;
[0008] Determining the average output current of each phase of the interleaved LLC resonant converter;
[0009] The opening and closing time of the synchronous rectifier in each phase is adjusted according to the average output current of each phase in the interleaved parallel LLC resonant converter, so that the transmission power of each phase in the interleaved parallel LLC resonant converter is equal.
[0010] The flow control method of the interleaved parallel LLC resonant converter further improves that:
[0011] Further, the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 <I o2 , the opening time of the synchronous rectifier in the first phase is advanced.
[0012] Further, the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 <I o2 , the closing time of the synchronous rectifier in the second phase is delayed.
[0013] Further, the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , when I o1 <I o2 , the opening time of the synchronous rectifier in the first phase is advanced, and the closing time of the synchronous rectifier in the second phase is delayed.
[0014] Further, the synchronous rectifier is a MOSFET.
[0015] In the two aspects of the present application, the present application provides a flow control system of an interleaved parallel LLC resonant converter, comprising:
[0016] The replacement module is used for replacing four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers;
[0017] The determination module is used for determining the average output current of each phase in the interleaved parallel LLC resonant converter;
[0018] The control module is used for adjusting the opening and closing time of the synchronous rectifier in each phase according to the average output current of each phase in the interleaved parallel LLC resonant converter, so that the transmission power of each phase in the interleaved parallel LLC resonant converter is equal.
[0019] Further, the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , the average output current of the third phase in the interleaved parallel LLC resonant converter is I o1 , and the average output current of the fourth phase in the interleaved parallel LLC resonant converter is I o2 , then the turn-on time of the synchronous rectifier in the first phase is advanced, or the turn-off time of the synchronous rectifier in the second phase is delayed, or the turn-on time of the synchronous rectifier in the first phase is advanced and the turn-off time of the synchronous rectifier in the second phase is delayed.
[0020] Further, the synchronous rectifier is a MOSFET.
[0021] In the third aspect, the present application provides a computer device, which comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the steps of the current sharing control method of the interleaved parallel LLC resonant converter when executing the computer program.
[0022] In the fourth aspect, the present application provides a computer readable storage medium, which stores a computer program, and the processor implements the steps of the current sharing control method of the interleaved parallel LLC resonant converter when executing the computer program.
[0023] The present application has the following beneficial effects:
[0024] The current sharing control method, system, device and medium of the interleaved parallel LLC resonant converter operate as follows: the four diodes in the secondary side of the interleaved parallel LLC resonant converter are replaced with synchronous rectifiers, and the turn-on and turn-off times of the synchronous rectifiers in each phase are adjusted according to the average output current of each phase in the interleaved parallel LLC resonant converter, so that the conduction loss of the switch tube is small, and the current sharing speed of the interleaved parallel LLC resonant converter is fast.
[0025] Further, when I o1 <I o2 , the turn-on time of the synchronous rectifier in the first phase is advanced, and the turn-off time of the synchronous rectifier in the second phase is delayed, or the turn-on time of the synchronous rectifier in the first phase is advanced and the turn-off time of the synchronous rectifier in the second phase is delayed. BRIEF DESCRIPTION OF DRAWINGS
[0026] The drawings constituting a part of the present application are used to provide a further understanding of the present application, and the schematic embodiments of the present application and the description thereof are used to explain the present application, and do not constitute an improper limitation on the present application. In the drawings:
[0027] Figure 1The topology diagram of a synchronous rectified LLC resonant converter;
[0028] Figure 2 Waveform diagram for precise synchronous rectification of an LLC resonant converter operating in PO mode;
[0029] Figure 3 Waveform diagrams for early activation and delayed shutdown of the LLC secondary-side synchronous rectifier tube;
[0030] Figure 4 The graph shows the change in converter gain with the early turn-on and delayed turn-off angles.
[0031] Figure 5 The topology diagram of the interleaved parallel LLC resonant converter;
[0032] Figure 6 The flowchart for the current sharing strategy 3) of the interleaved parallel LLC resonant converter;
[0033] Figure 7 The control circuit diagram for the current sharing strategy 3) of the interleaved parallel LLC resonant converter;
[0034] Figure 8 The waveform of the average output current of the two phases of the interleaved parallel LLC when the resonant parameters change;
[0035] Figure 9 The waveform of the current in the interleaved parallel LLC two-phase resonant cavity when the resonant parameters change;
[0036] Figure 10 The waveform of the secondary current of the two phases of the interleaved parallel LLC when the resonant parameters change; Detailed Implementation
[0037] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0038] In the description of this invention, it should be understood that the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0039] It should also be understood that the terms used in the specification and the following claims are for the purpose of describing particular embodiments of the application and are not intended to limit the application. As used in the specification and the appended claims, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0040] It should also be further understood that the term "and / or" used in the specification and the appended claims, means any one or more of the associated listed items conjunctively or disjunctively, and includes all possible combinations thereof, for example, A and / or B can mean only A, or only B, or both A and B. In addition, the character " / " in the present application generally represents an "or" relationship between the front and rear associated objects.
[0041] It should be understood that, although the terms first, second, third, etc. can be employed in describing the pre-set ranges, etc. in the embodiments of the present application, these pre-set ranges should not be limited to these terms. These terms are only used to distinguish the pre-set ranges from one another. For example, the first pre-set range can also be referred to as the second pre-set range, and similarly, the second pre-set range can also be referred to as the first pre-set range, without departing from the scope of the embodiments of the present application.
[0042] Depending on the context, the word "if" as used herein can be interpreted to mean "when" or "while" or "in response to determining" or "in response to detecting." Similarly, the phrase "if it is determined" or "if a stated condition or event occurs" can be interpreted to mean "when it is determined" or "when a stated condition or event occurs" or "in response to determining" or "in response to detecting a stated condition or event."
[0043] For the purpose of clarity, technical solutions in the embodiments of the present application will be described below in a clear and complete manner with reference to the drawings of the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of the present application.
[0044] The various structural schematic diagrams according to the disclosed embodiments of the present application are shown in the accompanying drawings. These diagrams are not drawn to scale, in which certain details are exaggerated for clarity and others omitted. The shapes and relative sizes of the various regions, layers, and the relative positions of these regions / layers shown in the drawings are merely exemplary, and in actuality may deviate due to manufacturing tolerances or technical limitations, and regions / layers with different shapes, sizes, and relative positions can be additionally designed by those skilled in the art according to actual needs.
[0045] Embodiment One
[0046] Reference Figure 1 All four diodes in the secondary rectifier circuit of the LLC resonant converter are replaced by MOSFETs to obtain a synchronous rectification LLC resonant converter.
[0047] Reference Figure 2 A pulse signal is applied to the synchronous rectification tube to make the turn-on and turn-off times of the synchronous rectification tube completely consistent with the turn-on and turn-off times of the passive commutation, so that ideal synchronous rectification is achieved, and the steady-state voltage and current waveforms are completely the same as those of passive commutation.
[0048] Reference Figure 3 And Figure 4 Taking the PO mode as an example, the synchronous rectification tube is turned on in advance or turned off later on the basis of accurate synchronous rectification to obtain more working stages and more complex waveforms. Using the time-domain model, a curve of the circuit gain with the angle of turning on in advance or turning off later can be drawn.
[0049] Reference Figure 5 The interleaved parallel technology sets the phase difference of the drive signals of the two-phase switching tubes in the LLC resonant converter to 90°, so that the two-phase output currents i o1 , i o2 are 180° out of phase, thereby reducing the output current ripple. However, due to temperature changes, device aging, and other reasons, there may be small differences in the capacitance and inductance values in the two resonant cavities, which will cause the problem of uneven current in the two phases, i.e., I o1 ≠ I o2 . I o1 , I o2 are the average output currents in one cycle of the 1st and 2nd phases, respectively, and the sum of their squares is proportional to the transmission power of each phase.
[0050] Reference Figure 6 And Figure 7 Let I o1 <I o2At this time, the 1-phase transmission power needs to be increased and the 2-phase transmission power needs to be reduced. To this end, based on the calculation results of the time domain model, the following three current sharing control strategies based on the adjustment of the turn-on and turn-off time of the synchronous rectifier tube are adopted: 1) delaying the turn-off time of the 2-phase synchronous rectifier tube; 2) advancing the turn-on time of the 1-phase synchronous rectifier tube; and 3) simultaneously adopting the above two strategies. In specific applications, the average output currents of the two phases need to be collected and compared in real time, and the turn-on time and turn-off time of the synchronous rectifier tube are adjusted through closed-loop feedback, so that the transmission powers of the two phases are equal. In addition, the switching frequency is fine-tuned to control the constant output voltage, thereby ensuring that the total transmission power is constant. Figure 8-10 The waveforms of not taking current sharing measures and taking the three current sharing strategies can be obtained by running the simulation in PLECS. Figure 8 In the simulation, the circuit is in a steady state from 0 to 0.2 s, and the parameters of the two-phase resonant cavity are completely the same. At t = 0.2 s, the L r and C r of the 2-phase resonant cavity become 0.9 times of the original, to simulate the maximum deviation of 10% when the actual circuit parameters change. When no current sharing measures are taken, the 10% parameter deviation will cause serious current imbalance, while when any one of the current sharing strategies is taken, the circuit will reach the current sharing state again at t2, and the output current after t2 is the same as that from 0 to 0.2 s.
[0051] Referring to Table 1, the size of the time Δt = t2-0.2 required for the three control strategies to re-implement current sharing can be obtained. The circuit reaches the steady state in the shortest time in strategy 3, therefore, the strategy proposed in the present application is to simultaneously adjust the turn-on and turn-off time of the synchronous rectifier tubes of the two phases.
[0052] Table 1
[0053]
[0054] Embodiment Two
[0055] The current sharing control system of the interleaved parallel LLC resonant converter described in the present application comprises:
[0056] The replacement module is used to replace the four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifier tubes.
[0057] The determination module is used to determine the average output currents of the phases in the interleaved parallel LLC resonant converter.
[0058] The control module is used to adjust the turn-on and turn-off time of the synchronous rectifier tubes in each phase according to the average output currents of the phases in the interleaved parallel LLC resonant converter, so that the transmission powers of the phases in the interleaved parallel LLC resonant converter are equal.
[0059] As an embodiment of the present application, the average output current of the first phase in the interleaved parallel LLC resonant converter is I o1 , the average output current of the second phase in the interleaved parallel LLC resonant converter is I o2 , the average output current of the third phase in the interleaved parallel LLC resonant converter is I o1 , and the average output current of the fourth phase in the interleaved parallel LLC resonant converter is I o2 , then the turn-on time of the synchronous rectifier in the first phase is advanced, or the turn-off time of the synchronous rectifier in the second phase is delayed, or the turn-on time of the synchronous rectifier in the first phase is advanced and the turn-off time of the synchronous rectifier in the second phase is delayed.
[0060] As an embodiment of the present application, the synchronous rectifier is a MOSFET.
[0061] The division of the modules in the embodiments of the present application is illustrative, and is only a logical function division. In actual implementation, another division manner can be used. In addition, the function modules in each embodiment of the present application can be integrated in one processor, or can be physically separated, or two or more modules can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software function module.
[0062] Embodiment three
[0063] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the current-sharing control method of the interleaved parallel LLC resonant converter are implemented, for example, including: replacing four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifiers; determining the average output current of each phase in the interleaved parallel LLC resonant converter; and adjusting the turn-on and turn-off time of the synchronous rectifier in each phase according to the average output current of each phase in the interleaved parallel LLC resonant converter, so that the transmission power of each phase in the interleaved parallel LLC resonant converter is equal. The memory can include an internal memory, for example, a high-speed random memory, and can also include a non-volatile memory, for example, at least one disk memory. The processor, network interface, and memory are connected to each other through an internal bus, which can be an industry standard architecture bus, a peripheral component interconnect standard bus, an extended industry standard architecture bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. The memory is used to store programs, and specifically, the programs can include program codes, and the program codes include computer operation instructions. The memory can include an internal memory and a non-volatile memory, and provide instructions and data to the processor.
[0064] Embodiment four
[0065] A computer readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the current-sharing control method of the interleaved parallel LLC resonant converter, for example, including: replacing four diodes in a secondary side of the interleaved parallel LLC resonant converter with synchronous rectifier tubes; determining average output currents of phases in the interleaved parallel LLC resonant converter; and adjusting turn-on and turn-off times of the synchronous rectifier tubes in the phases according to the average output currents of the phases in the interleaved parallel LLC resonant converter, so that transmission powers of the phases in the interleaved parallel LLC resonant converter are equal. Specifically, the computer readable storage medium includes, but is not limited to, for example, volatile memory and / or non-volatile memory. The volatile memory can include random access memory (RAM) and / or cache memory, etc. The non-volatile memory can include read-only memory (ROM), a hard disk, a flash memory, an optical disc, a magnetic disc, etc.
[0066] Those skilled in the art will appreciate that embodiments of the present application can be supplied as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) having computer usable program code embodied thereon.
[0067] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and combinations of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions, which are executed via the processor of the computer or other programmable data processing apparatus, generate a means for implementing the functions specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that implements the functions specified in the flowcharts and / or block diagrams.
[0068] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to work in a specific manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction apparatus that implements the functions specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that implements the functions specified in the flowcharts and / or block diagrams.
[0069] These computer program instructions can also be loaded into a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 Figure 1
[0070] Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the application being indicated by the following claims.
[0071] It is to be understood that the application is not limited to the precise details of construction and the method described above and illustrated in the drawings. Various modifications and changes can be made therein without departing from the scope of the application. The scope of the application is indicated by the appended claims, rather than by the foregoing description.
[0072] The above description is only preferred embodiments of the present application, not any limitation thereto, any simple modification, change and equivalent structure change of the above embodiments according to the technical essence of the present application are still within the protection scope of the technical scheme of the present application.
Claims
1. A current sharing control method for an interleaved parallel LLC resonant converter, characterized in that, include: Replace the four diodes on the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifier diodes; Determine the average output current of each phase in the interleaved parallel LLC resonant converter; The turn-on and turn-off times of the synchronous rectifier tubes in each phase are adjusted according to the average output current of each phase in the interleaved parallel LLC resonant converter, so that the transmission power of each phase in the interleaved parallel LLC resonant converter is equal. Let the average output current of the first phase in the interleaved parallel LLC resonant converter be I. o1 The average output current of the second phase in the interleaved parallel LLC resonant converter is I. o2 , when I o1 o2 If so, the turn-on time of the synchronous rectifier tube in the first phase is advanced. 2. The current sharing control method for the interleaved parallel LLC resonant converter according to claim 1, characterized in that, ... The average output current of the first phase in the interleaved parallel LLC resonant converter is I. o1 The average output current of the second phase in the interleaved parallel LLC resonant converter is I. o2 , when I o1 o2 If so, the turn-off time of the synchronous rectifier tube in the second phase is delayed. 3. The current sharing control method for the interleaved parallel LLC resonant converter according to claim 1, characterized in that, ... The average output current of the first phase in the interleaved parallel LLC resonant converter is I. o1 The average output current of the second phase in the interleaved parallel LLC resonant converter is I. o2 , when I o1 o2 If the timing is such that the turn-on time of the synchronous rectifier tube in the first phase is advanced, the turn-off time of the synchronous rectifier tube in the second phase is delayed. 4. The current sharing control method for the interleaved parallel LLC resonant converter according to claim 1, characterized in that, The synchronous rectifier is a MOSFET.
5. A current sharing control system for an interleaved parallel LLC resonant converter, characterized in that, include: The replacement module is used to replace the four diodes in the secondary side of the interleaved parallel LLC resonant converter with synchronous rectifier diodes. The determination module is used to determine the average output current of each phase in the interleaved parallel LLC resonant converter; The control module is used to adjust the turn-on and turn-off times of the synchronous rectifier tubes in each phase according to the average output current of each phase in the interleaved parallel LLC resonant converter, so that the transmission power of each phase in the interleaved parallel LLC resonant converter is equal. Let the average output current of the first phase in the interleaved parallel LLC resonant converter be I. o1 The average output current of the second phase in the interleaved parallel LLC resonant converter is I. o2 , when I o1 o2 If the timing is such that the turn-on time of the synchronous rectifier tube in the first phase is advanced, or the turn-off time of the synchronous rectifier tube in the second phase is delayed, or the turn-on time of the synchronous rectifier tube in the first phase is advanced while the turn-off time of the synchronous rectifier tube in the second phase is delayed. 6. The current sharing control system for the interleaved parallel LLC resonant converter according to claim 5, characterized in that, The synchronous rectifier is a MOSFET.
7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the current sharing control method for the interleaved parallel LLC resonant converter as described in any one of claims 1-4.
8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the current sharing control method for the interleaved parallel LLC resonant converter as described in any one of claims 1-4.