High linearity low noise amplifier

Abstract

The application relates to the field of wireless communication technology and provides a high-linearity low-noise amplifier, which comprises an input selection module, a first amplifier circuit module, a second amplifier circuit module, a first linear adjustment network, a second linear adjustment network, a first output matching adjustment module and a second output matching adjustment module; the input selection module comprises a first switch, a second switch, a third switch, a first capacitor and a second capacitor; the control end of the first switch serves as the input end of the input selection module; the output end of the first switch is used for connecting the control end of the second switch or the control end of the third switch according to a received first control signal; the output end of the second switch is grounded; the second output end of the first switch is connected with the control end of the third switch and the first end of the second capacitor respectively; and the output end of the third switch is grounded. The high-linearity low-noise amplifier can realize good power consumption, NF and linearity under different gain positions.

Description

TECHNICAL FIELD

[0001] The application relates to the field of wireless communication technology, in particular to a high-linearity low-noise amplifier. BACKGROUND

[0002] With the continuous iteration of electronic devices, the performance is continuously improved, in 4G and 5G networks, data transmission is completed through a carrier channel, and in the 5G era, due to the increase of spectrum resources and more advanced technologies, carrier aggregation (CA) has become one of the key technologies for realizing high-speed data transmission.

[0003] Through carrier aggregation, the operator can fully utilize the spectrum resources to provide higher data transmission rate and more stable network connection. As the first active device of the radio frequency front-end system, the radio frequency low-noise amplifier (LNA) provides a channel for carrier aggregation, and multiple LNAs follow the multiplexer. In order to meet the CA combination requirements between the LNAs, the same channel input needs to be met between multiple LNAs. In the design, a certain gain is usually required to amplify the weak signal received from the antenna and has a certain noise suppression capability for the subsequent modules, and the LNA itself also needs to have very low noise to ensure the receiving sensitivity of the system, and there is no big difference between the inputs. Similarly, in order to ensure that the system does not appear distortion and does not cause damage to the subsequent active devices, the LNA needs to have the ability of variable gain and extended dynamic range, so in addition to the gain and noise meeting the system requirements, the high-linearity design also becomes a necessary point of the gain-adjustable low-noise amplifier.

[0004] At present, in the design of multiple LNAs with carrier aggregation CA function, there is area redundancy, and the performance exhibited by the same input for different LNAs has great difference, which will lead to targeted configuration in actual application to reduce the difference. In addition, the linearity and noise coefficient of the LNA are also core performances, especially the linearity change of different gain steps. Now many designs sacrifice the noise coefficient too much in order to meet the linearity design, and it is difficult to achieve good linearity in the case of small current for the lowest gain step, and the amplifier may enter the sub-threshold region in the low current, and the linearity improvement effect is poor. SUMMARY

[0005] In view of the above problems of the prior art, the application provides a high-linearity low-noise amplifier to solve the problems of troublesome gain adjustment and poor linearity improvement effect of the existing low-noise amplifier.

[0006] In order to solve the above technical problems, the application adopts the following technical scheme:

[0007] The embodiment of the present application provides a high linear low noise amplifier, which comprises an input selection module, a first amplifier circuit module, a second amplifier circuit module, a first linear adjustment network, a second linear adjustment network, a first output matching adjustment module and a second output matching adjustment module.

[0008] The input end of the input selection module is used for receiving a radio frequency signal, and the output end of the input selection module is used for being in communication with the input end of the first amplifier circuit module or the input end of the second amplifier circuit module, so that different gain adjustment functions are realized; the output end of the first amplifier circuit module is connected with the input end of the first linear adjustment network and the input end of the first output matching adjustment module respectively, and the output end of the first output matching adjustment module outputs a load; the output end of the second amplifier circuit module is connected with the input end of the second linear adjustment network and the input end of the second output matching adjustment module respectively, and the output end of the second output matching adjustment module outputs a load.

[0009] The input selection module comprises a first switch, a second switch, a third switch, a first capacitor and a second capacitor.

[0010] The control end of the first switch is used as the input end of the input selection module, the output end of the first switch is used for connecting the control end of the second switch or the control end of the third switch according to a received first control signal, the first end of the first capacitor is connected to the control end of the second switch, and the output end of the second switch is grounded; the first end of the second capacitor is connected to the control end of the third switch, and the output end of the third switch is grounded; the second end of the first capacitor and the second end of the second capacitor are used as two output ends of the input selection module respectively, the second end of the first capacitor is used for connecting the input end of the first amplifier circuit module, and the second end of the second capacitor is used for connecting the input end of the second amplifier circuit module.

[0011] Preferably, the high linear low noise amplifier further comprises at least one first control unit and at least one second control unit; the input end of the first control unit and the input end of the second control unit are respectively used for receiving a second control signal; the output end of the first control unit is connected with the output end of the first capacitor, and the first control unit is used for outputting the second control signal to the input end of the first amplifier circuit module; the output end of the second control unit is connected with the output end of the second capacitor, and the second control unit is used for outputting the second control signal to the input end of the second amplifier circuit module.

[0012] Preferably, the first control unit comprises a fourth switch, a fifth switch and a third capacitor; a control end of the fourth switch is connected with a control end of the fifth switch and serves as an input end of the first control unit, an output end of the fifth switch is grounded, and an output end of the fourth switch is connected with a first end of the third capacitor, and a second end of the third capacitor serves as an output end of the first control unit.

[0013] The second control unit comprises a sixth switch, a seventh switch and a fourth capacitor; a control end of the sixth switch is connected with a control end of the seventh switch and serves as an input end of the second control unit, an output end of the sixth switch is grounded, an output end of the seventh switch is connected with a first end of the fourth capacitor, and a second end of the fourth capacitor serves as an output end of the second control unit.

[0014] Preferably, the first amplifier circuit module and the second amplifier circuit module have the same circuit.

[0015] The first amplifier circuit module comprises a first bias circuit, a first resistor, a second resistor, a fifth capacitor, a first MOS transistor, a second MOS transistor, a first capacitor adjustment circuit and a first inductor adjustment circuit.

[0016] A first end of the first resistor is connected with a gate of the first MOS transistor and a first end of the first capacitor adjustment circuit respectively and serves as an input end of the first amplifier circuit module; a second end of the first resistor is connected with a first end of the first bias circuit, a second end of the first bias circuit is connected with a first end of the second resistor, a second end of the second resistor is connected with a gate of the second MOS transistor and a first end of the fifth capacitor respectively, and a second end of the fifth capacitor is grounded; a drain of the second MOS transistor serves as an output end of the first amplifier circuit module.

[0017] A source of the second MOS transistor is connected with a drain of the first MOS transistor and the first linear adjustment network respectively; a source of the first MOS transistor is connected with a second end of the first capacitor adjustment circuit and a first end of the first inductor adjustment circuit respectively, and a second end of the first inductor adjustment circuit is grounded.

[0018] Preferably, the first capacitor adjustment circuit comprises a sixth capacitor, a plurality of eighth switches and a plurality of seventh capacitors.

[0019] A first end of the sixth capacitor is connected with a control end of each of the plurality of eighth switches and serves as a first end of the first capacitor adjustment circuit, output ends of the plurality of eighth switches are connected with first ends of the plurality of seventh capacitors respectively and one by one, and a second end of the sixth capacitor is connected with second ends of the plurality of seventh capacitors respectively and serves as a second end of the first capacitor adjustment circuit.

[0020] Preferably, the first inductor adjusting circuit comprises a first inductor, a second inductor, a ninth switch, a tenth switch and an eleventh switch;

[0021] The first end of the first inductor is connected with the control end of the tenth switch and serves as the first end of the first inductor adjusting circuit, the second end of the first inductor is connected with the control end of the ninth switch and the output end of the eleventh switch respectively, the control end of the eleventh switch is connected with the output end of the tenth switch and the first end of the second inductor respectively, and the output end of the ninth switch is connected with the second end of the second inductor and serves as the second end of the first inductor adjusting circuit.

[0022] Preferably, the circuit structure of the first output matching adjusting module is the same as that of the second output matching adjusting module.

[0023] The first output matching adjusting module comprises an eighth capacitor, a third inductor, a load adjusting circuit, an output matching circuit and an attenuation network.

[0024] The first end of the eighth capacitor is connected with the first end of the third inductor and the first end of the load adjusting circuit respectively and serves for connecting to a power supply, the second end of the eighth capacitor is grounded, the second end of the third inductor is connected with the second end of the load adjusting circuit and the input end of the output matching circuit respectively and serves as the input end of the first output matching adjusting module, the output end of the output matching circuit is connected with the input end of the attenuation network, and the output end of the attenuation network serves for outputting a load.

[0025] Preferably, the load adjusting circuit comprises a third resistor, a plurality of twelfth switches and a plurality of fourth resistors.

[0026] The first end of the third resistor is connected with the control end of a plurality of twelfth switches respectively and serves as the first end of the load adjusting circuit, the output end of a plurality of twelfth switches is connected with the first end of a plurality of fourth resistors respectively, and the second end of the third resistor is connected with the second end of a plurality of fourth resistors respectively and serves as the second end of the load adjusting circuit.

[0027] Preferably, the output matching circuit comprises a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, a sixteenth switch, a seventeenth switch and an eighteenth switch.

[0028] The control end of the thirteenth switch is connected with the control end of the fourteenth switch, the control end of the fifteenth switch, the control end of the sixteenth switch and the first end of the eleventh capacitor respectively, and the output end of the thirteenth switch and the output end of the fourteenth switch are connected with the ninth capacitor and the tenth capacitor respectively and grounded;

[0029] The output end of the fifteenth switch is connected with the first end of the twelfth capacitor, the output end of the sixteenth switch is connected with the first end of the thirteenth capacitor, the second end of the eleventh capacitor is connected with the second end of the twelfth capacitor, the second end of the thirteenth capacitor, the control end of the seventeenth switch and the control end of the eighteenth switch respectively, and the output end of the seventeenth switch and the output end of the eighteenth switch are connected with the fourteenth capacitor and the fifteenth capacitor respectively and grounded;

[0030] The control end of the thirteenth switch is also used as the input end of the output matching circuit, and the control end of the eighteenth switch is also used as the output end of the output matching circuit.

[0031] Preferably, the circuit structure of the first linear regulation network and the second linear regulation network is the same.

[0032] The first linear regulation network comprises a sixteenth capacitor, a plurality of nineteenth switches and a plurality of fifth resistors, the first end of the sixteenth capacitor is connected with the first amplifier circuit module, the second end of the sixteenth capacitor is connected with the control end of a plurality of nineteenth switches respectively, and the output end of a plurality of nineteenth switches is connected with a plurality of fifth resistors respectively and grounded.

[0033] Compared with the related art, in the embodiment of the present application, the input end of the input selection module is used to receive a radio frequency signal, and the output end of the input selection module is used to connect the input end of the first amplifier circuit module or the input end of the second amplifier circuit module, so as to realize different gain adjustment functions; the control end of the first switch of the input selection module is used as the input end of the input selection module, the output end of the first switch is used to connect the control end of the second switch or the control end of the third switch according to the received first control signal, the first end of the first capacitor is connected to the control end of the second switch, and the output end of the second switch is grounded; the first end of the second capacitor is connected to the control end of the third switch, and the output end of the third switch is grounded; the second end of the first capacitor and the second end of the second capacitor are respectively used as two output ends of the input selection module, the second end of the first capacitor is used to connect the input end of the first amplifier circuit module, and the second end of the second capacitor is used to connect the input end of the second amplifier circuit module; so that the input port can be switched to different amplifiers LNA, the input can be increased to multiple amplifiers LNA according to application requirements, and the gain can be adjusted on the basis of the area advantage, good power consumption, NF and linearity are realized under different gain positions; and through reasonable gain position adjustment means, the low noise amplifier is helped to be applied in different antenna receiving power application environments, and different index requirements are met. BRIEF DESCRIPTION OF DRAWINGS

[0034] The present application will be described in detail below with reference to the drawings. The above or other aspects of the present application will become more apparent and more readily appreciated through detailed description, taken in conjunction with the following drawings. In the drawings:

[0035] Figure 1 A circuit structure block diagram of a high-linearity low-noise amplifier provided for an embodiment of the present application;

[0036] Figure 2 For Figure 1 A partial enlargement of the part shown in FIG. 1B; Figure 1 ;

[0037] Figure 3 For Figure 1 A partial enlargement of the part shown in FIG. 1C; Figure 2 ;

[0038] Figure 4 For Figure 1 A partial enlargement of the part shown in FIG. 1D; Figure 3 ;

[0039] Figure 5 A circuit diagram of a first capacitor adjustment circuit provided for an embodiment of the present application;

[0040] Figure 6 A circuit diagram of a first inductor adjustment circuit provided for an embodiment of the present application;

[0041] Figure 7 Circuit diagram of the load adjustment circuit provided for the embodiment of the present application;

[0042] Figure 8 Circuit diagram of the output matching circuit provided for the embodiment of the present application;

[0043] Figure 9 Circuit diagram of the first linear adjustment network provided for the embodiment of the present application.

[0044] Wherein, 100, high linear low noise amplifier, 1, input selection module, 2, first amplifier circuit module, 21, first bias circuit, 22, first capacitor adjustment circuit, 23, first inductance adjustment circuit, 3, second amplifier circuit module, 31, second bias circuit, 32, second capacitor adjustment circuit, 33, second inductance adjustment circuit, 4, first linear adjustment network, 5, second linear adjustment network, 6, first output matching adjustment module, 61, load adjustment circuit, 62, output matching circuit. 63, attenuation network, 7, second output matching adjustment module, 8, first control unit, 9, second control unit. DETAILED DESCRIPTION

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application; the description and claims of this application as well as the above abstract are intended to cover all alternatives, modifications, equivalents and variations of the present application falling within the scope of the application. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. Terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The description and claims of the application as well as the above abstract are intended to cover all alternatives, modifications, equivalents and variations of the present application falling within the scope of the application. The terms "comprising", "having", "including", and "containing" used herein are intended to be open-ended terms that specifically do not exclude the presence of unrecited elements. The terms "first", "second" and the like used in the description and / or claims do not necessarily denote different or separate embodiments, but rather can denote different or alternative steps in a method or procedure.

[0046] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all directed to the same embodiment, or to one or more other embodiments. It is expressly understood that any of the various embodiments described herein are combinable with each other.

[0047] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0048] Please refer toFigures 1-9 As shown, the embodiment of the present application provides a high linearity low noise amplifier 100, comprising an input selection module 1, a first amplifier circuit module 2, a second amplifier circuit module 3, a first linear adjustment network 4, a second linear adjustment network 5, a first output matching adjustment module 6 and a second output matching adjustment module 7.

[0049] The input end of the input selection module 1 is used for receiving a radio frequency signal, and the output end of the input selection module 1 is used for being connected with the input end of the first amplifier circuit module 2 or the input end of the second amplifier circuit module 3, so as to realize different gain adjustment functions; the output end of the first amplifier circuit module 2 is connected with the input end of the first linear adjustment network 4 and the input end of the first output matching adjustment module 6 respectively, for amplifying and processing the radio frequency signal and then outputting a load through the output end of the first output matching adjustment module 6; the output end of the second amplifier circuit module 3 is connected with the input end of the second linear adjustment network 5 and the input end of the second output matching adjustment module 7 respectively, for amplifying and processing the radio frequency signal and then outputting a load through the output end of the second output matching adjustment module 7. The first linear adjustment network 4 and the second linear adjustment network 5 are used for adjusting the linearity of the low gain gear, and can adjust the linearity and the gain without increasing the noise factor (NF) too much.

[0050] The input selection module 1 comprises a first switch SPDT, a second switch SW 13 , a third switch SW 23 , a first capacitor C15 and a second capacitor C25. The control end of the first switch SPDT is used as the input end of the input selection module 1, the output end of the first switch SPDT is used for connecting the control end of the second switch SW 13 or the control end of the third switch SW 23 according to the received first control signal (LNA12_RFIN1), the first end of the first capacitor C15 is connected with the control end of the second switch SW 13 , and the output end of the second switch SW 13 is grounded; the first end of the second capacitor C25 is connected with the control end of the third switch SW 23 , and the third switch SW 23the second end of the first capacitor C15 and the second end of the second capacitor C25 are respectively used as two output ends of the input selection module 1, the second end of the first capacitor C15 is used for connecting the input end of the first amplifier circuit module 2, and the second end of the second capacitor C25 is used for connecting the input end of the second amplifier circuit module 3. By taking the control end of the first switch SPDT as the common input end of the first amplifier circuit module 2 and the second amplifier circuit module 3, input selection is first performed through the first output end and the second output end of the first switch SPDT, and then the input signal is input into the first amplifier circuit module 2 and the second amplifier circuit module 3 and is respectively filtered by the second switch SW 13 and the third switch SW 23 , and the non-working input port is provided with a pull-down for turning off, so that good isolation is achieved. Through the input selection setting of the first switch SPDT, switching of the input port to different amplifiers LNA can be realized, the input to multiple amplifiers LNA can be increased according to application requirements, and on the basis of having an area advantage, gain adjustment is realized, good power consumption, NF and linearity are realized under different gain gears; and through reasonable gain gear adjustment means, the application environment of the low noise amplifier under different antenna receiving powers is helped, and different index requirements are met.

[0051] Specifically, the first capacitor C15 and the second capacitor C25 are respectively connected to the control end of the second switch SW 13 and the control end of the third switch SW 23 and are connected with the first switch SPDT, and finally are connected with the common port. By reasonably controlling the size of the first switch SPDT, the insertion loss and the parasitic capacitance brought by the insertion loss can be controlled, the performance of the common port can be balanced, the second switch SW 13 and the third switch SW 23 can be pulled down, and after the first switch SPDT selects one path to be turned on, the other path can be well isolated.

[0052] In the embodiment, the high-linearity low-noise amplifier 100 further comprises at least one first control unit 8 and at least one second control unit 9; the input end of the first control unit 8 and the input end of the second control unit 9 are respectively used for receiving a second control signal (LNA1_RFIN2, LNA2_RFIN2); the output end of the first control unit 8 is connected to the output end of the first capacitor C15, and the first control unit 8 is used for outputting the second control signal to the input end of the first amplifier circuit module 2; the output end of the second control unit 9 is connected to the output end of the second capacitor C25, and the second control unit 9 is used for outputting the second control signal to the input end of the second amplifier circuit module 3.

[0053] In this embodiment, the first control unit 8 comprises a fourth switch SW 12 , a fifth switch SW 14 and a third capacitor C14; the control end of the fourth switch SW 12 is connected with the control end of the fifth switch SW 14 and serves as the input end of the first control unit 8, the output end of the fifth switch SW 14 is grounded, the output end of the fourth switch SW 12 is connected with the first end of the third capacitor C14, and the second end of the third capacitor C14 serves as the output end of the first control unit 8; the second control unit 9 comprises a sixth switch SW 24 , a seventh switch SW 22 and a fourth capacitor C24; the control end of the sixth switch SW 24 is connected with the control end of the seventh switch SW 22 and serves as the input end of the second control unit 9, the output end of the sixth switch SW 24 is grounded, the output end of the seventh switch SW 22 is connected with the first end of the fourth capacitor C24, and the second end of the fourth capacitor C24 serves as the output end of the second control unit 9.

[0054] In this embodiment, the first amplifier circuit module 2 and the second amplifier circuit module 3 have the same circuit.

[0055] The first amplifier circuit module 2 comprises a first bias circuit 21, a first resistor R11, a second resistor R12, a fifth capacitor C11, a first MOS transistor M11, a second MOS transistor M12, a first capacitor adjustment circuit 22 and a first inductor adjustment circuit 23; the first end of the first resistor R11 is connected with the gate of the first MOS transistor M11 and the first end of the first capacitor adjustment circuit 22 respectively and serves as the input end of the first amplifier circuit module 2; the second end of the first resistor R11 is connected with the first end of the first bias circuit 21, the second end of the first bias circuit 21 is connected with the first end of the second resistor R12, the second end of the second resistor R12 is connected with the gate of the second MOS transistor M12 and the first end of the fifth capacitor C11 respectively, and the second end of the fifth capacitor C11 is grounded; the drain of the second MOS transistor M12 serves as the output end of the first amplifier circuit module 2; the source of the second MOS transistor M12 is connected with the drain of the first MOS transistor M11 and the first linear adjustment network 4 respectively; the source of the first MOS transistor M11 is connected with the second end of the first capacitor adjustment circuit 22 and the first end of the first inductor adjustment circuit 23 respectively, and the second end of the first inductor adjustment circuit 23 is grounded.

[0056] The first MOS transistor M11 and the second MOS transistor M12 are configured as a common-source common-gate architecture, the first biasing circuit 21 is connected to the gate of the first MOS transistor M11 and the gate of the second MOS transistor M12 through the first resistor R11 and the second resistor R12 respectively to provide a bias voltage. The second end of the second resistor R12 is connected to the first end of the fifth capacitor C11, so that the second resistor R12 and the fifth capacitor C11 form a filter circuit and provide an AC path to ground. The first capacitor adjusting circuit 22 is connected to the gate and the source of the first MOS transistor M11 to adjust input matching and affect the performance of different gain levels. The first inductor adjusting circuit 23 is connected to the source of the first MOS transistor M11 and to ground to adjust input matching and linearity of different gain levels.

[0057] Specifically, the second amplifier circuit module 3 includes a second biasing circuit 31, a resistor R21, a resistor R22, a capacitor C21, a MOS transistor M21, a MOS transistor M22, a second capacitor adjusting circuit 32, and a second inductor adjusting circuit 33; the first end of the resistor R21 is connected to the gate of the MOS transistor M21 and the first end of the second capacitor adjusting circuit 32 respectively and serves as the input end of the second amplifier circuit module 3; the second end of the resistor R21 is connected to the first end of the second biasing circuit 31, the second end of the second biasing circuit 31 is connected to the first end of the resistor R22, the second end of the resistor R22 is connected to the gate of the MOS transistor M22 and the first end of the capacitor C21 respectively, and the second end of the capacitor C21 is grounded; the drain of the MOS transistor M22 serves as the output end of the second amplifier circuit module 3; the source of the MOS transistor M22 is connected to the drain of the MOS transistor M21 and the second linear adjusting network 5 respectively; the source of the MOS transistor M21 is connected to the second end of the second capacitor adjusting circuit 32 and the first end of the second inductor adjusting circuit 33 respectively, and the second end of the second inductor adjusting circuit 33 is grounded. The MOS transistor M21 and the MOS transistor M22 are configured as a common-source common-gate architecture, the second biasing circuit 31 is connected to the gate of the MOS transistor M21 and the gate of the MOS transistor M22 through the resistor R21 and the resistor R22 respectively to provide a bias voltage, the resistor R22 and the capacitor C21 are connected, the capacitor C21 and the resistor R22 form a filter capacitor and provide an AC path to ground. The second capacitor adjusting circuit 32 is connected to the gate and the source of the MOS transistor M21 to adjust input matching and affect the performance of different gain levels. The second inductor adjusting circuit 33 is connected to the source of the MOS transistor M21 to ground to adjust input matching and linearity of different gain levels.

[0058] In the embodiment, the first capacitance adjusting circuit 22 comprises a sixth capacitance C31, a plurality of eighth switches S32 and a plurality of seventh capacitances C32; the first end of the sixth capacitance C31 is connected with the control end of each of the plurality of eighth switches S32 and serves as the first end of the first capacitance adjusting circuit 22, the output end of each of the plurality of eighth switches S32 is connected with the first end of each of the plurality of seventh capacitances C32 one by one, and the second end of the sixth capacitance C31 is connected with the second end of each of the plurality of seventh capacitances C32 and serves as the second end of the first capacitance adjusting circuit 22. By adjusting the on-off of the eighth switch S32, the capacitance value of the parallel capacitance is increased, the input matching under different gain positions can be adjusted, and the linearity can also be optimized.

[0059] In the embodiment, the first inductance adjusting circuit 23 comprises a first inductance L41, a second inductance L42, a ninth switch S41, a tenth switch S42 and an eleventh switch S43; the first end of the first inductance L41 is connected with the control end of the tenth switch S42 and serves as the first end of the first inductance adjusting circuit 23, the second end of the first inductance L41 is connected with the control end of the ninth switch S41 and the output end of the eleventh switch S43, the control end of the eleventh switch S43 is connected with the output end of the tenth switch S42 and the first end of the second inductance L42, and the output end of the ninth switch S41 is connected with the second end of the second inductance L42 and serves as the second end of the first inductance adjusting circuit 23. When the high-linearity low-noise amplifier 100 works, one of the ninth switch S41 or the tenth switch S42 is closed to ensure the loop to the ground. When the gain is switched, the ninth switch S41, the tenth switch S42 and the eleventh switch S43 can have three combinations, different inductance values are designed to adjust different gain positions, and it is particularly emphasized that when the gain is low, only when the eleventh switch S43 is closed, the linearity can be greatly improved.

[0060] In the embodiment, the circuit structure of the first output matching adjusting module 6 and the second output matching adjusting module 7 is the same. The first output matching adjusting module 6 and the second output matching adjusting module 7 can provide reasonable output impedance for designing low-noise amplifiers in different frequency bands and different gain positions.

[0061] The first output matching adjustment module 6 comprises an eighth capacitor C12, a third inductor L01, a load adjustment circuit 61, an output matching circuit 62 and an attenuation network 63; a first end of the eighth capacitor C12 is connected with a first end of the third inductor L01 and a first end of the load adjustment circuit 61 respectively and is used for being connected to a power supply VDD; a second end of the eighth capacitor C12 is grounded, a second end of the third inductor L01 is connected with a second end of the load adjustment circuit 61 and an input end of the output matching circuit 62 respectively and serves as an input end of the first output matching adjustment module 6; an output end of the output matching circuit 62 is connected with an input end of the attenuation network 63, and an output end of the attenuation network 63 is used for outputting a load. In addition to adjusting gain attenuation, the load adjustment circuit 61 also provides a suitable load point for the output to ensure good linearity index.

[0062] The attenuation network 63 is a π-type attenuation network, which performs attenuation processing on the signal and simultaneously performs impedance matching.

[0063] In the embodiment, the load adjustment circuit 61 comprises a third resistor R31, a plurality of twelfth switches S12 and a plurality of fourth resistors R32; a first end of the third resistor R31 is connected with control ends of the plurality of twelfth switches S12 respectively and serves as a first end of the load adjustment circuit 61, output ends of the plurality of twelfth switches S12 are connected with first ends of the plurality of fourth resistors R32 respectively, and a second end of the third resistor R31 is connected with second ends of the plurality of fourth resistors R32 respectively and serves as a second end of the load adjustment circuit 61. When the twelfth switch S12 is not turned on, at least one fourth resistor R32 branch exists to give a reasonable highest gain initial value, and when low-gain gear adjustment is performed, the twelfth switch S12 is used to change the size of the parallel resistance value.

[0064] In the embodiment, the output matching circuit 62 comprises a ninth capacitor C51, a tenth capacitor C52, an eleventh capacitor C50, a twelfth capacitor C53, a thirteenth capacitor C54, a fourteenth capacitor C55, a fifteenth capacitor C56, a thirteenth switch S51, a fourteenth switch S52, a fifteenth switch S53, a sixteenth switch S54, a seventeenth switch S55 and an eighteenth switch S56.

[0065] The control end of the thirteenth switch S51 is connected with the control end of the fourteenth switch S52, the control end of the fifteenth switch S53, the control end of the sixteenth switch S54 and the first end of the eleventh capacitor C50 respectively, and the output end of the thirteenth switch S51 and the output end of the fourteenth switch S52 are connected with the ninth capacitor C51 and the tenth capacitor C52 respectively and grounded;

[0066] The output end of the fifteenth switch S53 is connected to the first end of the twelfth capacitor C53, the output end of the sixteenth switch S54 is connected to the first end of the thirteenth capacitor C54, the second end of the eleventh capacitor C50 is respectively connected to the second end of the twelfth capacitor C53, the second end of the thirteenth capacitor C54, the control end of the seventeenth switch S55, and the control end of the eighteenth switch S56, the output end of the seventeenth switch S55 and the output end of the eighteenth switch S56 are respectively connected to the fourteenth capacitor C55 and the fifteenth capacitor C56 and are grounded;

[0067] The control terminal of the thirteenth switch S51 also serves as the input terminal of the output matching circuit 62, and the control terminal of the eighteenth switch S56 also serves as the output terminal of the output matching circuit 62. By controlling the on / off of the ninth capacitor C51, the tenth capacitor C52, the twelfth capacitor C53, the thirteenth capacitor C54, the fourteenth capacitor C55, and the fifteenth capacitor C56 through the thirteenth switch S51, the fourteenth switch S52, the fifteenth switch S53, the sixteenth switch S54, the seventeenth switch S55, and the eighteenth switch S56, respectively, the output matching point of each gain level can be effectively adjusted.

[0068] Optionally, when all switches are not turned on, at least the eleventh capacitor C50 should be retained to serve as a DC blocking capacitor for output matching. By adjusting the on and off of each switch, the optimal output matching point of each gain level can be effectively adjusted.

[0069] In this embodiment, the first linearity adjustment network 4 and the second linearity adjustment network 5 have the same circuit structure. The first linearity adjustment network 4 includes a sixteenth capacitor C61, multiple nineteenth switches S61, and multiple fifth resistors R61. The first end of the sixteenth capacitor C61 is connected to the first amplifier circuit module 2, the second end of the sixteenth capacitor C61 is connected to the control ends of the multiple nineteenth switches S61, and the output ends of the multiple nineteenth switches S61 are connected to the multiple fifth resistors R61 and then to ground. The nineteenth switches S61 control the corresponding fifth resistors R61 to adjust the linearity of the low-gain range, allowing the adjustment of linearity and gain without excessively increasing the noise figure (NF).

[0070] It should be noted that the various embodiments described herein with reference to the drawings are merely illustrative of the present application and do not limit the scope of the present application. Those of ordinary skill in the art will readily understand that the present application can be implemented without departing from the spirit and scope of the present application. In addition, unless otherwise indicated, words and phrases used herein include the plural as well as the singular. Also, unless otherwise indicated, all or part of the embodiments can be used in combination with all or part of any other embodiment.

Claims

1. A high linearity low noise amplifier, characterized in that: It includes an input selection module, a first amplifier circuit module, a second amplifier circuit module, a first linear regulation network, a second linear regulation network, a first output matching regulation module and a second output matching regulation module; The input end of the input selection module is used to receive a radio frequency signal, and the output end of the input selection module is used to connect to the input end of the first amplifier circuit module or the input end of the second amplifier circuit module to achieve different gain adjustment functions; the output end of the first amplifier circuit module is respectively connected to the input end of the first linear adjustment network and the first output matching adjustment module, and the output end of the first output matching adjustment module outputs a load; the output end of the second amplifier circuit module is respectively connected to the input end of the second linear adjustment network and the second output matching adjustment module, and the output end of the second output matching adjustment module outputs a load; The input selection module includes a first switch, a second switch, a third switch, a first capacitor and a second capacitor; The control end of the first switch serves as the input end of the input selection module; the output end of the first switch is used to connect to the control end of the second switch or the control end of the third switch according to the received first control signal; the first end of the first capacitor is connected to the control end of the second switch, and the output end of the second switch is grounded; the first end of the second capacitor is connected to the control end of the third switch, and the output end of the third switch is grounded; the second end of the first capacitor and the second end of the second capacitor respectively serve as the two output ends of the input selection module; the second end of the first capacitor is used to connect to the input end of the first amplifier circuit module, and the second end of the second capacitor is used to connect to the input end of the second amplifier circuit module; The first amplifier circuit module and the second amplifier circuit module have the same circuit; The first amplifier circuit module includes a first bias circuit, a first resistor, a second resistor, a fifth capacitor, a first MOS transistor, a second MOS transistor, a first capacitance adjustment circuit, and a first inductance adjustment circuit; A first end of the first resistor is respectively connected to the gate of the first MOS transistor and the first end of the first capacitor adjustment circuit and serves as an input end of the first amplifier circuit module; a second end of the first resistor is connected to the first end of the first bias circuit, a second end of the first bias circuit is connected to the first end of the second resistor, a second end of the second resistor is respectively connected to the gate of the second MOS transistor and the first end of the fifth capacitor, and a second end of the fifth capacitor is grounded; a drain of the second MOS transistor serves as an output end of the first amplifier circuit module; The source of the second MOS transistor is respectively connected to the drain of the first MOS transistor and the first linear regulation network; the source of the first MOS transistor is respectively connected to the second end of the first capacitance regulation circuit and the first end of the first inductance regulation circuit, and the second end of the first inductance regulation circuit is grounded.

2. The high linearity low noise amplifier according to claim 1, characterized in that: The high linearity low noise amplifier also includes at least one first control unit and at least one second control unit; the input end of the first control unit and the input end of the second control unit are respectively used to receive a second control signal; the output end of the first control unit is connected to the output end of the first capacitor, and the first control unit is used to output the second control signal to the input end of the first amplifier circuit module; the output end of the second control unit is connected to the output end of the second capacitor, and the second control unit is used to output the second control signal to the input end of the second amplifier circuit module.

3. The high linearity low noise amplifier according to claim 2, characterized in that: The first control unit includes a fourth switch, a fifth switch, and a third capacitor; a control end of the fourth switch is connected to a control end of the fifth switch and serves as an input end of the first control unit, an output end of the fifth switch is grounded, an output end of the fourth switch is connected to a first end of the third capacitor, and a second end of the third capacitor serves as an output end of the first control unit; The second control unit includes a sixth switch, a seventh switch and a fourth capacitor; the control end of the sixth switch is connected to the control end of the seventh switch and serves as the input end of the second control unit, the output end of the sixth switch is grounded, the output end of the seventh switch is connected to the first end of the fourth capacitor, and the second end of the fourth capacitor serves as the output end of the second control unit.

4. The high linearity low noise amplifier according to claim 1, wherein: The first capacitance adjustment circuit includes a sixth capacitor, a plurality of eighth switches, and a plurality of seventh capacitors; The first end of the sixth capacitor is respectively connected to the control ends of the multiple eighth switches and serves as the first end of the first capacitor adjustment circuit, the output ends of the multiple eighth switches are respectively connected to the first ends of the multiple seventh capacitors in a one-to-one correspondence, and the second end of the sixth capacitor is respectively connected to the second ends of the multiple seventh capacitors and serves as the second end of the first capacitor adjustment circuit.

5. The high linearity low noise amplifier according to claim 4, characterized in that: The first inductance adjustment circuit includes a first inductor, a second inductor, a ninth switch, a tenth switch, and an eleventh switch; The first end of the first inductor is connected to the control end of the tenth switch and serves as the first end of the first inductor adjustment circuit. The second end of the first inductor is respectively connected to the control end of the ninth switch and the output end of the eleventh switch. The control end of the eleventh switch is respectively connected to the output end of the tenth switch and the first end of the second inductor. The output end of the ninth switch is connected to the second end of the second inductor and serves as the second end of the first inductor adjustment circuit.

6. The high linearity low noise amplifier according to claim 1, wherein: The circuit structure of the first output matching adjustment module is the same as that of the second output matching adjustment module; The first output matching adjustment module includes an eighth capacitor, a third inductor, a load adjustment circuit, an output matching circuit and an attenuation network; The first end of the eighth capacitor is respectively connected to the first end of the third inductor and the first end of the load regulation circuit and is used to be connected to the power supply; the second end of the eighth capacitor is grounded, and the second end of the third inductor is respectively connected to the second end of the load regulation circuit and the input end of the output matching circuit and serves as the input end of the first output matching regulation module; the output end of the output matching circuit is connected to the input end of the attenuation network, and the output end of the attenuation network is used to output the load.

7. The high linearity low noise amplifier according to claim 6, characterized in that: The load regulating circuit includes a third resistor, a plurality of twelfth switches and a plurality of fourth resistors; The first end of the third resistor is respectively connected to the control ends of the multiple twelfth switches and serves as the first end of the load regulation circuit, the output ends of the multiple twelfth switches are respectively connected to the first ends of the multiple fourth resistors, and the second end of the third resistor is respectively connected to the second ends of the multiple fourth resistors and serves as the second end of the load regulation circuit.

8. The high linearity low noise amplifier according to claim 6, wherein: The output matching circuit includes a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, a sixteenth switch, a seventeenth switch, and an eighteenth switch; a control end of the thirteenth switch being connected to the control end of the fourteenth switch, the control end of the fifteenth switch, the control end of the sixteenth switch, and the first end of the eleventh capacitor, respectively; an output end of the thirteenth switch and an output end of the fourteenth switch being connected to the ninth capacitor and the tenth capacitor, respectively, and being grounded; an output end of the fifteenth switch connected to the first end of the twelfth capacitor, an output end of the sixteenth switch connected to the first end of the thirteenth capacitor, a second end of the eleventh capacitor connected to the second end of the twelfth capacitor, a second end of the thirteenth capacitor, a control end of the seventeenth switch, and a control end of the eighteenth switch, respectively; an output end of the seventeenth switch and an output end of the eighteenth switch connected to the fourteenth capacitor and the fifteenth capacitor, respectively, and grounded; The control end of the thirteenth switch also serves as the input end of the output matching circuit, and the control end of the eighteenth switch also serves as the output end of the output matching circuit.

9. The high linearity low noise amplifier according to claim 1, wherein: The circuit structures of the first linear regulation network and the second linear regulation network are the same; The first linear regulation network includes a sixteenth capacitor, multiple nineteenth switches and multiple fifth resistors. The first end of the sixteenth capacitor is connected to the first amplifier circuit module, the second end of the sixteenth capacitor is respectively connected to the control ends of the multiple nineteenth switches, and the output ends of the multiple nineteenth switches are respectively connected to the multiple fifth resistors and grounded.

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