Signal demodulation method, device, equipment and medium

Abstract

The present application relates to a signal demodulation method, device, equipment and medium, wherein the method comprises: determining a signal synchronization mode, wherein the signal synchronization mode comprises at least one of frame synchronization based on a reference signal, frame synchronization based on SSB, frame synchronization based on CP and SSB, and frame synchronization based on CP and reference signal; synchronizing the signal to be demodulated based on the signal synchronization mode to obtain a frame header in the signal to be demodulated; performing multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation comprises at least coarse frequency offset estimation and compensation, precise clock error estimation, precise frequency offset estimation and compensation, and coarse clock error estimation in sequence. In this way, technical problems existing in the related art such as high requirements for hardware equipment and high costs can be solved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a signal demodulation method, device, equipment and medium. Background Art

[0002] With the rapid development of communication technology, wireless local area networks and their products are widely used, such as short-range wireless communication, industrial control, smart home, etc. At present, hardware is usually used to demodulate the physical layer signal in 5G NR (New Radio). Specifically, measuring instruments are used to measure various channel indicators in the signal, such as channel power. Considering the accuracy of the measurement data, it has high requirements for hardware equipment and high cost.

[0003] Therefore, there is an urgent need to propose a better signal demodulation solution. Summary of the invention

[0004] In order to overcome the problems existing in the related art, the present application provides a signal demodulation method, device, equipment and medium to solve the technical problems existing in the above-mentioned related art, such as high requirements for hardware equipment and high cost.

[0005] According to a first aspect of an embodiment of the present application, a signal demodulation method is provided, the method comprising:

[0006] Determine a signal synchronization mode, wherein the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on an SSB, frame synchronization based on a CP and an SSB, and frame synchronization based on a CP and a reference signal;

[0007] Synchronize the signal to be demodulated based on the signal synchronization mode to obtain a frame header in the signal to be demodulated;

[0008] Multi-threaded signal demodulation is performed based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, fine clock error estimation, fine frequency offset estimation and compensation, and coarse clock error estimation in sequence.

[0009] In some embodiments, synchronizing the signal to be demodulated based on the signal synchronization mode to obtain a frame header in the signal to be demodulated includes:

[0010] Based on the signal synchronization method, the correlation and starting point position of the half subframe of the signal to be demodulated are calculated to obtain a target correlation and a corresponding starting point position, wherein the starting point position is used to indicate the position of the half subframe in the signal to be demodulated that satisfies the target correlation;

[0011] When it is necessary to determine the types of the front and back half frames, sliding cross-correlation is performed on the starting position corresponding to the target correlation and the position of the next half frame of the starting position, and the position with the largest correlation is determined as the frame head in the signal to be demodulated;

[0012] When it is not necessary to determine the types of the front and back half frames, the starting point position corresponding to the target correlation is determined as the frame header in the signal to be demodulated.

[0013] In some embodiments, the signal synchronization method further includes synchronization based on CP, and the calculation of the correlation and starting point position of a half subframe of the demodulated signal based on the signal synchronization method to obtain the target correlation and the corresponding starting point position includes:

[0014] Divide the signal to be demodulated according to half subframes to obtain N search starting points, where N is a positive integer, and the search starting points are used to indicate the corresponding half subframes in the signal to be demodulated;

[0015] Based on the N search starting points, CP correlation calculation is performed on the target symbol of the corresponding half subframe in the signal to be demodulated to obtain N maximum correlations and corresponding starting point positions, wherein the target symbol is a symbol in which a reference signal exists in the corresponding half subframe, and the starting point position is used to indicate the position of the corresponding symbol;

[0016] Based on the N maximum correlations and the corresponding starting positions, the target correlation and the corresponding starting position are determined.

[0017] In some embodiments, if the signal synchronization mode includes frame synchronization based on CP and SSB, then determining the target correlation and the corresponding starting position based on the N maximum correlations and the corresponding starting positions includes:

[0018] Perform sliding cross-correlation based on the pre-configured first reference signal and the starting positions corresponding to the N maximum correlations, to obtain N maximum frame synchronization correlations and corresponding starting positions;

[0019] Based on the N maximum frame synchronization correlations and the corresponding starting positions, the target correlation and the corresponding starting position are determined, and the target correlation is the correlation with the largest value among the N maximum frame synchronization correlations.

[0020] In some embodiments, if the signal synchronization mode includes frame synchronization based on CP and reference signal, then determining the target correlation and the corresponding starting position based on the N maximum correlations and the corresponding starting positions includes:

[0021] Perform sliding cross-correlation based on the pre-configured second reference signal and the starting positions corresponding to the N maximum correlations, to obtain N maximum frame synchronization correlations and corresponding starting positions;

[0022] Based on the N maximum frame synchronization correlations and the corresponding starting positions, the target correlation and the corresponding starting position are determined, and the target correlation is the correlation with the largest value among the N maximum frame synchronization correlations.

[0023] In some embodiments, if the signal synchronization method includes frame synchronization based on a reference signal, then the calculation of the correlation and starting point position of a half subframe of the demodulated signal based on the signal synchronization method to obtain the target correlation and the corresponding starting point position includes:

[0024] Dividing the signal to be demodulated based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer;

[0025] Sliding cross-correlation is performed based on the segmented signals corresponding to each of the M search starting points and a pre-configured third reference signal, and a target correlation and a corresponding starting point position are determined from the obtained M correlations, wherein the target correlation is the correlation with the largest value among the M correlations.

[0026] In some embodiments, if the signal synchronization method includes frame synchronization based on SSB, then the calculation of the correlation and starting position of a half subframe of the demodulated signal based on the signal synchronization method to obtain the target correlation and the corresponding starting position includes:

[0027] Dividing the signal to be demodulated based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer;

[0028] Perform sliding cross-correlation based on the segmented signals corresponding to the M search starting points and a pre-configured fourth reference signal, and determine the maximum correlation and the corresponding starting point position from the obtained M correlations;

[0029] A sliding cross-correlation is performed on the starting point position corresponding to the maximum correlation in the signal to be demodulated based on a pre-configured fifth reference signal, and the target correlation and the corresponding starting point position are determined from the obtained correlation.

[0030] In some embodiments, determining the starting point position corresponding to the target correlation as the frame header in the signal to be demodulated includes:

[0031] Determine the starting point position corresponding to the target correlation as the initial frame header in the signal to be demodulated;

[0032] Determine a corresponding reference signal based on an initial frame header in the signal to be demodulated;

[0033] Based on the corresponding reference signal, up-sampling and sliding cross-correlation are performed on the corresponding position in the signal to be demodulated to obtain a final frame header in the signal to be demodulated.

[0034] In some embodiments, the signal demodulation includes coarse frequency offset estimation and compensation, and the multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information includes:

[0035] Up-sampling the data to be analyzed in the signal to be demodulated, and down-sampling based on the frame header in the signal to be demodulated to obtain a corresponding fine synchronization signal;

[0036] Performing frequency domain precise delay estimation on the precise synchronization signal based on a pre-configured sixth reference signal to obtain a delay of the precise synchronization signal;

[0037] A coarse frequency offset estimation and a coarse frequency offset compensation are performed on the fine synchronization signal based on the CP to obtain a corresponding first compensation signal.

[0038] In some embodiments, the signal demodulation includes precise clock error estimation, and precise frequency offset estimation and compensation, and the multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain the corresponding demodulation information also includes:

[0039] Performing symbol demodulation and precise clock error estimation on the first compensation signal to obtain a corresponding precise clock error;

[0040] Performing symbol demodulation on the first compensation signal and performing precise frequency offset estimation based on a reference signal to obtain a corresponding estimation result;

[0041] The estimation result is subjected to precise frequency offset compensation based on a reference signal to obtain a corresponding second compensation signal.

[0042] In some embodiments, the signal demodulation includes rough clock error estimation, and the multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information also includes:

[0043] Symbol demodulation and coarse clock error estimation are performed on the second compensation signal to obtain a corresponding coarse clock error.

[0044] In some embodiments, performing multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information further includes:

[0045] Performing symbol demodulation on the symbol to be measured in the second compensation signal to obtain a corresponding target demodulated signal;

[0046] Performing channel demodulation on the target demodulation signal to obtain corresponding demodulation parameters;

[0047] Data statistics are performed on demodulation information corresponding to the signal demodulation, where the demodulation information at least includes the demodulation parameters and data generated in the multi-threaded signal demodulation.

[0048] According to a second aspect of an embodiment of the present application, a signal demodulation device is provided, the device comprising:

[0049] A processing module, used to determine a signal synchronization mode, wherein the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on an SSB, frame synchronization based on a CP and an SSB, and frame synchronization based on a CP and a reference signal;

[0050] The processing module is further used to synchronize the signal to be demodulated based on the signal synchronization mode to obtain a frame header in the signal to be demodulated;

[0051] The processing module is also used to perform multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, fine clock error estimation, fine frequency offset estimation and compensation, and coarse clock error estimation in sequence.

[0052] For the contents not introduced or described in the embodiments of the present application, please refer to the relevant introduction in the method embodiment provided in the first aspect above, and the embodiments of the present application are not limited thereto.

[0053] According to a third aspect of an embodiment of the present application, an electronic device is provided, comprising: a processor; a memory for storing processor executable instructions; wherein the processor is configured to execute the executable instructions to implement the steps of the signal demodulation method provided in the first aspect above.

[0054] According to a fourth aspect of an embodiment of the present application, a computer-readable storage medium is provided, on which computer program instructions are stored. When the program instructions are executed by a processor, the steps of the signal demodulation method provided in the above-mentioned first aspect of the present application are implemented.

[0055] The technical solution provided by the embodiment of the present application may include the following beneficial effects: the electronic device determines the signal synchronization mode, and the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on SSB, frame synchronization based on CP and SSB, and frame synchronization based on CP and a reference signal; based on the signal synchronization mode, the signal to be demodulated is synchronized to obtain the frame header in the signal to be demodulated; based on the frame header in the signal to be demodulated, multi-threaded signal demodulation is performed to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, precise clock error estimation, precise frequency offset estimation and compensation, and coarse clock error estimation in sequence. In this way, a multi-threaded software processing method can be adopted to realize signal demodulation and measurement, which can not only improve CPU utilization, but also achieve better demodulation effect through multiple estimation and compensation. At the same time, it also solves the technical problems existing in the prior art such as high requirements for hardware equipment and high costs.

[0056] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0058] Figure 1 It is a flowchart of a signal demodulation method according to an exemplary embodiment.

[0059] Figure 2 The figure is a schematic diagram of a setting flow according to an exemplary embodiment.

[0060] Figure 3 It is a flowchart diagram of another signal demodulation method according to an exemplary embodiment.

[0061] Figure 4 It is a schematic diagram of a signal time-frequency resource according to an exemplary embodiment.

[0062] Figure 5 It is a schematic structural diagram of a signal demodulation device according to an exemplary embodiment.

[0063] Figure 6 The diagram is a schematic structural diagram of an electronic device according to an exemplary embodiment.

[0064] Figure 7 The figure is a schematic diagram showing the structure of a chip according to an exemplary embodiment. DETAILED DESCRIPTION

[0065] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0066] It should be noted that all actions of acquiring signals, information or data in this application are performed with the authorization of the corresponding device owner.

[0067] See also Figure 1 FIG. 1 is a flow chart of a signal demodulation method according to an exemplary embodiment. Figure 1 The method shown can be applied to an electronic device, and the method may include the following implementation steps:

[0068] S101. Determine a signal synchronization mode, where the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on SSB, frame synchronization based on CP and SSB, and frame synchronization based on CP and reference signal.

[0069] The signal synchronization method involved in the present application may be pre-configured, which may include but is not limited to any one or more combinations of the following implementations: frame synchronization based on a reference signal, frame synchronization based on a synchronization signal block (Synchronization Signal Block, SSB), frame synchronization based on a cyclic prefix (CyclicPrefix, CP) and SSB, and frame synchronization based on a CP and a reference signal.

[0070] S102 , synchronizing the signal to be demodulated based on a signal synchronization method to obtain a frame header in the signal to be demodulated.

[0071] The present application can synchronize the above-mentioned signal to be demodulated based on any one or more combinations of the above-mentioned four signal synchronization methods. The specific implementation method of the synchronization will be described in detail below in the present application.

[0072] S103, performing multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, fine clock error estimation, fine frequency offset estimation and compensation, and coarse clock error estimation in sequence.

[0073] The electronic devices involved in this application may also be referred to as terminal devices (terminal), user equipment (UE), mobile station (MS), mobile terminal (MT), etc. The electronic devices may be automobiles with communication functions, smart cars, mobile phones (MobilePhone), wearable devices, tablet computers (Pad), computers with wireless transceiver functions, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminal devices in industrial control (IndustrialControl), wireless terminal devices in self-driving, wireless terminal devices in remote medical surgery, wireless terminal devices in smart grid (SmartGrid), wireless terminal devices in transportation safety (TransportationSafety), wireless terminal devices in smart cities (SmartCity), wireless terminal devices in smart homes (SmartHome), etc. The embodiments of this application do not limit the specific technologies and specific device forms used by the above-mentioned electronic devices.

[0074] By implementing the embodiments of the present application, the electronic device determines a signal synchronization mode, and the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on SSB, frame synchronization based on CP and SSB, and frame synchronization based on CP and a reference signal; synchronizes the signal to be demodulated based on the signal synchronization mode to obtain a frame header in the signal to be demodulated; performs multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; signal demodulation includes at least coarse frequency offset estimation and compensation, precise clock error estimation, precise frequency offset estimation and compensation, and coarse clock error estimation in sequence. In this way, a multi-threaded software processing method can be used to realize signal demodulation and measurement, which can not only improve CPU utilization, but also achieve better demodulation effects through multiple estimations and compensations. At the same time, it also solves the technical problems existing in the prior art such as high requirements for hardware equipment and high costs.

[0075] In practical applications, this application supports the use of multi-threaded processing, which is conducive to improving CPU utilization and achieving better measurement results through multiple estimations and compensations. The entire signal demodulation process is divided into two stages: setup and processing. The setup stage includes some data required for the processing stage, such as the pre-generation of reference signals and other data, to reduce the repeated redundant operations involved in the loop operations in the processing stage, so as to speed up the processing speed. The contents of the two stages are introduced below. Please refer to Figure 2FIG. 1 is a schematic diagram of a setting process according to an exemplary embodiment. Figure 2 The process shown can be applied to an electronic device, and the method may include the following process steps:

[0076] S201, configure the pre-processing step. Start the initialization of the reference signal module, which may include at least the initialization of any one of the downlink channel, downlink signal, uplink channel and uplink signal. For example, the downlink channel or signal may include but is not limited to SSB, Physical Downlink Control Channel (PDCCH), Physical Downlink Shared Channel (PDSCH), Channel State Information-Reference Signal (CSIRS); the uplink channel or signal may include but is not limited to Physical Uplink Control Channel (PUCCH), Physical Uplink Shared Channel (PUSCH), Channel Sounding Reference Signal (SRS), etc. In this embodiment, since the signal data of CSIRS and SRS are determined under fixed configuration, they can be regarded as reference signals.

[0077] S202, configuration preprocessing step for channel demodulation. This step supports multi-threaded synchronous execution / processing. For example, each channel or signal is processed by an independent thread, and the load data of the channel or signal (channel data other than CSIRS and SRS) and the index position of the reference signal in the time-frequency resource grid are calculated according to the channel parameter configuration, and the data of the reference signal on the time-frequency resource grid is generated. The reference signal may include, but is not limited to, for example, the primary synchronization signal (Primary Synchronization Signal, PSS) of SSB, the secondary synchronization signal (Secondary Synchronization Signal, SSS) or the demodulation reference signal (Demodulation Reference Signal, DMRS), the DMRS and phase tracking reference signal (Phase Tracking Reference Signal, PTRS) of the physical downlink shared channel PDSCH, the physical uplink shared channel PUSCH, the DMRS of PDCCH, PUCCH, and two independent signals of CSIRS and SRS, or other reference signals.

[0078] S203, configuration summary processing step. There may be multiple identical channels or signals, such as PDSCH1 and PDSCH2. The present application can combine the reference signals of each channel and convert them to the time domain to obtain the corresponding time domain reference signal. Optionally, the OFDM symbols in the reference signal can also be marked to indicate whether the reference signal carries data, etc., wherein the OFDM in the reference signal in the mark identifies the boundary of an OFDM symbol in the reference signal and determines the starting and ending positions of the data in the reference signal.

[0079] The processing stage can refer to the above Figure 1 In some embodiments, before step S101, the present application may also allocate frame memory for the above-mentioned signal to be demodulated. Figure 3 This is a flowchart of another signal demodulation method according to an exemplary embodiment. The present application may also include a frame demodulation preprocessing step S301: Specifically, the present application may allocate the memory required for processing each frame in the above-mentioned demodulated signal, and fill the insufficient data in the frame with 0 to supplement.

[0080] In step S101, the specific implementation of this application may include: Figure 3 Steps S302-S305, and steps S310-S313 in the above. According to the pre-configuration, the above four signal synchronization modes may be included. The specific configuration may determine the final signal synchronization mode according to whether CP is used for synchronization, whether SSB or reference signal is used for synchronization. The present application may determine the above signal synchronization mode according to the configuration in the configuration stage.

[0081] In step S102, the present application can calculate the correlation and starting position of the half-subframe of the signal to be demodulated based on the signal synchronization method, and obtain the target correlation and the corresponding starting position, the starting position is used to indicate the position of the half-subframe in the signal to be demodulated that meets the target correlation; when it is necessary to determine the type of the front and back half frames, the starting position corresponding to the target correlation and the position of the next half frame of the starting position are respectively subjected to sliding cross-correlation, and the position with the largest correlation determined after the sliding cross-correlation between the starting position corresponding to the target correlation and the position of the next half frame of the starting position is determined as the frame header in the signal to be demodulated; when it is not necessary to determine the type of the front and back half frames, the starting position corresponding to the target correlation is determined as the frame header in the signal to be demodulated. The specific implementation methods of the above step S102 are different for different signal synchronization methods, which are introduced separately below.

[0082] When the above-mentioned signal synchronization method includes CP-based synchronization, the present application can divide the above-mentioned signal to be demodulated according to half subframes to obtain N search starting points, where N is a positive integer; based on the above-mentioned N search starting points, the CP correlation calculation is performed on the target symbol of the corresponding half subframe in the above-mentioned signal to be demodulated to obtain N maximum correlations and corresponding starting point positions. Based on the above-mentioned N maximum correlations and corresponding starting point positions, the target correlation and the corresponding starting point position are determined. In a specific implementation, for example Figure 3 In S310, the symbol synchronization step based on CP: the present application can divide the length of the demodulated signal A according to the number of symbol points in the half-subframe, and obtain N search starting points, where N is a positive integer determined according to the actual situation. N threads start to calculate the correlation between the CP in the target symbol and the data corresponding to the CP cycle position in the symbol from these starting points (i.e., the half-subframe starting points), and search the length of the entire half-subframe in sequence, and output N (a group of) maximum correlations Corr_CP(n) and the corresponding starting position Pos_CP(n), where n represents the nth thread. The present application does not limit the calculation method of the above correlation, for example, it uses a cosine similarity calculation function or other similarity calculation formulas for calculation. The target symbol refers to a symbol in which a reference signal exists in the corresponding half-subframe.

[0083] When the above-mentioned signal synchronization method includes frame synchronization based on CP and SSB, the present application can perform sliding cross-correlation of N threads based on the pre-configured first reference signal and the starting positions corresponding to the above-mentioned N maximum correlations, and obtain N maximum frame synchronization correlations and corresponding starting positions. Based on the above-mentioned N maximum frame synchronization correlations and corresponding starting positions, the above-mentioned target correlation and corresponding starting position are determined. The above-mentioned target correlation is the correlation with the largest value among the above-mentioned N maximum frame synchronization correlations. In a specific implementation, for example Figure 3 In S312, the frame synchronization step based on CP and SSB: n1 corresponding to max (Corr_CP (n1)) is the thread with the largest correlation, and its corresponding Pos_CP (n1) is the starting position of a certain symbol. According to the half-subframe division process, each thread assumes that the starting position of each symbol in the half-subframe is the frame header, and uses the configured generated first reference signal (such as DMRS time domain reference signal) to perform sliding correlation at the corresponding position. The search length is one CP, and N maximum frame synchronization correlations Corr_RS (n) and the corresponding starting position Pos_RS (n) are obtained. For example, assuming that there is a reference signal at the position of symbol 2, the present application can search for complementary sliding correlations from the position of each symbol + delay (2), and delay (h) represents the number of time domain delay points from symbol h to symbol 0. In other words, the present application can start from the starting positions corresponding to the above-mentioned N maximum correlations, and use the first reference signal to perform sliding correlation calculations, thereby calculating N maximum frame synchronization correlations.

[0084] When the above-mentioned signal synchronization method includes frame synchronization based on CP and reference signal, the present application can perform sliding cross-correlation on the half-subframe threads corresponding to the above-mentioned N maximum correlations based on the pre-configured second reference signal to obtain N maximum frame synchronization correlations and corresponding starting positions. Based on the above-mentioned N maximum frame synchronization correlations and corresponding starting positions, the above-mentioned target correlation and corresponding starting position are determined. The above-mentioned target correlation is the correlation with the largest value among the above-mentioned N maximum frame synchronization correlations. In a specific implementation, for example Figure 3 In S313, the frame synchronization step based on CP and reference signal: n1 corresponding to max (Corr_CP (n1)) is the thread with the largest correlation, and its corresponding Pos_CP (n1) is the starting position of a symbol. The threads are divided according to half subframes, and each thread assumes that the starting position of each symbol in the subframe is the frame header. The second reference signal generated by the configuration (such as the time domain reference signal) is used for sliding cross-correlation at the corresponding position. The search length is one CP, and N maximum frame synchronization correlations Corr_RS (n) and the corresponding starting position Pos_RS (n) are obtained. It can be referred to the relevant introduction in the previous embodiment, which will not be repeated here.

[0085] When the above signal synchronization method includes frame synchronization based on a reference signal, the present application can divide the above signal to be demodulated based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer determined according to actual conditions; perform sliding cross-correlation based on the segmented signals corresponding to each of the above M search starting points and a pre-configured third reference signal, and determine the target correlation and the corresponding starting point position from the obtained M correlations, where the target correlation is the correlation with the largest value among the M correlations. In a specific implementation, for example Figure 3 In step S304, frame synchronization based on reference signal: the demodulated signal A is divided into M segments according to the number of CPU cores of the current machine, and each segment is slidingly correlated with the third reference signal (e.g., time domain reference signal) generated in the setup phase, thereby obtaining M correlations (maximum values) Corr_RS(n) and corresponding starting positions Pos_RS(n).

[0086] When the above-mentioned signal synchronization method includes frame synchronization based on SSB, the present application can divide the above-mentioned signal to be demodulated based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer determined according to actual conditions. Based on the segmented signals corresponding to each of the above-mentioned M search starting points and the pre-configured fourth reference signal, a sliding cross-correlation is performed, and the maximum correlation and the corresponding starting point position are determined from the M correlations obtained. Based on the pre-configured fifth reference signal, a sliding cross-correlation is performed starting from the starting point position corresponding to the maximum correlation in the above-mentioned signal to be demodulated, and the target correlation and the corresponding starting point position are determined from the obtained correlations, and the target correlation is the correlation with the largest value among the obtained correlations. In a specific implementation, for example Figure 3 S305-S306 in the above are based on SSB synchronization and frame synchronization. The SSB-based synchronization step in S305 includes: dividing the demodulated signal A into M segments according to the number of CPUs of the current machine, and slidingly correlating each segment with the fourth reference signal (e.g., time domain reference signal) generated in the setup phase, thereby obtaining M correlations (maximum values) Corr_PSS(n) and corresponding starting positions Pos_PSS(n).

[0087] S306 The frame synchronization step based on SSB includes: n1 corresponding to max (Corr_PSS (n1)) is the thread with the largest correlation, and its corresponding Pos_PSS (n1) is the starting position of a certain SSB. Since there are multiple groups of SSBs, their PSSs are the same, the present application can further use the pre-configured fifth reference signal (for example, the DMRS time domain reference signal of the PBCH in the SSB) to perform sliding correlation near the offset corresponding to the starting DMRS with Pos_PSS (n1) as the starting point, and obtain the correlation Corr_PSS (n) and the corresponding starting position Pos_PSS (n) of each SSB DMRS.

[0088] If the above signal synchronization mode is frame synchronization based on reference signal, and frame synchronization based on CP and reference signal, this application does not need to determine the type of the front and back half frames. If the above signal synchronization mode is frame synchronization based on SSB, and frame synchronization based on CP and SSB, this application needs to determine the type of the front and back half frames. In the specific implementation, for example Figure 3Step S307 of judging the front and back half frames: for example, when the SSB repetition period is 5ms, the SSB of the front and back half frames are exactly the same. Only relying on the SSB channel has the probability of finding that the frame header is actually the starting point of the second half frame, so another enabled channel is used as an aid. The n1 corresponding to max (Corr_PSS (n1)) is the thread with the largest correlation, and its corresponding Pos_PSS (n1) may be the frame header. The present application can perform sliding cross-correlation at the corresponding position of Pos_PSS (n1) and the Pos_PSS (n1) + half-frame position (possible position of the frame header) and other channel reference signals to obtain two correlations. The two positions with the largest correlations are the corresponding SSB positions, that is, the new target correlation Corr_RS (n) and the corresponding starting position Pos_RS (n).

[0089] Figure 3 In step S309, the frame header position summary calculation step: If there is no need to judge the front and back half frames, the present application can determine that Corr_RS(n)=Corr_PSS(n), Pos_RS(n)=Pos_PSS(n). The n1 corresponding to max(Corr_RS(n1)) is the thread corresponding to the target correlation. The corresponding Pos_RS(n1) is the starting position of the frame header.

[0090] In some embodiments, the specific implementation method of determining the frame header in the above-mentioned signal to be demodulated can be: determining the starting position corresponding to the above-mentioned target correlation as the initial frame header in the above-mentioned signal to be demodulated; determining the corresponding reference signal based on the initial frame header; upsampling and sliding cross-correlating the corresponding position in the above-mentioned signal to be demodulated based on the above-mentioned corresponding reference signal to obtain the final frame header in the above-mentioned signal to be demodulated. In the specific implementation, for example Figure 3 In the step of fine synchronization in S314: the present application can perform up-sampling based on the reference signal corresponding to each frame header and the corresponding position in the above-mentioned signal to be demodulated, and then perform sliding correlation to obtain a more accurate frame header position.

[0091] In the above step S103, the above signal demodulation may include coarse frequency offset estimation and compensation. The present application may upsample the data to be analyzed in the above signal to be demodulated, and downsample based on the frame header in the above signal to be demodulated to obtain the corresponding fine synchronization signal B. The above fine synchronization signal B is subjected to frequency domain fine delay estimation based on the pre-configured sixth reference signal to obtain the delay of the above fine synchronization signal. The present application may also perform coarse frequency offset estimation and coarse frequency offset compensation based on CP on the above fine synchronization signal to obtain the corresponding first compensation signal C. Specific embodiments may include Figure 3 Among S315-S317, S332 may be optionally included, as described below:

[0092] S315, data alignment step: The present application can divide the above-mentioned demodulated signal A according to the number of CPU cores of the electronic device to obtain M segmented signals. M threads are used to upsample the data to be analyzed in each segmented signal, and downsample from the frame header position found by fine synchronization, so as to obtain the corresponding fine synchronization signal B.

[0093] S332, channel power calculation step: This application uses an independent thread to calculate the channel power of the fine synchronization signal B, so as to obtain the channel power parameters of the corresponding channel.

[0094] S316, frequency domain precise delay estimation step: The present application uses a corresponding reference signal (eg, the sixth reference signal) in the frequency domain to perform precise delay calculation on the precise synchronization signal B, so as to correct the CP offset when calculating OFDM symbols.

[0095] S317, CP-based coarse frequency offset estimation step: This application divides multiple threads according to OFDM symbols. In each thread, the CP of each reference signal symbol in the frequency domain is divided by the data corresponding to the CP cyclic position in the symbol, and the phase difference pha_CP(n) of the OFDM symbol is obtained after averaging.

[0096] S318. CP-based coarse frequency deviation compensation step: This application averages the above phase difference pha_CP(n) and then converts it into frequency to obtain the corresponding coarse frequency deviation f_errCP=pha_CP / (2×PI×FFTN). Among them, f_errCP represents the coarse frequency deviation, PI represents pi, FFTN represents the pre-configured Fourier FFT point number, and FFT refers to the number of samples input in the pre-configured Fourier transform. In a specific implementation, this application can be divided into M threads according to the number of CPU cores of the electronic device, where M is the number of CPU cores of the electronic device. The above-mentioned fine synchronization signal B is divided into M segments, and the M segmented signals are reverse mixed according to the above-calculated coarse frequency deviation f_errCP to obtain the corresponding first compensation signal C.

[0097] The signal demodulation may include precise clock error estimation. The present application may perform symbol demodulation and precise clock error estimation on the first compensation signal C to obtain a corresponding precise clock error. Figure 3 As shown in steps S319-S321:

[0098] S319, precise clock error estimation and demodulation step: perform OFDM demodulation on the symbols involved in the precise clock error estimation in the first compensation signal C, that is, perform FFT conversion of each symbol data to the frequency domain at FFTN points, and each symbol supports independent thread demodulation.

[0099] S320, precise clock error estimation step: Each symbol is calculated by an independent thread. The application uses a phase estimation function to calculate the corresponding phase, and divides it by the number of points between the high-frequency and low-frequency parts (a and b) to obtain a clock phase pha_clock(n). The above phase estimation function is: phase=angle(data(a)×conj(ref(a)) / data(b)×conj(ref(b))); angle() represents the function from complex number to phase, data represents frequency domain data, ref represents frequency domain reference data generated in the configuration stage, and conj() represents the conjugate function. a and b represent the high-frequency part and low-frequency part of a symbol, respectively. According to the above principle, the clock phase pha_clock(n) corresponding to each symbol can be calculated.

[0100] For example, see Figure 4 FIG. 1 is a schematic diagram showing a signal time-frequency resource according to an exemplary embodiment. Figure 4 As shown, the black part indicates the position of the reference signal. The 0th reference signal is on symbol 2. To calculate its clock phase, only look at the column s=2. 0:2:10 is the low-frequency part of a, 0 indicates the starting position of the symbol, 2 indicates the step size, and 10 indicates the end position of the symbol. 12:2:22 is the high-frequency part of b, (2, 0) and (2, 12) are a group, (2, 2) and (2, 14) are a group, and the phase pha is calculated by the phase estimation function. Then the phase estimate corresponding to the precise clock here is pha_clock(0)= Σ(pha) / Σ(ba). The same is true for pha_clock(n) on other symbols, which will not be repeated here.

[0101] S321, precise clock error calculation step: the clock phase of each symbol in the previous step is calculated to be different from the clock phase of the first symbol, and then divided by the delay of the symbol to obtain the corresponding phase difference. For example, the phase corresponding to the clock error is pha_clock'=Σ(pha_clock (n)- pha_clock (0)) / Σ(delay(n)-delay(0)). Then the above phase difference is converted into frequency to obtain the clock error of each sampling point, for example, the clock error f_errclock=pha_clock' / (2×PI).

[0102] The above signal demodulation may include precise frequency offset estimation and compensation. The present application may perform symbol demodulation and precise frequency offset estimation based on a reference signal on the above first compensation signal to obtain a corresponding estimation result. The above estimation result is subjected to precise frequency offset compensation based on a reference signal to obtain a corresponding second compensation signal. Specific implementation examples include Figure 3 As shown in steps S322-S324:

[0103] S322, precise frequency offset estimation symbol demodulation step: OFDM demodulate the symbols involved in precise frequency offset estimation in the first compensation signal C and convert them into the frequency domain. Each symbol is an independent thread, and if the precise clock error can be calculated normally, the clock error can be compensated.

[0104] S323, precise frequency offset estimation step based on reference signal: each symbol is calculated by an independent thread, using a phase estimation function, where a and b are the points where the current reference signal symbol and the subsequent reference signal symbol overlap in the frequency domain, and the result is divided by the total number of points where the reference signal overlaps in the frequency domain to obtain an average phase pha_RS_sym(k). For example Figure 4 In the symbol 2 and symbol 7, their overlapping reference signal points in the frequency domain are 12:2:22, (2, 12) and (7, 12) are a group, (2, 14) and (7, 14) are a group. The amount of calculation on each symbol is different. 2 needs to be calculated with 6, 7, and 11 respectively, 6 needs to be calculated with 7 and 11 respectively, and 7 needs to be calculated with 11 to obtain an average phase. The difference between the starting positions of the two symbols delay_sym(k)=delay(k)-delay(n) is saved as the weight, and k is the symbol with the reference signal after n. The weighted average of the average phase is calculated to obtain the sum of the average phase calculated for the symbol pha_RS(n)=Σ(pha_RS_sym(k)), and the sum of the difference between the starting positions of the two symbols delay_RS(n)=Σ(delay_sym(k)).

[0105] S324, precise frequency deviation compensation step based on reference signal: average the phase pha_RS(n), and then convert it into frequency to obtain the corresponding precise frequency deviation f_errCP=Σ(pha_RS(n)) / Σ(delay_RS(n)) / fs. Wherein, fs represents the sampling rate of the current signal. The present application is divided into M threads according to the number of CPU cores of the electronic device, where M is the number of CPU cores. The present application divides the precise synchronization signal C into M segments, performs reverse mixing operations on the M segmented signals, and obtains a second compensation signal D.

[0106] The above signal demodulation may include rough clock error estimation. The present application may perform symbol demodulation and rough clock error estimation on the above second compensation signal D to obtain the corresponding rough clock error. Figure 3 As shown in steps S325-S327:

[0107] S325, determine whether a precise clock error estimation has been performed. If a precise clock error estimation has been performed before in this application, there is no need to perform a precise clock error estimation again. Otherwise, if a precise clock error estimation has not been performed, then step S326 may be continued.

[0108] S326, coarse clock error estimation and demodulation step: OFDM demodulation is performed on the symbols involved in the coarse clock error estimation in the second compensation signal D, and the symbols are converted to the frequency domain. Each symbol is executed in an independent thread.

[0109] S327, coarse clock error estimation step: For some signals with special configurations, the reference signal frequency domain is small, and the S321 method cannot be used to calculate the precise clock error. Therefore, a coarse clock error estimation method is used after frequency offset correction. The above phase estimation function is used to calculate the phase pha_coa(n) corresponding to a coarse clock error and the delay delay_coa(n)=delay(b)-delay(a) of two symbols corresponding to each point in the frequency domain, where a and b are points at the same position in the frequency domain of two symbols that are far apart, for example Figure 4 The phase of subcarrier I0 is calculated using (2,0) and (6,0), and that of subcarrier I12 is calculated using (2,12) and (11,12), etc., where subcarrier I0 and subcarrier I12 represent Figure 4 The signals corresponding to the 0th and 12th rows in the graph are shown in Figure 1. By counting all the points that can be calculated in the frequency domain, we can get the coarse clock error f_errclock'=Σ(pha_coa(n)) / Σ(delay_coa(n)).

[0110] In some optional embodiments, the present application may also perform any of the following steps or a combination of multiple steps: perform symbol demodulation on the symbols to be measured in the second compensation signal D to obtain a corresponding target demodulation signal. Perform channel demodulation on the target demodulation signal to obtain corresponding demodulation parameters. Perform data statistics / data aggregation on the demodulation information corresponding to the signal demodulation, and the demodulation information may at least include the demodulation parameters, various data generated in the multi-threaded signal demodulation, etc. Specific embodiments may be as follows: Figure 3 At least one of steps S328-S331:

[0111] S328, measurement symbol demodulation step: OFDM demodulation is performed on the symbol to be measured in the second compensation signal D to obtain a target demodulation signal E distributed according to the time-frequency resource grid. The time-frequency resource grid distribution can be specifically referred to Figure 4 As shown, no further description is given here.

[0112] S329, channel demodulation step: Each physical layer channel or signal occupies an independent thread for demodulation. These channels respectively occupy different resource grids on the above-mentioned target demodulation signal E, and can be processed simultaneously by multiple threads. The conventional demodulation process includes using the reference signal generated in the configuration phase to perform channel estimation, channel compensation, channel tracking and other steps to obtain the demodulation parameter data on the resource grid, which is not limited or detailed in this application. Optionally, symbol decision can be performed on the above-mentioned demodulation parameter data to obtain the corresponding decision result, which is not limited or detailed in this application.

[0113] S330, data statistics step: divided into M threads according to the number of CPU cores of the electronic device. Each thread calculates the intermediate calculation results of each subcarrier on multiple symbols, such as power, error vector magnitude (Error Vector Magnitude, EVM), frequency deviation, time deviation, error, etc., which are not limited or detailed in this application.

[0114] S331, statistical data aggregation step: finally integrate the results calculated by multiple threads, for example, merge the calculation results previously stored by symbol and frequency point according to the statistical range. For example, count the combined results previously counted by symbol according to slot (time slot), and calculate the root mean square (RMS) or find the peak value, etc., which is not limited in this application.

[0115] In practical applications, the above-mentioned OFDM symbol demodulation part involved in this application can be completed using the same functional module, and only different calculations need to be performed depending on whether there is clock error compensation. The same mixing functional module can be used to implement the above-mentioned frequency offset compensation. At present, electronic devices usually include 8 CPU cores (Core), that is, the number of CPU cores of electronic devices is 8. Each frame (data) includes 280 symbols, 20 half subframes, and the reference signal exists for more than 20 symbols. In most cases, the number of threads exceeds the number of CPU cores, and the 8 CPU cores can be fully utilized to achieve nearly 8 times acceleration.

[0116] By implementing the embodiments of the present application, the electronic device determines a signal synchronization mode, and the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on SSB, frame synchronization based on CP and SSB, and frame synchronization based on CP and a reference signal; synchronizes the signal to be demodulated based on the signal synchronization mode to obtain a frame header in the signal to be demodulated; performs multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; signal demodulation includes at least coarse frequency offset estimation and compensation, precise clock error estimation, precise frequency offset estimation and compensation, and coarse clock error estimation in sequence. In this way, a multi-threaded software processing method can be used to realize signal demodulation and measurement, which can not only improve CPU utilization, but also achieve better demodulation effects through multiple estimations and compensations. At the same time, it also solves the technical problems existing in the prior art such as high requirements for hardware equipment and high costs.

[0117] Based on the above examples, see Figure 5 FIG. 1 is a schematic diagram showing the structure of a signal demodulation device according to an exemplary embodiment. Figure 5 The device shown can be applied to an electronic device, and the device may include a processing module 501. Among them:

[0118] The processing module 501 is used to determine a signal synchronization mode, where the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on an SSB, frame synchronization based on a CP and an SSB, and frame synchronization based on a CP and a reference signal;

[0119] The processing module 501 is also used to synchronize the signal to be demodulated in a signal synchronization manner to obtain a frame header in the signal to be demodulated;

[0120] The processing module 501 is also used to perform multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, fine clock error estimation, fine frequency offset estimation and compensation, and coarse clock error estimation in sequence.

[0121] In some embodiments, the processing module 501 is specifically used to:

[0122] Based on the signal synchronization method, the correlation and starting point position of the half subframe of the to-be-demodulated signal are calculated to obtain the target correlation and the corresponding starting point position, wherein the starting point position is used to indicate the position of the half subframe in the to-be-demodulated signal that satisfies the target correlation;

[0123] When it is necessary to determine the type of the first and second half frames, sliding cross-correlation is performed on the starting position corresponding to the target correlation and the position of the next half frame of the starting position, and the position with the largest correlation is determined as the frame head in the signal to be demodulated;

[0124] When it is not necessary to determine the types of the front and back half frames, the starting point corresponding to the target correlation is determined as the frame header in the signal to be demodulated.

[0125] In some embodiments, the signal synchronization method further includes CP-based synchronization, and the processing module 501 is specifically used for:

[0126] Divide the signal to be demodulated according to the half subframe to obtain N search starting points, where N is a positive integer, and the search starting point is used to indicate the corresponding half subframe in the signal to be demodulated;

[0127] Based on N search starting points, CP correlation calculation is performed on the target symbol of the corresponding half subframe in the demodulated signal to obtain N maximum correlations and corresponding starting point positions, the target symbol is a symbol in which a reference signal exists in the corresponding half subframe, and the starting point position is used to indicate the position of the corresponding symbol;

[0128] Based on the N maximum correlations and the corresponding starting positions, a target correlation and a corresponding starting position are determined.

[0129] In some embodiments, if the signal synchronization mode includes frame synchronization based on CP and SSB, the processing module 501 is specifically used to:

[0130] Perform sliding cross-correlation based on the pre-configured first reference signal and the starting positions corresponding to the N maximum correlations, to obtain N maximum frame synchronization correlations and corresponding starting positions;

[0131] Based on the N maximum frame synchronization correlations and the corresponding starting positions, a target correlation and the corresponding starting position are determined, and the target correlation is the correlation with the largest value among the N maximum frame synchronization correlations.

[0132] In some embodiments, if the signal synchronization mode includes frame synchronization based on CP and reference signal, the processing module 501 is specifically used for:

[0133] Perform sliding cross-correlation based on the pre-configured second reference signal and the starting positions corresponding to the N maximum correlations, to obtain N maximum frame synchronization correlations and corresponding starting positions;

[0134] Based on the N maximum frame synchronization correlations and the corresponding starting positions, a target correlation and the corresponding starting position are determined, where the target correlation is the correlation with the largest value among the N maximum frame synchronization correlations.

[0135] In some embodiments, if the signal synchronization method includes frame synchronization based on a reference signal, the processing module 501 is specifically used to:

[0136] The signal to be demodulated is divided based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer;

[0137] Sliding cross-correlation is performed based on the segmented signals corresponding to each of the M search starting points and a pre-configured third reference signal, and a target correlation and a corresponding starting point position are determined from the obtained M correlations, wherein the target correlation is the correlation with the largest value among the M correlations.

[0138] In some embodiments, if the signal synchronization mode includes SSB-based frame synchronization, the processing module 501 is specifically used to:

[0139] The signal to be demodulated is divided based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer;

[0140] Perform sliding cross-correlation based on the segmented signals corresponding to the M search starting points and the pre-configured fourth reference signal, and determine the maximum correlation and the corresponding starting point position from the obtained M correlations;

[0141] A sliding cross-correlation is performed on the starting point position corresponding to the maximum correlation in the demodulated signal based on a pre-configured fifth reference signal, and a target correlation and a corresponding starting point position are determined from the obtained correlations.

[0142] In some embodiments, the processing module 501 is specifically used to:

[0143] The starting point position corresponding to the target correlation is determined as the initial frame header in the signal to be demodulated;

[0144] Determine a corresponding reference signal based on an initial frame header in the signal to be demodulated;

[0145] Based on the corresponding reference signal, up-sampling and sliding cross-correlation are performed on the corresponding position in the signal to be demodulated to obtain the final frame header in the signal to be demodulated.

[0146] In some embodiments, signal demodulation includes coarse frequency offset estimation and compensation, and the processing module 501 is specifically used to:

[0147] Up-sampling the data to be analyzed in the demodulated signal, and down-sampling based on the frame header in the demodulated signal to obtain a corresponding fine synchronization signal;

[0148] Performing frequency domain precise delay estimation on the precise synchronization signal based on a pre-configured sixth reference signal to obtain a delay of the precise synchronization signal;

[0149] A coarse frequency offset estimation and a coarse frequency offset compensation are performed on the fine synchronization signal based on the CP to obtain a corresponding first compensation signal.

[0150] In some embodiments, signal demodulation includes precise clock error estimation, and precise frequency offset estimation and compensation, and the processing module 501 is specifically used for:

[0151] Performing symbol demodulation and precise clock error estimation on the first compensation signal to obtain a corresponding precise clock error;

[0152] Performing symbol demodulation on the first compensation signal and performing precise frequency offset estimation based on the reference signal to obtain a corresponding estimation result;

[0153] The estimation result is subjected to precise frequency offset compensation based on the reference signal to obtain a corresponding second compensation signal.

[0154] In some embodiments, signal demodulation includes coarse clock error estimation, and the processing module 501 is specifically used to:

[0155] The second compensation signal is subjected to symbol demodulation and rough clock error estimation to obtain a corresponding rough clock error.

[0156] In some embodiments, the processing module 501 is further configured to:

[0157] Performing symbol demodulation on the symbol to be measured in the second compensation signal to obtain a corresponding target demodulated signal;

[0158] Perform channel demodulation on the target demodulation signal to obtain corresponding demodulation parameters;

[0159] Data statistics are performed on demodulation information corresponding to signal demodulation, where the demodulation information at least includes demodulation parameters and data generated in multi-threaded signal demodulation.

[0160] For the contents not introduced or described in the embodiments of the present invention, please refer to the relevant introduction in the aforementioned method embodiments, which will not be repeated here.

[0161] The present application also provides a computer-readable storage medium on which computer program instructions are stored. When the program instructions are executed by a processor, all or part of the steps in the above-mentioned signal demodulation method provided by the present application are implemented.

[0162] Figure 6 6 is a schematic diagram of a structure of an electronic device according to an exemplary embodiment. The electronic device 600 may include, but is not limited to, a mobile phone, a computer, a digital broadcast terminal, a message transceiver, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0163] Reference Figure 6 , the electronic device 600 may include one or more of the following components: a processing component 602 , a storage component 604 , a power component 606 , a multimedia component 608 , an audio component 610 , an input / output interface 612 , a sensor component 614 , and a communication component 616 .

[0164] The processing component 602 generally controls the overall operation of the device 600, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 602 may include one or more processors 620 to execute instructions to complete all or part of the steps of the above-mentioned signal demodulation method. In addition, the processing component 602 may include one or more modules to facilitate the interaction between the processing component 602 and other components. For example, the processing component 602 may include a multimedia module to facilitate the interaction between the multimedia component 608 and the processing component 602.

[0165] The storage component 604 is configured to store various types of data to support operations on the device 600. Examples of such data include instructions for any application or method operating on the device 600, contact data, phone book data, messages, pictures, videos, etc. The storage component 604 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0166] The power supply component 606 provides power to the various components of the device 600. The power supply component 606 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device 600.

[0167] The multimedia component 608 includes a screen that provides an output interface between the device 600 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 608 includes a front camera and / or a rear camera. When the electronic device 600 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0168] The audio component 610 is configured to output and / or input audio signals. For example, the audio component 610 includes a microphone (MIC), and when the device 600 is in an operation mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the storage component 604 or sent via the communication component 616. In some embodiments, the audio component 610 also includes a speaker for outputting audio signals.

[0169] The input / output interface 612 provides an interface between the processing component 602 and the peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0170] The sensor assembly 614 includes one or more sensors for providing various aspects of status assessment for the device 600. For example, the sensor assembly 614 can detect the open / closed state of the device 600, the relative positioning of components, such as the display and keypad of the device 600, and the sensor assembly 614 can also detect the position change of the device 600 or a component of the device 600, the presence or absence of user contact with the device 600, the orientation or acceleration / deceleration of the device 600, and the temperature change of the device 600. The sensor assembly 614 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 614 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 614 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0171] The communication component 616 is configured to facilitate wired or wireless communication between the device 600 and other devices. The device 600 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 616 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 616 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0172] In an exemplary embodiment, the device 600 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform all or part of the steps in the above-mentioned signal demodulation method.

[0173] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a storage component 604 including instructions, and the above instructions can be executed by the processor 620 of the device 600 to complete all or part of the steps in the above signal demodulation method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0174] In addition to being an independent electronic device, the above-mentioned device can also be a part of an independent electronic device. For example, in one embodiment, the device can be an integrated circuit (IC) or a chip, wherein the integrated circuit can be an IC or a collection of multiple ICs; the chip can include but is not limited to the following types: GPU (Graphics Processing Unit), CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), SOC (System on Chip, SoC, system on chip or system-level chip), etc. The above-mentioned integrated circuit or chip can be used to execute executable instructions (or codes) to implement all or part of the steps in the above-mentioned signal demodulation method. The executable instructions can be stored in the integrated circuit or chip, or can be obtained from other devices or equipment, for example, the integrated circuit or chip includes a processor, a memory, and an interface for communicating with other devices. The executable instructions can be stored in the memory, and when the executable instructions are executed by the processor, all or part of the steps in the above-mentioned signal demodulation method are implemented. Alternatively, the integrated circuit or chip may receive executable instructions through the interface and transmit the instructions to the processor for execution, so as to implement all or part of the steps in the above signal demodulation method.

[0175] In another exemplary embodiment, a computer program product is further provided. The computer program product includes a computer program executable by a programmable device. When the computer program is executed by the programmable device, the computer program is used to execute all or part of the steps in the above signal demodulation method.

[0176] See also Figure 7 FIG. 1 is a schematic diagram showing the structure of a chip according to an exemplary embodiment. Figure 7 The chip 700 shown includes a processor 701 and an interface 702. Optionally, it may also include a memory 703. The number of the processor 701 may be one or more, and the number of the interface 702 may be more than one.

[0177] In one embodiment, for a chip used to implement an embodiment of the method of the present application:

[0178] Interface 702, used to receive or output signals;

[0179] The processor 701 is used to execute part or all of the contents in the signal demodulation method embodiment.

[0180] Understandably, the processor in the embodiment of the present application may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment may be completed by an integrated logic circuit of hardware in the processor or instructions in the form of software. The above processor may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0181] It is understandable that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0182] It should be noted here that the description of the above storage medium, device and chip embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium, storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0183] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the present application. The present application is intended to cover any variations, uses or adaptations of the present application, which follow the general principles of the present application and include common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0184] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A signal demodulation method, characterized in that: include: Determine a signal synchronization mode, where the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on an SSB, frame synchronization based on a CP and an SSB, and frame synchronization based on a CP and a reference signal; Based on the signal synchronization method, the correlation and starting point position of the half subframe of the signal to be demodulated are calculated to obtain a target correlation and a corresponding starting point position, wherein the starting point position is used to indicate the position of the half subframe in the signal to be demodulated that satisfies the target correlation; When it is necessary to determine the types of the front and back half frames, sliding cross-correlation is performed on the starting position corresponding to the target correlation and the position of the next half frame of the starting position, and the position with the largest correlation is determined as the frame head in the signal to be demodulated; When it is not necessary to determine the types of the front and back half frames, determining the starting point position corresponding to the target correlation as the frame head in the signal to be demodulated; Multi-threaded signal demodulation is performed based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, fine clock error estimation, fine frequency offset estimation and compensation, and coarse clock error estimation in sequence.

2. The method according to claim 1, characterized in that: The signal synchronization method further includes synchronization based on CP, and the calculation of the correlation and starting point position of a half subframe of the demodulated signal based on the signal synchronization method to obtain the target correlation and the corresponding starting point position includes: Divide the signal to be demodulated according to half subframes to obtain N search starting points, where N is a positive integer, and the search starting points are used to indicate the corresponding half subframes in the signal to be demodulated; Based on the N search starting points, CP correlation calculation is performed on the target symbol of the corresponding half subframe in the signal to be demodulated to obtain N maximum correlations and corresponding starting point positions, wherein the target symbol is a symbol in which a reference signal exists in the corresponding half subframe, and the starting point position is used to indicate the position of the corresponding symbol; Based on the N maximum correlations and the corresponding starting positions, the target correlation and the corresponding starting position are determined.

3. The method according to claim 2, characterized in that If the signal synchronization mode includes frame synchronization based on CP and SSB, then determining the target correlation and the corresponding starting position based on the N maximum correlations and the corresponding starting positions includes: Perform sliding cross-correlation based on the pre-configured first reference signal and the starting positions corresponding to the N maximum correlations, to obtain N maximum frame synchronization correlations and corresponding starting positions; Based on the N maximum frame synchronization correlations and the corresponding starting positions, the target correlation and the corresponding starting position are determined, and the target correlation is the correlation with the largest value among the N maximum frame synchronization correlations.

4. The method according to claim 2, characterized in that: If the signal synchronization mode includes frame synchronization based on CP and reference signal, then determining the target correlation and the corresponding starting position based on the N maximum correlations and the corresponding starting positions includes: Perform sliding cross-correlation based on the pre-configured second reference signal and the starting positions corresponding to the N maximum correlations, to obtain N maximum frame synchronization correlations and corresponding starting positions; Based on the N maximum frame synchronization correlations and the corresponding starting positions, the target correlation and the corresponding starting position are determined, and the target correlation is the correlation with the largest value among the N maximum frame synchronization correlations.

5. The method according to claim 1, characterized in that If the signal synchronization method includes frame synchronization based on a reference signal, then the calculation of the correlation and starting point position of a half subframe of the demodulated signal based on the signal synchronization method to obtain the target correlation and the corresponding starting point position includes: Dividing the signal to be demodulated based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer; Sliding cross-correlation is performed based on the segmented signals corresponding to each of the M search starting points and a pre-configured third reference signal, and a target correlation and a corresponding starting point position are determined from the obtained M correlations, wherein the target correlation is the correlation with the largest value among the M correlations.

6. The method according to claim 1, characterized in that If the signal synchronization method includes frame synchronization based on SSB, then the calculation of the correlation and starting point position of a half subframe of the demodulated signal based on the signal synchronization method to obtain the target correlation and the corresponding starting point position includes: Dividing the signal to be demodulated based on the number of CPU cores of the electronic device to obtain M search starting points, where M is a positive integer; Perform sliding cross-correlation based on the segmented signals corresponding to the M search starting points and a pre-configured fourth reference signal, and determine the maximum correlation and the corresponding starting point position from the obtained M correlations; A sliding cross-correlation is performed on the starting point position corresponding to the maximum correlation in the signal to be demodulated based on a pre-configured fifth reference signal, and the target correlation and the corresponding starting point position are determined from the obtained correlation.

7. The method according to claim 1, characterized in that The step of determining the starting point position corresponding to the target correlation as the frame header in the signal to be demodulated comprises: Determine the starting point position corresponding to the target correlation as the initial frame header in the signal to be demodulated; Determine a corresponding reference signal based on an initial frame header in the signal to be demodulated; Based on the corresponding reference signal, up-sampling and sliding cross-correlation are performed on the corresponding position in the signal to be demodulated to obtain a final frame header in the signal to be demodulated.

8. The method according to claim 1, characterized in that The signal demodulation includes coarse frequency offset estimation and compensation, and the multi-threaded signal demodulation is performed based on the frame header in the signal to be demodulated to obtain corresponding demodulation information, including: Up-sampling the data to be analyzed in the signal to be demodulated, and down-sampling based on the frame header in the signal to be demodulated to obtain a corresponding fine synchronization signal; Performing frequency domain precise delay estimation on the precise synchronization signal based on a pre-configured sixth reference signal to obtain a delay of the precise synchronization signal; A coarse frequency offset estimation and a coarse frequency offset compensation are performed on the fine synchronization signal based on the CP to obtain a corresponding first compensation signal.

9. The method according to claim 8, characterized in that The signal demodulation includes precise clock error estimation, precise frequency offset estimation and compensation, and the multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain the corresponding demodulation information also includes: Performing symbol demodulation and precise clock error estimation on the first compensation signal to obtain a corresponding precise clock error; Performing symbol demodulation on the first compensation signal and performing precise frequency offset estimation based on a reference signal to obtain a corresponding estimation result; The estimation result is subjected to precise frequency offset compensation based on a reference signal to obtain a corresponding second compensation signal.

10. The method according to claim 9, characterized in that The signal demodulation includes rough clock error estimation, and the multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information also includes: Symbol demodulation and coarse clock error estimation are performed on the second compensation signal to obtain a corresponding coarse clock error.

11. The method according to any one of claims 9 to 10, characterized in that: The performing multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information further includes: Performing symbol demodulation on the symbol to be measured in the second compensation signal to obtain a corresponding target demodulated signal; Performing channel demodulation on the target demodulation signal to obtain corresponding demodulation parameters; Data statistics are performed on demodulation information corresponding to the signal demodulation, where the demodulation information includes the demodulation parameters and data generated in the multi-threaded signal demodulation.

12. A signal demodulation device, characterized in that: include: A processing module, used to determine a signal synchronization mode, wherein the signal synchronization mode includes at least one of frame synchronization based on a reference signal, frame synchronization based on an SSB, frame synchronization based on a CP and an SSB, and frame synchronization based on a CP and a reference signal; The processing module is further used to calculate the correlation and starting position of the half subframe of the signal to be demodulated based on the signal synchronization mode, and obtain the target correlation and the corresponding starting position, wherein the starting position is used to indicate the position of the half subframe that satisfies the target correlation in the signal to be demodulated; when it is necessary to determine the type of the front and rear half frames, respectively perform sliding cross-correlation on the starting position corresponding to the target correlation and the position of the next half frame of the starting position, and determine the position with the largest correlation as the frame head in the signal to be demodulated; When it is not necessary to determine the types of the front and back half frames, determining the starting point position corresponding to the target correlation as the frame head in the signal to be demodulated; The processing module is also used to perform multi-threaded signal demodulation based on the frame header in the signal to be demodulated to obtain corresponding demodulation information; the signal demodulation includes at least coarse frequency offset estimation and compensation, fine clock error estimation, fine frequency offset estimation and compensation, and coarse clock error estimation in sequence.

13. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to execute the executable instructions to implement the steps of the method described in any one of claims 1 to 11.

14. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the program instructions are executed by a processor, the steps of the method described in any one of claims 1 to 11 are implemented.

Images