Display panel and display device

Abstract

The application provides a display panel, wherein the display panel has a display area, an opening area and an isolation area, the isolation area at least partially surrounds the opening area, and the display area at least partially surrounds the isolation area; the display panel comprises a substrate located in the display area and the isolation area; an inorganic insulating layer is arranged on one side of the substrate and extends from the display area to the isolation area; an insulating isolation layer is located on the side of the inorganic insulating layer away from the substrate, extends from the display area to the isolation area, and is disconnected at the isolation area, so that a first isolation cavity is formed between the disconnected positions.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are active-matrix display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, and fast response speed. With the continuous development of display technology, OLED technology is increasingly being used in various display devices, especially smart terminal products such as mobile phones and tablets.

[0003] As the application scenarios for display panels gradually increase, the demands on the display effect and performance of these panels are also rising. To adapt to different application scenarios, display devices often require perforations to accommodate devices such as cameras and sensors. However, perforation of display panels can easily cause GDSH (Growing Dark Spot at HIAA, caused by moisture oxidation in the opening area due to defects such as cracks, scratches, or top damage resulting from encapsulation or external forces). Therefore, reliability testing of display panels is a crucial indicator for determining whether a product can be mass-produced, and avoiding GDSH is a major challenge facing display panels. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a display panel and display device that overcomes or at least partially solves the above problems.

[0005] In view of the above objectives, a first aspect of this application provides a display panel having a display area, an opening area, and an isolation area, wherein the isolation area at least partially surrounds the opening area, and the display area at least partially surrounds the isolation area;

[0006] The display panel includes a substrate located in the display area and the isolation area;

[0007] An inorganic insulating layer is disposed on one side of the substrate and extends from the display area to the isolation area;

[0008] An insulating isolation layer is located on the side of the inorganic insulating layer away from the substrate, extending from the display area to the isolation area, and the insulating isolation layer is disconnected at the isolation area, forming a first isolation cavity between the disconnections.

[0009] In some embodiments, the distance between the side of the break in the insulating layer away from the substrate and the inorganic insulating layer is not less than the thickness of the insulating layer.

[0010] In some embodiments, the break in the insulating layer extends away from the inorganic insulating layer, and the angle between the direction of the break and the plane of the inorganic insulating layer is no greater than 90°.

[0011] In some embodiments, the orthographic projection of the insulating isolation layer onto the substrate at least partially covers the orthographic projection of the first isolation cavity onto the substrate, and the first isolation cavity has a trapezoidal cross-sectional shape perpendicular to the substrate.

[0012] In some embodiments, the inorganic insulating layer is provided with a second isolation cavity, the orthographic projection of the second isolation cavity onto the substrate being located within the orthographic projection range of the first isolation cavity onto the substrate.

[0013] In some embodiments, the depth of the second isolation cavity is less than the thickness of the inorganic insulating layer.

[0014] In some embodiments, the display area further includes a pixel circuit, the pixel circuit including a transistor structure, the transistor structure including at least a first electrode, a first active layer and a second electrode layer;

[0015] The inorganic insulating layer includes at least a first insulating layer, a second insulating layer, and a third insulating layer;

[0016] The first insulating layer is located between the substrate and the first electrode, the second insulating layer is located between the first electrode and the first active layer, and the third insulating layer is located between the first active layer and the second electrode layer;

[0017] The first isolation cavity is disposed in the same layer as the second electrode layer.

[0018] In some embodiments, the isolation region includes at least a first metal layer and a second active layer;

[0019] The first metal layer is located between the first insulating layer and the second insulating layer, and the second active layer is located between the second insulating layer and the third insulating layer;

[0020] The first metal layer is disposed on the same layer as the first electrode, the second active layer is disposed on the same layer as the first active layer, the orthographic projection of the first metal layer on the substrate is located within the orthographic projection range of the second active layer on the substrate, and the first isolation cavity is perpendicular to the substrate and corresponds to the first metal layer.

[0021] The first metal layer and the first electrode are formed using the same mask, and the second active layer and the first active layer are formed using the same mask.

[0022] In some embodiments, there is at least one first isolation cavity, and at least one first isolation cavity is arranged from the side of the isolation area near the display area toward the side of the opening area.

[0023] A second aspect of this application provides a display device including a display panel as described in the first aspect.

[0024] As can be seen from the above, the display panel provided in this application, by using an isolation cavity formed between the breaks in the insulating isolation layer to replace the metal isolation pillars in the related technology, does not significantly change the overall film layer of the display panel, only altering the film layer coverage relationship (the coverage of the insulating isolation layer). By using the first isolation cavity to replace the original isolation pillar design, the cathode layer of the display area and the cathode layer of the isolation area are disconnected, preventing the isolation area of ​​the display panel from absorbing potassium ions from the polarizer and undergoing a chemical reaction during reliability testing. This avoids corrosion of the cathode layer of the display panel, thereby preventing the sealing failure at the boundary between the isolation areas of the display area and the isolation area, avoiding the phenomenon of display black spots between the isolation areas of the display area, improving the GDSH resistance of the display panel, and enhancing the display effect and service life of the display panel.

[0025] On the other hand, by using the first isolation cavity and the second electrode layer of the display area to be set in the same layer, the isolation pillar required for the preparation of the first isolation cavity is completed during the preparation of the second electrode. No additional isolation pillar design is required, and the function of separating the cathode layer of the display area and the isolation area can be achieved with the existing photomask and process flow.

[0026] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and in order to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the structure of the light-emitting unit of the display panel in an embodiment of this application;

[0029] Figure 2 This is a top view schematic diagram of the display panel according to an embodiment of this application;

[0030] Figure 3This is a schematic diagram of a type of isolation column structure in related technologies;

[0031] Figure 4 This is a schematic diagram of another type of isolation column structure in related technologies;

[0032] Figure 5 This is a schematic cross-sectional view of a display panel structure according to an embodiment of this application;

[0033] Figure 6 This is a schematic cross-sectional view of another display panel structure according to an embodiment of this application;

[0034] Figure 7 This is a schematic diagram of another initial film layer structure of a display panel according to an embodiment of this application;

[0035] Figure 8 This is a schematic diagram showing the position of the photoresist in another embodiment of this application.

[0036] Figure 9 This is a cross-sectional schematic diagram of another display panel structure according to an embodiment of this application;

[0037] Figure 10 This is a partial cross-sectional view of one embodiment of the display area of ​​the display panel according to this application.

[0038] Figure 11 This is a top view of the distribution of the first isolation cavities in the display panel according to an embodiment of this application;

[0039] Figure 12 This is a flowchart of a display panel fabrication method according to an embodiment of this application. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0041] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0042] In related technologies, OLED display panels include an organic material layer, wherein the organic material layer includes multiple light-emitting units, and the light-emitting units may include one or more light-emitting devices connected in series. The light-emitting devices may be organic light-emitting diodes, and the light-emitting side of the light-emitting device may include an anode, a light-emitting functional layer and a cathode stacked in one step. By applying an electrical signal to the anode and the cathode, the organic material layer can be driven to emit light.

[0043] In this system, the organic material layer of each light-emitting device can achieve color display by emitting monochromatic or white light in conjunction with a color filter. That is, all light-emitting devices share the same continuous organic material layer, which can emit white light or other monochromatic light. The color filter layer has multiple filters that correspond one-to-one with the light-emitting units. One filter and its corresponding light-emitting unit constitute a sub-pixel, and multiple sub-pixels constitute a pixel unit. Different filters can transmit different colors of light, allowing different sub-pixels to emit different colors. A single pixel unit includes multiple sub-pixels of different colors; for example, a pixel unit can include three sub-pixels emitting red, green, and blue light respectively.

[0044] In related technologies, the organic material layer is a continuous, monolithic structure, which makes it easy for leakage to occur between one light-emitting unit and surrounding light-emitting units, causing color crosstalk. Each light-emitting unit may include multiple light-emitting devices connected in series. The light-emitting devices in the same light-emitting unit share an anode and a cathode, and there are multiple light-emitting sub-layers between the anode and the cathode. At least two adjacent light-emitting sub-layers can be connected in series through a charge generation layer. Positive charges (holes) can be transferred between two adjacent light-emitting units through the charge generation layer. For example, when the light-emitting unit in the red filter section of the corresponding color filter layer emits light, due to the influence of leakage, the light-emitting unit in the green filter section of the corresponding color filter layer will also emit light, resulting in a decrease in the light emission purity of a single pixel and a decrease in the color gamut of the entire display panel.

[0045] refer to Figure 1 The diagram shown is a schematic representation of the structure of a light-emitting unit in an OLED display panel in the related technology. The light-emitting unit may include multiple light-emitting devices connected in series. Each light-emitting unit includes an anode (ANO), a cathode (CAT), and multiple light-emitting sublayers (OLPs) between the anode and cathode. The light-emitting devices (LDs) within the same light-emitting unit can share the same anode and the same cathode; that is, the same light-emitting unit can have only one anode and one cathode.

[0046] In some exemplary embodiments, reference is made to Figure 1 As shown, the organic material layer may include multiple sub-layers OLP connected in series. At least one sub-layer OLP is connected in series with an adjacent sub-layer OLP through a charge generation layer CLG. When an electrical signal is applied to the anode, each sub-layer OLP can emit light, and different sub-layer OLPs emit light of different colors.

[0047] In some exemplary embodiments, any sub-layer OLP may include a stacked hole injection layer (HIL), a hole transport layer (HTL), an emitting layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The number of hole injection layers, hole transport layers, electron transport layers, and electron injection layers is not specifically limited, and adjacent emitting sub-layer OLPs may share one or more of the hole injection layer, hole transport layer, electron transport layer, and electron injection layer. Furthermore, a charge generation layer (CLG) may be provided between at least two adjacent sub-layer OLPs, thereby connecting the two adjacent sub-layer OLPs in series.

[0048] In some embodiments, reference Figure 1As shown, the organic material layer may include three sublayers of different colors, namely, a first sublayer OLPr emitting red light, a second sublayer OLPg emitting green light, and a third sublayer OLPb emitting blue light. When the first sublayer OLPr, the second sublayer OLPg, and the third sublayer OLPb emit light simultaneously, the organic material layer OL emits white light. The first sublayer OLPr and the second sublayer OLPg share a hole injection layer HIL, a hole transport layer HTL1, an electron transport layer ETL2, and an electron injection layer EIL. The luminescent material layer G-EML of the second sublayer OLPg is disposed on the surface of the luminescent material layer R-EML of the first sublayer OLPr, thereby allowing the first sublayer OLPr and the second sublayer OLPg to be directly connected in series without the need for a dedicated charge generation layer. A charge generation layer CGL may be disposed on the surface of the second sublayer OLPg. The third sublayer OLPb shares an electron injection layer EIL with the first sublayer OLPr and the second sublayer OLPg. The hole injection layer HIL2 of the third sublayer OLPb is disposed on the surface of the charge generation layer CGL. The hole transport layers HTL2 and HTL3 of the third sublayer OLPb are stacked on one side of the surface of the charge generation layer CGL, and the third sublayer OLPb can be connected in series with the second sublayer OLPg and the first sublayer OLPr through the charge generation layer CGL. In addition, a hole first insulating layer HBL can be disposed between the electron transport layer HYL of the third sublayer OLPb and the luminescent material layer BEML.

[0049] In some embodiments, since each light-emitting unit shares an organic material layer, charge carriers (e.g., holes) in one light-emitting unit may move to other light-emitting units through the charge generation layer CLG or other film layers, especially to adjacent light-emitting units, which causes leakage and cross-coloring.

[0050] In related technologies, refer to Figure 2 and Figure 3As shown, the OLED display panel has an opening area 300 within the display area 100, which is used to mount a camera. An inorganic insulating layer 2 extending from the display area 100 to the isolation area 200 is formed on the substrate 1. Metal isolation pillars 10 are formed within the inorganic insulating layer 2 within the isolation area 200. The isolation pillars 10 separate the organic material of the isolation area 200 extending from the display area 100 to the periphery of the via from the cathode layer. The metal isolation pillars 10 are typically composed of three metal layers: titanium-aluminum-titanium. During the formation of the isolation pillars 10, wet etching is typically used. The Etch method forms an undercut structure for the isolation pillar 10. However, even with an undercut structure, the metal material of the isolation pillar 10 may still cause the cathode to be connected through the isolation pillar 10 during the cathode fabrication process, making it impossible to completely disconnect the power. On the side of the isolation pillar 10 away from the organic material layer, there is also an encapsulation layer and a polarizer extending from the display area 100 to the isolation area 200. Potassium ions and water vapor in the polarizer enter the isolation area 200 along the edge of the through hole. In reliability testing, positively charged potassium ions are adsorbed on the isolation pillar 10. After water vapor enters, it will electrolyze to produce hydroxide ions. The hydroxide ions combine with potassium ions to form a strongly alkaline environment, which corrodes the cathode layer of the display panel, causing the cathode layer to expand and form holes. This leads to the failure of the encapsulation layer at the boundary between the isolation area 200 and the display area 100, resulting in a display black spot phenomenon (GDSH) at the boundary between the isolation area 200 and the display area 100.

[0051] In addition, refer to Figure 4 As shown, in related technologies, an insulating isolation layer 3 is formed on the upper surface of the isolation pillar 10. It is usually composed of an insulating isolation layer 3-aluminum-titanium. However, the insulating isolation layer 3 does not completely cover the isolation pillar 10. Since there is aluminum in the isolation pillar 10, during the preparation of the anode, since the isolation region 200 does not need an anode, during the etching process of the anode, the Ag ions in the etching solution will react with the aluminum and expand. As a result, during the preparation of the cathode, the cathode will still be connected through the isolation pillar 10, and it is impossible to completely cut off the power. The boundary between the isolation region 200 and the display region 100 will still show a display black spot phenomenon (GDSH).

[0052] To address the issue that the isolation pillar 10 cannot effectively de-energize the cathode during reliability testing, resulting in black spots still appearing at the boundary between the isolation area 200 and the display area 100, reference is made to... Figures 5 to 9As shown, this application provides a display panel, which has a display area 100, an opening area 300 and an isolation area 200, wherein the isolation area 200 at least partially surrounds the opening area 300 and the display area 100 at least partially surrounds the isolation area 200; the display panel includes a substrate 1 located in the display area 100 and the isolation area 200; an inorganic insulating layer 2 disposed on one side of the substrate 1 and extending from the display area 100 to the isolation area 200; and an insulating isolation layer 3 located on the side of the inorganic insulating layer 2 away from the substrate, extending from the display area 100 to the isolation area 200, wherein the insulating isolation layer 3 is disconnected at the isolation area 200, and a first isolation cavity 31 is formed between the disconnection points.

[0053] By utilizing the insulating isolation layer 3 and the first isolation cavity 31 formed at the break point of the insulating isolation layer 3 in the isolation area 200, during the cathode preparation process, the first isolation cavity 31 formed by utilizing the height difference of the break point not only blocks the cathode layer of the isolation area 200 extending from the display area 100 to the periphery of the opening area 300, but also avoids the conductive connection between the cathode and the isolation pillar 10. This prevents the isolation area 200 of the display panel from becoming a charged electrode during reliability testing, thereby preventing the chemical substances in the polarizer of the display panel from reacting, further preventing corrosion of the cathode layer of the display panel, and thus preventing the sealing failure at the boundary between the display area 100 and the isolation area 200, and preventing the appearance of display black spots between the display area 100 and the isolation area 200.

[0054] Furthermore, compared with related technologies, there are fewer changes to the original film layers of the display panel, which is beneficial for design. Only the coating relationship of the film layers is changed, that is, the insulating isolation layer 3 forms an isolation cavity to replace the isolation pillar 10. Without adding too many additional photomasks, production capacity is effectively increased. At the same time, there are fewer changes to the overall structure of the display panel, and there is no impact on the overall performance.

[0055] In some exemplary embodiments, the insulating layer 3 and the inorganic insulating layer 2 can be inorganic non-metallic materials. For example, the insulating layer 3 and the inorganic insulating layer 2 can be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and can be a single layer, multiple layers, or composite layers.

[0056] In some embodiments, reference Figure 5 As shown, the distance between the side of the break in the insulating layer 3 away from the substrate 1 and the inorganic insulating layer 2 is not less than the thickness of the insulating layer 3.

[0057] In some optional embodiments, the distance between the side of the break in the insulating isolation layer 3 away from the substrate 1 and the inorganic insulating layer 2 is not less than the thickness of the insulating isolation layer 3. This can be because the film layer of the insulating isolation layer 3 at the break is thicker, or it can extend away from the inorganic insulating layer 2 at the break.

[0058] In some embodiments, when the insulating layer 3 is thicker at the break point, the height difference between the insulating layer and the inorganic insulating layer 2 at the break point is greater. This greater height difference increases the height of the isolation cavity, thus helping to disconnect the organic material layer and cathode extending from the display area 100 to the isolation area 200. However, during the subsequent fabrication of the organic material layer and cathode layer, the greater height difference results in poorer cathode continuity at this point. The cathode is disconnected at the break point, and the disconnected cathode is uncharged. Therefore, potassium ions in the polarizer will not be adsorbed, and no chemical reaction will occur, leading to cathode corrosion. This further causes the encapsulation at the boundary between the display area 100 and the isolation area 200 to fail. This improves the display panel's resistance to GDSH.

[0059] In some embodiments, reference Figure 6 As shown, the break point of the insulating isolation layer 3 extends away from the inorganic insulating layer 2, and the angle between the extension direction of the break point and the plane where the inorganic insulating layer 2 is located is no greater than 90°.

[0060] In this embodiment, through the above-mentioned settings, the height difference between the insulating isolation layer 3 and the inorganic insulating layer 2 at the break point is greater. During the subsequent preparation of the organic material layer and the cathode layer, the greater height difference makes the continuity of the cathode worse at this point. That is, the cathode is broken at the break point. The broken cathode is not charged, so potassium ions in the polarizer will not be adsorbed, and no chemical reaction will occur at the cathode, which will lead to cathode corrosion. This will further cause the sealing failure of the boundary between the display area 100 and the isolation area 200, thereby improving the display panel's resistance to GDSH.

[0061] In some alternative embodiments, the angle between the extension direction of the break point and the plane containing the inorganic insulating layer 2 is between 0° and 90°. That is, the two break points can extend away from the inorganic insulating layer 2 and towards the center, or they can extend away from the inorganic insulating layer 2 and in opposite directions. No specific limitation is made here. As long as a height difference can be formed between the break point and the inorganic insulating layer 2, it is acceptable.

[0062] In some embodiments, the orthographic projection of the insulating isolation layer 3 onto the substrate 1 at least partially covers the orthographic projection of the first isolation cavity 31 onto the substrate 1, and the cross-sectional shape of the first isolation cavity 31 perpendicular to the substrate 1 is trapezoidal.

[0063] In this embodiment, the two disconnections are further defined to extend away from the inorganic insulating layer 2 and toward the center. Here, an undercut structure is formed between the insulating isolation layer 3 and the isolation cavity. In the process of preparing the organic material layer and the cathode layer, the vapor deposition method is generally used. On the one hand, the height difference between the disconnection point and the inorganic insulating layer 2 realizes the disconnection between the organic material layer and the cathode layer at the disconnection point. On the other hand, the undercut structure prevents the organic material layer and the cathode layer from being deposited at this point during the preparation process, further realizing the disconnection between the organic material layer and the cathode layer at this point.

[0064] In addition, compared to the above embodiment where the break point of the insulating isolation layer 3 extends away from the inorganic insulating layer 2 and in the opposite direction, in the manufacturing process, the trapezoidal undercut structure of the first isolation cavity 31 in this embodiment is easier to manufacture.

[0065] In this embodiment, the fabrication process can be carried out through the following steps: a substrate 1 is provided, an inorganic insulating layer 2 is prepared on one side of the substrate 1, an isolation pillar 10 is prepared on the side of the inorganic insulating layer 2 away from the substrate 1 at a position corresponding to the first isolation cavity 31, wherein the isolation pillar 10 is trapezoidal, an insulating isolation layer 3 is prepared on the side of the isolation pillar 10 away from the substrate 1, photoresist 51 is laid on the insulating isolation layer 3 at other positions different from the first isolation cavity 31, and the corresponding position of the first isolation cavity 31 is exposed and developed, the insulating isolation layer 3 at the corresponding position of the first isolation cavity 31 is etched, and the isolation pillar 10 is etched. Since the disconnection of the insulating isolation layer 3 is formed at this time, the insulating isolation layer 3 forms an undercut structure. During the etching process of the isolation pillar 10, both dry etching and wet etching methods can be used to etch the isolation pillar 10, forming the first isolation cavity 31 with a trapezoidal cross-sectional shape in this embodiment.

[0066] In some embodiments, reference Figure 6 As shown, the inorganic insulating layer 2 is provided with a second isolation cavity 21, and the orthographic projection of the second isolation cavity 21 onto the substrate 1 is located within the orthographic projection range of the first isolation cavity 31 onto the substrate 1.

[0067] In this embodiment, the height difference between the break point of the insulating isolation layer 3 and the inorganic insulating layer 2 is first used to achieve the disconnection between the organic material layer and the cathode layer, thereby achieving the power-off effect. In order to further improve the height difference, a second isolation cavity 21 is prepared at the position of the inorganic insulating layer 2 corresponding to the first isolation cavity 31. This is equivalent to forming a height difference at the position of the first isolation cavity 31 and adding a height difference formed at the position of the second isolation cavity 21, so that the organic material layer and the cathode layer are disconnected under the action of the height difference, thus achieving the disconnection between the organic material layer and the cathode layer. This can also improve the ability of the display panel to suppress the GDSH phenomenon and improve the display effect of the display panel.

[0068] It is understandable that the second isolation cavity 21 is located in the isolation area 200. In the process of forming the second isolation cavity 21, the other film layers of the display panel are not affected. It is only prepared by increasing the etching, or by directly etching with the isolation insulating layer or the isolation pillar 10 using the same mask. The existing process can be achieved without affecting the existing overall film layers of the display panel, and it has no impact on the overall performance of the display panel.

[0069] In some embodiments, the depth of the second isolation cavity 21 is less than the thickness of the inorganic insulating layer 2. Both the inorganic insulating layer 2 and the insulating isolation layer 3 can be made of inorganic insulating materials. Fabricating the second cavity within the inorganic insulating layer 2 will not affect the overall performance of the display panel, nor will it alter the overall film structure of the display panel. However, if the depth of the second isolation cavity 21 is too large and penetrates the inorganic insulating layer 2, it may interfere with the fabrication of other film layers.

[0070] In some embodiments, reference Figures 7 to 10 As shown, the display area 100 also includes a pixel circuit, which includes a transistor structure. The transistor structure includes at least a first electrode 11, a first active layer 12, and a second electrode layer 13. The inorganic insulating layer 2 includes at least a first insulating layer 14, a second insulating layer 15, and a third insulating layer 16. The first insulating layer 14 is located between the substrate 1 and the first electrode 11, the second insulating layer 15 is located between the first electrode 11 and the first active layer 12, and the third insulating layer 16 is located between the first active layer 12 and the second electrode layer 13. The first isolation cavity 31 is disposed on the same layer as the second electrode layer 13.

[0071] In some exemplary embodiments, the first electrode 11 is a gate electrode, the second electrode layer 13 includes a source electrode and a drain electrode disposed on the same layer, the first insulating layer 14 is a buffer layer, the second insulating layer 15 is a gate insulating layer, and the third insulating layer 16 is an interlayer dielectric layer.

[0072] During the fabrication of the display panel, the inorganic insulating layer 2 extends from the display area 100 to the isolation area 200. After the fabrication of the second electrode layer 13 in the display area 100 is completed, the second electrode layer 13 needs to be patterned to form source and drain electrodes disposed on the same layer. Similarly, during the fabrication of the second electrode layer 13, the second electrode layer 13 extends from the display area 100 to the isolation area 200. During the patterning of the second electrode layer 13, the second electrode layer 13 at the position corresponding to the first isolation cavity 31 is patterned to form an isolation pillar 10. Then, an insulating isolation layer 3 is fabricated on the side of the isolation pillar 10 away from the substrate 1, so that the insulating isolation layer 3 at the position corresponding to the first isolation cavity 31 and the inorganic insulating layer 2 can be formed to form the first isolation cavity 31. The insulating isolation layer 3 and the isolation pillar 10 are directly etched to form the first isolation cavity 31.

[0073] It should be noted that the reference Figure 10 As shown, the display area 100 also includes an anode 42 and a conductive connection structure 41. After etching the insulating isolation layer 3, the isolation pillar 10 also needs to be etched. During the fabrication process, the entire film layer of the anode 42 and conductive connection structure 41 extends from the display area 100 to the isolation area 200, and then is patterned to form the anode 42 and conductive connection structure 41. During the patterning process of the conductive connection structure 41 in the display area 100, the conductive connection structure 41 film layer located in the isolation area 200 and the conductive connection structure 41 patterning in the display area 100 are formed through a single patterning process, completely etching away the conductive connection structure 41 film layer in the isolation area 200. In the isolation area 200, the film layer where the connection pillar is located is deeper than the film layer where the connection structure is located. During the patterning of the conductive connection structure 41, the conductive connection structure 41 film layer corresponding to the first isolation cavity 31 is over-etched, thereby etching away the isolation pillar 10 during the fabrication of the conductive connection structure 41. However, the isolation pillar 10 at the undercut structure still exists and needs to be removed. During the patterning of the anode 42 in the display area 100, the anode 42 layer in the isolation area 200 and the anode 42 patterning in the display area 100 are etched through a single process. During the etching of the anode 42 layer at the corresponding position in the isolation area 200, it is removed using an etching solution to form the first isolation cavity 31, and the insulating isolation layer 3 forms an undercut structure at the first isolation cavity 31.

[0074] The first isolation cavity 31 and the second electrode layer 13 are disposed in the same layer. During the preparation of the first isolation cavity 31, the existing process can be achieved without affecting the existing overall film layer of the display panel, and it has no impact on the overall performance of the display panel. At the same time, the preparation of the isolation pillar 10 before the formation of the first isolation cavity 31 and the second electrode layer 13 are achieved through the same patterning process, and there is no increase in the patterning process preparation steps.

[0075] In some embodiments, reference Figures 7 to 9 As shown, the isolation region 200 includes at least a first metal layer 22 and a second active layer 23; the first metal layer 22 is located between the first insulating layer 14 and the second insulating layer 15, and the second active layer 23 is located between the second insulating layer 15 and the third insulating layer 16; the first metal layer 22 is disposed in the same layer as the first electrode 11, and the second active layer 23 is disposed in the same layer as the first active layer 12. The orthographic projection of the first metal layer 22 onto the substrate 1 is located within the orthographic projection range of the second active layer 23 onto the substrate 1, and the first isolation cavity 31 is perpendicular to the substrate 1 and corresponds to the first metal layer 22.

[0076] In the vertical direction of the display area 100, there are more film layers and a greater height for the pixel circuit region. During the fabrication of the pixel circuit, the first electrode 11 layer and the first active layer 12 extend from the display area 100 to the isolation area 200. During the patterning process of the first electrode 11 layer, the first electrode 11 and the first metal layer 22 are formed through a single communication process. During the patterning process of the film layer containing the first active layer 12, the first active layer 12 and the second active layer 23 are formed. Correspondingly, in the vertical direction, the areas corresponding to the first metal layer 22 and the second active layer 23 in the isolation area 200 have more film layers and a greater height. Similarly, the height of the metal pillars in the first metal layer 22 that are disposed on the same layer as the second electrode layer 13 is also greater than other positions in the vertical direction. After the fabrication of the first isolation cavity 31 is completed, the break point of the insulating isolation layer 3 is higher than other areas, resulting in a better isolation effect of the first isolation cavity 31. This achieves the break point at the isolation cavity during the fabrication of the organic material layer and the cathode layer.

[0077] In some embodiments, the first metal layer 22 and the first electrode 11 are formed using the same mask, and the second active layer 23 and the first active layer 12 are formed using the same mask.

[0078] In some embodiments, reference Figure 11 The diagram shown is a top view of the distribution of the first isolation cavity 31 in the display panel of this application embodiment. There is at least one first isolation cavity 31, and the at least one first isolation cavity 31 sub-isolation area 200 is arranged on the side of the display area 100 toward the opening area 300.

[0079] Multiple first isolation cavities 31 can be arranged. Multiple first isolation cavities 31 evenly arranged from the side of the isolation region 200 near the display region 100 towards the opening region 300 provide better isolation for the organic material layer and the cathode layer. The orthographic projection of the multiple first isolation cavities 31 onto the substrate 1 surrounds the periphery of the opening region 300. Furthermore, the parallel arrangement of multiple first isolation cavities 31 does not affect the overall performance of the existing display panel's film layer during fabrication, and does not significantly alter the film layer structure. The fabrication of multiple first isolation cavities 31 can be achieved using existing display panel manufacturing processes.

[0080] It should be noted that the opening area 300 is different for different display panels, and the orthographic projection of the multiple first isolation cavities 31 on the substrate 1 is also different. If the cross-sectional shape of the opening area 300 is circular, the orthographic projection of the first isolation cavity 31 on the substrate 1 is an annulus. If the opening area 300 is strip-shaped, the orthographic projection of the first isolation cavity 31 on the substrate 1 is similar to an ellipse.

[0081] Based on the same inventive concept, and referring to Figure 12 As shown, this application provides a method for manufacturing a display panel, applicable to the display panels of any of the above embodiments. The method includes:

[0082] S10, Provide a substrate.

[0083] In this step, the substrate can be a flexible substrate or a rigid substrate. For example, a rigid substrate can include a glass substrate. The flexible substrate can include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked together. The materials of the first and second flexible material layers can be polyimide (PI), polyethylene terephthalate (PET), or surface-treated polymer films, etc. The materials of the first and second inorganic material layers can be silicon nitride (SiNx) or silicon oxide (SiOx), etc., to improve the substrate's resistance to water and oxygen. The material of the semiconductor layer can be amorphous silicon (a-Si). However, this embodiment is not limited in this respect.

[0084] S20. An inorganic insulating layer is formed on one side of the substrate.

[0085] In some embodiments, the inorganic insulating layer may include a first insulating layer, a second insulating layer, and a third insulating layer; wherein the first insulating layer may be a buffer layer, the second insulating layer may be a gate insulating layer, and the third insulating layer may be an interlayer dielectric layer. The inorganic insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, multiple layers, or a composite layer.

[0086] S30. An insulating isolation layer is formed on the side of the inorganic insulating layer away from the substrate, and the insulating isolation layer is disconnected at the isolation region, forming a first isolation cavity between the disconnection points.

[0087] In this step, refer to Figures 7 to 9 As shown, firstly, an isolation pillar is formed on the side of the inorganic insulating layer away from the substrate. An insulating layer is then covered on the surface of the isolation pillar on the side away from the substrate. Photoresist is applied to the area outside the corresponding position of the first cavity. The insulating layer on the side of the metal pillar away from the substrate is etched. The metal pillar is then further etched to form the first isolation cavity.

[0088] Then, on the side of the insulating layer away from the substrate, an organic material layer, a cathode layer, an encapsulation layer, and a polarizer are prepared.

[0089] It should be noted that the metal pillar can be formed using the same patterning process as the second electrode layer disposed on the same layer as the pixel circuit in the display area, without the need for separate metal pillar fabrication. During the etching process, it can be removed by over-etching during the patterning of the conductive connection structure. For the metal pillars encapsulated in the undercut structure, they can be removed using an etching solution during the anode fabrication process of the isolation area.

[0090] S40. Make holes in the opening area.

[0091] After the display area and isolation area are prepared in this step, the opening area is cut to form the opening area, thus completing the preparation of the display panel.

[0092] Based on the same inventive concept, embodiments of this application provide a display device, including the display panel of any of the above embodiments. The display device in the embodiments of this application may include smartphones, tablets, laptops, televisions, and smart wearable display devices, etc. Smart wearable display devices may include smartwatches, head-mounted VR imaging devices, etc., and embodiments of this application do not specifically limit the scope.

[0093] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this application as described above, which are not provided in the details for the sake of brevity.

[0094] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this application, the well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this application, and this also takes into account the fact that the details of the implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this application will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuits) have been set forth to describe exemplary embodiments of this application, it will be apparent to those skilled in the art that the embodiments of this application can be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0095] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0096] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.

Claims

1. A display panel, wherein, It has a display area, an opening area, and an isolation area, wherein the isolation area at least partially surrounds the opening area, and the display area at least partially surrounds the isolation area; The display panel includes a substrate located in the display area and the isolation area; An inorganic insulating layer is disposed on one side of the substrate and extends from the display area to the isolation area; An insulating isolation layer is located on the side of the inorganic insulating layer away from the substrate, extends from the display area to the isolation area, and the insulating isolation layer is disconnected at the isolation area, forming a first isolation cavity between the disconnection points; The two disconnections of the insulating layer extend away from the inorganic insulating layer and toward the center, and the angle between the extension direction of the disconnection and the plane of the inorganic insulating layer is no greater than 90°. The bottom of part of the first isolation cavity is shielded by the extended insulating layer.

2. The display panel according to claim 1, characterized in that, The distance between the side of the break in the insulating layer away from the substrate and the inorganic insulating layer is not less than the thickness of the insulating layer.

3. The display panel according to claim 1, characterized in that, The insulating isolation layer at least partially covers the orthogonal projection of the first isolation cavity onto the substrate, and the first isolation cavity has a trapezoidal cross-sectional shape perpendicular to the substrate.

4. The display panel according to claim 1, characterized in that, The inorganic insulating layer is provided with a second isolation cavity, and the orthographic projection of the second isolation cavity onto the substrate is located within the orthographic projection range of the first isolation cavity onto the substrate.

5. The display panel according to claim 4, characterized in that, The depth of the second isolation cavity is less than the thickness of the inorganic insulating layer.

6. The display panel according to claim 1, characterized in that, The display area further includes a pixel circuit, which includes a transistor structure. The transistor structure includes at least a first electrode, a first active layer, and a second electrode layer. The inorganic insulating layer includes at least a first insulating layer, a second insulating layer, and a third insulating layer; The first insulating layer is located between the substrate and the first electrode, the second insulating layer is located between the first electrode and the first active layer, and the third insulating layer is located between the first active layer and the second electrode layer; The first isolation cavity is disposed in the same layer as the second electrode layer.

7. The display panel according to claim 6, characterized in that, The isolation zone includes at least a first metal layer and a second active layer; The first metal layer is located between the first insulating layer and the second insulating layer, and the second active layer is located between the second insulating layer and the third insulating layer; The first metal layer is disposed on the same layer as the first electrode, the second active layer is disposed on the same layer as the first active layer, the orthographic projection of the first metal layer on the substrate is located within the orthographic projection range of the second active layer on the substrate, and the first isolation cavity is perpendicular to the substrate and corresponds to the first metal layer. The first metal layer and the first electrode are formed using the same mask, and the second active layer and the first active layer are formed using the same mask.

8. The display panel according to claim 4, characterized in that, There is at least one first isolation cavity, and at least one first isolation cavity is arranged from the side of the isolation area near the display area toward the side of the opening area.

9. A display device, characterized in that, Includes the display panel as described in any one of claims 1-8.

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