Resistance change element, resistance change array, physical unclonable function chip and hardware encryption equipment

By using resistive variable components that can change resistance under different environmental parameters in physical non-clone function chips, the problems of insufficient randomness and non-reconstruction of traditional PUFs are solved, and dynamic protection and authentication of hardware security are achieved.

CN119486584AInactive Publication Date: 2025-02-18ZHUHAI MULTI-INNOVATION TECHNOLOGY CO LTD

Patent Information

Application Number
CN202411720332.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-28
Publication Date
2025-02-18
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Traditional integrated circuit PUFs have insufficient randomness and are unchangeable and unreconstructable disadvantages, which leads to hardware being easily subject to hardware security threats when encountering multiple attacks or expiration of life.

Method used

Design a resistive element, including a substrate, resistive layer and electrode layer. The resistive layer can have different resistances at different temperatures, different magnetic fields, different light intensity or different electric field intensity, and is used in physically uncloned function chips to Implement reconfigurable capabilities.

Benefits of technology

By changing environmental parameters such as temperature, magnetic field, light intensity or electric field intensity, the output of physically uncloned function chips can be dynamically changed, enhancing its resistance to hardware security threats, and achieving effective authentication of electronic devices, confidential information and security Information protection.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of hardware security, and discloses a resistive element, a resistive array, a physical unclonable function chip and hardware encryption equipment. The resistive element comprises a substrate, a resistive layer located on the surface of the substrate and electrode layers located on the two sides of the resistive layer, and the resistive layer can have different resistances at different temperatures, different magnetic fields, different light intensities or different electric field intensities. The resistive element is applied to the physical unclonable function chip to realize the reconfigurable capability, and when the resistive element is attacked, the output of the physical unclonable function chip is changed by changing the temperature, the magnetic field, the light intensity or the electric field intensity, so that the hardware security threat is avoided. The invention also has the beneficial effects of simple preparation process and easy realization.
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Description

Technical Field

[0001] The present invention relates to the field of hardware security technology, and in particular to a resistive switching element, a resistive switching array, a physical unclonable function chip and a hardware encryption device. Background Art

[0002] How to effectively authenticate electronic devices and effectively protect confidential and secure information is a key technical issue that needs to be solved urgently in the information age, and it is also a serious social problem.

[0003] A physical unclonable function (PUF) is a function implemented by a physical system, which makes the function easy to evaluate, but the physical system is difficult to characterize. When a challenge C is given to the PUF, the PUF returns a corresponding response R. Therefore, the physical unclonable function PUF has immeasurable research value and broad application prospects in the field of information security.

[0004] Traditional integrated circuit PUFs have the disadvantages of insufficient randomness and being unchangeable and non-reconfigurable once generated. When a physical unclonable function PUF is attacked multiple times or its lifespan is exhausted, the hardware protected by the PUF is vulnerable to hardware security threats. Therefore, it is necessary to provide a new type of PUF that is reconfigurable and can effectively resist physical attacks. Summary of the invention

[0005] The purpose of the present invention is to propose a resistive switching element, a resistive switching array, a physical unclonable function chip and a hardware encryption device, aiming to provide a resistive switching element that can be used for a physical unclonable function chip, enhance the reconfigurability of PUF and the ability to effectively resist physical attacks.

[0006] To achieve the above objective, a first aspect of the present invention provides a resistive switching element, the resistive switching element comprising: substrate; A resistive switching layer, located on the surface of the substrate; The electrode layer is located on both sides of the resistive switching layer; The resistive switching layer can have different resistances at different temperatures, different magnetic fields, different light intensities or different electric field intensities.

[0007] According to some embodiments of the present invention, the substrate is a perovskite material.

[0008] According to some embodiments of the present invention, the substrate is made of strontium titanate.

[0009] According to some embodiments of the present invention, the resistive switching layer is a strongly correlated oxide.

[0010] According to some embodiments of the present invention, the resistive switching layer is a strongly correlated oxide having a metal-insulator phase transition.

[0011] According to some embodiments of the present invention, the material of the resistive switching layer is nickelate, manganate or vanadium dioxide.

[0012] According to some embodiments of the present invention, the resistive switching layer is samarium nickelate.

[0013] According to some embodiments of the present invention, the thickness of the resistive switching layer is 10-100 nm.

[0014] According to some embodiments of the present invention, the electrode layer is a conductive material.

[0015] According to some embodiments of the present invention, the electrode layer is made of Pt.

[0016] According to some embodiments of the present invention, within a first temperature range, the resistance of the resistive switching layer changes with temperature.

[0017] According to some embodiments of the present invention, within a first magnetic field range, the resistance of the resistive layer changes as the magnetic field changes.

[0018] According to some embodiments of the present invention, within a first light intensity range, the resistance of the resistive switching layer changes as the light intensity changes.

[0019] According to some embodiments of the present invention, within a first electric field strength range, the resistance of the resistive switching layer changes with changes in the electric field strength.

[0020] According to some embodiments of the present invention, the first temperature range is 80~300K.

[0021] According to some embodiments of the present invention, the first magnetic field strength ranges from 0 to 6000 Oe.

[0022] According to some embodiments of the present invention, the first electric field strength ranges from 0 to 4 kV / cm.

[0023] To achieve the above object, a second aspect of the present invention provides a resistive switching array, wherein the resistive switching array comprises a plurality of resistive switching elements, and the resistive switching elements are the resistive switching elements described above; The resistive switching array can have different resistances at different temperatures, different magnetic fields, different light intensities or different electric field intensities.

[0024] To achieve the above object, a third aspect of the present invention provides a method for manufacturing a resistive switching array, the method comprising the following steps: S100 deposits a resistive thin film on a substrate; S200: covering the surface of the resistive switching film with photoresist, and obtaining a plurality of resistive switching units by etching; S300 deposits a first conductive material by magnetron sputtering to form a left electrode coupled to the left side of each resistive switching unit in the plurality of resistive switching units; S400 deposits a second conductive material by magnetron sputtering to form a right electrode coupled to the right side of each resistive switching unit, thereby obtaining a resistive switching array having a plurality of resistive switching elements.

[0025] According to some embodiments of the present invention, the resistive switching film is deposited by pulsed laser deposition.

[0026] According to some embodiments of the present invention, the substrate is a perovskite material.

[0027] According to some embodiments of the present invention, the substrate is made of strontium titanate.

[0028] To achieve the above object, a fourth aspect of the present invention provides a physical unclonable function chip, which includes a resistive switching array; the resistive switching array is the above-mentioned resistive switching array, or a resistive switching array manufactured by the above-mentioned manufacturing method.

[0029] To achieve the above-mentioned purpose, the fifth aspect of the present invention provides a hardware encryption system, which includes: the above-mentioned physical unclonable function chip; an impedance acquisition module, electrically coupled to the physical unclonable function chip, and used to collect the impedance of each resistive switching element in the resistive switching array of the physical unclonable function chip under a specific environment; and a control module, electrically coupled to the impedance acquisition module, and used to use the impedance of each resistive switching element collected by the impedance acquisition module as a root key for identity authentication.

[0030] Therefore, compared with the prior art, the present invention has the following beneficial effects: The resistive switching element provided by the present invention comprises a substrate, a resistive switching layer located on the surface of the substrate, and electrode layers located on both sides of the resistive switching layer, wherein the resistive switching layer can have different resistances at different temperatures, different magnetic fields, different light intensities, or different electric field intensities. The resistive switching element of the present invention is applied to a physical unclonable function chip to realize a reconfigurable capability, that is, when attacked, the output of the physical unclonable function chip is changed by changing the temperature, magnetic field, light intensity, or electric field intensity, thereby avoiding hardware security threats. The present invention also has the beneficial effects of simple preparation process and easy implementation. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0032] Figure 1 A schematic diagram of the structure of a resistive switching element according to an embodiment of the present invention; Figure 2 The resistance change curve of the resistive switching array A of the embodiment of the present invention at different temperatures and different magnetic fields; Figure 3 The resistance change rate curve of the resistive switching array B of the embodiment of the present invention at different electric field strengths; Figure 4 The resistance change curve of the resistive switching array C of the embodiment of the present invention at different temperatures and when the light is turned on and off; Figure 5 A schematic diagram of the manufacturing process of a resistive switching array according to an embodiment of the present invention; Figure 6 A schematic diagram of a first mask pattern, a second mask pattern, and a third mask pattern used in a method for manufacturing a resistive switching array according to an embodiment of the present invention, and a schematic diagram of the structure of the manufactured resistive switching array; Figure 7 A schematic diagram of the structure of a hardware encryption device according to an embodiment of the present invention; Figure 8 The display patterns output by the hardware encryption device according to the embodiment of the present invention at different temperatures.

[0033] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0035] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly.

[0036] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features limited to "first" and "second" may explicitly or implicitly include at least one of the features. In addition, if "and / or" or "and / or" appears in the full text, its meaning includes three parallel solutions. Taking "A and / or B" as an example, it includes solution A, solution B, or solutions that satisfy both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0037] How to effectively authenticate electronic devices and effectively protect confidential and secure information is a key technical issue that needs to be solved urgently in the information age, and it is also a serious social problem.

[0038] Currently, most hardware security technologies are implemented using traditional cryptographic methods. A physical unclonable function (PUF) is a function implemented through a physical system, which makes the function easy to evaluate, but the physical system is difficult to characterize. When a challenge C is given to the PUF, the PUF returns a corresponding response R. By embedding the PUF circuit into the physical device, the physical device can be prevented from being cloned and tampered with. When the PUF is powered on, the PUF response can be automatically generated. After the power is turned off, the response automatically disappears. When the output of the PUF is used as an encryption key, no additional NVM storage overhead is required, and the security of the key storage is also improved. The above characteristics make PUF have immeasurable research value and broad application prospects in the field of information security.

[0039] PUF mainly includes non-electronic PUF, delay-based PUF, and storage-based PUF.

[0040] Non-electronic PUFs include optical PUF, paper PUF, CD PUF, and magnetic PUF. Optical PUF is composed of epoxy glass plates filled with randomly doped optical particles. When lasers of different wavelengths illuminate the glass plate at different incident angles, a speckle image is formed, called a speckle pattern. Such a speckle can be extracted by Gabor hash. In this optical PUF, the wavelength and incident angle of the laser are challenges for the PUF, and the speckle pattern formed is the response of the PUF. Due to its complex physical structure, this type of PUF is only suitable for laboratory research and has not been widely used. Paper PUF extracts fingerprints from the irregular fiber structure of paper. CD PUF forms a unique fingerprint by extracting the different lengths of the flat surface of an ordinary CD due to the manufacturing process. Magnetic PUF uses the uniqueness of the distribution of magnetic particles in magnetic media such as magnetic cards.

[0041] The delay-based physically unclonable function forms a key by measuring the change in propagation delay between two circuits. It mainly includes arbitrator PUF and ring oscillator PUF (RO-PUF).

[0042] The main principle of the arbitrator PUF is to implement two symmetrically designed digital signal delay paths on the IC circuit, and let them race on the two paths by giving the same challenge. An arbitrator determines which path the challenge arrives first and outputs a response R (0 or 1). The arbitrator PUF is very vulnerable to modeling attacks. By analyzing the input and output response pairs of a part of the arbitrator PUF, the attacker can build a digital model of the arbitrator PUF, thereby predicting the input and output responses of the arbitrator PUF.

[0043] Ring Oscillator PUF is achieved by comparing the random differences introduced during the manufacturing process between Ring Oscillators (ROs). This random difference is manifested by the difference in oscillation frequency between ROs. RO-PUF has weak resistance to external noise, which will affect the uniqueness and stability of RO-PUF.

[0044] The storage-based physical unclonable function is a memory-based PUF. Since the memory cell has two stable but different states for storing a logic value ("0" or "1"), if the memory cell is brought into an unstable state, it is possible to oscillate back and forth between the two stable states and eventually return to one of the two stable states. This change will have a clear bias and is determined by the random differences of the memory cell. This property of the memory cell manifests as a PUF performance.

[0045] Therefore, traditional integrated circuit PUF has the disadvantages of insufficient randomness and being unchangeable and non-reconfigurable once generated. When the physical unclonable function PUF is attacked multiple times or its life is exhausted, the hardware protected by the PUF is vulnerable to hardware security threats. It is necessary to provide a new type of PUF that is reconfigurable, can effectively resist physical attacks, and has low power consumption, small area, strong reliability, and high randomness.

[0046] The embodiment of the present invention provides a resistive switching element, which has the capability of being reconfigurable and effectively resisting physical attacks, and can be used in a physical unclonable function chip to achieve effective authentication of electronic devices and effective protection of confidential information and security information.

[0047] like Figure 1 As shown, the resistive switching element of the embodiment of the present invention includes a substrate 10, a resistive switching layer 20 and an electrode layer, wherein the resistive switching layer 20 is located on the surface of the substrate 10, and the electrode layer includes a first electrode layer 31 and a second electrode layer 32, the first electrode layer 31 is located on the left side of the resistive switching layer 20, and the second electrode layer 32 is located on the right side of the resistive switching layer 20.

[0048] The material of the substrate in the embodiment of the present invention is strontium titanate.

[0049] It should be noted that the substrate is not limited to strontium titanate, and may also be other perovskite materials, which are not specifically limited here.

[0050] The first electrode layer and the second electrode layer of the embodiment of the present invention are made of Pt; the first electrode layer and the second electrode layer are electrically coupled to two sides of the resistive switching layer respectively. The resistive switching layer is electrically coupled to the peripheral device through the first electrode layer and the second electrode layer.

[0051] It should be noted that the electrode layers, ie, the first electrode layer and the second electrode layer, are made of conductive materials, and the material thereof is not limited to Pt.

[0052] The resistive switching layer of the embodiment of the present invention can present different resistances at different temperatures, different magnetic fields, different light intensities or different electric field intensities. The resistive switching layer is a strongly correlated oxide, and the strongly correlated oxide has a metal-insulator phase transition.

[0053] It should be understood that strongly correlated oxides refer to oxide materials with strong electron correlation effects. This correlation is due to the very strong interactions between electrons and electrons, and electrons and lattices in the material, resulting in significant differences in electronic properties from the predictions of traditional single-electron approximation theory. The metal-insulator phase transition refers to the process in which a material changes from a metallic state to an insulating state in a fixed substance due to changes in external conditions such as temperature and pressure. This transition is usually accompanied by a significant increase in resistivity and significant changes in other physical properties.

[0054] The resistive switching layer of the embodiment of the present invention is samarium nickelate and has a thickness of 30 nm.

[0055] It should be noted that the resistive layer can be nickelate, manganate, vanadium dioxide or other strongly associated oxides with metal-insulator phase transition, not limited to samarium nickelate. The thickness of the resistive layer can be 10-100 nm, preferably 30 nm.

[0056] The resistance of the resistive switching layer in the resistive switching element of the embodiment of the present invention can change with the change of temperature within the first temperature range, the resistance of the resistive switching layer can change with the change of the magnetic field within the first magnetic field range, the resistance of the resistive switching layer can change with the change of light intensity within the first light intensity range, and the resistance of the resistive switching layer can change with the change of electric field strength within the first electric field strength range.

[0057] In order to verify the resistance change of the resistive switching element of the embodiment of the present invention with environmental parameters, the applicant placed a resistive switching array A, a resistive switching array B, and a resistive switching array C having multiple resistive switching elements in specific environments, respectively, and (1) changed the surrounding magnetic field and temperature of the resistive switching array A to observe the resistance change of the resistive switching array A; (2) changed the surrounding electric field intensity of the resistive switching array B to observe the resistance change of the resistive switching array B; (3) changed the temperature and light intensity of the resistive switching array C to observe the resistance change of the resistive switching array. Among them, the parameters of the resistive switching layers in the resistive switching array A, the resistive switching array B, and the resistive switching array C are different, and the resistive switching array C has a metal-insulator phase transition.

[0058] like Figure 2 As shown, when the magnetic field is 0~6000 Oe and the temperature is 80~300K, the resistance of the resistive switching array A decreases with the increase of temperature under the same magnetic field, and the resistance of the resistive switching array A increases with the increase of the magnetic field at the same temperature.

[0059] like Figure 3 As shown in the figure, when the electric field strength is 0~4 kV / cm, the resistance change rate of the resistive switching array B decreases with the increase of the electric field strength.

[0060] like Figure 4 As shown, when the temperature is 50~300K, the resistance of the resistive switching array C decreases with decreasing temperature, and a metal-insulator phase transition occurs at 150~250K, causing its resistance to increase rapidly, and then increases with decreasing temperature; at the same temperature, the resistance of the resistive switching array in the light-off state is higher than that in the light-on state; the temperature at which the resistance of the resistive switching array in the light-off state changes rapidly is higher.

[0061] Therefore, the resistive switching element of the embodiment of the present invention can have different resistances at different temperatures, different magnetic fields, different light intensities, or different electric field intensities.

[0062] The embodiment of the present invention further provides a resistive switching array, which includes a plurality of the aforementioned resistive switching elements.

[0063] It should be understood that, since the resistance change of a single resistive switching element is relatively small, a plurality of resistive switching elements are generally used in an array.

[0064] In the resistive switching array of the embodiment of the present invention, each resistive switching element is formed based on the same process, and its resistance is basically the same. The resistance of the resistive switching array can change with the change of temperature, magnetic field, light intensity, and electric field strength. That is, the resistive switching array can have different resistances at different temperatures, different magnetic fields, different light intensities, or different electric field strengths.

[0065] The resistive switching array of the embodiment of the present invention includes 16×8 resistive switching elements.

[0066] It should be noted that the resistive switching array may include n×m resistive switching elements, wherein n and m are both integers greater than 1. The number of n and m is not specifically limited here.

[0067] The resistive switching array of the embodiment of the present invention includes, in addition to a plurality of resistive switching elements, a left electrode pad and a right electrode pad respectively connected to the left electrode and the right electrode in each resistive switching element.

[0068] It should be understood that the left electrode of each resistive switching element is electrically coupled to the left electrode pad through a conductive material; and the right electrode of each resistive switching element is electrically coupled to the right electrode pad through a conductive material.

[0069] The embodiment of the present invention also provides a method for manufacturing the aforementioned resistive switching array.

[0070] Specifically, Figure 5 As shown, the manufacturing method of the embodiment of the present invention includes the following steps: Step S100: depositing a resistive switching film on a substrate; Specifically, it includes steps S110 to S120.

[0071] Step S110: cleaning the substrate; Strontium titanate was used as the substrate, which was cleaned ultrasonically and dried with nitrogen, and then placed in an annealing furnace for high-temperature annealing for 3 hours at a temperature of 1000 degrees.

[0072] It should be noted that the annealing temperature and annealing time can be adjusted according to the specific equipment conditions.

[0073] Step S120: growing a resistive switching film; Samarium nickelate thin films were grown on strontium titanate substrates by pulsed laser deposition. The growth temperature was controlled at 700°C, the growth pressure was 20Pa of oxygen, the target-substrate distance was 4.5cm, the laser energy was 1.96W, the laser frequency was 5Hz, and the film was cooled naturally after 10min of growth.

[0074] It should be noted that the growth temperature, oxygen concentration, equipment parameters, growth time, etc. involved are not limited here.

[0075] Step S200: Covering the surface of the resistive switching film with photoresist, and obtaining a plurality of resistive switching units by etching; Specifically, a 2 μm thick photoresist is coated on the surface of the resistive switching film, and 16×8 resistive switching units arranged in an array are obtained through spin coating of the photoresist, drying, exposure using a first photolithography mask pattern, development, and etching.

[0076] The first photolithography mask pattern is as follows: Figure 6 (A) shown.

[0077] It should be noted that the number of the resistive switching units here may be n×m, wherein n and m are integers greater than 1, n is not limited to 16, and m is not limited to 8.

[0078] Step S300: forming a left electrode coupled to the left side of each resistive switching unit by magnetron sputtering a first conductive material; Specifically, by spin coating photoresist, drying, exposing using a second photolithography mask pattern, developing, etching, and depositing Pt by magnetron sputtering, excess photoresist is removed, thereby forming a coupled left electrode on the left side of each resistive switching unit.

[0079] The second photolithography mask pattern is as follows: Figure 6 (B) shown.

[0080] It should be noted that the left electrode here includes a first electrode layer electrically coupled to the left side of each resistive switching unit, a left electrode pad, and electrode wires respectively connecting each first electrode layer and the left electrode pad. The first electrode layer, the right electrode pad and the electrode wire can be made of the same conductive material.

[0081] Step S400: forming a right electrode coupled to the right side of each resistive switching unit by magnetron sputtering a second conductive material to obtain a resistive switching array; Specifically, by spin coating photoresist, drying, exposing using a third photolithography mask pattern, developing, etching, and depositing Pt by magnetron sputtering, excess photoresist is removed, thereby forming a coupled right electrode on the right side of each resistive switching unit.

[0082] The third photolithography mask pattern is as follows: Figure 6 (C) shows the pattern of the resulting resistive switching array. Figure 6 (D) shown.

[0083] It should be noted that the right electrode here includes a second electrode layer electrically coupled to the left side of each resistive switching unit, a right electrode pad, and electrode lines respectively connecting each second electrode layer and the right electrode pad.

[0084] The embodiment of the present invention further provides a physical unclonable function chip. The physical unclonable function chip includes a resistive switching array. The resistive switching array is the aforementioned resistive switching array or a resistive switching array manufactured by the aforementioned manufacturing method.

[0085] The resistive switching array in the physical unclonable function chip of the embodiment of the present invention includes multiple resistive switching elements and a left electrode pad and a right electrode pad. The left electrode of each resistive switching element in the resistive switching array is electrically coupled to the left electrode pad, and the right electrode of each resistive switching element is electrically coupled to the right electrode pad.

[0086] The embodiment of the present invention also provides a hardware encryption system, which includes the aforementioned physical unclonable function chip, an impedance acquisition module, and a control module. The physical unclonable function chip includes a resistive switching array, which includes a plurality of resistive switching elements arranged in an array; the impedance acquisition module is used to acquire the impedance of each resistive switching element in the physical unclonable function chip; and the control module is used to use the impedance of each resistive switching element acquired by the impedance acquisition module as a root key for identity authentication.

[0087] Specifically, Figure 7 As shown, the hardware encryption system of the embodiment of the present invention includes a physical unclonable function chip, namely an RRAM array, an impedance acquisition module, a control module, namely an STM32 (SOPC), a power supply module electrically coupled to the impedance acquisition module and the control module respectively to provide power therefor, a computer PC electrically coupled to the control module STM32 respectively, a display module, namely an LCD display, FLASH and SDRAM.

[0088] It should be understood that STM32 refers to a general-purpose microcontroller based on the AMR Cortex-M core launched by STMicroelectronics. SOPC: System on a Programmable Chip refers to a programmable system on chip. The control module used in the hardware encryption system is not limited to the STM32 (SOPC) type microcontroller. SDRAM: Synchronous Dynamic Random Access Memory, refers to synchronous dynamic random access memory. FLASH: Flash Memory, refers to a data storage device, which is a non-volatile storage device that can keep data from being lost after power failure.

[0089] The resistive switching acquisition module of the embodiment of the present invention is used to acquire the impedance of each resistive switching element in the physical unclonable function chip under a specific environment and transmit the acquired data to the control module.

[0090] The control module of the embodiment of the present invention is used to receive collected data, generate an encryption key according to the collected data, and implement identity authentication according to the encryption key.

[0091] The display module of the embodiment of the present invention is used to display the encryption key generated by the control module in the form of a pattern.

[0092] The following is to verify the reconfigurable performance of the hardware encryption system of the embodiment of the present invention. The ambient temperature of the hardware encryption system of the embodiment of the present invention is changed, and the patterns output by the hardware encryption system are observed when the temperatures are 25°C, 40°C, 50°C, 60°C, 70°C, and 80°C. Figure 8 As shown in the figure, the displayed patterns are different when the temperature is 25℃, 40℃, 50℃, 60℃, 70℃, and 80℃. This shows that the hardware encryption system can modify the hardware password by changing the temperature. The hardware encryption system is reconfigurable.

[0093] Therefore, compared with the prior art, the embodiments of the present invention have the following beneficial effects: The resistive switching element provided by the embodiment of the present invention includes a substrate, a resistive switching layer located on the surface of the substrate, and electrode layers located on both sides of the resistive switching layer, wherein the resistive switching layer has different resistances at different temperatures, different magnetic fields, different light intensities, and different electric field intensities. The physical unclonable function chip having the resistive switching element of the present invention has a reconfigurable capability, and when attacked, the output of the physical unclonable function chip can be changed by changing the temperature, magnetic field, light intensity, or electric field intensity to avoid hardware security threats.

[0094] The above description is only an exemplary embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the technical concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A resistive switching element, characterized in that: include: substrate; A resistive switching layer, located on the surface of the substrate; The electrode layer is located on both sides of the resistive switching layer; The resistive switching layer can have different resistances at different temperatures, different magnetic fields, different light intensities or different electric field intensities.

2. The resistive switching element according to claim 1, characterized in that: The substrate is a perovskite material; The resistive switching layer is a strongly correlated oxide; preferably, the strongly correlated oxide has a metal-insulator phase transition.

3. The resistive switching element according to claim 2, characterized in that: The material of the resistive layer is nickelate, manganate or vanadium dioxide; The material of the electrode layer is Pt; Preferably, the thickness of the resistive switching layer is 10-100 nm.

4. The magnetoresistive element according to claim 1, wherein: In a first temperature range, the resistance of the resistive layer changes with temperature; and / or, In the first magnetic field range, the resistance of the resistive layer changes with the change of the magnetic field; and / or, In a first light intensity range, the resistance of the resistive switching layer changes with the change of light intensity; and / or, In the first electric field strength range, the resistance of the resistive switching layer changes with the change of the electric field strength.

5. The resistive switching element according to claim 4, characterized in that: The first temperature range is 80-300 K; The first magnetic field ranges from 0 to 6000 Oe; The first electric field strength ranges from 0 to 4 kV / cm.

6. A resistive switching array, characterized in that: comprising a plurality of resistive switching elements, wherein the resistive switching elements are the resistive switching elements according to any one of claims 1 to 5; The resistive switching array can have different resistances at different temperatures, different magnetic fields, different light intensities or different electric field intensities.

7. A method for manufacturing a resistive switching array, characterized in that: The resistive switching array is the resistive switching array according to claim 6; and the manufacturing method comprises the following steps: Depositing a resistive switching film on a substrate; Covering the surface of the resistive switching film with photoresist, and obtaining a plurality of resistive switching units by etching; Depositing a first conductive material by magnetron sputtering to form a left electrode coupled to the left side of each of the plurality of resistive switching units; The second conductive material is deposited by magnetron sputtering to form a right electrode coupled to the right side of each resistive switching unit, thereby obtaining a resistive switching array having a plurality of resistive switching elements.

8. The manufacturing method according to claim 7, characterized in that: The substrate is a perovskite material; preferably, the substrate is made of strontium titanate; The resistive thin film is deposited by pulsed laser deposition.

9. A physically unclonable function chip, characterized in that: The physical unclonable function chip comprises a resistive switching array; the resistive switching array is the resistive switching array according to claim 6, or a resistive switching array manufactured by the manufacturing method according to claim 7 or 8.

10. A hardware encryption system, characterized in that: include: The physically unclonable function chip as described in claim 9; An impedance acquisition module, electrically coupled to the physical unclonable function chip, for acquiring impedances of each resistive switching element in the resistive switching array of the physical unclonable function chip in a specific environment; The control module is electrically coupled to the impedance acquisition module and is used to use the impedance of each resistive switching element acquired by the impedance acquisition module as a root key for identity authentication.

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