Multi-mode neural network filtering with reduced complexity of video data

Abstract

An example apparatus for filtering video data includes a memory configured to store video data; and a processing system comprising one or more processors implemented in a circuit, the processing system configured to apply one or more neural network processing blocks to the intermediate filtered video data, each neural network processing block in the neural network processing blocks comprises a first 1 * 1 convolution filter, a parameter rectification linear unit (PReLU) filter, a second 1 * 1 convolution filter and a 3 * 3 convolution filter; applying an additional neural network processing block to an output of the one or more neural network processing blocks to form filtered video data; and outputting the filtered image data.

Description

[0001] This application claims priority to U.S. Patent Application No. 18 / 346,620 filed on July 3, 2023 and U.S. Provisional Application No. 63 / 367,712 filed on July 5, 2022, the entire contents of each of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to video coding, including video encoding and video decoding. Background Art

[0003] Digital video capabilities may be incorporated into a wide variety of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video gaming consoles, cellular or satellite wireless telephones (so-called "smart phones"), video teleconferencing devices, video streaming devices, etc. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 (Part 10, Advanced Video Coding (AVC)), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions of such standards, as well as proprietary video codecs / formats such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media. By implementing such video coding techniques, a video device may more efficiently send, receive, encode, decode and / or store digital video information.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be divided into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in a slice after intra-coding (I) of a picture are encoded using spatial prediction relative to reference samples in neighboring blocks in the same picture. Video blocks in a slice after inter-coding (P or B) of a picture may use spatial prediction relative to reference samples in neighboring blocks in the same picture or temporal prediction relative to reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the invention

[0005] In general, the present disclosure describes techniques for filtering decoded video data. That is, the present disclosure describes filtering process techniques for filtering distorted pictures. The filtering process can be based on neural network techniques. The filtering process can be used in the context of advanced video codecs, such as extensions of ITU-T H.266 / Versatile Video Coding (VVC) or other video coding standards and video codecs.

[0006] In one example, a method for filtering video data includes: applying one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks including a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; applying additional neural network processing blocks to the outputs of the one or more neural network processing blocks to form filtered video data; and outputting filtered image data.

[0007] In another example, a device for filtering video data includes: a memory configured to store video data; and a processing system including one or more processors implemented in a circuit, the processing system configured to: apply one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks including a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; apply additional neural network processing blocks to outputs of the one or more neural network processing blocks to form filtered video data; and output filtered image data.

[0008] In another example, a computer-readable storage medium has instructions stored thereon that, when executed, cause a processing system to: apply one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; apply additional neural network processing blocks to outputs of the one or more neural network processing blocks to form filtered video data; and output filtered image data.

[0009] In another example, an apparatus for filtering video data includes: a component for applying one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks including a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; a component for applying additional neural network processing blocks to the output of the one or more neural network processing blocks to form filtered video data; and a component for outputting the filtered video data.

[0010] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0012] Figure 2 is a conceptual diagram illustrating a hybrid video coding framework.

[0013] Figure 3 is a conceptual diagram illustrating a hierarchical prediction structure using a group of pictures (GOP) of size 16.

[0014] Figure 4 is a conceptual diagram illustrating a neural network-based filter having four layers.

[0015] Figure 5 is a conceptual diagram illustrating an example neural network (NN) based filtering solution with multiple modes.

[0016] Figure 6 is an example Figure 5 Conceptual diagram of an example attention residual block for a neural network filter.

[0017] Figure 7 is an example Figure 5 Conceptual diagram of an example spatial attention layer for .

[0018] Figure 8 is an example of a replaceable Figure 5 Example of an attention residual block for . Conceptual diagram of the residual block structure.

[0019] Fig. 9 is an example Figure 8 Conceptual diagram of an example residual block structure for an example of .

[0020] Fig.10 is an example of a replaceable Figure 5Conceptual diagram of an example filter block structure with an attention residual block.

[0021] Fig.11 is an example Fig.10 Conceptual diagram of an example filter block structure for an example.

[0022] Fig.12 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0023] Fig.13 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0024] Fig.14 is a flowchart illustrating an example method for encoding a current block according to the techniques of this disclosure.

[0025] Fig.15 is a flowchart illustrating an example method for decoding a current block according to techniques of this disclosure.

[0026] Fig.16 is a flowchart illustrating an example method for filtering video data using a series of one or more residual blocks of a CNN filter in accordance with techniques of this disclosure.

[0027] Fig.17 is a flowchart illustrating an example method for performing a residual block of a CNN filter according to the techniques of this disclosure. DETAILED DESCRIPTION

[0028] Video encoding is generally a lossy process. For example, during the video encoding process, blocks of video data may be encoded using quantization and transforms. Generally speaking, quantization of values ​​involves reducing a number of the least significant bits of these values, which is generally unrecoverable. Generally speaking, this reduction of bits is performed in a manner that avoids detectability of the loss. However, sometimes, such losses can result in detectable artifacts in the video data, such as blocking artifacts.

[0029] Filtering may be applied to decoded and / or reconstructed video data to enhance the video data, which may improve the output video data. For example, filtering may compensate for blocking artifacts or other impairments in the video data. Research has shown that neural network (NN) based filtering techniques are highly capable of improving decoded and / or reproduced video data. NN based filtering techniques may be highly complex and require significant processing power to be effectively performed.

[0030] The present disclosure describes simplifications that can be applied to NN-based filtering techniques. The application of these simplifications can reduce the processing performed by one or more processors to perform NN-based filtering. In this way, the techniques of the present disclosure can improve the performance of video decoding devices. Likewise, these techniques can enable more devices to perform NN-based filtering, thereby generally improving the field of video decoding.

[0031] Figure 1 1 is a block diagram illustrating an example video encoding and decoding system 100 that may perform the techniques of the present disclosure. The techniques of the present disclosure generally relate to decoding (encoding and / or decoding) video data. Generally speaking, video data includes any data used to process video. Thus, video data may include original undecoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0032] like Figure 1 As shown in , in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a target device 116. Specifically, source device 102 provides video data to target device 116 via computer-readable medium 110. Source device 102 and target device 116 may include any of a wide variety of devices, including desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, handheld phones such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, broadcast receiver devices, etc. In some cases, source device 102 and target device 116 may be equipped for wireless communication and may therefore be referred to as wireless communication devices.

[0033] exist Figure 1 In the example of , the source device 102 includes a video source 104, a memory 106, a video encoder 200, and an output interface 108. The target device 116 includes an input interface 122, a video decoder 300, a memory 120, and a display device 118. According to the present disclosure, the video encoder 200 of the source device 102 and the video decoder 300 of the target device 116 can be configured to apply a technique for filtering based on a neural network. Therefore, the source device 102 represents an example of a video encoding device, and the target device 116 represents an example of a video decoding device. In other examples, the source device and the target device may include other components or arrangements. For example, the source device 102 may receive video data from an external video source such as an external camera. Similarly, the target device 116 may be docked with an external display device instead of including an integrated display device.

[0034] like Figure 1The system 100 shown is only an example. Generally speaking, any digital video encoding and / or decoding device can perform techniques for neural network-based filtering. The source device 102 and the target device 116 are only examples of such decoding devices, wherein the source device 102 generates decoded video data for sending to the target device 116. The present disclosure refers to a "decoding" device as a device that performs decoding (e.g., encoding and / or decoding) of data. Therefore, the video encoder 200 and the video decoder 300 represent examples of decoding devices, specifically, video encoders and video decoders, respectively. In some examples, the source device 102 and the target device 116 can operate in a substantially symmetrical manner, so that each of the source device 102 and the target device 116 includes a video encoding and decoding component. Therefore, the system 100 can support one-way or two-way video transmission between the source device 102 and the target device 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0035] Generally speaking, video source 104 represents the source of video data (i.e., original undecoded video data), and provides a series of pictures (also referred to as "frames") of the order of video data to video encoder 200, which encodes the data of the pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive containing previously captured original video, and / or a video feed interface for receiving video from a video content provider. As another alternative, video source 104 may generate computer graphics-based data as source video, or a combination of real-time video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange pictures from the received order (sometimes referred to as "display order") into a decoding order for decoding. Video encoder 200 may generate a bitstream including encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 to be received and / or retrieved by, for example, input interface 122 of target device 116 .

[0036] The memory 106 of the source device 102 and the memory 120 of the target device 116 represent general purpose memories. In some examples, the memories 106, 120 may store raw video data, for example, raw video from the video source 104 and raw decoded video data from the video decoder 300. Additionally or alternatively, the memories 106, 120 may store software instructions that can be executed by, for example, the video encoder 200 and the video decoder 300, respectively. Although the memory 106 and the memory 120 are shown separately from the video encoder 200 and the video decoder 300 in this example, it should be understood that the video encoder 200 and the video decoder 300 may also include internal memories for functionally similar or equivalent purposes. In addition, the memories 106, 120 may store encoded video data, for example, output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memories 106, 120 may be allocated as one or more video buffers, for example, to store raw decoded and / or encoded video data.

[0037] The computer-readable medium 110 may represent any type of medium or device capable of transmitting the encoded video data from the source device 102 to the target device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to directly transmit the encoded video data to the target device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 may modulate the transmission signal including the encoded video data, and the input interface 122 may demodulate the received transmission signal. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include a router, a switch, a base station, or any other equipment that may be useful for facilitating communication from the source device 102 to the destination device 116.

[0038] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a DVD, a CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0039] In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Target device 116 may access the stored video data from file server 114 via streaming or downloading.

[0040] The file server 114 may be any type of server device capable of storing encoded video data and sending the encoded video data to the target device 116. The file server 114 may represent a web server (e.g., for a website), a server configured to provide a file delivery protocol service (such as a file delivery protocol (FTP) or a file delivery over unidirectional transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a multimedia broadcast multicast service (MBMS) or an enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as dynamic adaptive streaming over HTTP (DASH), HTTP live streaming (HLS), real-time streaming protocol (RTSP), HTTP dynamic streaming, etc.

[0041] The target device 116 may access the encoded video data from the file server 114 through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both, suitable for accessing the encoded video data stored on the file server 114. The input interface 122 may be configured to operate according to any one or more of the various protocols discussed above for retrieving or receiving media data from the file server 114 or other such protocols for retrieving media data.

[0042] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to communicate data (such as encoded video data) according to a cellular communication standard (such as 4G, 4G-LTE (Long Term Evolution), Advanced LTE, 5G, etc.). In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to communicate data (such as encoded video data) according to other wireless standards (such as IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee 5G, etc.). TM),Bluetooth TM Standards, etc.) to transfer data (such as encoded video data). In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device for performing functionality belonging to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device for performing functionality belonging to video decoder 300 and / or input interface 122.

[0043] The techniques disclosed herein may be applied to video decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission (such as Dynamic Adaptive Streaming over HTTP (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0044] The input interface 122 of the target device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 and also used by the video decoder 300, such as syntax elements with values ​​describing characteristics and / or processing of video blocks or other decoding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0045] Despite Figure 1 Not shown, but in some examples, the video encoder 200 and the video decoder 300 may be integrated with an audio encoder and / or an audio decoder and may include appropriate MUX-DEMUX units or other hardware and / or software to handle a multiplexed stream including both audio and video in a common data stream.

[0046] The video encoder 200 and the video decoder 300 may each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device may store instructions for the software in an appropriate non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder / decoder (codec) in a corresponding device. A device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device (such as a cellular phone).

[0047] The video encoder 200 and the video decoder 300 may operate according to a video coding standard such as ITU-T H.265 (also known as High Efficiency Video Coding (HEVC)) or an extension thereof such as a multi-view and / or scalable video coding extension. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards such as ITU-T H.266, also known as Versatile Video Coding (VVC). In other examples, the video encoder 200 and the video decoder 300 may operate according to a proprietary video codec / format such as AOMedia Video 1 (AV1), an extension of AV1, and / or a subsequent version of AV1 (e.g., AV2). In other examples, the video encoder 200 and the video decoder 300 may operate according to other proprietary formats or industry standards. However, the techniques of the present disclosure are not limited to any particular coding standard or format. In general, the video encoder 200 and the video decoder 300 may be configured to perform the techniques of the present disclosure in conjunction with any video coding technique that uses neural network-based filtering.

[0048] In general, the video encoder 200 and the video decoder 300 may perform block-based decoding of a picture. The term "block" generally refers to a structure that includes data to be processed (e.g., to be encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. In general, the video encoder 200 and the video decoder 300 may decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, instead of decoding red, green, and blue (RGB) data for samples of a picture, the video encoder 200 and the video decoder 300 may decode luminance components and chrominance components, wherein the chrominance components may include both red hue chrominance components and blue hue chrominance components. In some examples, the video encoder 200 converts the received RGB format data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, a pre-processing and post-processing unit (not shown) may perform these conversions.

[0049] The present disclosure may generally relate to the decoding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding data of the picture. Similarly, the present disclosure may relate to the decoding of a block of a picture to include the process of encoding or decoding data for the block (e.g., prediction and / or residual decoding). The encoded video bitstream generally includes a series of values ​​of syntax elements used to represent decoding decisions (e.g., decoding modes) and the partitioning of the picture into blocks. Therefore, references to the decoding of a picture or a block should generally be understood as the decoding values ​​of the syntax elements that form the picture or block.

[0050] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as the video encoder 200) divides a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder divides the CTU and the CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node", and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further divide the PU and TU. For example, in HEVC, a residual quadtree (RQT) represents the division of a TU. In HEVC, a PU represents inter-frame prediction data, and a TU represents residual data. The intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0051] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to VVC. According to VVC, a video decoder (such as the video encoder 200) divides a picture into a plurality of coding tree units (CTUs). The video encoder 200 may divide the CTU according to a tree structure (such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: a first level divided according to quadtree partitions, and a second level divided according to binary tree partitions. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to coding units (CUs).

[0052] In the MTT partition structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) (also known as ternary tree (TT)) partitioning. A ternary tree or ternary tree partition is a partition in which a block is divided into three sub-blocks. In some examples, the ternary tree or ternary tree partition divides the block into three sub-blocks without dividing the original block through the center. The partition types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0053] When operating according to the AV1 codec, the video encoder 200 and the video decoder 300 may be configured to decode the video data in blocks. In AV1, the largest decoding block that can be processed is called a super block. In AV1, a super block can be 128×128 luma samples or 64×64 luma samples. However, in subsequent video coding formats (e.g., AV2), super blocks may be defined by different (e.g., larger) luma sample sizes. In some examples, the super block is the top layer of the block quadtree. The video encoder 200 may further divide the super block into smaller decoding blocks. The video encoder 200 may divide the super block and other decoding blocks into smaller blocks using square or non-square partitions. Non-square blocks may include N / 2×N blocks, N×N / 2 blocks, N / 4×N blocks, and N×N / 4 blocks. The video encoder 200 and the video decoder 300 may perform separate prediction and transform processing on each decoding block.

[0054] AV1 also defines tiles of video data. A tile is a rectangular array of super blocks that can be decoded independently of other tiles. That is, the video encoder 200 and the video decoder 300 can encode and decode coded blocks within a tile, respectively, without using video data from other tiles. However, the video encoder 200 and the video decoder 300 can perform filtering across tile boundaries. The size of the tiles can be uniform or non-uniform. Tile-based decoding can enable parallel processing and / or multi-threading specifically implemented by the encoder and decoder.

[0055] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the respective chroma components).

[0056] The video encoder 200 and the video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, super block partitioning, or other partitioning structures.

[0057] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture with three sample arrays, or a CTB of samples for a monochrome picture or a picture coded using three separate color planes and syntax structures for coding the samples. A CTB may be an N×N block of samples for some N value, such that one partition is to divide the components into CTBs. A component may be an array or a single sample from one of the three arrays (luminance and two chroma) for a 4:2:0, 4:2:2, or 4:4:4 color format picture, or an array or a single sample of an array for a monochrome format picture. In some examples, a coding block is an M×N block of samples for some M and N values, such that one partition is to divide the CTB into coding blocks.

[0058] Blocks (e.g., CTUs or CUs) may be grouped in a picture in various ways. As an example, a brick may refer to a rectangular area of ​​a CTU row within a particular tile in a picture. A tile may be a rectangular area of ​​a CTU within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular area of ​​a CTU having a height equal to the height of the picture and a width specified by a syntax element (e.g., such as in a picture parameter set). A tile row refers to a rectangular area of ​​a CTU having a height specified by a syntax element (e.g., such as in a picture parameter set) and a width equal to the width of the picture.

[0059] In some examples, a tile may be divided into multiple bricks, each of which may include one or more CTU rows within the tile. Tiles that are not divided into multiple bricks may also be referred to as bricks. However, bricks that are true subsets of tiles may not be referred to as tiles. Bricks in a picture may also be arranged in slices. A slice may be an integer number of bricks of a picture that may be uniquely contained in a single network abstraction layer (NAL) unit. In some examples, a slice includes multiple complete tiles or a continuous sequence of complete bricks that include only one tile.

[0060] This disclosure may use "N×N" and "N by N" interchangeably to refer to the sample size of a block (such as a CU or other video block) in terms of the vertical and horizontal dimensions, for example, 16×16 samples or 16 by 16 samples. Generally speaking, a 16×16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an N×N CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. In addition, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N×M samples, where M is not necessarily equal to N.

[0061] The video encoder 200 encodes video data representing prediction and / or residual information and other information for a CU. The prediction information indicates how to predict the CU in order to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0062] In order to predict a CU, the video encoder 200 may generally form a prediction block of the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU from data of a previously decoded picture, while intra-frame prediction generally refers to predicting a CU from previously decoded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 may use one or more motion vectors to generate a prediction block. The video encoder 200 may generally perform a motion search to identify a reference block that closely matches the CU, for example, based on the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may use unidirectional prediction or bidirectional prediction to predict the current CU.

[0063] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (such as zooming in or out, rotation, perspective motion, or other irregular motion types).

[0064] To perform intra prediction, the video encoder 200 may select an intra prediction mode to generate a prediction block. Some examples of VVC provide sixty-seven intra prediction modes, including various directional modes, as well as planar modes and DC modes. In general, the video encoder 200 selects an intra prediction mode that describes neighboring samples of a current block (e.g., a block of a CU) from which to predict the samples of the current block. Assuming that the video encoder 200 decodes CTUs and CUs in raster scan order (from left to right, from top to bottom), such samples may typically be located above, above left, or to the left of the current block in the same picture as the current block.

[0065] The video encoder 200 encodes data representing the prediction mode of the current block. For example, for inter-frame prediction mode, the video encoder 200 may encode data indicating which of various available inter-frame prediction modes is used and motion information of the corresponding mode. For example, for unidirectional or bidirectional inter-frame prediction, the video encoder 200 may encode the motion vector using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 may use a similar mode to encode the motion vector for affine motion compensation mode.

[0066] AV1 includes two general techniques for encoding and decoding coded blocks of video data. The two general techniques are intra prediction (e.g., intra prediction or spatial prediction) and inter prediction (e.g., inter prediction or temporal prediction). In the context of AV1, when an intra prediction mode is used to predict a block of a current frame of video data, the video encoder 200 and the video decoder 300 do not use video data from other frames of the video data. For most intra prediction modes, the video encoder 200 encodes a block of the current frame based on the difference between the sample values ​​in the current block and the prediction values ​​generated from the reference samples in the same frame. The video encoder 200 determines the prediction values ​​generated from the reference samples based on the intra prediction mode.

[0067] After prediction (such as intra-frame prediction or inter-frame prediction for a block), the video encoder 200 may calculate residual data for the block. The residual data (such as a residual block) represents the sample-by-sample difference between the block and a prediction block for the block, which is formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transformed data in a transform domain rather than in a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. Additionally, the video encoder 200 may apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.

[0068] As noted above, after any transforms that produce transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all transform coefficients. For example, the video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bit-by-bit right shift of the value to be quantized.

[0069] After quantization, the video encoder 200 may scan the transform coefficients to generate a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place the transform coefficients of higher energy (and therefore lower frequency) at the front of the vector and the transform coefficients of lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 may scan the quantized transform coefficients using a predefined scan order to generate a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 may entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy encode the values ​​of the syntax elements describing the metadata associated with the encoded video data, which is used by the video decoder 300 when decoding the video data.

[0070] To perform CABAC, video encoder 200 may assign context within a context model to a symbol to be sent. The context may relate to, for example, whether neighboring values ​​of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0071] The video encoder 200 may further generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example in a picture header, a block header, a slice header, or generate other syntax data such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS) to the video decoder 300. The video decoder 300 may also decode such syntax data to determine how to decode the corresponding video data.

[0072] In this way, the video encoder 200 can generate a bitstream including encoded video data, for example, a syntax element describing the partition of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Finally, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0073] In general, the video decoder 300 performs a process that is the reverse of the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may use CABAC to decode the values ​​of the syntax elements for the bitstream in a manner substantially similar to but reverse to the CABAC encoding process of the video encoder 200. The syntax elements may define partition information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partition structure such as a QTBT structure to define CUs of the CTUs. The syntax elements may further define prediction and residual information for a block of video data (e.g., a CU).

[0074] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame prediction or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along the boundaries of the blocks.

[0075] The present disclosure may generally involve "signaling" certain information (such as syntax elements). The term "signaling" may generally refer to the communication of values ​​of syntax elements and / or other data used to decode encoded video data. That is, video encoder 200 may signal values ​​of syntax elements in a bitstream. Generally speaking, signaling refers to generating values ​​in a bitstream. As noted above, source device 102 may transmit the bitstream to destination device 116 in substantially real time or in non-real time (such as may occur when storing syntax elements to storage device 112 for later retrieval by destination device 116).

[0076] According to the technology disclosed herein, ___.

[0077] Figure 2 2 is a conceptual diagram illustrating a hybrid video coding framework. Video coding standards since H.261 are based on the so-called hybrid video coding principle. Figure 2 The term hybrid refers to the combination of two approaches for reducing redundancy in video signals, namely prediction and transform coding with quantization of the prediction residuals. Prediction and transform reduce redundancy in the video signal by decorrelation, while quantization reduces the data represented by the transform coefficients by reducing their precision, ideally by removing only irrelevant details. This hybrid video coding design principle is also used in two recent standards ITU-T H.265 / HEVC and ITU-T H.266 / VVC.

[0078] like Figure 2 As shown in , a modern hybrid video coder 130 typically performs block partitioning, motion compensation or inter-picture prediction, intra-picture prediction, transform, quantization, entropy coding, and post-loop / in-loop filtering. Figure 2 In the example of , the video decoder 130 includes a summing unit 134, a transform unit 136, a quantization unit 138, an entropy decoding unit 140, an inverse quantization unit 142, an inverse transform unit 144, a summing unit 146, a loop filter unit 148, a decoded picture buffer (DPB) 150, an intra-frame prediction unit 152, an inter-frame prediction unit 154 and a motion estimation unit 156.

[0079] In general, the video decoder 130 may receive input video data 132 when encoding video data. Block partitioning is used to divide the received video data picture (image) into smaller blocks for the operation of prediction and transform processes. Early video coding standards used a fixed block size, typically 16×16 samples. Recent standards such as HEVC and VVC adopt a tree-based partitioning structure to provide flexible partitioning.

[0080] The motion estimation unit 156 and the inter-frame prediction unit 154 may predict the input video data 132, for example, based on previously decoded data of the DPB 150. Motion compensation or inter-picture prediction exploits the redundancy that exists between pictures of a video sequence (hence the term "inter-picture"). According to block-based motion compensation used in all modern video codecs, the prediction is obtained from one or more previously decoded pictures (i.e., reference pictures). The corresponding area used to generate the inter-frame prediction is indicated by motion information, including motion vectors and reference picture indices.

[0081] Summation unit 134 may calculate residual data as the difference between input video data 132 and prediction data from intra prediction unit 152 or inter prediction unit 154. Summation unit 134 provides a residual block to transform unit 136, which applies one or more transforms to the residual block to produce a transform block. Quantization unit 138 quantizes the transform block to form quantized transform coefficients. Entropy coding unit 140 entropy encodes the quantized transform coefficients and other syntax elements (such as motion information or intra prediction information) to produce an output bitstream 158.

[0082] At the same time, the inverse quantization unit 142 inverse quantizes the quantized transform coefficients, and the inverse transform unit 144 inverse transforms the transform coefficients to reproduce the residual block. The summation unit 146 combines the residual block with the prediction block (on a sample-by-sample basis) to produce a decoded video data block. The loop filter unit 148 applies one or more filters (e.g., at least one of a neural network-based filter, a neural network-based loop filter, a neural network-based loop post-filter, an adaptive in-loop filter, or a predefined adaptive in-loop filter) to the decoded block to produce a filtered decoded block.

[0083] According to the techniques of this disclosure, a neural network filter unit of loop filter unit 148 may receive data of a decoded picture of video data from summation unit 146 and from one or more other units of hybrid video coder 130 (e.g., transform unit 136, quantization unit 138, intra prediction unit 152, inter prediction unit 154, motion estimation unit 156, and / or one or more other filtering units within loop filter unit 148). For example, the neural network filter unit may receive data from a deblocking filter unit (also referred to as a "deblocking unit") of loop filter unit 148. The neural network filter unit may receive, for example, boundary strength values ​​that indicate whether a particular boundary is to be filtered for deblocking and, if so, the degree to which the boundary is to be filtered. For example, the boundary strength values ​​may correspond to a number of samples on either side of the boundary to be modified and / or the degree to which the samples are to be modified.

[0084] In other examples, in addition to or in lieu of the boundary strength value, the neural network filter unit may receive coding unit (CU) partition data, prediction unit (PU) partition data, transform unit (TU) partition data, deblocking filter data, quantization parameter (QP) data, intra-frame prediction data, inter-frame prediction data, data representing the distance between the decoded picture and one or more reference pictures, or any or all of the motion information of one or more decoded blocks of the decoded picture. The deblocking filter data may also include one or more of whether a long filter or a short filter is used for deblocking or whether a strong filter or a weak filter is used for deblocking. The data representing the distance between the decoded picture and the reference picture may be represented as a picture order count (POC) difference between the POC values ​​of the pictures.

[0085] The neural network filtering unit may determine one or more neural network models to be used to filter at least a portion of the decoded picture. The neural network filtering unit may also use the determined one or more neural network models and data from other units (including boundary strength data) to filter at least a portion of the decoded picture. For example, the neural network filtering unit may provide additional data as one or more additional input planes to a convolutional neural network (CNN).

[0086] A block of video data, such as a CTU or CU, may actually include multiple color components, for example, a luma or "brightness" component, a blue hue chroma or "chroma" component, and a red hue chroma (chroma) component. The luma component may have a larger spatial resolution than the chroma component, and one of the chroma components may have a larger spatial resolution than the other chroma component. Alternatively, the luma component may have a larger spatial resolution than the chroma component, and the two chroma components may have equal spatial resolutions to each other. For example, in a 4:2:2 format, the luma component may be twice as large as the chroma component in the horizontal direction and equal to the chroma component in the vertical direction. As another example, in a 4:2:0 format, the luma component may be twice as large as the chroma component in the horizontal and vertical directions. The various operations discussed above may generally be applied individually to each of the luma component and the chroma component (although certain coding information, such as motion information or intra-prediction direction, may be determined for the luma component and inherited by the corresponding chroma component).

[0087] Figure 3 is a conceptual diagram illustrating a hierarchical prediction structure 166 using a group of pictures (GOP) of size 16. In recent video codecs, a hierarchical prediction structure within a group of pictures (GOP) is applied to improve coding efficiency.

[0088] Reference again Figure 2, intra-picture prediction exploits the spatial redundancy present within a picture (hence the term "intra-picture") by deriving a prediction for a block from already coded / decoded spatially neighboring (reference) samples. Angular prediction, DC prediction, and plane or on-plane prediction are used in the most recent video codecs, including AVC, HEVC, and VVC.

[0089] The hybrid video coding standard applies a block transform to the prediction residual (regardless of whether the prediction residual comes from inter-picture or intra-picture prediction). In earlier standards including H.261, H.262, and H.263, the discrete cosine transform (DCT) was used. In HEVC and VVC, more transform kernels besides DCT can be applied to cope with different statistics in a particular video signal.

[0090] Quantization aims to reduce the precision of an input value or a set of input values ​​in order to reduce the amount of data required to represent them. In hybrid video coding, quantization is usually applied to individual transformed residual samples, i.e., transform coefficients, resulting in integer coefficient levels. In recent video coding standards, the step size is derived from the so-called quantization parameter (QP) that controls fidelity and bitrate. Larger step sizes reduce bitrate, but also reduce quality, which can lead to, for example, blocking artifacts and blurred details in video pictures.

[0091] Due to its high efficiency, Context-Adaptive Binary Arithmetic Coding (CABAC) is a form of entropy coding used in recent video codecs (eg, AVC, HEVC, and VVC).

[0092] Post-loop / in-loop filtering is a filtering process (or a combination of such processes) applied to the reconstructed picture to reduce decoding artifacts. The input to the filtering process is generally the reconstructed picture, which is a combination of the reconstructed residual signal (which includes the quantization error) and the prediction. Figure 2 As shown, the reconstructed picture after in-loop filtering is stored and used as a reference for inter-picture prediction of subsequent pictures. Decoding artifacts are mainly determined by QP, so QP information is generally used in the design of the filtering process. In HEVC, the in-loop filter includes deblocking filtering and sample adaptive offset (SAO) filtering. In the VVC standard, an adaptive loop filter (ALF) is introduced as the third filter. The filtering process of ALF is as follows:

[0093] R′(i,j)=R(i,j)+

[0094] ((∑ k≠0 ∑ l≠0 f(k,l)×K(R(i+k,j+l)-R(i,j),c(k,l))+64)>>7) (1)

[0095] Where R(i,j) is the sample set before the filtering process, and R′(i,j) is the sample value after the filtering process. f(k,l) represents the filter coefficient, K(x,y) is the clipping function, and c(k,l) represents the clipping parameter. The variables k and l are in and where L represents the filter length. The clipping function K(x,y)=min(y,max(-y,x)), which corresponds to the function Clip3(-y,y,x). The clipping operation introduces nonlinearity to make the ALF more efficient by reducing the impact of neighboring sample values ​​that are very different from the current sample value. In VVC, the filtering parameters can be signaled in the bitstream or selected from a predefined filter set. The ALF filtering process can also be summarized using the following equation:

[0096] R'(i,j)=R(i,j)+ALF_residual_ouput(R) (2)

[0097] Figure 4 is a conceptual diagram illustrating a neural network-based filter 170 having four layers. Various studies have shown that embedding a neural network (NN) into, for example, Figure 2 Compression efficiency can be improved in a hybrid video coding framework. Neural networks have been used in modules for intra-frame prediction and inter-frame prediction to improve prediction efficiency. In recent years, NN-based in-loop filtering has also been an active research topic. Sometimes, the filtering process is applied as post-loop filtering, in which case the filtering process is only applied to the output picture and the unfiltered picture is used as a reference picture.

[0098] The NN-based filter 170 may be applied in addition to existing filters such as deblocking filters, sample adaptive offset (SAO), and / or adaptive loop filtering (ALF). The NN-based filter may also be applied exclusively, where the NN-based filter is designed to replace all existing filters. Additionally or alternatively, the NN-based filter (such as the NN-based filter 170) may be designed to supplement, enhance, or replace any or all other filters.

[0099] like Figure 4 As shown, the NN-based filtering process can take the reconstructed samples as input, and the intermediate output is the residual samples, which are added back to the input to refine the input samples. The NN filter can use all color components (e.g., Y, U and V, or Y, Cb and Cr, i.e., brightness, blue hue chroma and red hue chroma) as input to exploit cross-component correlation. Different color components can share the same filter (including network structure and model parameters), or each component can have its own specific filter.

[0100] The filtering process can also be summarized as follows: R′(i,j)=R(i,j)+NN_filter_residual_ouput(R). The model structure and model parameters of the NN-based filter can be predefined and stored at the encoder and decoder. The filter can also be signaled in the bitstream.

[0101] Figure 5 is a conceptual diagram illustrating an example neural network (NN) based filtering solution with multiple modes. That is, Figure 5 An example NN-based filter with multiple modes is depicted. The NN-based filter includes: a first portion including input 3×3 convolution filters 510A to 510E, corresponding parameter rectified linear unit (PReLU) filters 512A to 512E, a cascade unit 514, a fusion filter 516, and a transition filter 522; a set 528 of attention residual (AttRes) blocks 530A to 530N; and a final portion including a 3×3 convolution filter 550, a PReLU filter 552, a 3×3 convolution filter 554, and a pixel shuffle unit 556.

[0102] In the first part, different inputs are received, including a quantization parameter (QP) 500, partition information (part) 502, a boundary strength (BS) 504, prediction information (pred) 506, and a reconstruction block (rec) 508. The corresponding 3×3 convolution filters 510A to 510E and PReLU filters 512A to 512E convolve the corresponding inputs. Then, the cascade unit 514 cascades the convolved inputs. The fusion filter 516 including the 1×1 convolution filter 518 and the PReLU filter 520 fuses the cascaded inputs. The transition filter including the 3×3 convolution filter 524 and the PReLU filter 526 subsamples the fused input to create an output 188. The output 188 is then fed through a set 528 of attention residual blocks 530A to 530N, which may include various numbers of attention residual blocks, for example 8. The attention block is about Figure 6 Further explanation. The output 189 from the last attention residual block in the attention residual block set 184 is fed to the last part. In the last part, the 3×3 convolution filter 550, the PReLU filter 552, the 3×3 convolution filter 554 and the pixel reorganization unit 556 process the output 189, and the addition unit 558 combines the result with the original reconstructed block input 508. This ultimately forms the output for presentation and storage (e.g., stored in a decoded picture buffer (DPB)) as a reference for subsequent inter-frame prediction.

[0103] In some examples, the NN-based filter uses 96 feature maps. Figure 5 The example model of has a relatively high complexity in terms of KMAC / pixel.

[0104] Figure 6 is an example Figure 5 Conceptual diagram of the attention residual block. That is, Figure 6 An attention residual block 530 is depicted, which may include a Figure 5 Components of components of the attention residual blocks 530A to 530N. In this example, the attention residual block 530 includes a first 3×3 convolution filter 532, a parameter rectified linear unit (PReLU) filter 534, a second 3×3 convolution filter 536, an attention block 538, and an addition unit 540. The addition unit 540 combines the output of the attention block 538 with the output 188 originally received by the convolution filter 532 to produce an output 189.

[0105] Figure 7 is an example Figure 7 Conceptual diagram of an example spatial attention layer. Figure 7 As shown, the spatial attention layer of the attention residual block 530 includes a 3×3 convolution filter 706, a PReLU filter 708, a 3×3 convolution filter 710, a size expansion unit 712, a 3×3 convolution filter 720, a PReLU filter 722, and a 3×3 convolution filter 724. The 3×3 convolution filter 706 receives an input 702, and these parameters correspond to Figure 5 704, a quantization parameter (QP) 500, partition information (part) 502, a boundary strength (BS) 504, prediction information (pred) 506, and a reconstructed block (rec) 508. The 3×3 convolution filter 720 receives ZK 704. The outputs of the size expansion unit 712 and the 3×3 convolution filter 724 are combined and then combined with the R value 730 to generate an S value 732. The S value 732 is then combined with the ZK value 704 to produce an output ZK+1 value 734.

[0106] Figure 8 is an example of a replaceable Figure 5 Example of an attention residual block for . Conceptual diagram of the residual block structure. Figure 8The NN-based filters include 3×3 convolution filters 810A to 810E and PReLU filters 812A to 812E, which convolve the corresponding inputs, namely QP 800, Part 802, BS 804, Pred 806, and Rec 808. The concatenation unit 814 concatenates the convolved inputs. Then, the fusion filter 816 fuses the cascaded inputs using the 1×1 convolution filter 818 and the PReLU filter 820. Then, the transformation unit 822 processes the fused data using the 3×3 convolution filter 824 and the PReLU filter 826.

[0107] In this example, the NN-based filter includes a set 828 of residual blocks 830A to 830N, each of which may be based on a Fig. 9 The residual blocks 830A to 830N can be replaced by Figure 5 AttRes blocks 530A to 530N. Figure 8 The examples of may be used for luma (luminance) filtering, but similar modifications may be made for chroma (chroma) filtering as discussed below.

[0108] Figure 8 The number of residual blocks and channels included in the set 828 of can be configured differently. That is, N can be set to different values, and the number of channels in the residual block structure 830 can be set to a number other than 160 to achieve different performance-complexity tradeoffs. These modifications can be used to perform chroma filtering to process chroma channels.

[0109] The set 828 of residual blocks 830A to 830N has N instances of the residual block structure 830. In one example, N may be equal to 32, so that there are 32 residual block structures. The residual blocks 830A to 830N may use 64 feature maps, which are relative to Figure 5 The 96 feature maps used in the example are reduced.

[0110] Fig. 9 is an example Figure 8 830 . In this example, the residual block structure 830 includes a first 1×1 convolution filter 832, which can increase the number of input channels to 160 before the activation layer (PReLU filter 834) processes the input channels. The PReLU filter 834 can thereby reduce the number of channels to 64 through this process. Then, a second 1×1 convolution filter 836 processes the reduced channels, followed by a 3×3 convolution filter 838. Finally, a combination unit 840 can combine the output of the 3×3 convolution filter 838 with the original input received by the residual block structure 830.

[0111] Fig.10is an example of a replaceable Figure 5 Conceptual diagram of another example filter block structure for a set of attention residual blocks. Fig.10 The NN-based filters include 3×3 convolution filters 1010A to 1010E and PReLU filters 1012A to 1012E, which convolve the corresponding inputs, namely QP 1000, Part 1002, BS 1004, Pred 1006, and Rec 1008. The cascade unit 1014 cascades the convolved inputs. Then, the fusion filter 1016 fuses the cascaded inputs using the 1×1 convolution filter 1018 and the PReLU filter 1020. Then, the transformation unit 1022 processes the fused data using the 3×3 convolution filter 1024 and the PReLU filter 1026.

[0112] In this example, the NN-based filtering unit includes N filter blocks 1030A to 1030N, each of which may have a filter block as discussed below. Fig.11 The filter block structure 1030 may be substantially similar to the residual block structure 830, except that the combination unit 840 is omitted from the filter block structure 1030, so that the input is not combined with the output. Instead, the output of each residual block structure may be directly fed to the subsequent block.

[0113] The number of channels and the number of filter blocks can be configurable. In one example, it can be set to 64 channels and 32 filter blocks. The number of channels added in each filter block 198 can be 160 as discussed above.

[0114] Fig.11 Yes Description Fig.10 1030 . In this example, the residual block structure 1030 includes a first 1×1 convolution filter 1032 that can increase the number of input channels to 160 before the activation layer (PReLU filter 1034) processes the input channels. The PReLU filter 1034 can thereby reduce the number of channels to 64 through this process. Then, a second 1×1 convolution filter 1036 processes the reduced channels, followed by a 3×3 convolution filter 1038. As discussed above, Fig. 9 Compared with the residual block structure 830, the filter block structure 1030 does not include a combination unit.

[0115] Fig.12 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Fig.12It is provided for the purpose of explanation and should not be considered as limiting the techniques extensively illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes a video encoder 200 according to VVC (ITU-T H.266, under development) and HEVC (ITU-T H.265) techniques. However, the techniques of this disclosure may be performed by video encoding devices configured for other video coding standards and video coding formats, such as AV1 and subsequent formats of the AV1 video coding format.

[0116] exist Fig.12 In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or in a processing circuit. For example, the units of the video encoder 200 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, an ASIC, or an FPGA. In addition, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.

[0117] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data from, for example, video source 104 ( Figure 1 ) receives video data stored in video data memory 230. DPB 218 can act as a reference picture memory, which stores reference video data for use when subsequent video data is predicted by video encoder 200. Video data memory 230 and DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM) or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same memory device or a separate memory device. In various examples, video data memory 230 can be on-chip with other components of video encoder 200 (as illustrated), or off-chip relative to those components.

[0118] In the present disclosure, references to the video data memory 230 should not be interpreted as limited to a memory inside the video encoder 200 (unless otherwise specified) or a memory outside the video encoder 200 (unless otherwise specified). Rather, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data for a current block to be encoded). Figure 1 Memory 106 may also provide temporary storage for outputs from various units of video encoder 200 .

[0119] Illustrated Fig.12 The various units of the video encoder 200 are provided to help understand the operations performed by the video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functionality and are pre-set for the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the types of operations performed by fixed-function circuits are generally immutable. In some examples, one or more of the units in the unit may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units in the unit may be integrated circuits.

[0120] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example in which the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store instructions (eg, object code) for software received and executed by the video encoder 200, or another memory (not shown) within the video encoder 200 may store such instructions.

[0121] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve a picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.

[0122] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units to perform video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0123] The mode selection unit 202 generally coordinates multiple encoding passes to test combinations of encoding parameters and resulting rate-distortion values ​​for such combinations. The encoding parameters may include the partitioning of CTUs into CUs, the prediction mode for a CU, the transform type for residual data of a CU, the quantization parameter for residual data of a CU, etc. The mode selection unit 202 may ultimately select an encoding parameter combination that has a better rate-distortion value than other tested combinations.

[0124] The video encoder 200 may divide the picture retrieved from the video data memory 230 into a series of CTUs, and pack one or more CTUs into a slice. The mode selection unit 202 may divide the CTUs of the picture according to a tree structure, such as an MTT structure, a QTBT structure, a super block structure, or the above-mentioned quadtree structure. As described above, the video encoder 200 may form one or more CUs by dividing the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks".

[0125] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU). In order to inter-predict the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value representing how similar the potential reference block will be to the current block, for example, based on the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 may generally perform these calculations using the sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 may identify the reference block with the lowest value resulting from these calculations to indicate the reference block that best matches the current block.

[0126] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the positioning of the reference block in the reference picture relative to the positioning of the current block in the current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, in the case where the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate the values ​​of the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0127] When operating according to the AV1 video coding format, the motion estimation unit 222 and the motion compensation unit 224 may be configured to encode coding blocks of the video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or composite inter-intra prediction.

[0128] As another example, for intra prediction or intra prediction coding, the intra prediction unit 226 may generate a prediction block from samples neighboring the current block. For example, for directional mode, the intra prediction unit 226 may generally mathematically combine the values ​​of neighboring samples and pad these calculated values ​​across the current block in a defined direction to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 may calculate an average of neighboring samples of the current block and generate a prediction block to include the resulting average for each sample of the prediction block.

[0129] When operating according to the AV1 video coding format, the intra prediction unit 226 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, chroma from luma (CFL) prediction, intra block copy (IBC), and / or palette mode. The mode selection unit 202 may include additional functional units to perform video prediction according to other prediction modes.

[0130] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may also determine the difference between the sample values ​​in the residual block to generate the residual block using residual differential pulse coding modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0131] In an example where the mode selection unit 202 divides the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As noted above, the size of a CU may refer to the size of the luma coding block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, the video encoder 200 may support PU sizes of 2N×2N or N×N for intra-prediction, and symmetric PU sizes of 2N×2N, 2N×N, N×2N, N×N, or similar for inter-prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning for PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter-prediction.

[0132] In examples where mode select unit 202 does not further divide a CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As above, the size of a CU may refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0133] For other video coding techniques, such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding, as some examples, mode selection unit 202 generates a prediction block for the current block being encoded via a corresponding unit associated with the coding technique. In some examples (such as palette mode coding), mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating the manner in which the block is reconstructed based on the selected palette. In such modes, mode selection unit 202 may provide these syntax elements to entropy encoding unit 220 for encoding.

[0134] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0135] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform a variety of transforms on the residual block, for example, a primary transform and a secondary transform (such as a rotation transform). In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0136] When operating according to AV1, the transform processing unit 206 may apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a horizontal / vertical transform combination, which may include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), a flipped ADST (e.g., an ADST in reverse order), and an identity transform (IDTX). When the identity transform is used, the transform is skipped in one of the vertical direction or the horizontal direction. In some examples, the transform process may be skipped.

[0137] Quantization unit 208 may quantize transform coefficients in a transform coefficient block to produce a quantized transform coefficient block. Quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. Video encoder 200 (e.g., via mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may cause a loss of information, and therefore, the quantized transform coefficients may have a lower precision than the original transform coefficients generated by transform processing unit 206.

[0138] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0139] Filter unit 216 may perform one or more filtering operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, operations of filter unit 216 may be skipped. In various examples, filter unit 216 may include a filter similar to Figures 8 to 11 Components of components.

[0140] When operating according to AV1, filter unit 216 may perform one or more filtering operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In other examples, filter unit 216 may apply a constrained directional enhancement filter (CDEF), which may be applied after deblocking and may include the application of a non-separable, non-linear, low-pass directional filter based on the estimated edge direction. Filter unit 216 may also include a loop recovery filter applied after CDEF, and may include a separable symmetric normalized Wiener filter or a dual self-guided filter.

[0141] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in an example where the operation of the filter unit 216 is not performed, the reconstruction unit 214 may store the reconstructed blocks in the DPB 218. In an example where the operation of the filter unit 216 is performed, the filter unit 216 may store the filtered reconstructed blocks in the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 may retrieve a reference picture formed by the reconstructed (and potentially filtered) blocks from the DPB 218 to perform inter-frame prediction on blocks of subsequently encoded pictures. In addition, the intra-frame prediction unit 226 may use the reconstructed blocks of the current picture in the DPB 218 to perform intra-frame prediction on other blocks in the current picture.

[0142] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode the quantized transform coefficient blocks from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode the prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on the syntax elements (the syntax elements are another example of video data) to generate entropy encoded data. For example, the entropy coding unit 220 may perform a context adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length coding operation, a syntax-based context adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy coding operation on the data. In some examples, the entropy coding unit 220 may operate in a bypass mode where the syntax elements are not entropy encoded.

[0143] The video encoder 200 may output a bitstream including syntax elements of entropy coding required to reconstruct a block of a slice or a picture. Specifically, the entropy coding unit 220 may output a bitstream.

[0144] According to AV1, the entropy coding unit 220 may be configured as a symbol-to-symbol adaptive multi-symbol arithmetic decoder. The syntax elements in AV1 include an alphabet of N elements, and the context (e.g., a probability model) includes a set of N probabilities. The entropy coding unit 220 may store the probabilities as an n-bit (e.g., 15-bit) cumulative distribution function (CDF). The entropy coding unit 220 may perform recursive scaling using an update factor based on the size of the alphabet to update the context.

[0145] The operations described above are described with respect to blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a PU.

[0146] In some examples, operations performed with respect to luma coding blocks do not need to be repeated for chroma coding blocks. As an example, operations to identify motion vectors (MVs) and reference pictures for luma coding blocks do not need to be repeated for MVs and reference pictures used to identify chroma blocks. Instead, the MVs for luma coding blocks may be scaled to determine MVs for chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0147] Fig.13 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Fig.13 It is provided for the purpose of explanation and is not a limitation of the techniques extensively illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes the video decoder 300 according to the techniques of VVC (ITU-T H.266, under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure may be performed by video decoding devices configured for other video decoding standards.

[0148] exist Fig.13 In the example of , the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or in processing circuits. For example, the units of the video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. In addition, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.

[0149] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units to perform predictions according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0150] When operating according to AV1, the motion compensation unit 316 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, OBMC, and / or composite inter-intra prediction, as described above. As described above, the intra prediction unit 318 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, intra-block copy (IBC), and / or palette mode.

[0151] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video bitstream may be obtained from computer readable medium 110 ( Figure 1 ) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from a coded video bitstream. In addition, CPB memory 320 may store video data other than syntax elements of decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 typically stores decoded pictures, which video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the coded video bitstream. CPB memory 320 and DPB 314 may be formed by any storage device in a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or a separate memory device. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300, or off-chip relative to those components.

[0152] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to retrieve the decoded video data. That is, memory 120 may utilize CPB memory 320 to store data as discussed above. Likewise, when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0153] Illustrated Fig.13 The various units shown in FIG. 3 are used to help understand the operations performed by the video decoder 300. The units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Fig.12, fixed-function circuits refer to circuits that provide specific functionality and are pre-set for the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (for example, to receive parameters or output parameters), but the type of operations performed by fixed-function circuits is generally immutable. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0154] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video decoder 300 is performed by software executed on the programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.

[0155] Entropy decoding unit 302 may receive encoded video data from the CPB and entropy decode the video data to reproduce syntax elements. Prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, and filter unit 312 may generate decoded video data based on syntax elements extracted from the bitstream.

[0156] Generally speaking, the video decoder 300 reconstructs a picture block by block. The video decoder 300 may perform a reconstruction operation on each block individually (wherein a block currently being reconstructed (ie, decoded) may be referred to as a "current block").

[0157] The entropy decoding unit 302 may entropy decode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block and transform information, such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, likewise, a degree of inverse quantization to be applied by the inverse quantization unit 306. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0158] After inverse quantization unit 306 forms the transform coefficient block, inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0159] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax elements entropy decoded by entropy decoding unit 302. For example, in the case where the prediction information syntax elements indicate that the current block is inter-frame predicted, motion compensation unit 316 can generate a prediction block. In this case, the prediction information syntax elements can indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 can generally generate ... Fig.12 )The inter-frame prediction process is performed in a manner substantially similar to that described in detail above.

[0160] As another example, where the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Similarly, the intra-prediction unit 318 is generally capable of generating a prediction block in accordance with the intra-prediction mode indicated by the prediction information syntax element. Fig.12 The intra prediction process is performed in a substantially similar manner as described in . The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0161] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0162] The filter unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples. In various examples, the filter unit 312 may include a filter similar to Figures 8 to 11 Components of components.

[0163] The video decoder 300 may store the reconstructed block in the DPB 314. For example, in examples where the operation of the filter unit 312 is not performed, the reconstruction unit 310 may store the reconstructed block in the DPB 314. In examples where the operation of the filter unit 312 is performed, the filter unit 312 may store the filtered reconstructed block in the DPB 314. As discussed above, the DPB 314 may provide reference information (such as samples of the current picture for intra-frame prediction and previously decoded pictures for subsequent motion compensation) to the prediction processing unit 304. In addition, the video decoder 300 may output a decoded picture (e.g., a decoded video) from the DPB 314 for use in, for example, Figure 1 Subsequent presentation on a display device such as display device 118.

[0164] Fig.14 2 is a flowchart illustrating an example method for encoding a current block according to the technology of the present disclosure. The current block may include a current CU. Although relative to the video encoder 200 ( Figure 1 and Fig.12 ), but it should be understood that other devices may be configured to perform the same Fig.14 A similar approach to the one used in this paper.

[0165] In this example, the video encoder 200 initially predicts a current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate the difference between the original uncoded block and the prediction block of the current block. The video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the transform coefficients (358). For example, the video encoder 200 may encode the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output entropy encoded data for the block (360).

[0166] The video encoder 200 may also decode the current block after encoding the current block to use the decoded version of the current block as reference data for subsequent coded data (e.g., in an inter-prediction mode or an intra-prediction mode). Thus, the video encoder 200 may inverse quantize and inverse transform the coefficients to reproduce a residual block (362). The video encoder 200 may combine the residual block with the prediction block to form a decoded block (364). The video encoder 200 may further perform in-loop filtering (366) according to any of the various techniques of the present disclosure, for example, applying one or more neural network processing blocks to the intermediate filtered video data, each of the neural network processing blocks including a neural network processing block as discussed above according to the present invention. Figures 8 to 11 The video encoder 200 may filter the decoded block (or the entire decoded picture including the decoded block) before storing the decoded block.

[0167] Fig.15 1 is a flowchart illustrating an example method for decoding a current video data block according to the techniques of the present disclosure. The current block may include a current CU. Although relative to the video decoder 300 ( Figure 1 and Fig.13 ), but it should be understood that other devices may be configured to perform the same Fig.15 A similar approach to the one used in this paper.

[0168] The video decoder 300 may receive entropy coded data for a current block, such as entropy coded prediction information and entropy coded data for transform coefficients of a residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy coded data to determine prediction information for the current block and reproduce transform coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, using an intra-prediction mode or an inter-prediction mode as indicated by the prediction information of the current block, to calculate a prediction block for the current block. The video decoder 300 may then inverse scan the reproduced transform coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to generate a residual block (378). The video decoder 300 may finally decode the current block by combining the prediction block and the residual block (380). After combining the prediction block and the residual block to form a decoded block, video decoder 300 may filter the decoded block (or the entire decoded picture including the decoded block) ( 382 ).

[0169] Fig.16is a flowchart illustrating an example method for filtering video data using a series of one or more residual blocks of a CNN filter according to the techniques of this disclosure. The method may be performed by video encoder 200 or video decoder 300. Fig.16 The method is explained with respect to the video decoder 300. However, it should be understood that other devices such as the video encoder 200 may perform the method or similar methods. For example, Fig.16 The method can correspond to Fig.14 Step 366 or Fig.15 Step 382.

[0170] Initially, the filter unit 312 of the video decoder 300 (which may include a filter similar to Figures 8 to 11 The components of any of the components of the graph in the example above) filter the input data using corresponding 3×3 convolutional neural network filters and PReLU filters (400). These inputs may include, for example, reconstructed blocks of video data, prediction information, quantization parameters (QP), partition information, and / or deblocking filter information such as boundary strength (BS) values.

[0171] Filter unit 312 may then cascade the filtered inputs (402). For example, filter unit 312 may form a three-dimensional set of inputs, where two of the dimensions correspond to the width and height of a decoded picture of the video data, and the third dimension corresponds to different components, such as red / green / blue or luma / blue hue chroma / red hue chroma, and other inputs, such as prediction information, QP, partition information, BS values, etc. Each of the other inputs may be provided as a separate component having a size of the picture and sample values ​​corresponding to a pixel position of the picture, where each of the sample values ​​may have the same value corresponding to the input of the component. That is, for example, the QP components may have sample values ​​that are each equal to the corresponding QP.

[0172] Filter unit 312 may then apply a fused filter (404) to the cascaded filtered input. Applying the fused filter may include applying a 1×1 convolution filter followed by a PReLU filter. Filter unit 312 may also apply a transition filter (406) including applying a 3×3 convolution filter followed by a PReLU filter. Filter unit 312 may then apply a set of one or more residual blocks (or filter blocks) (408). Applying the one or more residual blocks is described below with respect to Fig.17 Discuss in more detail.

[0173] Filter unit 312 may then apply a 3x3 CNN filter (410), a PReLU filter (412), another 3x3 CNN filter (414), and a pixel binning filter (416). Finally, filter unit 312 may combine the resulting filtered data with the input reconstructed data (418).

[0174] Fig.17 is a flowchart illustrating an example method for performing a residual block of a CNN filter according to the techniques of this disclosure. Fig.17 The method can correspond to Fig.16 Step 408. Each residual block may receive input data (420), apply a 1×1 CNN filter to the input data (422), apply a PReLU filter (424), apply a 1×1 CNN filter (426), apply a 3×3 CNN filter (428), and then combine the output of the 3×3 CNN filter with the received input data (430). In some examples, for example, as in Fig.10 and Fig.11 In this case, the final combination step can be omitted to realize the filter block, which is opposite to the residual block.

[0175] Various examples of the techniques of this disclosure are summarized in the following clauses:

[0176] Item 1: A method for filtering video data, the method comprising: applying one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; applying additional neural network processing blocks to the outputs of the one or more neural network processing blocks to form filtered video data; and outputting the filtered image data.

[0177] Clause 2: The method of clause 1, wherein the number of the one or more neural network processing blocks is equal to thirty-two.

[0178] Clause 3: A method according to any one of clauses 1 and 2, wherein applying the one or more neural network processing blocks includes applying a plurality of feature maps.

[0179] Clause 4: A method according to clause 3, wherein the number of feature maps is equal to 64.

[0180] Clause 5: A method according to any one of clauses 1 to 4, wherein applying the one or more neural network processing blocks includes combining the input of the neural network processing block with the output of the 3×3 convolution filter as the output from the neural network processing block through each of the neural network processing blocks.

[0181] Clause 6: A method according to any of clauses 1 to 5, wherein the first 1×1 convolutional filter increases the number of channels to a maximum of 160, and wherein the PReLU filter reduces the number of channels to 64.

[0182] Clause 7: A method according to any one of clauses 1 to 6, further comprising using a fusion neural network filter block and a transition neural network filter block to form intermediate filtered video data.

[0183] Clause 8: The method of clause 1, wherein the number of the one or more neural network processing blocks is equal to thirty-two.

[0184] Clause 9: The method of clause 1, wherein applying the one or more neural network processing blocks comprises applying a plurality of feature maps.

[0185] Clause 10: The method of clause 9, wherein the number of feature maps is equal to 64.

[0186] Clause 11: A method according to clause 1, wherein applying the one or more neural network processing blocks includes combining the input of the neural network processing block with the output of the 3×3 convolution filter as the output from the neural network processing block through each of the neural network processing blocks.

[0187] Clause 12: The method of clause 1, wherein the first 1×1 convolutional filter increases the number of channels to a maximum of 160, and wherein the PReLU filter reduces the number of channels to 64.

[0188] Clause 13: The method of clause 1, further comprising forming intermediate filtered video data using a fusion neural network filter block and a transition neural network filter block.

[0189] Clause 14: A method according to any of clauses 1 to 13, further comprising decoding a current picture of the video data and forming the intermediate filtered video data from the decoded current picture.

[0190] Clause 15: The method of clause 14, further comprising encoding a current picture of the video data prior to decoding the current picture of the video data.

[0191] Clause 16: An apparatus for filtering video data, the apparatus comprising one or more means for performing the method of any of clauses 1 to 15.

[0192] Clause 17: The apparatus of clause 16, wherein the one or more components comprise one or more processors implemented in circuitry.

[0193] Clause 18: The apparatus of any of clauses 16 and 17, further comprising a display configured to display the decoded video data.

[0194] Clause 19: The device of any of clauses 16 to 18, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0195] Clause 20: The apparatus of clauses 16 to 19, further comprising a memory configured to store the video data.

[0196] Clause 21: A computer-readable storage medium having stored thereon instructions which, when executed, cause a processor of an apparatus for decoding video data to perform the method of any one of clauses 1 to 15.

[0197] Item 22: A device for filtering video data, the device comprising: a component for applying one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter and a 3×3 convolution filter; a component for applying additional neural network processing blocks to the output of the one or more neural network processing blocks to form filtered video data; and a component for outputting the filtered video data.

[0198] Item 23: A method for filtering video data, the method comprising: applying one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter and a 3×3 convolution filter; applying additional neural network processing blocks to the outputs of the one or more neural network processing blocks to form filtered video data; and outputting the filtered image data.

[0199] Clause 24: The method of clause 23, wherein the one or more neural network processing blocks comprise residual blocks.

[0200] Clause 25: The method of clause 23, wherein the number of said one or more neural network processing blocks is equal to thirty-two.

[0201] Clause 26: The method of clause 23, wherein applying the one or more neural network processing blocks comprises applying a plurality of feature maps.

[0202] Clause 27: A method according to clause 26, wherein the number of feature maps is equal to 64.

[0203] Clause 28: A method according to clause 23, wherein applying the one or more neural network processing blocks includes combining the input of the neural network processing block with the output of the 3×3 convolution filter as the output from the neural network processing block through each of the neural network processing blocks.

[0204] Clause 29: The method of clause 23, wherein the first 1×1 convolutional filter increases the number of channels to a maximum of 160, and wherein the PReLU filter reduces the number of channels to 64.

[0205] Clause 30: The method of clause 23, further comprising forming intermediate filtered video data using a fusion neural network filter block and a transition neural network filter block.

[0206] Clause 31: A method according to clause 30, wherein the fusion network filter block includes a 1×1 convolution filter and a second PReLU filter, and wherein the transformation neural network filter block includes a 3×3 convolution filter and a third PReLU filter.

[0207] Clause 32: The method of clause 23, further comprising decoding a current picture of video data and forming the intermediate filtered video data from the decoded current picture.

[0208] Clause 33: The method of clause 32, further comprising encoding a current picture of the video data prior to decoding the current picture of the video data.

[0209] Item 34: A device for filtering video data, the device comprising: a memory configured to store video data; and a processing system comprising one or more processors implemented in a circuit, the processing system being configured to: apply one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; apply additional neural network processing blocks to the outputs of the one or more neural network processing blocks to form filtered video data; and output the filtered image data.

[0210] Clause 35: An apparatus as described in clause 34, wherein the one or more neural network processing blocks include residual blocks.

[0211] Clause 36: The apparatus of clause 34, wherein the number of said one or more neural network processing blocks is equal to thirty-two.

[0212] Clause 37: The apparatus of clause 34, wherein to apply the one or more neural network processing blocks, the processing system is configured to apply a plurality of feature maps.

[0213] Clause 38: The apparatus of clause 37, wherein the number of feature maps is equal to 64.

[0214] Clause 39: An apparatus according to clause 34, wherein each of the neural network processing blocks is configured to combine the input of the neural network processing block with the output of the 3×3 convolution filter as the output from the neural network processing block.

[0215] Clause 40: The apparatus of clause 34, wherein the first 1×1 convolution filter is configured to increase the number of channels to a maximum of 160, and wherein the PReLU filter is configured to reduce the number of channels to 64.

[0216] Clause 41: An apparatus according to clause 34, wherein the processing system is configured to form the intermediate filtered video data using a fusion neural network filter block and a transition neural network filter block.

[0217] Clause 42: An apparatus according to clause 41, wherein the fusion network filter block includes a 1×1 convolution filter and a second PReLU filter, and wherein the transformation neural network filter block includes a 3×3 convolution filter and a third PReLU filter.

[0218] Clause 43: The apparatus of clause 34, wherein the processing system is further configured to decode a current picture of video data and to form the intermediate filtered video data from the decoded current picture.

[0219] Clause 44: The apparatus of clause 43, wherein the processing system is further configured to encode a current picture of the video data before the processing system decodes the current picture of the video data.

[0220] Clause 45: The device of clause 34, further comprising a display configured to display the filtered video data.

[0221] Clause 46: The device of clause 34, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0222] Item 47: A computer-readable storage medium having instructions stored thereon, which when executed cause a processing system to: apply one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; apply additional neural network processing blocks to the outputs of the one or more neural network processing blocks to form filtered video data; and output the filtered image data.

[0223] Item 48: A device for filtering video data, the device comprising: a component for applying one or more neural network processing blocks to intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter and a 3×3 convolution filter; a component for applying additional neural network processing blocks to the output of the one or more neural network processing blocks to form filtered video data; and a component for outputting the filtered video data.

[0224] It should be appreciated that, according to examples, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all actions or events described are necessary to implement the technique). In addition, in some examples, actions or events may be performed concurrently (e.g., by multithreading, interrupt handling, or multiple processors) rather than sequentially.

[0225] In one or more examples, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functionality may be stored as one or more instructions or codes on a computer-readable medium or sent via a computer-readable medium and executed by a hardware-based processing unit. A computer-readable medium may include a computer-readable storage medium (which corresponds to a tangible medium such as a data storage medium) or a communication medium, which includes, for example, any medium that facilitates the transfer of a computer program from one place to another according to a communication protocol. Thus, a computer-readable medium may generally correspond to (1) a non-transient tangible computer-readable storage medium, or (2) a communication medium such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in the present disclosure. A computer program product may include a computer-readable medium.

[0226] By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, flash memory, or any other medium that can be used to store the desired program code in the form of instructions or data structures and can be accessed by a computer. In addition, any connection is appropriately referred to as a computer-readable medium. For example, if the instruction is sent from a website, server or other remote source using a coaxial cable, optical fiber cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave), the coaxial cable, optical fiber cable, twisted pair, DSL or wireless technology (such as infrared, radio and microwave) is included in the definition of the medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other transient media, but are instead directed to non-transient tangible storage media. As used herein, disks and optical disks include compact disks (CDs), laser optical disks, optical optical disks, digital versatile disks (DVDs), floppy disks and blue-ray disks, wherein disks usually reproduce data magnetically, while optical disks reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0227] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Therefore, the terms "processor" and "processing circuit" as used herein may refer to any of the aforementioned structures or any other structure suitable for implementing the techniques described herein. In addition, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. In addition, these techniques may be fully implemented in one or more circuits or logic elements.

[0228] The techniques of the present disclosure may be implemented in a variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in the present disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require implementation by different hardware units. Specifically, as described above, the various units may be combined in a codec hardware unit, or the various units may be provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with appropriate software and / or firmware.

[0229] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for filtering video data, the method comprising: applying one or more neural network processing blocks to the intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; applying additional neural network processing blocks to outputs of the one or more neural network processing blocks to form filtered video data; as well as The filtered video data is output.

2. The method of claim 1, wherein the one or more neural network processing blocks include a residual block.

3. The method of claim 1 , wherein the number of the one or more neural network processing blocks is equal to 32.

4. The method of claim 1 , wherein applying the one or more neural network processing blocks comprises applying a plurality of feature maps. The method according to claim 4 , wherein the number of feature maps is equal to 64.

6. A method according to claim 1, wherein applying the one or more neural network processing blocks includes combining the input of the neural network processing block with the output of the 3×3 convolution filter as the output from the neural network processing block through each of the one or more neural network processing blocks.

7. The method of claim 1, wherein the first 1×1 convolution filter increases the number of channels to a maximum of 160, and wherein the PReLU filter reduces the number of channels to 64.

8. The method of claim 1 further comprising using a fusion neural network filter block and a transition neural network filter block to form the intermediate filtered video data.

9. The method of claim 8, wherein the fusion network filter block comprises a 1×1 convolution filter and a second PReLU filter, and wherein the transformation neural network filter block comprises a 3×3 convolution filter and a third PReLU filter.

10. The method of claim 1, further comprising decoding a current picture of video data and forming the intermediate filtered video data from the decoded current picture. 11 . The method of claim 10 , further comprising encoding a current picture of the video data before decoding the current picture of the video data.

12. A device for filtering video data, the device comprising: a memory configured to store video data; and A processing system comprising one or more processors implemented in circuitry, the processing system being configured to: applying one or more neural network processing blocks to the intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; applying additional neural network processing blocks to outputs of the one or more neural network processing blocks to form filtered video data; as well as The filtered video data is output.

13. The apparatus of claim 12, wherein the one or more neural network processing blocks comprise residual blocks.

14. The apparatus of claim 12, wherein the number of the one or more neural network processing blocks is equal to 32.

15. The apparatus of claim 12, wherein to apply the one or more neural network processing blocks, the processing system is configured to apply a plurality of feature maps. The apparatus according to claim 15 , wherein the number of the feature maps is equal to 64.

17. The apparatus of claim 12, wherein each of the one or more neural network processing blocks is configured to combine an input of the neural network processing block with an output of the 3×3 convolution filter as an output from the neural network processing block.

18. The apparatus of claim 12, wherein the first 1×1 convolution filter is configured to increase the number of channels to a maximum of 160, and wherein the PReLU filter is configured to reduce the number of channels to 64.

19. The apparatus of claim 12, wherein the processing system is configured to form the intermediate filtered video data using a fusion neural network filter block and a transition neural network filter block.

20. The apparatus of claim 19, wherein the fusion network filter block comprises a 1×1 convolution filter and a second PReLU filter, and wherein the transformation neural network filter block comprises a 3×3 convolution filter and a third PReLU filter.

21. The apparatus of claim 12, wherein the processing system is further configured to decode a current picture of video data and to form the intermediate filtered video data from the decoded current picture.

22. The apparatus of claim 21, wherein the processing system is further configured to encode a current picture of the video data before the processing system decodes the current picture of the video data.

23. The device of claim 12, further comprising a display configured to display the filtered video data.

24. The device of claim 12, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

25. A computer-readable storage medium having stored thereon instructions which, when executed, cause a processing system to: applying one or more neural network processing blocks to the intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; applying additional neural network processing blocks to outputs of the one or more neural network processing blocks to form filtered video data; and The filtered video data is output.

26. A device for filtering video data, the device comprising: means for applying one or more neural network processing blocks to the intermediate filtered video data, each of the neural network processing blocks comprising a first 1×1 convolution filter, a parametric rectified linear unit (PReLU) filter, a second 1×1 convolution filter, and a 3×3 convolution filter; means for applying additional neural network processing blocks to outputs of the one or more neural network processing blocks to form filtered video data; and Means for outputting the filtered video data.

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