Low dielectric constant radio frequency substrate, assembly of substrate and method for manufacturing substrate

By using dielectric materials to form a substrate with a lattice structure, the limitations of drilling and plating through holes in the manufacturing process of low-dip radio frequency substrates in the prior art are solved, and more efficient electric field radiation and simple processing effects are achieved. .

CN119487979APending Publication Date: 2025-02-18ROGERS CORP
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Patent Information

Application Number
CN202380050688.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-28
Filing Date
2023-06-29
Publication Date
2025-02-18

AI Technical Summary

Technical Problem

The existing low-dielectric constant radio frequency substrates have limitations in drilling and plating through holes during the manufacturing process, resulting in problems of processing complexity and low energy storage efficiency.

Method used

A substrate with a lattice structure formed of a dielectric material is adopted, which extends on both sides of the substrate and is integrally connected to both sides, providing a solid surface for circuit imaging and electroplating, and printing through holes directly inside the substrate.

Benefits of technology

The manufacturing of low dielectric constant substrates without additional lamination processes is achieved, which improves the mechanical stability and alignment of the substrates, reduces the dielectric constant, and enhances the electric field radiation efficiency.

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Abstract

A substrate includes a monolithic structure formed of a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side, and the intermediate region has a lattice structure of the dielectric material having a plurality of interstitial spaces between the dielectric material of the lattice structure. A lattice structure extends between and integrally connected with the first side and the second side, where at least one of the first side and the second side has a substantially solid surface suitably configured to support one or more of: electronic circuit imaging; electroplating is conducted; metal deposition; or a through hole between the first side and the second side.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. application serial number 18 / 215,570 filed on June 28, 2023, which claims the benefit of U.S. provisional application serial number 63 / 357,386 filed on June 30, 2022, the entire contents of which are incorporated herein by reference. Background Art

[0003] The present disclosure generally relates to low dielectric constant radio frequency substrates, components of low dielectric constant radio frequency substrates, and methods of manufacturing low dielectric constant radio frequency substrates.

[0004] Substrates with low permittivity or low Dk (dielectric constant) are often preferred for certain RF (radiating elements) such as patch antennas. In these antenna configurations, as the Dk of the substrate decreases, a smaller portion of the electric field is confined and less energy is stored within the substrate, enabling antennas with higher radiation efficiency, wider bandwidth, and increased gain. Today, materials used to simulate air with Dk=1 while providing rigidity and support for printed antennas are typically formed from foamed polymer materials. However, foam materials prohibit common manufacturing techniques such as plated through holes for stacked patch designs and other multi-layer circuit designs. In addition, because foam materials are porous, metallization and / or imaging cannot be performed directly on the surface, so other circuit materials must be laminated to the foam surface, causing additional processing complexity. Therefore, end users must overcome the challenges of building low Dk substrate systems or use higher Dk laminates.

[0005] Previous solutions have involved laminating circuit material to a foam pad (usually previously imaged to prevent process chemicals from seeping into the foam), and routing z-axis lines to connect circuit planes on the top and bottom of the low Dk space (foam) since through holes cannot be drilled and plated.

[0006] While existing foamed polymer substrates available for RF applications may be suitable for their intended purpose, the art associated with low dielectric constant RF substrates will evolve with substrates that overcome one or more of the limitations noted above. Summary of the invention

[0007] Embodiments include a substrate, an assembly and a method as defined by the attached independent claims. Further advantageous modifications of the substrate, the assembly and the method are defined by the attached dependent claims.

[0008] Embodiments include a substrate having: an integral structure formed of a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side; wherein the intermediate region has a lattice structure of the dielectric material having a plurality of interstitial spaces between the dielectric materials of the lattice structure; wherein the lattice structure extends between the first side and the second side and is integrally connected to the first side and the second side; wherein at least one of the first side and the second side has a substantially solid surface that is suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or a through hole between the first side and the second side.

[0009] Embodiments include a multi-layer assembly having two or more of the above described substrates, wherein each of the substrates is mechanically attached, bonded, or fused to an adjacent one of the substrates.

[0010] An embodiment includes a method for manufacturing the above-mentioned substrate having the above-mentioned overall structure, wherein the method includes: forming a first side of the substrate in a continuous process; forming a middle region of the substrate on the first side and integrally with the first side via a continuous process, the middle region having a lattice structure of a dielectric material, the lattice structure including a plurality of gap spaces between the dielectric materials of the lattice structure; and forming a second side of the substrate on the middle region and integrally with the middle region via a continuous process.

[0011] The above features and advantages and other features and advantages of the invention are apparent from the following detailed description of the invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] With reference to the exemplary non-limiting drawings, wherein like elements are similarly numbered throughout the drawings:

[0013] Figure 1A depicts a rotated isometric view of a substrate according to an embodiment;

[0014] Figure 1B depicts a plan view of an example general electronic circuit representation suitable for use with the substrate of FIG. 1 , according to an embodiment;

[0015] Figure 2A Depicted is a diagram of an embodiment of the present invention. Figure 1A A cross-sectional view of a substrate;

[0016] Figure 2B Depicted is a diagram of an embodiment of the present invention. Figure 2A An alternative cross-sectional view of a cross-sectional view of;

[0017] Figure 3A Depicted is a diagram of an embodiment of the present invention. Figure 1A A rotated isometric view of an enlarged portion of a substrate depicting a face-based lattice structure;

[0018] Figure 3B Depicted is a diagram of an embodiment of the present invention. Figure 3A A rotated isometric view of a ceramic fiber;

[0019] Figure 4A Depicted is a diagram of an embodiment of the present invention. Figure 1A a cross-sectional view of an exploded multi-layer assembly of a substrate;

[0020] Figure 4B depicts a cross-sectional view of a multi-layer assembly having mechanically attached adjacent substrates and an enlarged portion thereof according to an embodiment;

[0021] Figure 4C Depicted is a similar Figure 4B but with a cross-sectional view of adjacent substrates bonded together; and

[0022] Figure 4D Depicted is a similar Figure 4B but with a cross-sectional view of adjacent substrates that are fused together.

[0023] Those skilled in the art will appreciate that the drawings further described below are for illustrative purposes only. It should be understood that for simplicity and clarity of illustration, the elements shown in the drawings are not necessarily drawn to scale. For example, for clarity, the size or proportion of some elements may be enlarged relative to other elements. In addition, where deemed appropriate, reference numerals may be repeated in the drawings to indicate corresponding elements or similar elements, or similar elements may not be repeatedly listed in all drawings, and it will be recognized and understood that, in the absence of such enumeration, such enumeration is essentially disclosed. DETAILED DESCRIPTION

[0024] As used herein, the phrase “embodiment” refers to “embodiments disclosed and / or illustrated herein,” which does not necessarily include a specific embodiment of the invention according to the appended claims, but is nevertheless provided herein because it assists in a complete understanding of the invention according to the appended claims.

[0025] Although the following detailed description contains many details for illustrative purposes, any person of ordinary skill in the art will understand that many variations and modifications to the following details are within the scope of the appended claims. For example, where a feature described may not be mutually exclusive with other described features, such combinations of non-mutually exclusive features are considered to be essentially disclosed herein. In addition, common features may generally be shown in various figures, but may not be specifically listed in all figures for simplicity, but will be understood by those skilled in the art as features that are explicitly disclosed, even though it may not be listed in a particular figure. Therefore, the following example embodiments are set forth without loss of generality and without imposing limitations on the claimed invention disclosed herein.

[0026] The embodiments shown and described in the various figures and accompanying text provide a substrate for a 3D printable or other additive manufacturing process that uses a lattice structure to impart a low dielectric constant dielectric, while the substrate is also configured to provide one or more substantially solid surfaces on either or both sides thereof for circuit imaging, and to provide in-situ inclusion of one or more through-holes. Although the embodiments described and shown herein describe a spiral lattice structure as an example structure for the substrate disclosed herein, it should be understood that the invention disclosed herein and according to the appended claims is not so limited, as other lattice structures described herein may also be suitable for the purposes disclosed herein.

[0027] As used herein, the term "monolithic" refers to a structure formed integrally from a single material component and / or process with no material discontinuities from one area of ​​the structure to another, such as a structure produced by, for example, a plastic molding process, a 3D printing process, a deposition process, or a machining process.

[0028] As used herein, the term “substantially” is intended to take into account manufacturing tolerances and / or minor deviations, such as vias, that do not detract from the intended performance or scope of the present invention disclosed herein in accordance with the appended claims.

[0029] As described and illustrated herein, embodiments include 3D printable substrates that use a lattice structure to impart a low dielectric constant while being designed with a solid surface for circuit imaging and the ability to create vias in-situ.

[0030] In embodiments, the substrate may include a 3D lattice of printed dielectric material with a solid printed film on one or both sides. In embodiments, vias may be printed directly in the substrate by creating solid cylindrical walls within the lattice that are open at both ends of the substrate. Printing solid films on both sides may be employed when using ground planes or capacitively coupled patch elements within a component, but single-sided (or double-sided) components may incorporate other structures.

[0031] In embodiments, the printed lattice can operate as a single dielectric medium because the features are much smaller than a fraction of the operating wavelength and can typically be less than a few hundred microns.

[0032] In an embodiment, the lattice structure may be a gyroid lattice having good mechanical stability and uniform density distribution within a unit cell.

[0033] Some advantages of the embodiments disclosed herein may include one or more of the following: a mechanically robust, low dielectric constant substrate with a solid, non-porous surface; an integrally formed through-hole structure for connecting components on either side of the substrate; a single, monolithic structure with better alignment and lower Dk; no need for additional lamination processes; and a lower dielectric constant than other copper-clad laminates.

[0034] Now refer to Figure 1A , Figure 1B , Figure 2A , Figure 2B , Figure 3A and Figure 3B .

[0035] In an embodiment, the substrate 100 includes an overall structure 102 formed of a dielectric material having a first side 200, a second side 300, and an intermediate region 400 between the first side 200 and the second side 300. In an embodiment, the intermediate region 400 has a lattice structure 403 of the dielectric material, the lattice structure 403 having a plurality of interstitial spaces 402 (see Figure 3A 102 is a block structure 104 that is best shown in the drawings), wherein a lattice structure 403 extends between and is integrally connected to the first side 200 and the second side 300. At least one of the first side 200 and the second side 300 includes a substantially solid surface 202, 302 that is appropriately configured to support one or more of: electronic circuit imaging; electroplating; metal deposition (generally referred to herein by the reference numeral 250); or a through hole 140 between the first side 200 and the second side 300. In an embodiment, the interstitial space 402 is formed entirely or at least partially by air. In an embodiment, the monolithic structure 102 is not formed of foam and / or is not a laminate structure. As used herein, the term laminate structure refers to a structure having separate and discrete layers of material that are fixed together to form a hard, flat or flexible material. In an embodiment, the lattice structure 403 is a spiral lattice structure, but it can be any other surface-based lattice structure in contrast to a strut-based lattice structure. In an embodiment, the lattice structure 403 of the intermediate region 400 has a uniform distribution of dielectric material and interstitial spaces 402 .

[0036] In an embodiment, both the first side 200 and the second side 300 have substantially solid surfaces 202, 302 (see Figure 2A best shown): electronic circuit imaging; electroplating; metal deposition 250 (refer to Figure 1B or the through hole 104 between the first side 200 and the second side 300 (see Figure 3A 3). In an embodiment, the monolithic structure 102 of the substrate 100 includes one or more through-holes 104 extending between the first side 200 and the second side 300 (best shown with reference to FIG. 3). In an embodiment, the one or more through-holes 104 have an (inner) conductive surface extending between the first side 200 and the second side 300 of the monolithic structure 102 for providing at least one conductive path between the first side 200 and the second side 300. In an embodiment, the first side 200, the second side 300, or both the first side 200 and the second side 300 of the monolithic structure 102 have a metallized surface in electrical contact with the conductive through-holes 104. In an embodiment, the conductive through-holes 104 and the metallized surfaces of the first side 200 and the second side 300 are metallized together using the same metallization process (such as, for example, metal vapor deposition).

[0037] In an embodiment, the dielectric material of the monolithic structure 102 of the substrate 100 has a relative permittivity equal to or greater than 1.01 and equal to or less than 5, or alternatively, the dielectric material has a relative permittivity equal to or greater than 1.1 and equal to or less than 4.5.

[0038] In an embodiment, the overall structure 102 of the substrate 100 is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side 200 and the second side 300, and the dielectric material includes: ceramic fibers 150 substantially aligned with the xy plane of the xyz coordinate system; ceramic fibers 160 substantially aligned with the z-axis of the xyz coordinate system; or both ceramic fibers 150 substantially aligned with the xy plane of the xyz coordinate system and ceramic fibers 160 substantially aligned with the z-axis of the xyz coordinate system (refer to Figure 3B best shown). Although Figure 3B Only a few example arrangements of the number, width, and length of ceramic fibers 150, 160 are depicted, but it should be understood that these arrangements are for illustrative purposes only and that the number, width, and length of such ceramic fibers 150, 160 may vary depending on the desired performance characteristics and in accordance with the embodiments disclosed herein.

[0039] In an embodiment, the first side 200 of the substrate 100 is planar, the second side 300 of the substrate 100 is planar, and the second side 300 is parallel to the first side 200 (see FIGS. 1 and 2 ). Figure 2A In another embodiment, the first side 200 of the substrate 100 is disposed equidistantly at a distance "T" relative to the second side 300 of the substrate 100. In an embodiment, the first side 200 of the substrate 100 and the second side 300 of the substrate 100 are curved (see Figure 2B best shown).

[0040] In an embodiment, the overall structure 102 of the substrate 100 is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side 200 and the second side 300, and the substrate 100 operates at a defined center frequency f having an operating wavelength λ, and the total thickness of the substrate 100 in the z-direction is equal to or less than λ / 2 or alternatively equal to or less than λ / 4. In an example embodiment, the defined center frequency is 4.9 GHz, and the z-direction thickness of the substrate is 4.0 mm.

[0041] Now, combined with Figure 1, Figure 2A , Figure 2B , Figure 3A and Figure 3B For reference Figure 4A , Figure 4B , Figure 4C and Figure 4D .

[0042] In an embodiment, and as Figure 4A , Figure 4B , Figure 4C and Figure 4D As depicted, the multi-layer assembly 500 includes two or more of the components described herein above and in FIGS. Figure 2A , Figure 2B , Figure 3A and Figure 3B The substrate 100 shown in Figure 4A , Figure 4B , Figure 4C and Figure 4D 1, 100.2, etc.), wherein a plurality of (i.e., two or more) substrates 100 are formed by Figure 4A It is indicated by the ellipsis 502 in FIG.

[0043] In the embodiments and with reference to Figure 4B, one substrate 100.1 is mechanically attached to another adjacent substrate 100.2 via a mechanical attachment structure 504, such as interlocking elastically deformable protrusions 510 on each substrate 100.1, 100.2, which are arranged to be one-to-one registered with, for example, corresponding elastically deformable recesses 515 on the adjacent substrate in each substrate 100.1, 100.2. In other words, each substrate 100.1, 100.2 has one or more mechanical registration features 510, 515, which are mechanically attached and interlocked with corresponding mechanical registration features in the mechanical registration features 515, 510 of the adjacent substrate in the substrates 100.1, 100.2. In an embodiment, one or more mechanical registration features 510, 515 and corresponding mechanical registration features in the mechanical registration features 515, 510 have an elastically deformable interference fit therebetween. In an embodiment, the elastically deformable protrusion 510 may be fully or at least partially inserted into a corresponding recess in the elastically deformable recess 515 .

[0044] In the embodiments and with reference to Figure 4C , one substrate 100 . 1 is bonded to another adjacent substrate 100 . 2 via an adhesive 506 .

[0045] In the embodiments and with reference to Figure 4D , one substrate 100 . 1 is welded to another adjacent substrate 100 . 2 via a welding interface 508 .

[0046] In an embodiment, the multilayer assembly 500 is configured such that: each integral structure 102 is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side 200 and the second side 300, wherein the multilayer assembly 500 operates at a defined frequency f having an operating wavelength λ, and wherein the total thickness of the multilayer assembly 500 in the z-direction is equal to or less than λ / 2, or alternatively equal to or less than λ / 4.

[0047] Based on all of the foregoing, it can be understood that in addition to the configuration disclosed herein for imparting a low dielectric constant dielectric to the substrate 100 using a lattice structure 403, a method for manufacturing the substrate is also disclosed herein.

[0048] In an embodiment, a method for manufacturing a substrate 100 having an integral structure 102 disclosed and shown herein includes: forming a first side 200 of the substrate 100 in a continuous process; forming a middle region 400 of the substrate 100 on and integrally with the first side 100 via a continuous process, the middle region 400 having a lattice structure 403 of a dielectric material, the lattice structure 403 having a plurality of gap spaces 402 between the dielectric materials of the lattice structure 403; and forming a second side 300 of the substrate 100 on and integrally with the middle region 400 via a continuous process.

[0049] In an embodiment of the method, the continuous process further includes forming one or more through holes 104 extending from the first side 200 through the intermediate region 400 to the second side 300 .

[0050] In an embodiment, the method further comprises imaging or metallizing the electronic circuit 250 on at least one of the first side 200 and the second side 300 to provide electronic circuit imaging. Figure 1B Depicts a circuit having a plurality of conductive traces 252 and a plurality of conductive vias 104 (the same reference numerals are used for Figure 3A 104 as they will be electrically connected to each other) is part of a general electronic circuit 250 that can be used in the manner disclosed herein.

[0051] In an embodiment, a method of manufacturing a substrate 100 includes forming an integral structure 102 relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side 200 and the second side 300, wherein the method further includes forming a ceramic fiber 150 within a dielectric material via a continuous process, the ceramic fiber 150 being: substantially aligned with an xy plane of the xyz coordinate system; substantially aligned with the z-axis of the xyz coordinate system; or substantially aligned with the xy plane of the xyz coordinate system and substantially aligned with the z-axis of the xyz coordinate system.

[0052] In an embodiment, the continuous processes involved in the method of manufacturing the substrate 100 include any of: 3D printing; stereolithography; light-based additive manufacturing; or digital light processing for cross-linking of dielectric materials.

[0053] Although specific combinations of individual features are described and illustrated herein, it should be understood that these specific combinations of features are for illustrative purposes only, and any combination of any such individual features may be employed in accordance with the implementation, regardless of whether such combinations are explicitly described, and consistent with the disclosure herein. Any and all such combinations of features disclosed herein are contemplated herein, are considered to be within the scope of understanding of those skilled in the art when considering this application as a whole, and are considered to be within the scope of the invention disclosed herein, as long as they fall within the scope of the invention defined by the appended claims in a manner that can be understood by those skilled in the art.

[0054] Although the present invention is described herein with reference to example embodiments, it will be understood by those skilled in the art that various changes may be made and elements thereof may be substituted with equivalents without departing from the scope of the claims. Many modifications may be made to adapt a particular situation or material to the teachings of the present invention without departing from the essential scope of the present invention. Therefore, it is intended that the present invention is not limited to the embodiments or specific embodiments disclosed herein as the best or only mode of implementing the present invention, but that the present invention will include all embodiments falling within the scope of the appended claims. In the drawings and description, example embodiments have been disclosed, and although specific terms and / or dimensions may be employed, unless otherwise specified, they are used only in a general, exemplary and / or descriptive sense, and not for the purpose of limitation, and therefore the scope of the claims is not so limited. The use of the terms "first", "second", etc. does not indicate any order or importance, and the terms "first", "second", etc. are used to distinguish one element from another. The use of the terms a, an, etc. does not indicate a limitation on the number, but indicates that there is at least one of the mentioned items. The term "comprising" used herein does not exclude the possibility of including one or more additional features. And any background information provided herein is provided to reveal information the applicant believes may be relevant to the invention disclosed herein. It is not necessarily intended to, nor should it be construed as, an admission that any such background information constitutes prior art to the embodiments of the invention disclosed herein.

[0055] In view of all of the above, it should be understood that various aspects of the embodiments are disclosed herein, which are consistent with but not limited to the following aspects and / or combinations of aspects.

[0056] Aspect 1: A substrate comprising: an integral structure formed of a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side; wherein the intermediate region comprises a lattice structure of the dielectric material, the lattice structure comprising a plurality of gap spaces between the dielectric materials of the lattice structure; wherein the lattice structure extends between the first side and the second side and is integrally connected to the first side and the second side; wherein at least one of the first side and the second side comprises a substantially solid surface suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or a through hole between the first side and the second side.

[0057] Aspect 2: The substrate according to aspect 1, wherein: the interstitial space comprises air.

[0058] Aspect 3: The substrate according to any one of aspects 1 to 2, wherein: the integral structure is not a foam material.

[0059] Aspect 4: The substrate according to any one of aspects 1 to 3, wherein: the integral structure is not a laminated structure.

[0060] Aspect 5: A substrate according to any one of Aspects 1 to 4, wherein: both the first side and the second side include substantially solid surfaces that are appropriately configured to support one or more of the following: electronic circuit imaging; electroplating; metal deposition; or a through hole between the first side and the second side.

[0061] Aspect 6: The substrate according to any one of aspects 1 to 5, wherein: the dielectric material of the overall structure has a relative dielectric constant equal to or greater than 1.01 and equal to or less than 5.

[0062] Aspect 7: The substrate according to Aspect 6, wherein: the dielectric material of the overall structure has a relative dielectric constant equal to or greater than 1.1 and equal to or less than 4.5.

[0063] Aspect 8: A substrate according to any one of Aspects 1 to 7, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; and the dielectric material includes ceramic fibers substantially aligned with the xy plane of the xyz coordinate system.

[0064] Aspect 9: A substrate according to any one of Aspects 1 to 7, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; and the dielectric material includes ceramic fibers substantially aligned with the z-axis of the xyz coordinate system.

[0065] Aspect 10: A substrate according to any one of Aspects 1 to 7, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; the dielectric material includes ceramic fibers substantially aligned with the xy plane of the xyz coordinate system, and the dielectric material includes ceramic fibers substantially aligned with the z-axis of the xyz coordinate system.

[0066] Aspect 11: The substrate according to any one of aspects 1 to 10, wherein: the unitary structure includes one or more through holes extending between the first side and the second side.

[0067] Aspect 12: The substrate of aspect 11, wherein: the one or more through-holes comprise a conductive surface between the first side and the second side of the unitary structure.

[0068] Aspect 13: The substrate according to any one of aspects 1 to 12, wherein: the lattice structure comprises a spiral lattice structure.

[0069] Aspect 14: The substrate according to any one of aspects 1 to 13, further comprising: a metallization layer on the first side, the second side, or both the first side and the second side of the unitary structure.

[0070] Aspect 15: The substrate according to Aspect 14 further includes the through hole, wherein: the through hole includes a conductive surface between the first side and the second side of the integral structure, which is electrically connected to the metallization layer of the first side, the second side, or both the first side and the second side.

[0071] Aspect 16: The substrate according to any one of aspects 1 to 15, wherein: the lattice structure is a plane-based lattice structure rather than a pillar-based lattice structure.

[0072] Aspect 17: The substrate according to any one of aspects 1 to 16, wherein: the lattice structure of the intermediate region has a uniform distribution of the dielectric material and the interstitial spaces.

[0073] Aspect 18: The substrate of any one of aspects 1 to 17, wherein: the first side is planar, the second side is planar and the second side is parallel to the first side.

[0074] Aspect 19: The substrate according to any one of aspects 1 to 17, wherein the first side is arranged equidistantly relative to the second side.

[0075] Aspect 20: The substrate of aspect 19, wherein: the first side and the second side are curved.

[0076] Aspect 21: A substrate according to any one of Aspects 1 to 20, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; and the substrate operates at a limited frequency f having an operating wavelength λ, and the total thickness of the substrate in the z direction is equal to or less than λ / 2.

[0077] Aspect 22: A substrate according to Aspect 21, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; and the substrate operates at a limited frequency f having an operating wavelength λ, and the total thickness of the substrate in the z direction is equal to or less than λ / 4.

[0078] Aspect 23: A multi-layer assembly comprising: two or more substrates according to any one of aspects 1 to 22; wherein each of the substrates is mechanically attached, bonded or fused to an adjacent substrate of the substrates.

[0079] Aspect 24: The assembly of aspect 23, wherein: each of the substrates comprises one or more mechanical registration features to mechanically attach and interlock with corresponding ones of the mechanical registration features of adjacent ones of the substrates.

[0080] Aspect 25: The assembly of aspect 24, wherein: the one or more mechanical registration features and corresponding ones of the mechanical registration features comprise an elastically deformable interference fit therebetween.

[0081] Aspect 26: A component according to any one of Aspects 23 to 25, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; and the component operates at a limited frequency f having an operating wavelength λ, and the total thickness of the component in the z direction is equal to or less than λ / 2.

[0082] Aspect 27: A component according to any one of Aspects 23 to 25, wherein: the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side; and the component operates at a limited frequency f having an operating wavelength λ, and the total thickness of the component in the z direction is equal to or less than λ / 4.

[0083] Aspect 28: A method for manufacturing a substrate having the integral structure according to any one of Aspects 1 to 22, the method comprising: forming the first side of the substrate in a continuous process; forming the middle region of the substrate on the first side and integrally with the first side via the continuous process, the middle region having the lattice structure of the dielectric material, the lattice structure including the plurality of gap spaces between the dielectric materials of the lattice structure; and forming the second side of the substrate on the middle region and integrally with the middle region via the continuous process.

[0084] Aspect 29: The method of aspect 28, wherein: the continuous process further comprises forming one or more through holes extending from the first side through the intermediate region to the second side.

[0085] Aspect 30: The method according to any one of aspects 28 to 29, further comprising: imaging the electronic circuit on at least one of the first side and the second side to provide the electronic circuit image.

[0086] Aspect 31: The method according to any one of aspects 28 to 29, further comprising: metallizing an electronic circuit on at least one of the first side and the second side to provide imaging of the electronic circuit.

[0087] Aspect 32: A method according to any one of Aspects 28 to 31, wherein the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side, and the method further includes: forming ceramic fibers substantially aligned with the xy plane of the xyz coordinate system within the dielectric material via the continuous process.

[0088] Aspect 33: A method according to any one of Aspects 28 to 31, wherein the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side, and the method further includes: forming ceramic fibers substantially aligned with the z-axis of the xyz coordinate system within the dielectric material via the continuous process.

[0089] Aspect 34: A method according to any one of Aspects 28 to 31, wherein the overall structure is formed relative to an orthogonal xyz coordinate system in which the z-axis is perpendicular to both the first side and the second side, and the method further includes: forming ceramic fibers substantially aligned with the xy plane of the xyz coordinate system in the dielectric material via the continuous process; and forming ceramic fibers substantially aligned with the z-axis of the xyz coordinate system in the dielectric material via the continuous process.

[0090] Aspect 35: A method according to any one of aspects 28 to 34, wherein: the continuous process includes any one of the following: 3D printing; stereolithography; light-based additive manufacturing; or digital light processing for cross-linking of the dielectric material.

Claims

1. A substrate, comprising: a unitary structure formed of a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side; wherein the intermediate region comprises a lattice structure of the dielectric material, the lattice structure comprising a plurality of interstitial spaces between the dielectric materials of the lattice structure; wherein the lattice structure extends between the first side and the second side and is integrally connected to the first side and the second side; Wherein at least one of the first side and the second side comprises a substantially solid surface suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or a through hole between the first side and the second side.

2. The substrate according to claim 1, wherein: The interstitial space includes air.

3. The substrate according to any one of claims 1 to 2, wherein: The monolithic structure is not a foam material.

4. The substrate according to any one of claims 1 to 3, wherein: The integral structure is not a laminated structure.

5. The substrate according to any one of claims 1 to 4, wherein: Both the first side and the second side include substantially solid surfaces suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or vias between the first side and the second side.

6. The substrate according to any one of claims 1 to 5, wherein: The dielectric material of the overall structure has a relative dielectric constant equal to or greater than 1.01 and equal to or less than 5.

7. The substrate according to claim 6, wherein: The dielectric material of the overall structure has a relative dielectric constant equal to or greater than 1.1 and equal to or less than 4.

5.

8. The substrate according to any one of claims 1 to 7, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; and The dielectric material includes ceramic fibers that are substantially aligned with an xy plane of the xyz coordinate system.

9. The substrate according to any one of claims 1 to 7, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; and The dielectric material includes ceramic fibers that are substantially aligned with the z-axis of the xyz coordinate system.

10. The substrate according to any one of claims 1 to 7, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; The dielectric material comprises ceramic fibers substantially aligned with the xy plane of the xyz coordinate system, and The dielectric material includes ceramic fibers that are substantially aligned with the z-axis of the xyz coordinate system.

11. The substrate according to any one of claims 1 to 10, wherein: The unitary structure includes one or more through holes extending between the first side and the second side.

12. The substrate according to claim 11, wherein: The one or more vias include a conductive surface between the first side and the second side of the unitary structure.

13. The substrate according to any one of claims 1 to 12, wherein: The lattice structure includes a spiral lattice structure.

14. The substrate according to any one of claims 1 to 13, further comprising: A metallization layer on the first side, the second side, or both the first side and the second side of the unitary structure.

15. The substrate according to claim 14, further comprising the through hole, wherein: The via includes a conductive surface between the first side and the second side of the unitary structure that is electrically connected to the metallization layer of the first side, the second side, or both the first side and the second side.

16. The substrate according to any one of claims 1 to 15, wherein: The lattice structure is a face-based lattice structure, not a pillar-based lattice structure.

17. The substrate according to any one of claims 1 to 16, wherein: The lattice structure of the intermediate region has a uniform distribution of the dielectric material and the interstitial spaces.

18. The substrate according to any one of claims 1 to 17, wherein: The first side is planar, the second side is planar, and the second side is parallel to the first side.

19. The substrate according to any one of claims 1 to 17, wherein: The first side is disposed equidistantly relative to the second side.

20. The substrate of claim 19, wherein: The first side and the second side are curved.

21. The substrate according to any one of claims 1 to 20, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; and The substrate operates at a defined frequency f having an operating wavelength λ, and a total thickness of the substrate in the z direction is equal to or less than λ / 2.

22. The substrate of claim 21, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; and The substrate operates at a defined frequency f having an operating wavelength λ, and a total thickness of the substrate in the z direction is equal to or less than λ / 4.

23. A multi-layer assembly comprising: Two or more substrates according to any one of claims 1 to 22; Wherein each of the substrates is mechanically attached, bonded or fused to an adjacent one of the substrates.

24. The assembly of claim 23, wherein: Each of the substrates includes one or more mechanical registration features to mechanically attach and interlock with corresponding ones of the mechanical registration features of adjacent ones of the substrates.

25. The assembly of claim 24, wherein: The one or more mechanical registration features include an elastically deformable interference fit with corresponding ones of the mechanical registration features.

26. An assembly according to any one of claims 23 to 25, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; and The component operates at a defined frequency f having an operating wavelength λ, and a total thickness of the component in the z direction is equal to or less than λ / 2.

27. An assembly according to any one of claims 23 to 25, wherein: The unitary structure is formed relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side; and The component operates at a defined frequency f having an operating wavelength λ, and a total thickness of the component in the z direction is equal to or less than λ / 4.

28. A method for manufacturing a substrate having the integral structure according to any one of claims 1 to 22, the method comprising: forming the first side of the substrate in a continuous process; forming the intermediate region of the substrate on and integrally with the first side via the continuous process, the intermediate region having the lattice structure of the dielectric material, the lattice structure including the plurality of interstitial spaces between the dielectric material of the lattice structure; as well as The second side of the substrate is formed on and integrally with the intermediate region via the continuous process.

29. The method of claim 28, wherein: The continuous process also includes forming one or more through holes extending from the first side through the intermediate region to the second side.

30. The method according to any one of claims 28 to 29, further comprising: An electronic circuit is imaged on at least one of the first side and the second side to provide an image of the electronic circuit.

31. The method according to any one of claims 28 to 29, further comprising: Electronic circuitry is metallized on at least one of the first side and the second side to provide imaging of the electronic circuitry.

32. The method according to any one of claims 28 to 31, wherein: forming the overall structure relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side, the method further comprising: Ceramic fibers are formed within the dielectric material via the continuous process to be substantially aligned with an xy plane of the xyz coordinate system.

33. The method according to any one of claims 28 to 31, wherein: forming the overall structure relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side, the method further comprising: Ceramic fibers are formed within the dielectric material via the continuous process and are substantially aligned with a z-axis of the xyz coordinate system.

34. The method according to any one of claims 28 to 31, wherein: forming the overall structure relative to an orthogonal xyz coordinate system in which a z-axis is perpendicular to both the first side and the second side, the method further comprising: forming ceramic fibers within the dielectric material via the continuous process that are substantially aligned with an xy plane of the xyz coordinate system; and Ceramic fibers are formed within the dielectric material via the continuous process and are substantially aligned with a z-axis of the xyz coordinate system.

35. A method according to any one of claims 28 to 34, wherein: The continuous process comprises any of: 3D printing; stereolithography; light-based additive manufacturing; or digital light processing for cross-linking of the dielectric material.