Converter cluster multi-frequency harmonic disturbed coupling current high-precision analysis method and system

Abstract

The invention discloses a converter cluster multi-frequency harmonic disturbed coupling current high-precision analysis method and system. The method comprises the following steps: acquiring a network node equation; calculating the voltage and current small signal relationship of each power electronic equipment port in the system to obtain a frequency coupling model of the converter; simultaneously establishing the network node equation and the frequency coupling model of the converter, and eliminating the voltage to obtain a small signal equation containing the frequency coupling model of the converter, a net rack and harmonic current disturbance; solving an initial steady-state quantity by taking a power grid voltage only containing fundamental waves as an initial state of the system; the large disturbance of the harmonic current is divided into a plurality of stages, the disturbance is increased by several times, and the size of the disturbance in each stage meets the requirement of small signal calculation; and updating the small signal equation set of the system, and superposing the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target. The method is clear in principle, high in calculation precision, wide in applicability, capable of adapting to various power distribution network structures and relatively practical in engineering application value.

Description

Background Art

[0002] In recent years, with the development of renewable energy systems, power electronic devices have been connected to the grid on a large scale. When a cluster of devices consisting of multiple power electronic devices (such as inverters, rectifiers, frequency converters, motor drives, etc.) works together, the harmonics they generate interact with each other and affect the power quality of the system. Harmonics of different frequencies generated by multiple devices in the cluster may be superimposed together to form more complex harmonic pollution. Specifically, in a cluster of devices, the harmonic signals of multiple converters may be superimposed in the same frequency band, resulting in more complex harmonic pollution. Therefore, simply relying on the independent harmonic model of each device is not enough to accurately describe the harmonic behavior of the entire cluster. At the same time, when the harmonic component of the external disturbance does not meet the characteristics of small disturbances, simply using the small signal equation cannot accurately describe the nonlinear characteristics of this harmonic "large disturbance". Finally, when the power electronic device cluster is connected to the distribution network, the impedance characteristics of the distribution network will not only affect the propagation path of the harmonics, but may also cause harmonic amplification or attenuation in certain frequency bands, thereby changing the overall harmonic characteristics of the device cluster.

[0003] The traditional method can directly solve the final harmonic current response of the system under the excitation of each harmonic grid voltage by solving the steady-state equations of the system. Since the harmonic components of each final state quantity are directly solved, the size of the harmonic components of each state quantity is unknown, and there will be multiplication of unknown quantities. The equations to be solved are nonlinear equations and cannot be solved using linear methods, making them difficult to solve. Summary of the invention

[0004] The technical problem to be solved by the present invention is to address the deficiencies in the above-mentioned prior art and provide a high-precision analysis method and system for multi-frequency harmonic disturbed coupled current of a converter cluster. The harmonic emission characteristics of the converter under large disturbances are calculated by a small signal stepping method, so as to solve the technical problem of analyzing the harmonic emission characteristics of the converter cluster under large disturbances.

[0005] The present invention adopts the following technical solutions: A high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster comprises the following steps: S1, obtain network node equations; S2. Calculate the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain the frequency coupling model of the converter; S3, combining the network node equations and the frequency coupling model of the converter, eliminating the voltage, and obtaining a small signal equation including the frequency coupling model of the converter, the grid and the harmonic current disturbance; S4, taking the grid voltage containing only the fundamental wave as the initial state of the system and solving the initial steady-state quantity; S5. Divide the large disturbance of harmonic current into multiple stages, increase the disturbance in stages, and ensure that the disturbance size in each stage meets the requirements of small signal calculation; S6. Update the small signal equations of the system and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

[0006] Preferably, the network node equations are as follows:

[0007] in, is the node fundamental impedance matrix, is the harmonic impedance matrix, is the node voltage, is the fundamental current of the node, is the harmonic disturbance current.

[0008] Preferably, the frequency coupling model of the converter adopts a frequency coupling model based on harmonic transfer function, wherein The phase is a frequency coupled phase; the frequency coupling model of the converter is as follows:

[0009] in, , , , represents the coefficient matrix, is the output current of the converter, for The conjugate of is the grid voltage, for The conjugation of.

[0010] Preferably, the small signal equation:

[0011] in, , is the harmonic matrix obtained by changing the harmonic impedance matrix, is the harmonic disturbance current, for The conjugate of is the converter output current for each node, for The conjugation of.

[0012] Preferably, the large disturbance of harmonic current is divided into multiple stages: The harmonic current disturbance is superimposed in steps and small signal linearization is adopted in multiple stages, which ensures the accuracy and rationality of the calculation results using small signal equations in each stage.

[0013] Preferably, the small signal equations of the system are updated, and the disturbance of the next stage is superimposed until the amplitude of the harmonic current disturbance is the same as the set target. Specifically, Calculate the small disturbance response of each state variable under the harmonic current disturbance in each stage of the small signal equation; The small disturbance responses of each state variable solved in the previous stage are superimposed on its steady-state component as the new steady-state operating point, and the small signal equations of the system are updated; The disturbance of the next stage is superimposed and repeated until the amplitude of the harmonic current disturbance is the same as the set target, ensuring the consistency of the total disturbance size.

[0014] In a second aspect, an embodiment of the present invention provides a high-precision analysis system for multi-frequency harmonic disturbed coupled current of a converter cluster, comprising: Node module, obtains network node equations; A calculation module calculates the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain a frequency coupling model of the converter; A combined module combines the network node equations and the frequency coupling model of the converter, eliminates the voltage, and obtains a small signal equation including the frequency coupling model of the converter, the grid, and the harmonic current disturbance; Divide the modules, take the grid voltage containing only the fundamental wave as the initial state of the system, and solve the initial steady-state quantity; divide the large disturbance of the harmonic current into multiple stages, increase the disturbance in batches, and the disturbance size of each stage meets the requirements of small signal calculation; Update module, update the small signal equations of the system, and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

[0015] Preferably, the small signal equations of the system are updated, and the disturbance of the next stage is superimposed until the amplitude of the harmonic current disturbance is the same as the set target. Specifically, Calculate the small disturbance response of each state variable under the harmonic current disturbance in each stage of the small signal equation; The small disturbance responses of each state variable solved in the previous stage are superimposed on its steady-state component as the new steady-state operating point, and the small signal equations of the system are updated; The disturbance of the next stage is superimposed and repeated until the amplitude of the harmonic current disturbance is the same as the set target, ensuring the consistency of the total disturbance size.

[0016] In a third aspect, a computer device comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned method for high-precision analysis of multi-frequency harmonic disturbed coupled currents of a converter cluster when executing the computer program.

[0017] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, including a computer program, which, when executed by a processor, implements the steps of the above-mentioned method for high-precision analysis of multi-frequency harmonic disturbed coupled currents of a converter cluster.

[0018] In a fifth aspect, a chip comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps of the above-mentioned method for high-precision analysis of multi-frequency harmonic disturbed coupled currents of a converter cluster are implemented.

[0019] In a sixth aspect, an embodiment of the present invention provides an electronic device, including a computer program, which, when executed by the electronic device, implements the steps of the above-mentioned method for high-precision analysis of multi-frequency harmonic disturbed coupled currents of a converter cluster.

[0020] Compared with the prior art, the present invention has at least the following beneficial effects: A high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster adopts a small signal stepping method. It only needs an initial steady-state operating point of the system containing only a three-phase balanced fundamental grid voltage (which can be regarded as an ideal operating point of the equipment). Then the initial steady-state operating point is continuously updated according to the stepping method until the final applied grid voltage is the same as the actual situation. In this process, the calculation result of the previous stage is superimposed on the steady-state workload of the previous stage to obtain the steady-state workload of the next stage. Therefore, the coefficients of the variables to be solved in the equations of each stage are known, and the calculation relationship between harmonics and fundamental waves, and between harmonics and harmonics can be considered at the same time.

[0021] Furthermore, the converter model adopts a frequency coupling model based on harmonic transfer function, which accurately describes the frequency coupling characteristics of the converter, specifically by introducing conjugate phase converter characteristics into the model.

[0022] Furthermore, the network harmonic impedance equation is a linear equation, and the small signal processing is also performed to remove the fundamental component to obtain the small signal network harmonic impedance equation. By combining the coupling model of the converter and the small signal network harmonic impedance equation, the intermediate variable (node ​​voltage) is eliminated, and finally the small signal equation of the converter cluster is obtained. The small signal equation of the converter cluster can be calculated using the small signal stepping method to reduce the amount of calculation.

[0023] Furthermore, the disturbance superposition and coefficient matrix update are intended to improve the accuracy of the calculation. The small signal equation can only be applied to the calculation of small disturbances. When the disturbance signal is too large, the calculation error is too large. For this reason, the disturbance signal is added in stages to ensure the accuracy of the small signal calculation results in each stage, and the size of the total disturbance must be kept constant. At the same time, the coefficient matrix is ​​corrected in the latter stage using the results of the previous stage calculation to reduce the error caused by the linear calculation. Finally, the calculation result of the nonlinear equation is approached by linear calculation, avoiding the solution of the nonlinear equation and ensuring the calculation accuracy. (Under normal circumstances, the response to large disturbances can only be solved by directly solving the original nonlinear equation. This method is computationally intensive and difficult to calculate.) It can be understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

[0024] In summary, the present invention has clear principles, high calculation accuracy, wide applicability, can adapt to various distribution network structures, and has relatively practical engineering application value.

[0025] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a verification scenario of the method described in the present invention; FIG2 is a comparison result of the method of the present invention and simulation; Figure 3 A schematic diagram of a computer device provided by an embodiment of the present invention; Figure 4 A block diagram of a chip provided according to an embodiment of the present invention; Figure 5 It is a schematic diagram of the process of the present invention. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0029] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0030] It should be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.

[0031] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0032] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0033] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0034] The present invention provides a high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster. For the converter cluster, the interaction characteristics between converters are considered to describe the interaction of harmonics in the device cluster, and the influence of the grid impedance of the distribution network system on the harmonic characteristics of the device cluster is considered. The harmonic emission characteristics of the power electronic equipment cluster under large disturbance are calculated by adopting a stepping idea. In order to achieve this goal, a small signal equation including a network model and a converter frequency coupling model is first obtained, and a small signal stepping method is proposed on this basis. Small signal linearization of multiple stages is adopted, and the small signal equation of the next stage is updated in each stage according to the calculation result of the previous stage, so as to calculate the nonlinear process under large disturbance; finally, the harmonic emission characteristics of the power electronic equipment cluster after interactive coupling under large disturbance are calculated.

[0035] See also Figure 5 The present invention provides a high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster. By combining the frequency coupling characteristics of the converter and the grid impedance of the distribution network, the harmonic current emission characteristics of the power electronic equipment cluster can be analyzed more accurately. The specific steps are as follows: S1, obtain network node equations; The network node equation is as follows:

[0036] in, is the node impedance matrix, is the inverse matrix of the node admittance matrix, is the node voltage, is the fundamental current of the node, is the harmonic disturbance current.

[0037] S2. Calculate the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain the frequency coupling model of the converter; The frequency coupling model of the converter is as follows:

[0038] in, , , , represents the coefficient matrix, which is determined by the steady-state operating point of the converter. is the output current of the converter, for The conjugate of is the grid voltage, for The conjugation of.

[0039] The converter model is a frequency-coupled model based on the harmonic transfer function, where The phase is a frequency coupled phase.

[0040] S3, combine the two equations, eliminate the voltage, and obtain the small signal equation including the converter frequency coupling model, grid and harmonic current disturbance; The grid equation and the converter frequency coupling model are combined to obtain the small signal equation including the converter frequency coupling model, grid and harmonic current disturbance:

[0041] in, , is the harmonic matrix obtained by changing the harmonic impedance matrix, is the harmonic disturbance current, for The conjugate of is the converter output current for each node, for The conjugation of.

[0042] S4, taking the grid voltage containing only the fundamental wave as the initial state of the system and solving the initial steady-state quantity; S5. Divide the large disturbance of harmonic current into multiple stages, increase the disturbance in stages, and ensure that the disturbance size in each stage meets the requirements of small signal calculation; The harmonic current disturbance is superimposed in steps, and small signal linearization is adopted in multiple stages. In each stage, the small signal equation of the next stage is updated according to the calculation results of the previous stage, that is, the coefficient matrix, and then the steady-state results under large disturbances are calculated.

[0043] S6. Update the small signal equations of the system and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

[0044] S601, calculating the small disturbance response of each state variable of the small signal equation under the harmonic current disturbance in each stage; S602, superimposing the small disturbance response of each state variable solved in this stage to its steady-state component, and updating the small signal equation group of the system; S603, superimpose the disturbance of the next stage, and repeat S601-S602 until the amplitude of the harmonic current disturbance is the same as the set target.

[0045] The present invention can effectively calculate the nonlinear coupling effect of harmonics between devices in a device cluster through small signal step calculation, rather than just the linear harmonic superposition of a single device.

[0046] The interaction of harmonics in the equipment cluster is described by considering the frequency coupling characteristics between converters. In the equipment cluster, the harmonic currents of multiple converters are superimposed in the same frequency band. At the same time, the output current interaction coupling characteristics under harmonic current disturbance are calculated by small signal stepping.

[0047] In addition, the present invention also fully considers the influence of the grid impedance of the distribution network system on the harmonic characteristics of the equipment cluster. By incorporating the grid impedance into the calculation model, the present invention can more accurately evaluate the harmonic propagation of the power electronic equipment cluster after grid connection, providing a more comprehensive theoretical basis for the analysis and optimization of power quality.

[0048] Therefore, the method of the present invention improves the accuracy of harmonic emission calculation of power electronic equipment clusters, and has important theoretical value and practical application prospects.

[0049] It will be appreciated by those skilled in the art that various aspects of the present invention may be implemented as systems, methods or program products. Therefore, various aspects of the present invention may be specifically implemented in the following forms, namely: complete hardware implementation, complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software implementations, which may be collectively referred to herein as "circuits", "modules" or "platforms".

[0050] In another embodiment of the present invention, a high-precision analysis system for multi-frequency harmonic disturbed coupled current of a converter cluster is provided. The system can be used to implement the above-mentioned high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster. Specifically, the high-precision analysis system for multi-frequency harmonic disturbed coupled current of a converter cluster includes a node module, a calculation module, a joint module, a division module and an update module.

[0051] Among them, the node module obtains the network node equation; A calculation module calculates the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain a frequency coupling model of the converter; A combined module combines the network node equations and the frequency coupling model of the converter, eliminates the voltage, and obtains a small signal equation including the frequency coupling model of the converter, the grid, and the harmonic current disturbance; Divide the modules, take the grid voltage containing only the fundamental wave as the initial state of the system, and solve the initial steady-state quantity; divide the large disturbance of the harmonic current into multiple stages, increase the disturbance in batches, and the disturbance size of each stage meets the requirements of small signal calculation; Update module, update the small signal equations of the system, and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

[0052] In another embodiment of the present invention, a terminal device is provided, the terminal device includes a processor and a memory, the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or other general-purpose processors, graphics processors (GPU), tensor processors (TPU), digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc., which are the computing core and control core of the terminal, which are suitable for implementing one or more instructions, and are specifically suitable for loading and executing one or more instructions to implement the corresponding method flow or corresponding functions; the processor described in the embodiment of the present invention can be used for the operation of the high-precision analysis method of multi-frequency harmonic disturbed coupled current of the converter cluster, including: Obtain network node equations; calculate the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain the frequency coupling model of the converter; combine the network node equations and the frequency coupling model of the converter, eliminate the voltage, and obtain the small signal equation that includes the converter frequency coupling model, grid and harmonic current disturbance; take the grid voltage containing only the fundamental wave as the initial state of the system and solve the initial steady-state quantity; divide the large disturbance of the harmonic current into multiple stages, and increase the disturbance in batches, so that the disturbance size of each stage meets the requirements of small signal calculation; update the small signal equation group of the system, and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

[0053] See also Figure 3 , the terminal device is a computer device, and the computer device 60 of this embodiment includes: a processor 61, a memory 62, and a computer program 63 stored in the memory 62 and executable on the processor 61. When the computer program 63 is executed by the processor 61, the method for high-precision analysis of multi-frequency harmonic disturbed coupled current of the converter cluster in the embodiment is implemented. To avoid repetition, it is not described one by one here. Alternatively, when the computer program 63 is executed by the processor 61, the functions of each model / unit in the system for high-precision analysis of multi-frequency harmonic disturbed coupled current of the converter cluster in the embodiment are implemented. To avoid repetition, it is not described one by one here.

[0054] The computer device 60 may be a computing device such as a desktop computer, a notebook, a PDA, or a cloud server. The computer device 60 may include, but is not limited to, a processor 61 and a memory 62. Those skilled in the art will appreciate that Figure 3 This is only an example of the computer device 60 and does not constitute a limitation of the computer device 60. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the computer device may also include input and output devices, network access devices, buses, etc.

[0055] The processor 61 may be a central processing unit (CPU), or other general-purpose processors, graphics processing units (GPU), tensor processing units (TPU), digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.

[0056] The memory 62 may be an internal storage unit of the computer device 60, such as a hard disk or memory of the computer device 60. The memory 62 may also be an external storage device of the computer device 60, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc., equipped on the computer device 60.

[0057] Furthermore, the memory 62 may include both an internal storage unit of the computer device 60 and an external storage device. The memory 62 is used to store computer programs and other programs and data required by the computer device. The memory 62 may also be used to temporarily store data that has been output or is to be output.

[0058] See also Figure 4, the terminal device is a chip, and the chip 600 of this embodiment includes a processor 622, which may be one or more, and a memory 632 for storing a computer program executable by the processor 622. The computer program stored in the memory 632 may include one or more modules, each corresponding to a set of instructions. In addition, the processor 622 may be configured to execute the computer program to execute the above-mentioned high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster.

[0059] In addition, the chip 600 may further include a power supply component 626 and a communication component 650, wherein the power supply component 626 may be configured to perform power management of the chip 600, and the communication component 650 may be configured to implement communication, for example, wired or wireless communication, of the chip 600. In addition, the chip 600 may further include an input / output interface 658. The chip 600 may operate based on an operating system stored in the memory 632.

[0060] In another embodiment of the present invention, the present invention also provides a storage medium, specifically a computer-readable storage medium, which is a memory device in a terminal device for storing programs and data. It can be understood that the computer-readable storage medium here can include both the built-in storage medium in the terminal device and the extended storage medium supported by the terminal device. The computer-readable storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space, and these instructions can be one or more computer programs. It should be noted that the computer-readable storage medium here can be a high-speed RAM memory, or a non-volatile memory (Non-VolatileMemory), such as at least one disk memory.

[0061] One or more instructions stored in a computer-readable storage medium may be loaded and executed by a processor to implement the corresponding steps of the method for high-precision analysis of multi-frequency harmonic disturbed coupled current of a converter cluster in the above embodiment; one or more instructions in the computer-readable storage medium are loaded and executed by the processor as follows: Obtain network node equations; calculate the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain the frequency coupling model of the converter; combine the network node equations and the frequency coupling model of the converter, eliminate the voltage, and obtain the small signal equation that includes the converter frequency coupling model, grid and harmonic current disturbance; take the grid voltage containing only the fundamental wave as the initial state of the system and solve the initial steady-state quantity; divide the large disturbance of the harmonic current into multiple stages, and increase the disturbance in batches, so that the disturbance size of each stage meets the requirements of small signal calculation; update the small signal equation group of the system, and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

[0062] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0063] By building a corresponding simulation model, the effectiveness and accuracy of the method proposed in the present invention are verified.

[0064] See also Figure 1 , the verification scenario of the present invention is as follows: The scenario contains 6 nodes. Nodes 1, 2, and 3 are connected to a converter device, and the three devices are connected to node 4 to form a cluster of power electronic devices. Node 5 is connected to a harmonic current source.

[0065] The specific parameters of the line impedance are shown in Table 1: Table 1

[0066] In the simulation verification, the harmonic current source injects the 5th, 7th, 23rd, and 25th harmonics into the power grid.

[0067] Please refer to Figure 2 for the comparison results between the proposed method and the simulation results. Figure (2-a) is the harmonic current spectrum and its error of node 1 under disturbance, Figure (2-b) is the harmonic current spectrum and its error of node 2 under disturbance, and Figure (2-c) is the harmonic current spectrum and its error of node 3 under disturbance. Table 2 calculates the accuracy of the comparison between the proposed method and the simulation results.

[0068] Table 2

[0069] According to the comparison results, the scheme accurately describes the harmonic emission characteristics of the disturbed converter cluster, with the amplitude calculation error being less than 1%.

[0070] In summary, the present invention provides a high-precision analysis method and system for multi-frequency harmonic disturbed coupled current of a converter cluster, which takes into account the harmonic interaction effects in the equipment cluster and the influence of grid impedance. Compared with traditional methods, it can more accurately describe the harmonic characteristics of the converter cluster and can perform a more comprehensive and accurate analysis of the interaction characteristics between the power electronic equipment cluster and the distribution network.

[0071] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0072] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0073] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the present invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0074] In the embodiments provided by the present invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0075] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0076] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0077] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0078] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices, and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0079] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0080] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0081] The above contents are only for explaining the technical idea of ​​the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.

Claims

1. A high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster, characterized in that: The following steps are involved: S1, obtain network node equations; S2. Calculate the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain the frequency coupling model of the converter; S3, combining the network node equations and the frequency coupling model of the converter, eliminating the voltage, and obtaining a small signal equation including the frequency coupling model of the converter, the grid and the harmonic current disturbance; S4, taking the grid voltage containing only the fundamental wave as the initial state of the system and solving the initial steady-state quantity; S5. Divide the large disturbance of harmonic current into multiple stages, increase the disturbance in stages, and ensure that the disturbance size in each stage meets the requirements of small signal calculation; S6. Use the calculation results of the previous stage as the new steady-state operating point, update the small signal equations of the system, and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

2. The high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster according to claim 1 is characterized in that: The network node equation is as follows: in, is the node fundamental impedance matrix, is the harmonic impedance matrix, is the node voltage, is the fundamental current of the node, is the harmonic disturbance current.

3. The high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster according to claim 1 is characterized in that: The frequency coupling model of the converter adopts a frequency coupling model based on harmonic transfer function, where The phase is a frequency coupled phase; the frequency coupling model of the converter is as follows: in, , , , represents the coefficient matrix, is the output current of the converter, for The conjugate of is the grid voltage, for The conjugation of.

4. The high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster according to claim 1 is characterized in that: Small signal equation: in, , is the harmonic matrix obtained by changing the harmonic impedance matrix, is the harmonic disturbance current, for The conjugate of is the converter output current for each node, for The conjugation of.

5. The high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster according to claim 1, characterized in that: The large disturbance of harmonic current is divided into several stages: The harmonic current disturbance is superimposed in steps and small signal linearization is adopted in multiple stages, which ensures the accuracy and rationality of the calculation results using small signal equations in each stage.

6. The high-precision analysis method for multi-frequency harmonic disturbed coupled current of a converter cluster according to claim 1, characterized in that: Update the system's small signal equations and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target. Specifically: Calculate the small disturbance response of each state variable under the harmonic current disturbance in each stage of the small signal equation; The small disturbance responses of each state variable solved in the previous stage are superimposed on its steady-state component as the new steady-state operating point, and the small signal equations of the system are updated; The disturbance of the next stage is superimposed and repeated until the amplitude of the harmonic current disturbance is the same as the set target, ensuring the consistency of the total disturbance size.

7. A high-precision analysis system for multi-frequency harmonic disturbed coupled current of a converter cluster, characterized in that: include: Node module, obtains network node equations; A calculation module calculates the small signal relationship between the voltage and current at the port of each power electronic device in the system to obtain a frequency coupling model of the converter; A combined module combines the network node equations and the frequency coupling model of the converter, eliminates the voltage, and obtains a small signal equation including the frequency coupling model of the converter, the grid, and the harmonic current disturbance; Divide the modules, take the grid voltage containing only the fundamental wave as the initial state of the system, and solve the initial steady-state quantity; divide the large disturbance of the harmonic current into multiple stages, increase the disturbance in batches, and the disturbance size of each stage meets the requirements of small signal calculation; Update module, update the small signal equations of the system, and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target.

8. The high-precision analysis system for multi-frequency harmonic disturbed coupled current of a converter cluster according to claim 7, characterized in that: Update the system's small signal equations and superimpose the disturbance of the next stage until the amplitude of the harmonic current disturbance is the same as the set target. Specifically: Calculate the small disturbance response of each state variable under the harmonic current disturbance in each stage of the small signal equation; The small disturbance responses of each state variable solved in the previous stage are superimposed on its steady-state component as the new steady-state operating point, and the small signal equations of the system are updated; The disturbance of the next stage is superimposed and repeated until the amplitude of the harmonic current disturbance is the same as the set target, ensuring the consistency of the total disturbance size.

9. A computer-readable storage medium storing one or more programs, characterized in that: The one or more programs include instructions, which, when executed by a computing device, cause the computing device to perform the method of any one of claims 1 to 6.

10. A computing device, characterized in that: include: One or more processors, a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs include steps for executing the method described in any one of claims 1 to 6.

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