Multi-gear compatible low-gear control method and direct current brushless motor
By pre-setting the logic processing of constant gears and combined gears in the microprocessor MCU, the compatibility problem between multi-gear motors and low-gear motors is solved, enabling seamless application of multi-gear motors in old systems, avoiding downtime and logic errors, and improving the flexibility and reliability of motor control.
Patent Information
- Application Number
- CN202411615890.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-12
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2044-11-12
AI Technical Summary
During the motor upgrade process, existing air conditioners experience compatibility issues between multi-speed and low-speed motors, leading to shutdowns and logic error alarms. This makes them incompatible with older low-speed motor application scenarios.
By employing a software logic processing method, N constant gears and M combination gears are preset in the microprocessor (MCU). When a combination gear is detected, multiple constant gears are triggered, thereby achieving multi-gear motor compatible control with fewer gears. Through software logic processing, specific problems that have not been effectively solved in the prior art are resolved.
It achieves compatibility between multi-speed and low-speed motors, enriches the application scenarios of motors, avoids downtime and logic error failures, and improves the flexibility and reliability of motor control.
Smart Images

Figure CN119496415B_ABST
Abstract
Description
[TECHNICAL FIELD]
[0001] The present application relates to the field of direct current motor control, in particular to a control method for multi-gear compatibility with few gears and a direct current brushless motor. [BACKGROUND]
[0002] The existing air conditioner is driven by a motor, and the output air volume of the fan at different levels is generally controlled by setting multiple motor speed gears. The speed operation of multiple gears is identified by a gear detection circuit in the motor controller to recognize the command requirement of the load.
[0003] At present, the most commonly used method is to set a plurality of physical gear detection circuits in the motor controller, and the plurality of physical gear detection circuits receive the control command of the load and input the signal into the microprocessor MCU of the motor controller. The motor controller selects a gear speed to control the motor operation according to the signals of the plurality of gear detection circuits. Only one physical gear detection circuit receives the signal source at a time, and the remaining physical gear detection circuits are disconnected. However, the motor used by the existing air conditioner manufacturers and terminal users is generally gradually upgraded from a single-speed motor to a two-speed motor, a five-gear motor, a nine-gear motor or more. In this upgrading process, the newly applied multi-gear motor requires compatibility or coverage of the application scene of the old few-gear motor. Therefore, when the multi-gear motor replaces the few-gear motor, the extra gear may not have a preset value or the preset value is zero, causing shutdown and logic error alarm. [SUMMARY]
[0004] The present application overcomes the shortcomings of the prior art and provides a control method for multi-gear compatibility with few gears and a direct current brushless motor. The multi-gear motor is compatible with the few-gear control through software logic processing.
[0005] To achieve the above purpose, the following technical solutions are adopted:
[0006] A control method for multi-gear compatibility with few gears, characterized by comprising
[0007] S1, preset N constant gears and M combined gears in the microprocessor MCU, and set preset values for each constant gear and each combined gear, and one combined gear triggers at least one constant gear, wherein N and M are positive numbers;
[0008] S2, the microprocessor MCU judges whether the preset value of at least one combined gear in the M combined gears is 0;
[0009] S3, if there is, jump to S4 to enter N-gear control mode, otherwise jump to S5 to enter N+M-gear control mode;
[0010] S4, when the microprocessor MCU detects the constant gear, the microprocessor MCU runs the preset value corresponding to the constant gear; when the microprocessor MCU detects the combined gear, the microprocessor MCU runs the combined gear and triggers the preset value corresponding to the combined gear.
[0011] S5, when the microprocessor MCU detects the constant gear, the microprocessor MCU runs the preset value corresponding to the constant gear; when the microprocessor MCU detects the combined gear, the microprocessor MCU runs the combined gear and triggers the preset value corresponding to the combined gear.
[0012] The multi-gear compatible few-gear control method as claimed in claim 1, characterized in that: one combined gear triggers two constant gears in S1.
[0013] The multi-gear compatible few-gear control method as claimed in claim 1, characterized in that: when the combined gear is detected in S4, the maximum constant gear preset value of the two constant gears triggered by the combined gear is run.
[0014] The multi-gear compatible few-gear control method as claimed in claim 1, characterized in that: when the combined gear is detected in S4, the minimum constant gear preset value of the two constant gears triggered by the combined gear is run.
[0015] The multi-gear compatible few-gear control method as claimed in claim 1, characterized in that: further comprising N physical gear detection circuits, the output end of each physical gear detection circuit is connected to an I / O port of the microprocessor MCU, the input end of each physical gear detection circuit is connected to a single signal source, and one constant gear is connected to one physical gear detection circuit.
[0016] The multi-gear compatible few-gear control method as claimed in claim 1, characterized in that: further comprising a memory, the constant gears, the constant gear preset values, the combined gears, and the combined gear preset values are stored in the memory, and the microprocessor MCU detects the memory to read the gear and the preset value information corresponding to each gear.
[0017] A direct current brushless motor, comprising a motor body and a motor controller, the motor body comprising an outer stator assembly and a rotor assembly, and the motor controller comprising a microprocessor MCU, an inverter circuit, N physical gear detection circuits, and a power supply part, characterized in that: the multi-gear compatible few-gear control method is adopted, and the microprocessor controls the motor body to run according to the single signal input by the physical gear detection circuit.
[0018] A direct-current brushless motor as described above, characterized in that the preset value is a target rotating speed value of the motor, or a target torque value of the motor, or a target air volume value of the motor.
[0019] The present application has the following advantages:
[0020] The present application ensures that the new multi-gear motor can be compatible with the control logic of the previous few-gear motor, whether there are various combined gears or a single physical gear, enriches the diversified application scenarios of the gear motor, facilitates the multi-gear motor to replace the original system few-gear motor, and avoids the problems of shutdown and logic error fault alarm in the case that the preset value of the redundant gear is not set or the preset value is zero. [SUMMARY]
[0021] Figure 1 The control flowchart of the nine-gear compatible five-gear embodiment of the present application;
[0022] Figure 2 The physical gear detection circuit diagram of the five-gear embodiment of the present application. [DETAILED DESCRIPTION]
[0023] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings.
[0024] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between components in a certain specific posture (as shown in the drawings), and if the specific posture changes, the directional indications also change accordingly. In addition, the descriptions involving "preferred", "suboptimal" and the like in the present application are only for description purposes, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features with "preferred", "suboptimal" can be explicitly or implicitly included at least one of the features.
[0025] A control method for multi-gear compatible few-gear, comprising
[0026] S1, preset N constant gears and M combined gears in the microprocessor MCU, and set the preset value for each constant gear and each combined gear, and one combined gear triggers at least one constant gear, wherein N and M are positive numbers;
[0027] S2, the microprocessor MCU judges whether there is at least one combined gear whose preset value is 0 in the M combined gears;
[0028] Preferably, one combined gear triggers two constant gears in S1;
[0029] S3. If it exists, jump to S4 to enter N gear control mode; otherwise, jump to S5 to enter N+M gear control mode.
[0030] S4. When the microprocessor MCU detects a fixed gear, the microprocessor MCU runs the preset value of the corresponding fixed gear; when the microprocessor MCU detects a combined gear, the microprocessor MCU runs the combined gear, which triggers the composite gear. The gears contained in the composite gear are compared, and the maximum or minimum target value is selected for execution.
[0031] Preferably, in S4, when a combination gear is detected, the maximum or minimum preset value of the two constant gears triggered simultaneously by the combination gear is used.
[0032] S5. When the microprocessor MCU detects a normal setting, the microprocessor MCU runs the preset value of the corresponding normal setting; when the microprocessor MCU detects a combination setting, the microprocessor MCU runs the combination setting and triggers the preset value of the corresponding combination setting.
[0033] This case also includes N physical gear detection circuits. The output of each physical gear detection circuit is connected to an I / O port of the microprocessor MCU. The input of each physical gear detection circuit is connected to a single signal source, and one physical gear detection circuit is connected to one fixed gear. It also includes a memory in which the fixed gear, the fixed gear preset value, the combined gear and the combined gear preset value are stored. The microprocessor MCU detects the memory to read the information of each gear and the preset value corresponding to each gear.
[0034] like Figure 1 As shown, the following example uses a nine-speed compatible five-speed application. The microprocessor (MCU) enters a five-speed control mode and sets a combination speed to trigger two default speeds. When the combination speed is detected, the maximum default speed among the two default speeds triggered by that combination speed is executed. The control logic is described as follows:
[0035] S1. Pre-store the speed values for each gear in the memory of the nine-speed motor. The speed values for each gear are set as follows:
[0036] T1 = 400 rpm;
[0037] T2 = 500 rpm;
[0038] T3 = 600 rpm;
[0039] T4 = 700 rpm;
[0040] T5 = 800 rpm;
[0041] T6 = 900 rpm;
[0042] T7=0 rpm;
[0043] T8=1000 rpm;
[0044] T9=0 rpm;
[0045] wherein T1-T5 are normal gears, and T6-T9 are combination gears;
[0046] The combination gear T6 simultaneously connects the normal gears T1 and T2 to form a compound gear;
[0047] The combination gear T7 simultaneously connects the normal gears T1 and T3 to form a compound gear;
[0048] The combination gear T8 simultaneously connects the normal gears T1 and T4 to form a compound gear;
[0049] The combination gear T9 simultaneously connects the normal gears T1 and T5 to form a compound gear;
[0050] S2, after power-on, the microprocessor MCU reads the preset speed values of each gear in the memory of the nine-gear motor, and determines whether at least one of the preset speed values of the combination gears T6-T9 is 0;
[0051] S3, since the preset speed values of the combination gears T7 and T9 are 0, the microprocessor MCU enters a five-gear control mode. At this time, the combination logic is shielded, and the compound logic is activated;
[0052] S4, it is set that when the microprocessor MCU detects any one of the normal gears T1-T5, the corresponding physical gear detection circuit inputs a signal to the microprocessor MCU, so that the microprocessor MCU runs the preset speed value of the corresponding normal gear;
[0053] When the microprocessor MCU detects the combination gear T6, the physical gear detection circuits corresponding to the normal gears T1 and T2 are simultaneously connected and input a signal to the microprocessor MCU, so that the microprocessor MCU runs the maximum preset value of the normal gears T1 and T2;
[0054] When the microprocessor MCU detects the combination gear T7, the physical gear detection circuits corresponding to the normal gears T1 and T3 are simultaneously connected and input a signal to the microprocessor MCU, so that the microprocessor MCU runs the maximum preset value of the normal gears T1 and T3;
[0055] When the microprocessor MCU detects the combination gear T8, the physical gear detection circuits corresponding to the normal gears T1 and T4 are simultaneously connected and input a signal to the microprocessor MCU, so that the microprocessor MCU runs the maximum preset value of the normal gears T1 and T4;
[0056] When the microprocessor MCU detects the combination gear T9, the physical gear detection circuits corresponding to the preset gears T1 and T5 are simultaneously turned on and input signals to the microprocessor MCU, so that the microprocessor MCU runs the maximum preset value of the preset gears T1 and T5.
[0057] Therefore, in the present embodiment, when the user inputs the preset gear T1, the microprocessor MCU runs the preset speed value 400rpm of the preset gear T1;
[0058] When the user inputs the preset gear T2, the microprocessor MCU runs the preset speed value 500rpm of the preset gear T2;
[0059] When the user inputs the preset gear T3, the microprocessor MCU runs the preset speed value 600rpm of the preset gear T3;
[0060] When the user inputs the preset gear T4, the microprocessor MCU runs the preset speed value 700rpm of the preset gear T4;
[0061] When the user inputs the preset gear T5, the microprocessor MCU runs the preset speed value 800rpm of the preset gear T5;
[0062] When the user inputs the combination gear T6, the microprocessor MCU runs the maximum preset value of the preset gears T1 and T2, i.e. the preset speed value 500rpm of the preset gear T2;
[0063] When the user inputs the combination gear T7, the microprocessor MCU runs the maximum preset value of the preset gears T1 and T3, i.e. the preset speed value 600rpm of the preset gear T3;
[0064] When the user inputs the combination gear T8, the microprocessor MCU runs the maximum preset value of the preset gears T1 and T4, i.e. the preset speed value 700rpm of the preset gear T4;
[0065] When the user inputs the combination gear T9, the microprocessor MCU runs the maximum preset value of the preset gears T1 and T5, i.e. the preset speed value 800rpm of the preset gear T5.
[0066] As shown in the following nine-gear compatible five-gear application example, the microprocessor MCU enters the nine-gear control mode and sets a combination gear to trigger two preset gears, and the control logic is described as follows: Figure 1
[0067] S1, prestore the speed values of each gear in the memory of the nine-gear motor, and the speed values of each gear are set as follows:
[0068] T1 = 400rpm;
[0069] T2 = 500 rpm;
[0070] T3 = 600 rpm;
[0071] T4 = 700 rpm;
[0072] T5 = 800 rpm;
[0073] T6 = 900 rpm;
[0074] T7 = 1000 rpm;
[0075] T8 = 1100 rpm;
[0076] T9 = 1200 rpm;
[0077] wherein T1-T5 are normal gears, T6-T9 are combination gears,
[0078] the combination gear T6 simultaneously connects the normal gears T1 and T2;
[0079] the combination gear T7 simultaneously connects the normal gears T1 and T3;
[0080] the combination gear T8 simultaneously connects the normal gears T1 and T4;
[0081] the combination gear T9 simultaneously connects the normal gears T1 and T5;
[0082] S2, after power-on, the microprocessor MCU reads the preset speed values of each gear in the memory of the nine-gear motor, and judges whether at least one preset speed value in the combination gears T6-T9 is 0;
[0083] S3, since there is no preset speed value of 0 in the combination gears T7-T9, the microprocessor MCU enters the nine-gear control mode. At this time, the combination gear logic is activated, and the compound gear logic is shielded;
[0084] S4, it is set that when the microprocessor MCU detects any one of the normal gears T1-T5, the corresponding physical gear detection circuit inputs a signal to the microprocessor MCU, and the microprocessor MCU runs the preset speed value corresponding to the normal gear;
[0085] When the microprocessor MCU detects the combination gear T6, the physical gear detection circuits corresponding to the normal gears T1 and T2 are simultaneously connected and input signals to the microprocessor MCU, so that the microprocessor MCU runs the sum of the preset values of the normal gears T1 and T2;
[0086] When the microprocessor MCU detects the combined gear T7, the physical gear detection circuits corresponding to the regular gears T1 and T3 are simultaneously turned on and input signals to the microprocessor MCU, so that the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T3;
[0087] When the microprocessor MCU detects the combined gear T8, the physical gear detection circuits corresponding to the regular gears T1 and T4 are simultaneously turned on and input signals to the microprocessor MCU, so that the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T4;
[0088] When the microprocessor MCU detects the combined gear T9, the physical gear detection circuits corresponding to the regular gears T1 and T5 are simultaneously turned on and input signals to the microprocessor MCU, so that the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T5.
[0089] Therefore, in the present embodiment, when the user inputs the regular gear T1, the microprocessor MCU runs the preset speed value 400 rpm of the regular gear T1;
[0090] When the user inputs the regular gear T2, the microprocessor MCU runs the preset speed value 500 rpm of the regular gear T2;
[0091] When the user inputs the regular gear T3, the microprocessor MCU runs the preset speed value 600 rpm of the regular gear T3;
[0092] When the user inputs the regular gear T4, the microprocessor MCU runs the preset speed value 700 rpm of the regular gear T4;
[0093] When the user inputs the regular gear T5, the microprocessor MCU runs the preset speed value 800 rpm of the regular gear T5;
[0094] When the user inputs the combined gear T6, the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T2, i.e. 400+500=900 rpm;
[0095] When the user inputs the combined gear T7, the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T3, i.e. 400+600=1000 rpm;
[0096] When the user inputs the combined gear T8, the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T4, i.e. 400+700=1100 rpm;
[0097] When the user inputs the combined gear T9, the microprocessor MCU runs the sum of the preset values of the regular gears T1 and T5, i.e. 400+800=1200 rpm.
[0098] In the case, a direct current brushless motor is provided, comprising a motor body and a motor controller, the motor body comprising an outer stator assembly and a rotor assembly, the motor controller comprising a microprocessor MCU, an inverter circuit, A physical gear detection circuit and a power supply part, using the above-mentioned multi-gear compatible few-gear control method, the microprocessor controls the motor body to run according to the corresponding preset value according to the single signal input by the physical gear detection circuit. Wherein, the preset value is the target speed value of the motor, or the target torque value of the motor, or the target air volume value of the motor.
[0099] In the case, when the microprocessor MCU enters the five-gear control mode or the nine-gear control mode, and after the microprocessor MCU detects the single signal input by any physical gear detection circuit, the microprocessor MCU runs the corresponding preset speed value, and judges whether it is a constant speed mode. If it is a constant speed mode, the preset speed value is converted into a target speed physical quantity and sent to a constant speed ring control module; if it is not a constant speed mode, the preset speed value is converted into a target torque physical quantity and sent to a constant torque ring control module. Then, the constant speed ring control module or the constant torque ring control module outputs FOC vector control core SVPWM to the inverter drive module, and the inverter drive output module works according to the SVPWM control voltage, phase current, speed detection output module, and the angle observer adjusts the FOC vector control core SVPWM according to the output information of the voltage, phase current, speed detection output module, so as to make the motor realize constant speed or constant torque work.
[0100] As shown in Figure 2 Each physical gear detection circuit is an optical coupling isolation circuit, and each physical gear detection circuit comprises a first resistor, a first resistor, a third resistor, an optical coupling chip, a fourth resistor and an electrolytic capacitor. In actual use, when the physical gear detection circuit is triggered, the physical gear detection circuit is connected to the signal source, and the input signal forms an output signal which is a high level signal after passing through the physical gear detection circuit. When the trigger is disconnected, the output signal is a low level signal. As shown in the physical gear detection circuit M1 is triggered, the physical gear detection circuit is connected to the signal source, and the input signal M1 forms an output signal IO1 which is a high level signal after passing through the physical gear detection circuit and is sent to the microprocessor MCU. When the trigger is disconnected, the output signal IO1 is a low level signal. In the case, M1-M5 physical gear detection circuits correspond to constant gears T1-T5 one by one.
[0101] The above is only the preferred embodiment of the present application, not the limitation of the patent range of the present application, any equivalent structural transformation made under the inventive concept of the present application, or direct or indirect application in other related technical fields is included in the patent protection range of the present application.
Claims
1. A control method that is compatible with multiple gears and has few gears, characterized in that: Including S1. The microprocessor MCU presets N constant positions and M combination positions, and sets a preset value for each constant position and each combination position. Each combination position triggers at least one constant position. N and M are both positive numbers. S2. The microprocessor (MCU) determines whether there is at least one combination gear among the M combination gears. The preset value is 0. S3. If it exists, jump to S4 to enter N gear control mode; otherwise, jump to S5 to enter N+M gear control mode. S4. When the microprocessor MCU detects a fixed gear, the microprocessor MCU runs the preset value of the corresponding fixed gear; when the microprocessor MCU detects a combined gear, the microprocessor MCU runs the combined gear, which triggers the composite gear. The gears contained in the composite gear are compared, and the maximum or minimum target value is selected for execution. S5. When the microprocessor MCU detects a normal setting, the microprocessor MCU runs the preset value of the corresponding normal setting; when the microprocessor MCU detects a combination setting, the microprocessor MCU runs the combination setting and triggers the preset value of the corresponding combination setting.
2. The control method for multiple gears compatible with fewer gears according to claim 1, characterized in that: In S1, one combination gear triggers two default gears.
3. The control method for multiple gears compatible with fewer gears according to claim 2, characterized in that: When a combination gear is detected in S4, the maximum preset value of the two default gears triggered simultaneously by the combination gear is used.
4. The control method for multiple gears compatible with fewer gears according to claim 2, characterized in that: When a combination gear is detected in S4, the minimum preset value of the two preset gears triggered simultaneously by the combination gear is used.
5. The control method for multiple gears compatible with fewer gears according to claim 1, characterized in that: It also includes N physical gear detection circuits. The output of each physical gear detection circuit is connected to an I / O port of the microprocessor MCU, and the input of each physical gear detection circuit is connected to a single signal source. A fixed gear is connected to one physical gear detection circuit.
6. The control method for multiple gears compatible with fewer gears according to claim 1, characterized in that: It also includes a memory, in which the normal gear position, the normal gear position preset value, the combination gear position, and the combination gear position preset value are all stored. The microprocessor MCU detects the memory and reads the information of each gear position and the corresponding preset value of each gear position.
7. A brushless DC motor, comprising a motor body and a motor controller, the motor body comprising an outer stator assembly and a rotor assembly, the motor controller comprising a microprocessor (MCU), an inverter circuit, N physical gear detection circuits, and a power supply section, characterized in that: Using the multi-gear compatible low-gear control method described in any one of claims 1 to 6, the microprocessor controls the motor body to run according to the corresponding preset value based on a single signal input from the physical gear detection circuit.
8. A brushless DC motor according to claim 7, characterized in that: The preset value is the target speed of the motor, or the target torque of the motor, or the target air volume of the motor.
Citation Information
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