Chip layout pattern size measurement method, device, equipment, medium and product

By automatically generating measurement use cases and fully automated chip layout size measurement methods, the inefficiency problem caused by manual input positions in the prior art is solved and the measurement efficiency is improved.

CN119509434APending Publication Date: 2025-02-25SHENZHEN JINGYUAN INFORMATION TECH CO LTD
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Patent Information

Application Number
CN202411707110.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-25
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

The prior art requires manual input of the graphic measurement locations to be measured, resulting in low dimensional measurement efficiency of chip layout, especially in batch processing or complex measurement tasks.

Method used

By obtaining the measurement parameter configuration information of the chip layout, multiple measurement use cases are automatically generated and dimension measurement is automatically performed based on these use cases to fully automate the chip layout size measurement process.

Benefits of technology

It improves the size measurement efficiency of the chip layout, reduces the steps of manual input, and is suitable for batch processing and complex measurement tasks.

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Abstract

The invention discloses a graph size measurement method, device and equipment for a chip layout, a medium and a product, and relates to the technical field of electronic design automation. The method for measuring the graphic size of the chip layout comprises the following steps: acquiring measurement parameter configuration information of the chip layout; generating a first measurement case corresponding to the chip layout according to the measurement parameter configuration information; and according to the first measurement case, carrying out size measurement on a corresponding graph in the chip layout to obtain a measurement result corresponding to the first measurement case.
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Description

Technical Field

[0001] The present application belongs to the field of electronic design automation technology, and in particular, relates to a method, device, equipment, medium and product for measuring the graphic dimensions of a chip layout. Background Art

[0002] Electronic design automation technology is a core tool in the field of modern electronic design. It uses computer-aided design software to complete the functional design, synthesis, verification and physical design of very large-scale integrated circuit (VLSI) chips. In the process of integrated circuit design, the measurement of the graphic size of the chip layout is a crucial link.

[0003] In the existing method, the user selects the graphic measurement position to be measured in the graphical user interface, and the electronic design automation tool automatically measures and displays the dimension information of the selected position.

[0004] However, the existing method requires manual input of the measurement position of the graphic to be measured, which will cause the dimensional measurement process to be relatively slow and the measurement efficiency to be low for batch processing or complex measurement tasks. Summary of the invention

[0005] The embodiments of the present application provide a method, device, equipment, medium and product for measuring the graphic dimensions of a chip layout, which can improve the efficiency of measuring the dimensions of the chip layout.

[0006] In one aspect of an embodiment of the present application, a method for measuring the graphic size of a chip layout is provided, comprising:

[0007] Obtain measurement parameter configuration information of chip layout;

[0008] Generate a first measurement case corresponding to the chip layout according to the measurement parameter configuration information;

[0009] According to the first measurement use case, the size of the corresponding graphic in the chip layout is measured to obtain a measurement result corresponding to the first measurement use case.

[0010] In one aspect of an embodiment of the present application, a device for measuring the size of a chip layout is provided, comprising:

[0011] An information acquisition module, used to obtain measurement parameter configuration information of the chip layout;

[0012] A use case generation module, used to generate a first measurement use case corresponding to the chip layout according to the measurement parameter configuration information;

[0013] The graphic measurement module is used to measure the size of the corresponding graphic in the chip layout according to the first measurement use case to obtain the measurement result corresponding to the first measurement use case.

[0014] In one aspect of an embodiment of the present application, an electronic device is provided, which includes: a memory and a program or instruction stored in the memory and executable on a processor, wherein when the program or instruction is executed by the processor, a method for measuring the graphic size of a chip layout as provided in any aspect of the above-mentioned embodiment of the present application is implemented.

[0015] In one aspect of an embodiment of the present application, a readable storage medium is provided, on which a program or instruction is stored. When the program or instruction is executed by a processor, a method for measuring the graphic size of a chip layout as provided in any aspect of the above-mentioned embodiment of the present application is implemented.

[0016] In one aspect of an embodiment of the present application, a computer program product is provided. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes a method for measuring the graphic dimensions of a chip layout as provided in any aspect of the above-mentioned embodiment of the present application.

[0017] In the method for measuring the graphic size of a chip layout provided in an embodiment of the present application, multiple first measurement use cases corresponding to the chip layout are automatically generated according to the measurement parameter configuration information of the chip layout. Then, according to each first measurement use case, the size of the corresponding graphic in the chip layout is automatically measured to obtain the measurement result of the chip layout. In this way, the embodiment of the present application automatically generates multiple first measurement use cases according to the measurement parameter configuration information, realizes the full automation of the chip layout size measurement process, and does not require manual input of each graphic measurement position that needs to be measured, which can improve the efficiency of chip layout size measurement. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 It is a flow chart of a method for measuring the graphic size of a chip layout provided by an embodiment of the present application;

[0020] Figure 2 is a schematic diagram of a target graphic size provided by an embodiment of the present application;

[0021] Figure 3 It is a schematic diagram of an actual shape and size provided by an embodiment of the present application;

[0022] Figure 4 It is a structural schematic diagram of a chip layout graphic size measurement device provided by an embodiment of the present application;

[0023] Figure 5It is a structural schematic diagram of a chip layout graphic dimension measurement device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0024] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0025] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0026] It should be noted that the acquisition, storage, use, and processing of data in the technical solution of this application are in compliance with the relevant provisions of national laws and regulations.

[0027] It should be noted that in the embodiments of the present application, certain software, components, models and other existing solutions in the industry may be mentioned, and they should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.

[0028] In the existing method, the user selects the graphic measurement position to be measured in the graphical user interface, and the electronic design automation tool automatically measures and displays the dimension information of the selected position. However, the existing method requires manual input of the graphic measurement position to be measured, which will cause the dimension measurement process to be relatively slow and the measurement efficiency to be low for batch processing or complex measurement tasks.

[0029] The purpose of the present application is to provide a method, device, equipment, medium and product for measuring the graphic size of a chip layout. In the method for measuring the graphic size of a chip layout provided in the embodiment of the present application, multiple first measurement use cases corresponding to the chip layout are automatically generated according to the measurement parameter configuration information of the chip layout. Then, according to each first measurement use case, the size of the corresponding graphic in the chip layout is automatically measured to obtain the measurement result of the chip layout. In this way, the embodiment of the present application automatically generates multiple first measurement use cases according to the measurement parameter configuration information, realizes the full automation of the chip layout size measurement process, and does not require manual input of each graphic measurement position that needs to be measured, which can improve the size measurement efficiency of the chip layout.

[0030] The following describes the specific embodiments of the chip layout graphic size measurement method, device, medium and product provided in the embodiments of the present application. The following first introduces the chip layout graphic size measurement method.

[0031] Figure 1 A schematic flow chart of a method for measuring the size of a chip layout pattern is provided. The method for measuring the size of a chip layout pattern can be applied to a server. The method for measuring the size of a chip layout pattern can include the following steps S101 to S103.

[0032] S101, obtaining measurement parameter configuration information of a chip layout.

[0033] In this embodiment, the measurement parameter configuration information is used to characterize the configuration information of the measurement strategy for the chip layout. For example, the measurement parameter configuration information may include at least one of a measurement area range, a number of measurement positions, and a measurement direction set.

[0034] The measurement area usually refers to a specific area in the chip layout where the size measurement needs to be performed. The measurement area can be one or more rectangular areas, circular areas, or areas of other shapes, depending on the design and requirements of the chip layout.

[0035] The number of measurement positions refers to the number of specific points that need to be measured within the measurement area. These measurement points can be randomly distributed, evenly distributed, or distributed according to a specific rule. The number of measurement positions can represent the total number of measurement positions within the entire measurement area, or the local number of measurement positions in a certain direction within the measurement area.

[0036] The measurement direction set refers to the measurement directions that need to be considered during the measurement process. Due to the irregularity of the graphics in the actual chip layout, the graphic sizes of the chip layout measured along different directions are inconsistent. Therefore, for the graphic size of each measurement position, it is necessary to measure along multiple different directions. For example, the measurement direction set may include a 30-degree direction, a 60-degree direction, and a 90-degree direction.

[0037] As an example, the server may first display a target interface including an input box for inputting measurement parameter configuration information. Then, in response to the user inputting measurement parameter configuration information in the input box, the server may obtain measurement parameter configuration information corresponding to the chip layout.

[0038] S102: Generate a first measurement case corresponding to the chip layout according to the measurement parameter configuration information.

[0039] In this embodiment, the first measurement use case is used to represent a measurement instruction for a graphic size of a chip layout.

[0040] As an example, when the number of measurement locations is used to represent the total number of measurement locations within the entire measurement area, the server samples multiple measurement points corresponding to the number of measurement locations within the measurement area according to the measurement area and the number of measurement locations and a preset sampling strategy.

[0041] Then, according to the measurement direction set, a corresponding measurement direction is allocated to each measurement point, thereby obtaining a plurality of first measurement use cases corresponding to the chip layout.

[0042] S103, measuring the size of a corresponding graphic in the chip layout according to the first measurement use case, and obtaining a measurement result corresponding to the first measurement use case.

[0043] In this embodiment, the server performs specific measurement operations on the graphics corresponding to each measurement point according to the corresponding measurement instructions in the first measurement use case in the corresponding measurement direction, thereby obtaining measurement results corresponding to each first measurement use case.

[0044] Specifically, the server may execute an automatic measurement instruction through an electronic design automation tool (EDA tool), thereby achieving size measurement of a graphic corresponding to a measurement point in a chip layout corresponding to the first measurement use case.

[0045] In the method for measuring the size of a chip layout provided in this embodiment, multiple first measurement use cases corresponding to the chip layout are automatically generated according to the measurement parameter configuration information of the chip layout. Then, according to each first measurement use case, the size of the corresponding graphic in the chip layout is automatically measured to obtain the measurement result of the chip layout. In this way, the embodiment of the present application automatically generates multiple first measurement use cases according to the measurement parameter configuration information, realizes the full automation of the chip layout size measurement process, and does not require manual input of each graphic measurement position that needs to be measured, which can improve the size measurement efficiency of the chip layout.

[0046] As an optional embodiment, the measurement parameter configuration information includes at least one of a measurement area range, a number of measurement positions, and a measurement direction set;

[0047] S102 may specifically include:

[0048] According to the measurement area range and the number of measurement positions, the graphic measurement positions in the chip layout are obtained;

[0049] For each graphic measurement position, according to the measurement direction set, a first measurement case corresponding to each measurement direction in the measurement direction set is generated.

[0050] In this embodiment, the server first reads the measurement parameter configuration information and the geometric information of the chip layout to be measured, and determines the corresponding measurement area range from the chip layout to be measured; at the same time, the measurement parameter configuration information is further read to obtain the number of measurement positions that need to be measured within the measurement area. After determining the measurement area range and the number of measurement positions, the coordinates corresponding to each graphic measurement position in the chip layout to be measured are calculated according to the preset sampling strategy.

[0051] Then, a measurement direction set is parsed from the measurement parameter configuration information, and the measurement direction set generally includes multiple specific measurement directions. For each graphic measurement position, a corresponding first measurement case is generated according to each measurement direction in the measurement direction set. In this way, each first measurement case includes a specific graphic measurement position and a corresponding measurement direction.

[0052] Finally, each first measurement case is summarized and generated into a corresponding test file, which is then output for use in subsequent measurement processes.

[0053] Through this embodiment, the graphic measurement position in the chip layout is obtained according to the measurement area range and the number of measurement positions. Then, for each graphic measurement position, a first measurement case corresponding to each measurement direction in the measurement direction set is generated according to the measurement direction set. In this way, the embodiment of the present application can automatically generate multiple first measurement cases according to the measurement parameter configuration information, thereby improving the efficiency of the chip layout size measurement.

[0054] As an optional embodiment, the measurement area range includes a measurement range in the first direction and a measurement range in the second direction, and the number of measurement positions includes a measurement number in the first direction and a measurement number in the second direction;

[0055] According to the measurement area range and the number of measurement positions, the graphic measurement positions in the chip layout are obtained, which may specifically include:

[0056] Determine a first measurement step length in the first direction according to the measurement range in the first direction and the number of measurements in the first direction, and determine a second measurement step length in the second direction according to the measurement range in the second direction and the number of measurements in the second direction;

[0057] Determine a plurality of first measurement positions in the first direction within a measurement range in the first direction according to a first measurement step length, and determine a plurality of second measurement positions in the second direction within a measurement range in the second direction according to a second measurement step length;

[0058] According to each first measurement position and each second measurement position, a graphic measurement position in the chip layout is determined.

[0059] In this embodiment, it is assumed that the measurement area is a rectangular area, and a plane rectangular coordinate system is constructed as a layout coordinate system with any feature point position in the chip layout as the origin.

[0060] At this time, the measurement range in the first direction may be the measurement range along the X-axis direction of the layout coordinate system, and the measurement range in the second direction may be the measurement range along the Y-axis direction of the layout coordinate system.

[0061] The number of measurements in the first direction may be the number of measurements along the X-axis direction of the layout coordinate system, that is, the number of X-axis coordinates that need to be taken when the Y-axis coordinate remains unchanged; the number of measurements in the second direction may be the number of measurements along the Y-axis direction of the layout coordinate system, that is, the number of Y-axis coordinates that need to be taken when the X-axis coordinate remains unchanged. For example, when the number of measurements in the first direction is 10 and the number of measurements in the second direction is also 10, the number of graphic measurement positions finally collected is 10*10, that is, 100.

[0062] The first measurement step length is used to characterize the interval length of the measurement position of the collected graphics along the X-axis direction of the layout coordinate system, and the second measurement step length is used to characterize the interval length of the measurement position of the collected graphics along the Y-axis direction of the layout coordinate system.

[0063] As an example, the server first obtains the measurement range in the first direction and the number of measurements in the first direction. Then, according to the measurement range in the first direction and the number of measurements in the first direction, the measurement step length in the first direction is calculated. Specifically, the measurement step length in the first direction is equal to the measurement range in the first direction divided by the number of measurements in the first direction. Similarly, the measurement step length in the second direction is calculated using the same method as above.

[0064] Then, according to the calculated first measurement step length, multiple first measurement positions are determined within the measurement range in the first direction. Specifically, the minimum value within the measurement range in the first direction is used as the starting point, and then the data are collected in sequence according to the first measurement step length until the maximum value within the measurement range in the first direction is reached, thereby obtaining multiple first measurement positions. Similarly, multiple second measurement positions are determined within the measurement range in the second direction using the same method as above.

[0065] Finally, a Cartesian product operation is performed between each first measurement position and each second measurement position to obtain a plurality of combinations of the first measurement position and the second measurement position, thereby obtaining a plurality of graphic measurement positions in the chip layout according to the various combinations of the first measurement position and the second measurement position.

[0066] Through this embodiment, multiple first measurement positions in the first direction are obtained according to the measurement range in the first direction and the number of measurements in the first direction; multiple second measurement positions in the second direction are obtained according to the measurement range in the second direction and the number of measurements in the second direction. Then, multiple graphic measurement positions in the chip layout can be obtained according to the multiple first measurement positions and the multiple second measurement positions. In this way, the embodiment of the present application automatically determines multiple graphic measurement positions in the chip layout according to the measurement parameter configuration information, thereby generating multiple first measurement use cases, which can improve the efficiency of the chip layout size measurement.

[0067] As an optional embodiment, for each graphic measurement position, generating a first measurement case corresponding to each measurement direction in the measurement direction set according to the measurement direction set may specifically include:

[0068] The graphic measurement position, measurement direction and measurement result items are used as data items of the array to generate a target array corresponding to the chip layout;

[0069] A first measurement case corresponding to the chip layout is generated according to the target array, and an initial value of a measurement result item in the first measurement case is empty.

[0070] In this embodiment, the array is used to represent the combination form of data. For example, the array can be in a table form.

[0071] As an example, the server first uses the pandas tool in Python to create a DataFrame data table structure and saves the DataFrame as a CSV file. Then, add new columns to the DataFrame and use column_names to define the column names of each column in the DataFrame. Specifically, the DataFrame includes a sequence number column, an X-axis coordinate column, a Y-axis coordinate column, a measurement direction column, and a measurement result column.

[0072] Then, the server fills each graphic measurement position and each measurement direction into the corresponding column of the DataFrame in turn, and sets the initial value of the measurement result item in the DataFrame to empty, thereby obtaining an input.csv file, which is the target array corresponding to the chip layout.

[0073] Finally, each row in the input.csv file is used as a first measurement case, thereby obtaining multiple first measurement cases corresponding to the chip layout.

[0074] Through this embodiment, the graphic measurement position, measurement direction and measurement result items are used as data items of the array to generate a target array corresponding to the chip layout, thereby generating a first measurement case corresponding to the chip layout according to the target array. In this way, the embodiment of the present application can generate multiple first measurement cases according to the target array corresponding to the chip layout, thereby improving the efficiency of the chip layout size measurement.

[0075] As an optional embodiment, the measurement result item includes at least one of a measurement result type, a target graphic size, and an actual shape size.

[0076] In this embodiment, the measurement result item may further include a measurement result type (Measure), a target graphic size (Target), and an actual contour size (Contour).

[0077] For example, Figure 2 As shown, a schematic diagram of a target pattern size is provided. The target pattern size is the ideal pattern size of the measured area. For example, the target pattern size can be any structure on the chip layout, such as a transistor, a wire, a pad, etc. Figure 2 In the figure, the size of the regular figure is the size of the target figure in the 0 degree direction or the X-axis direction.

[0078] like Figure 3 As shown, a schematic diagram of actual shape size is provided. The actual shape size is the size of the actual outline of the measured object, and the actual shape size is used to reflect the deviation or defect in the chip manufacturing process. Figure 3In the figure, the size of the irregular figure is the actual shape size in the 0 degree direction or the X-axis direction.

[0079] The measurement result type is used to characterize the type of the graphic measurement position corresponding to the first measurement case. For example, when the graphic measurement position is within the area corresponding to the target graphic size and within the area corresponding to the actual shape size, the measurement result type belongs to the width type. Figure 2 and Figure 3 When the target point marked in is within the range of both the regular figure and the irregular figure, the measurement result type belongs to the width type.

[0080] Through this embodiment, according to the measurement result type, the target graphic size and the actual shape size, the measurement result corresponding to the graphic size of the chip layout can be accurately reflected, thereby improving the size measurement accuracy of the chip layout.

[0081] As an optional embodiment, before S103, the chip layout graphic size measurement method may further include:

[0082] Verify whether the electronic design automation tool script can be used normally and obtain the script verification result;

[0083] S103 may specifically include:

[0084] When the script verification result indicates that the electronic design automation tool script can be used normally, according to the first measurement use case, the electronic design automation tool script is used to measure the size of the corresponding graphics in the chip layout to obtain a measurement result corresponding to the first measurement use case.

[0085] In this embodiment, before measuring the size of the corresponding graphics in the chip layout according to the first measurement use case and obtaining the measurement result corresponding to the first measurement use case, the server will first verify whether the electronic design automation tool script can be used normally to obtain the corresponding script verification result.

[0086] Specifically, the server first selects or writes an electronic design automation tool script for measuring the size of graphics in the chip layout. Then, a series of tests or verification operations are performed to check whether the script can run correctly, which may include checking the syntax, logic and compatibility of the script with other tools. The script verification results are recorded and a detailed verification report is generated.

[0087] Then, according to the verification report, only when the electronic design automation tool script can be used normally, the server will measure the size of the corresponding graphics in the chip layout according to the first measurement use case through the electronic design automation tool script.

[0088] As an example, in response to a user inputting a graphic measurement position in a graphical user interface, the server obtains the input graphic measurement position and uses an electronic design automation tool script to measure the graphic size of the input graphic measurement position to verify whether the electronic design automation tool script can be used normally.

[0089] Through this embodiment, before measuring the size of the corresponding graphics in the chip layout, it is first verified whether the electronic design automation tool script can be used normally to obtain the script verification result. Only when the electronic design automation tool script can be used normally, the size of the corresponding graphics in the chip layout is measured by the electronic design automation tool script. In this way, it is possible to avoid measurement failures or measurement errors caused by the inability to use the electronic design automation tool script normally, thereby improving the accuracy of the graphic size measurement of the chip layout.

[0090] As an optional embodiment, after S103, the chip layout pattern size measurement method may further include:

[0091] Extracting at least one first test case from each first measurement case to obtain a verification measurement case;

[0092] According to the verification measurement case, the size of the corresponding graphics in the chip layout is measured through the graphical user interface to obtain the verification result of the verification measurement case;

[0093] Compare the verification results with the measurement results corresponding to the verification measurement case to determine the reliability of the measurement results of the chip layout.

[0094] In this embodiment, the server extracts at least one first test case as a verification measurement case from all first measurement cases according to a specific selection criterion or strategy (such as random selection, selection based on importance, etc.). This verification measurement case will be used to perform manual or semi-automatic dimension measurement through a graphical user interface (GUI) to verify the reliability of the measurement results of the electronic design automation (EDA) tool script.

[0095] Specifically, first open the graphical user interface in the EDA tool and ensure that all functions and tools on the interface have been correctly loaded and configured. Then, in the graphical user interface, select the corresponding chip layout graphics for measurement according to the previously extracted verification measurement case. Then, use the measurement tools provided by the graphical user interface (such as rulers, measurement lines, etc.) to measure the dimensions of the selected graphics to obtain the verification results of the verification measurement case.

[0096] Then, the measurement results corresponding to the verification measurement case are obtained from the execution results corresponding to the EDA tool script. The verification results obtained through the graphical user interface are compared with the measurement results corresponding to the EDA tool script one by one. The comparison content may include size information such as the length, width, and area of ​​the graphic.

[0097] Finally, based on the comparison results, the reliability of the measurement results of the EDA tool script is determined. If the difference between the verification result and the measurement result is within the predetermined error range, the measurement result is considered reliable. If the difference exceeds the predetermined error range, the EDA tool script or measurement process needs to be reviewed and corresponding improvement measures taken.

[0098] Through this embodiment, a verification measurement case is extracted from the first measurement case, and the verification measurement case is measured through a graphical user interface to obtain a verification result. Finally, the verification result is compared with the corresponding measurement result to evaluate whether the measurement result is reliable, thereby ensuring the reliability of the measurement result of the chip layout.

[0099] As an optional embodiment, the first measurement case is generated by a data analysis tool;

[0100] Before S102, the chip layout graphic size measurement method may further include:

[0101] Test and verify the data analysis capability of the data analysis tool to obtain the maximum measurement case capacity of the data analysis tool under the target measurement conditions;

[0102] S102 may specifically include:

[0103] Within the maximum measurement case capacity, a first measurement case corresponding to the chip layout is generated according to the measurement parameter configuration information.

[0104] In this embodiment, the server selects a suitable data analysis tool according to the requirements of the graphic size measurement of the chip layout, and sets the target measurement conditions according to the characteristics of the chip layout and the measurement requirements. Specifically, the target measurement conditions may be the speed of generating the first test case or the total time of generating the first test case.

[0105] Then, under the target measurement conditions, the data analysis tool is tested and verified for its capability, thereby determining the maximum measurement case capacity of the data analysis tool under the target measurement conditions. Specifically, this can be achieved by simulating the actual generation scenario of the first measurement case and observing the processing results and performance of the data analysis tool.

[0106] For example, assuming that the target measurement condition is that the total time for generating the first measurement case is a maximum of 15 minutes, by testing and verifying the data analysis capability of the data analysis tool, it is determined that the data analysis tool can generate a total of 7,947,500 rows of the first measurement case within 15 minutes, and the maximum measurement case capacity of the data analysis tool is 7,947,500 rows.

[0107] Through this embodiment, the data analysis tool is tested and verified for data analysis capability, and the maximum measurement case capacity of the data analysis tool under the target measurement conditions is obtained. Therefore, within the maximum measurement case capacity, a first measurement case corresponding to the chip layout is generated according to the measurement parameter configuration information. In this way, it is possible to ensure that the first measurement case corresponding to the chip layout is generated within the maximum measurement case capacity, avoid the phenomenon of failure in generating the first measurement case due to exceeding the maximum measurement case capacity, and improve the reliability of automatic generation of the first measurement case.

[0108] A method for measuring the size of a pattern based on a chip layout. Accordingly, the present application also provides a specific embodiment of a device for measuring the size of a pattern based on a chip layout.

[0109] like Figure 4 As shown, the chip layout graphic dimension measurement device 400 provided in the embodiment of the present application includes an information acquisition module 410 , a use case generation module 420 and a graphic measurement module 430 .

[0110] The information acquisition module 410 is used to acquire the measurement parameter configuration information of the chip layout;

[0111] A use case generation module 420, configured to generate a first measurement use case corresponding to the chip layout according to the measurement parameter configuration information;

[0112] The graphic measurement module 430 is used to measure the size of the corresponding graphic in the chip layout according to the first measurement case, and obtain the measurement result corresponding to the first measurement case.

[0113] As an optional embodiment, the measurement parameter configuration information includes at least one of a measurement area range, a number of measurement positions, and a measurement direction set;

[0114] The use case generation module 420 specifically includes the following units:

[0115] A position determination unit, used to obtain a graphic measurement position in a chip layout according to a measurement area range and a number of measurement positions;

[0116] The use case generating unit is used to generate, for each graphic measurement position and according to the measurement direction set, a first measurement use case corresponding to each measurement direction in the measurement direction set.

[0117] As an optional embodiment, the measurement area range includes a measurement range in the first direction and a measurement range in the second direction, and the number of measurement positions includes a measurement number in the first direction and a measurement number in the second direction;

[0118] The position determination unit is specifically used for:

[0119] Determine a first measurement step length in the first direction according to the measurement range in the first direction and the number of measurements in the first direction, and determine a second measurement step length in the second direction according to the measurement range in the second direction and the number of measurements in the second direction;

[0120] Determine a plurality of first measurement positions in the first direction within a measurement range in the first direction according to a first measurement step length, and determine a plurality of second measurement positions in the second direction within a measurement range in the second direction according to a second measurement step length;

[0121] According to each first measurement position and each second measurement position, a graphic measurement position in the chip layout is determined.

[0122] As an optional embodiment, the use case generation unit is specifically used to:

[0123] The graphic measurement position, measurement direction and measurement result items are used as data items of the array to generate a target array corresponding to the chip layout;

[0124] A first measurement case corresponding to the chip layout is generated according to the target array, and an initial value of a measurement result item in the first measurement case is empty.

[0125] As an optional embodiment, according to the first measurement case, the size of the corresponding graphic in the chip layout is measured. Before obtaining the measurement result corresponding to the first measurement case, the chip layout graphic size measurement device 400 may further include the following modules:

[0126] A script verification module is used to verify whether the electronic design automation tool script can be used normally and obtain the script verification result;

[0127] The graphic measurement module 430 is specifically used for:

[0128] When the script verification result indicates that the electronic design automation tool script can be used normally, according to the first measurement use case, the electronic design automation tool script is used to measure the size of the corresponding graphics in the chip layout to obtain a measurement result corresponding to the first measurement use case.

[0129] As an optional embodiment, according to the first measurement case, the size of the corresponding graphic in the chip layout is measured. After the measurement result corresponding to the first measurement case is obtained, the chip layout graphic size measurement device 400 may further include the following modules:

[0130] A case extraction module, used to extract at least one first test case from each first measurement case to obtain a verification measurement case;

[0131] The graphic measurement module 430 is further used to measure the size of the corresponding graphic in the chip layout through the graphical user interface according to the verification measurement case, and obtain the verification result of the verification measurement case;

[0132] The result comparison module is used to compare the verification result with the measurement result corresponding to the verification measurement case to determine the reliability of the measurement result of the chip layout.

[0133] As an optional embodiment, the first measurement case is generated by a data analysis tool;

[0134] Before generating the first measurement case corresponding to the chip layout according to the measurement parameter configuration information, the device 400 for measuring the pattern size of the chip layout may further include the following modules:

[0135] A capability testing module is used to test and verify the data analysis capability of the data analysis tool and obtain the maximum measurement case capacity of the data analysis tool under target measurement conditions;

[0136] The use case generation module 420 is specifically used for:

[0137] Within the maximum measurement case capacity, a first measurement case corresponding to the chip layout is generated according to the measurement parameter configuration information.

[0138] A method for measuring the size of a pattern based on a chip layout. Accordingly, the present application also provides a specific embodiment of a device for measuring the size of a pattern based on a chip layout.

[0139] Figure 5 A schematic diagram of the hardware structure of a chip layout graphic dimension measurement device provided in an embodiment of the present application is shown.

[0140] The chip layout pattern dimension measuring device may include a processor 501 and a memory 502 storing computer program instructions.

[0141] Specifically, the processor 501 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0142] The memory 502 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 502 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 502 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 502 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 502 is a non-volatile solid-state memory.

[0143] The processor 501 reads and executes the computer program instructions stored in the memory 502 to implement any one of the chip layout graphic size measurement methods in the above embodiments.

[0144] In one example, the chip layout pattern dimension measurement device may further include a communication interface 503 and a bus 510. Figure 5 As shown, the processor 501, the memory 502, and the communication interface 503 are connected via a bus 510 and communicate with each other.

[0145] The communication interface 503 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0146] Bus 510 includes hardware, software or both, and the parts of the graphic dimension measuring device of chip layout are coupled to each other.For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 510 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the present application considers any suitable bus or interconnection.

[0147] In addition, in combination with the chip layout graphic size measurement method in the above embodiment, the present application embodiment can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by the processor, any chip layout graphic size measurement method in the above embodiment is implemented.

[0148] In addition, in combination with the graphic size measurement method of the chip layout in the above-mentioned embodiment, the embodiment of the present application can provide a computer program product to implement it. When the instructions in the computer program product are executed by the processor of an electronic device, the electronic device executes the graphic size measurement method of the chip layout provided by any aspect of the above-mentioned embodiment of the present application.

[0149] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0150] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0151] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0152] Aspects of the present disclosure are described above with reference to the flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0153] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A method for measuring the graphic dimensions of a chip layout, characterized in that: include: Obtain measurement parameter configuration information of chip layout; Generate a first measurement case corresponding to the chip layout according to the measurement parameter configuration information; According to the first measurement use case, the size of the corresponding graphic in the chip layout is measured to obtain a measurement result corresponding to the first measurement use case.

2. The method according to claim 1, characterized in that The measurement parameter configuration information includes at least one of a measurement area range, a number of measurement positions, and a measurement direction set; The step of generating a first measurement case corresponding to the chip layout according to the measurement parameter configuration information includes: Obtaining a graphic measurement position in the chip layout according to the measurement area range and the number of measurement positions; For each of the graphic measurement positions, according to the measurement direction set, the first measurement use case corresponding to each measurement direction in the measurement direction set is generated.

3. The method according to claim 2, characterized in that The measurement area range includes a measurement range in a first direction and a measurement range in a second direction, and the number of measurement positions includes a measurement number in the first direction and a measurement number in the second direction; The obtaining of the graphic measurement positions in the chip layout according to the measurement area range and the number of measurement positions includes: Determine a first measurement step length in the first direction according to the measurement range in the first direction and the number of measurements in the first direction, and determine a second measurement step length in the second direction according to the measurement range in the second direction and the number of measurements in the second direction; Determine a plurality of first measurement positions in the first direction within a measurement range in the first direction according to the first measurement step length, and determine a plurality of second measurement positions in the second direction within a measurement range in the second direction according to the second measurement step length; The graphic measurement position in the chip layout is determined according to each of the first measurement positions and each of the second measurement positions.

4. The method according to claim 2, characterized in that: The step of generating, for each of the graphic measurement positions, the first measurement use case corresponding to each of the measurement directions in the measurement direction set according to the measurement direction set, includes: Using the graphic measurement position, the measurement direction and the measurement result items as data items of an array, generating a target array corresponding to the chip layout; A first measurement case corresponding to the chip layout is generated according to the target array, wherein an initial value of a measurement result item in the first measurement case is empty.

5. The method according to claim 4, characterized in that The measurement result item includes at least one of a measurement result type, a target graphic size, and an actual shape size.

6. The method according to any one of claims 1 to 5, characterized in that: Before measuring the size of the corresponding graphic in the chip layout according to the first measurement case and obtaining the measurement result corresponding to the first measurement case, the method further includes: Verify whether the electronic design automation tool script can be used normally and obtain the script verification result; The step of measuring the size of the corresponding graphic in the chip layout according to the first measurement use case to obtain the measurement result corresponding to the first measurement use case includes: When the script verification result indicates that the electronic design automation tool script can be used normally, according to the first measurement use case, the electronic design automation tool script is used to measure the size of the corresponding graphics in the chip layout to obtain a measurement result corresponding to the first measurement use case.

7. The method according to any one of claims 1 to 5, characterized in that: After measuring the size of the corresponding graphic in the chip layout according to the first measurement case and obtaining the measurement result corresponding to the first measurement case, the method further includes: Extracting at least one first test case from each of the first measurement cases to obtain a verification measurement case; According to the verification measurement case, the size of the corresponding graphic in the chip layout is measured through a graphical user interface to obtain a verification result of the verification measurement case; The verification result is compared with the measurement result corresponding to the verification measurement case to determine the reliability of the measurement result of the chip layout.

8. The method according to any one of claims 1 to 5, characterized in that: The first measurement case is generated by a data analysis tool; Before generating a first measurement case corresponding to the chip layout according to the measurement parameter configuration information, the method further includes: Testing and verifying the data analysis capability of the data analysis tool to obtain the maximum measurement case capacity of the data analysis tool under target measurement conditions; The step of generating a first measurement case corresponding to the chip layout according to the measurement parameter configuration information includes: A first measurement case corresponding to the chip layout is generated within the maximum measurement case capacity according to the measurement parameter configuration information.

9. An electronic device, characterized in that: The device comprises: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method for measuring the graphic size of the chip layout according to any one of claims 1 to 8 is implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the method for measuring the graphic size of a chip layout according to any one of claims 1 to 8 is implemented.

11. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for measuring the graphic size of a chip layout as described in any one of claims 1 to 8.