Multi-link communication dual-channel motor control system and control method
By designing a dual-channel control system for multi-link communication in a multi-channel motor control system, and using the high-speed cross-channel data link of DSP and FPGA modules to achieve dual-channel redundancy control, the problem of insufficient task reliability under the requirements of high load and high reliability of existing systems is solved, and higher system reliability and task completion reliability are achieved.
Patent Information
- Application Number
- CN202411434430.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-15
- Publication Date
- 2025-02-25
AI Technical Summary
In the face of high load and high reliability requirements, existing multi-channel motor control systems are difficult to effectively realize dual-channel redundancy control, resulting in insufficient task reliability.
Design a dual-channel motor control system for multi-link communication, and perform instruction interaction and state management through the high-speed cross-channel data link (CCDL) between DSP and FPGA modules to realize module reorganization and failover between dual channels to ensure that the system can still operate normally in the event of a failure.
Dual-channel redundancy control is realized through multi-link communication, which improves the reliability of the system and task completion reliability, and can ensure the normal operation of the motor control system under various loads and failures.
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Figure CN119519528A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of permanent magnet synchronous motor control, and in particular relates to a dual-channel motor control system and a control method for multi-link communication. Background Art
[0002] With the development of aircraft electrification, all types of aircraft are currently developing towards multi-electric and full-electric. The motor control system has demonstrated its advantages of high power density, high control performance, and light volume and weight.
[0003] Due to the reliability limitations of electronic devices, in critical systems, in order to ensure mission reliability, multi-channel controllers are usually used to work simultaneously, and repeated configuration of hardware and software is used to manage multiple resources, thereby improving the reliability of the product and the entire system. When one of the channels fails, the system will cut off the failed channel and work together through other channels to ensure mission reliability.
[0004] Generally, in multi-channel motor control systems, the control logic is relatively complex. With the development of power electronics technology, the performance of devices such as digital signal processors (DSPs) and field programmable gate arrays (FPGAs) has been significantly improved, and the control technology of complex logic is no longer a difficult problem to solve.
[0005] As the performance of various aircraft loads improves, the performance of motor control systems is also facing great challenges. In particular, dual three-phase motors require dual-channel controllers to control them, and higher requirements are put forward for speed control, current control, fault switching, etc., especially in some occasions, extremely high requirements are put forward for mission reliability, so a dual-channel motor control system with multi-link communication came into being. Summary of the invention
[0006] Purpose of the Invention
[0007] The purpose of the present invention is to design a dual-channel motor control system with multi-link communication, and to realize redundant control of the entire system through communication between modules to ensure the reliability of task completion.
[0008] Technical Solution
[0009] A dual-channel motor control system with multi-link communication includes a DSP control system, an FPGA control system, a drive module and a three-phase inverter module; wherein the DSP is used to complete tasks with low real-time requirements, including speed loop control, period built-in test (BIT) and protection functions; the FPGA is used to complete tasks with high real-time requirements, including current loop control, space vector modulation function, pulse width modulation (PWM) distribution and overcurrent fault protection functions; the drive module amplifies the pulse width modulation PWM wave calculated by the FPGA to drive the inverter module, thereby controlling the rotation of the motor to achieve control of the entire system.
[0010] The dual-channel motor control system with multi-link communication includes two channels with exactly the same channel configuration. The DSP, FPGA and the two channels exchange commands through a high-speed cross-channel data link (CCDL), and manage the motor control state and the function allocation of the modules used, including a high-speed cross-channel data link CCDL-I, a high-speed cross-channel data link CCDL-II, a high-speed cross-channel data link CCDL-III, and a high-speed cross-channel data link CCDL-IV. The DSP module of this channel and the FPGA module of another channel also have a spare high-speed cross-channel data link CCDL connection for data communication in emergency situations. The system FPGA also has an interactive channel with the driving module of another channel, namely a pulse width modulation PWM-AB channel and a pulse width modulation PWM-BA channel.
[0011] The DSP module in each channel of the system has a separate communication channel for communicating with an external host computer.
[0012] The dual-channel motor control system with multi-link communication is also applicable to other dual-channel or multi-channel systems, including flight control systems, power supply control systems, and control surface control systems.
[0013] The dual-channel motor control system ensures mission reliability and ensures that the dual channels jointly drive the motor to rotate under the condition that the hardware capability permits.
[0014] The dual-channel motor control system, through the interaction of multi-link communications, can ensure that in the event of a module failure, the existing healthy modules of the dual channels are integrated, the communication links are opened, and the tasks are ensured to be completed smoothly, thereby greatly improving the overall reliability of the system.
[0015] A dual-channel motor control method with multi-link communication, when the system has no faults, receives operation instruction information through communication channel A and communication channel B, DSP-A-2 and DSP-B-8 respectively determine whether the current instruction information is valid, and exchange information through high-speed cross-channel data link CCDL-Ⅱ, calculate the speed loop, and distribute current instruction information at the same time, DSP-A-2 transmits the current instruction information to FPGA-A-3 through high-speed cross-channel data link CCDL-Ⅰ, DSP-B-8 transmits the current instruction information to FPGA-B-9 through high-speed cross-channel data link CCDL-Ⅲ. FPGA-A-3 performs current loop calculation and space current vector operation to generate pulse width modulation PWM wave, amplifies the drive signal through pulse width modulation PWM-A channel drive module-A-4, and three-phase inverter module-A-5 inverts to generate three-phase voltage for driving dual three-phase motor-6 to rotate. At the same time, FPGA-B-9 performs current loop calculation and space current vector operation to generate pulse width modulation PWM wave, and amplifies the drive signal through pulse width modulation PWM-B channel driver module B-10, thereby driving the three-phase inverter module-B-11 to generate a three-phase voltage to rotate the dual three-phase motor-6. Therefore, when the two channels are operating normally, the control of the dual three-phase motor can be completed at the same time.
[0016] Compared with the prior art, the present invention has significant advantages:
[0017] The multi-link communication dual-channel motor control system of the present invention can realize dual-channel or single-channel operation by communicating between modules and completing module reorganization between fault-free modules when a module failure occurs. It can withstand more types of failures and can still ensure the operation of the motor control system under various load failure situations, with higher mission reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 It is a principle block diagram of the dual-channel motor control system with multi-link communication of the present invention.
[0019] Among them, 1-host computer, 2-DSP-A module, 3-FPGA-A module, 4-drive module A, 5-three-phase inverter module A, 6-dual three-phase motor, 7-6-way CCDL communication, 8-DSP-B module, 9-FPGA-B module, 10-drive module B, 11-three-phase inverter module B, 12-PWM interaction module. DETAILED DESCRIPTION
[0020] In order to make the purpose, technical scheme and advantages of the implementation of the present invention clearer, the technical scheme in the embodiment of the present invention will be described in more detail in combination with the embodiment of the present invention. In the example, the same or similar reference numerals throughout represent the same or similar originals or elements with the same or similar functions. The described embodiments are part of the embodiments of the present invention, not all of them. The embodiments described below by reference are exemplary and intended to be used to explain the present invention, and should not be construed as limitations on the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention. The following is a detailed description in combination with the embodiments of the present invention.
[0021] The present invention is further described in detail below through specific implementation modes.
[0022] Figure 1 The figure shows the principle block diagram of the dual-channel motor control system with multi-link communication. One channel of the entire motor control system includes the host computer-1 that issues instructions. The host computer is connected to DSP-A-2 through communication channel A. DSP-A-2 is connected to FPGA-A-3 through CCDL-Ⅰ. FPGA-A-3 is connected to drive module-A-4 through PWM-A channel to complete the drive. Drive module-A-4 drives the three-phase inverter module-A-5 to convert the input voltage into the energy required for the rotation of the dual three-phase motor-6. The connection method of the other channel is the same as the above channel connection method.
[0023] In particular, DSP-A-2 is connected to DSP-B-8 via CCDL-Ⅱ, FPGA-A-3 is connected to FPGA-B-9 via CCDL-4, FPGA-A-3 is connected to driver module B-10 via PWM-AB channel, and FPGA-B-9 is connected to driver module B-4 via PWM-BA channel.
[0024] In particular, DSP-A-2 and FPGA-B-9 have a spare CCDL-5 connection, and DSP-B-8 and FPGA-A-3 and DSP-B-8 have a spare CCDL-6 connection. Therefore, CCDL-Ⅰ, CCDL-Ⅱ, CCDL-Ⅲ, CCDL-Ⅳ, CCDL-Ⅴ and CCDL-Ⅵ constitute 6-way CCDL communication-7.
[0025] A dual-channel motor control method with multi-link communication, in which, in the motor control system, when the system is fault-free, operation instruction information is received through communication channel A and communication channel B, DSP-A-2 and DSP-B-8 respectively determine whether the current instruction information is valid, and exchange information through CCDL-Ⅱ, calculate the speed loop, and distribute current instruction information at the same time, DSP-A-2 transmits the current instruction information to FPGA-A-3 through CCDL-Ⅰ, and DSP-B-8 transmits the current instruction information to FPGA-B-9 through CCDL-Ⅲ. FPGA-A-3 performs current loop calculation and space current vector operation to generate PWM wave, amplifies the drive signal through PWM-A channel drive module-A-4, and three-phase inverter module-A-5 inverts to generate three-phase voltage for driving dual three-phase motor-6 to rotate. At the same time, FPGA-B-9 performs current loop calculation and space current vector operation to generate PWM wave, amplifies the drive signal through PWM-B channel drive module B-10, and then drives three-phase inverter module-B-11 to generate three-phase voltage for rotating dual three-phase motor-6. Therefore, when the two channels operate normally, the control of the dual three-phase motors can be completed simultaneously.
[0026] In the motor control system, each module is provided with a fault detection unit, and has a self-fault detection function. After self-detection of a fault, the fault information is transmitted to the fault processing unit through CCDL.
[0027] In particular, the fault detection unit included in the motor control system can perform periodic detection. The periodic fault detection is set on DSP-A-2 and DSP-B-8. Both DSP-A-2 and DSP-B-8 have a periodic fault detection function. By analyzing the data of each sensor and building a health model, the health status of each module can be determined and the fault can be isolated to each module.
[0028] In the dual-channel motor control method of multi-link communication, when only communication channel A fails, DSP-B-8 receives the instruction of communication channel B and sends it to DSP-A-2 module through CCDL-Ⅰ, and the two channels work simultaneously. When communication channel B fails, the processing logic is the same. When communication channel A and communication channel B fail at the same time, the last command is kept running for a specific time and then stopped.
[0029] Furthermore, when CCDL-Ⅱ fails, DSP-A-2 and DSP-B-8 cannot interact with each other. At this time, CCDL-Ⅳ completes the information interaction between the two channels through FPGA-A-3 and FPGA-B-9, and the two channels work simultaneously.
[0030] Furthermore, when DSP-A-2 fails, DSP-B-8 takes over all the work of DSP-A-2, calculates the current command information and sends it to FPGA-A-3 through CCDL-IV, and the two channels work simultaneously.
[0031] Furthermore, when FPGA-A-3 fails, FPGA-B-9 takes over all its work, and the calculated PWM signal drives the driver module-A-4 to work through the PWM-BA channel, and drives the driver module B-10 to work through the PWM-B channel, and the two channels work simultaneously. The PWM-BA channel and the PWM-AB channel constitute a PWM interaction module.
[0032] Furthermore, it can be seen from the above that when other single module failures occur, through the interaction of multi-link communication, two channels can work simultaneously, thereby improving the reliability of the entire system.
[0033] Furthermore, in the dual-channel motor control method of multi-link communication, when a failure occurs in the three-phase inverter module-A-5, it is impossible for the two channels to work simultaneously, so the three-phase inverter module of channel B is responsible for the output of all power.
[0034] Furthermore, the dual-channel motor control method of the multi-link communication can complete single-channel operation under the minimum conditions that can meet single-channel operation by integrating the fault information of each module. In one embodiment, when DSP-B-8 and FPGA-A-3 fail, and the drive module B-10 and the three-phase inverter module-B-11 fail at the same time, the PWM calculation is completed by DSP-A-2 and FPGA-B-9, and the drive module-A-4 and the three-phase inverter module-A-5 are driven by the PWM-BA channel to complete the single-channel operation. It can be seen that when multiple module failures occur in two channels, compared with the removal of the entire control system in the traditional method, this system can still complete the current task.
[0035] Furthermore, in the dual-channel motor control method with multi-link communication, when only one FPGA module among the DSP and FPGA modules can work normally, and the drive module and the three-phase inverter module are not faulty, the FPGA module can respond to the emergency mode and drive the subsequent circuit to operate at the minimum required speed to ensure the completion of the task.
[0036] Furthermore, the DSP module is defined as module A, the FPGA module is defined as module B, the drive module and the three-phase inverter are defined as module C, the minimum system is module B and module C, and the system that can complete the full function is module A, module B and module C. As long as the healthy module includes module B and module C, at least the single-channel motor can be guaranteed to operate and the current task can be completed.
[0037] A dual-channel motor control method with multi-link communication completes health monitoring and health diagnosis of multiple modules of the system through periodic BIT, and completes information interaction with other modules at the same time. It has more interactive content, wider monitoring modules, and significantly improved fault isolation rate.
[0038] The dual-channel motor system control method completes the interaction between multiple modules through CCDL communication, realizes the health diagnosis function, and completes the selection of healthy modules according to the module priority, thereby jointly ensuring the operation of the motor control system.
[0039] In summary, the dual-channel motor control system with multi-link communication proposed in the present invention realizes the recombination of the dual-channel modules when a module fails, and can still ensure the dual-channel or single-channel operation of the motor control system when a single or multiple faults occur, thereby ensuring the reliability of the task and the safety of the system, and is suitable for occasions with very high reliability requirements.
[0040] It is understood by those skilled in the art that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as the general understanding of ordinary technicians in the field to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and unless defined as here, will not be interpreted with idealized or overly formal meanings. The specific implementation methods described above further describe the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the present invention. Within the spirit and principle of the present invention, any technician familiar with the profession may use the above disclosed technical content to change or modify it into an equivalent embodiment of equivalent changes for application in other fields, but any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the technical solution content of the present invention, any modification, equivalent replacement, improvement, etc., made according to the technical essence of the present invention, should be included in the protection scope of the present invention.
Claims
1. A dual-channel motor control system with multi-link communication, characterized in that: It includes DSP control system, FPGA control system, drive module and three-phase inverter module; DSP is used to complete tasks with low real-time requirements, including speed loop control, cycle machine internal self-detection BIT and protection functions; FPGA is used to complete tasks with high real-time requirements, including current loop control, space vector modulation function, pulse width modulation PWM distribution and over-current fault protection functions; the drive module amplifies the pulse width modulation PWM wave generated by FPGA calculation to drive the inverter module, thereby controlling the rotation of the motor to achieve control of the entire system; The dual-channel motor control system with multi-link communication includes two channels with exactly the same channel configuration; the DSP, FPGA and the two channels exchange commands through a high-speed cross-channel data link CCDL, and perform motor control state management and function allocation of the modules used, including a high-speed cross-channel data link CCDL-I, a high-speed cross-channel data link CCDL-II, a high-speed cross-channel data link CCDL-III, and a high-speed cross-channel data link CCDL-IV. The DSP module of this channel and the FPGA module of another channel also have a spare high-speed cross-channel data link CCDL connection for data communication in emergency situations; the system FPGA and the driving module of another channel also have an interactive channel, namely a pulse width modulation PWM-AB channel and a pulse width modulation PWM-BA channel.
2. The system according to claim 1, characterized in that The DSP module in each channel of the system has a separate communication channel for communicating with an external host computer.
3. The system according to claim 2, characterized in that The dual-channel motor control system with multi-link communication is also applicable to dual-channel or multi-channel systems.
4. The system according to claim 3, characterized in that The dual-channel or multi-channel system includes a flight control system, a power control system, and a control surface control system.
5. The system according to claim 4, characterized in that The dual-channel motor control system ensures mission reliability and ensures that the dual channels jointly drive the motor to rotate under the condition that the hardware capability permits.
6. The system according to claim 5, characterized in that The dual-channel motor control system, through the interaction of multi-link communications, can ensure that in the event of a module failure, the existing healthy modules of the dual channels are integrated, the communication links are opened, and the tasks are ensured to be completed smoothly, thereby greatly improving the overall reliability of the system.
7. The control method of the system according to claim 6, characterized in that: When the system has no faults, the operation command information is received through communication channel A and communication channel B. DSP-A-2 and DSP-B-8 respectively determine whether the current command information is valid, and exchange information through the high-speed cross-channel data link CCDL-Ⅱ to calculate the speed loop and distribute the current command information. DSP-A-2 transmits the current command information to FPGA-A-3 through the high-speed cross-channel data link CCDL-Ⅰ, and DSP-B-8 transmits the current command information to FPGA-B-9 through the high-speed cross-channel data link CCDL-Ⅲ; FPGA-A-3 performs current loop calculation and space current vector The operation generates a pulse width modulation PWM wave, and the drive signal is amplified by the pulse width modulation PWM-A channel driver module-A-4, and the three-phase inverter module-A-5 inverts to generate a three-phase voltage for driving the dual three-phase motor-6 to rotate; at the same time, FPGA-B-9 performs current loop calculation and space current vector operation to generate a pulse width modulation PWM wave, and the drive signal is amplified by the pulse width modulation PWM-B channel driver module B-10, and then drives the three-phase inverter module-B-11 to generate a three-phase voltage for rotating the dual three-phase motor-6; therefore, when the two channels are operating normally, the control of the dual three-phase motors can be completed at the same time.
8. The control method according to claim 7, characterized in that: Through CCDL communication, the interaction between multiple modules is completed, the health diagnosis function is realized, and the healthy module is selected according to the module priority to jointly ensure the operation of the motor control system.